A memory, an electronic device, and a method for accelerating the startup of an electronic device

Abstract

The present invention provides a memory, an electronic device, and a method for accelerating the startup of an electronic device. The memory includes: a flash memory unit for storing a system image file; the flash memory unit stores the system image file in a partitioned form, and the physical addresses of the data stored within the same partition are continuous; a main control unit for, according to a startup instruction, reading the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table, and reading the corresponding data from the flash memory unit to the memory of the electronic device according to each starting physical address and the corresponding ending physical address. Through the memory, the electronic device, and the method for accelerating the startup of the electronic device provided by the present invention, the startup speed can be improved.

Description

Technical Field

[0001] The present invention relates to the field of storage, and in particular to a memory, an electronic device, and a method for accelerating the startup of the electronic device. Background Art

[0002] Currently, optimizing the system boot speed of electronic devices primarily depends on the hardware performance of the eMMC (electromagnetic memory) and the amount of data loaded into the boot image. Specifically, the read and write speed of the eMMC directly affects the efficiency of data loading during the boot process. Since the boot image includes essential components for system startup (such as the kernel, drivers, and basic services), its capacity is difficult to significantly reduce through software streamlining or deletion.

[0003] However, as electronic devices like TVs and set-top boxes have made boot time a key performance indicator, the limitations of existing technical solutions have become increasingly apparent. Improving eMMC performance requires the use of higher-specification chips, which significantly increases hardware costs. Therefore, how to achieve faster boot times while controlling costs is a pressing technical challenge. Summary of the Invention

[0004] The present invention aims to provide a memory, an electronic device and a method for accelerating the startup of the electronic device, which can improve the startup speed.

[0005] To solve the above technical problems, the present invention is achieved through the following technical solutions:

[0006] The present invention provides a memory, comprising:

[0007] A flash memory unit, configured to store a system image file; the flash memory unit stores the system image file in the form of partitions, with the physical addresses of data stored in the same partition being continuous;

[0008] The main control unit is used to read the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to a power-on instruction, and read the corresponding data from the flash memory unit to the memory of the electronic device according to each starting physical address and the corresponding ending physical address.

[0009] In one embodiment of the present invention, the flash memory unit stores the system image file according to the following steps:

[0010] The main control unit controls the flash memory unit to enter a single-level storage mode;

[0011] The main control unit receives the system image file and writes the system image file into the flash memory unit in a sequential write mode;

[0012] The main control unit determines the storage capacity of the flash memory unit in the single-level storage mode:

[0013] When the amount of data of the system image file written into the flash memory cell does not reach the storage capacity, control the flash memory cell to maintain the single-level storage mode until the storage capacity is reached or the writing is completed;

[0014] When the amount of data of the system image file written into the flash memory cell reaches the storage capacity, control the flash memory cell to release the single-level storage mode and continue to write the remaining system image file into the flash memory cell until the writing is completed.

[0015] In an embodiment of the present invention, the main control unit creates a data mapping table according to the following steps:

[0016] According to the writing order of the system image file written into each partition, sequentially obtain and judge the amount of data written in each partition:

[0017] When the amount of data written in the partition is less than or equal to the threshold, update the starting physical address and the ending physical address of the data written in the partition to a preset data mapping table;

[0018] When the amount of data written in the partition is greater than the threshold, split the data written in the partition according to the threshold to obtain a plurality of sub-partitions; update the starting physical address and the ending physical address of the data written in the sub-partitions to the data mapping table; wherein, the amount of data written in each sub-partition is less than or equal to the threshold, and the physical addresses of the data written in each sub-partition are continuous.

[0019] In an embodiment of the present invention, the main control unit reads the data of the flash memory cell to the memory of the electronic device according to the following steps:

[0020] According to the starting physical address and the ending physical address recorded in the data mapping table, sequentially read the corresponding data from the flash memory cell in order and form corresponding data packets to be transmitted to the cache unit of the memory;

[0021] When the cache unit receives a data packet, send the data packet to the memory, and during the sending process, simultaneously receive the next data packet transmitted by the flash memory cell until all the data packets are read from the flash memory cell to the memory.

[0022] In an embodiment of the present invention, the main control unit is further configured to obtain a system update file, update the system image file stored in the flash memory cell according to the system update file, and update the data mapping table according to the starting physical address and the ending physical address of the data written in each partition in the flash memory cell after the update.

[0023] In an embodiment of the present invention, the master control unit updates the data mapping table according to the following steps:

[0024] According to the writing order of the updated system image file written to each partition, sequentially obtain and judge the amount of data written in each updated partition:

[0025] When the amount of data written in the updated partition is less than or equal to the threshold, update the starting physical address and the ending physical address of the data written in this partition to a preset data comparison table;

[0026] When the amount of data written in the updated partition is greater than the threshold, split the data written in this partition according to the threshold to obtain multiple updated sub-partitions; update the starting physical address and the ending physical address of the data written in the updated sub-partitions to the data comparison table; wherein, the amount of data written in each updated sub-partition is less than or equal to the threshold, and the physical addresses of the data written in each updated sub-partition are continuous;

[0027] Update the data in the data comparison table to the data mapping table.

[0028] In an embodiment of the present invention, the master control unit updates the data in the data comparison table to the data mapping table according to the following steps:

[0029] Update the data in the data comparison table to a preset backup mapping table, and clear the data in the data comparison table;

[0030] After the memory is restarted, according to the writing order of the updated system image file written to each partition, repeatedly obtain the starting physical address and the ending physical address of the data written in the updated partition and the data written in the updated sub-partitions, and update them to the data comparison table;

[0031] Update the data mapping table according to the comparison result of the data in the data comparison table and the data in the backup mapping table.

[0032] In an embodiment of the present invention, the master control unit updates the data mapping table according to the following steps:

[0033] Judge whether the data in the data comparison table is the same as the data in the backup mapping table:

[0034] If they are the same, update the data mapping table according to the data in the backup mapping table, and clear the data in the data comparison table and the backup mapping table after the update is completed;

[0035] If they are different, update the data in the data comparison table to the backup mapping table, and clear the data in the data comparison table; and after the next restart of the memory, repeat the judgment until the data in the data comparison table is the same as the data in the backup mapping table.

[0036] The present invention also provides an electronic device, which includes the memory described above.

[0037] The present invention also provides a method for accelerating the startup of an electronic device. The electronic device includes a processor, a memory, and a storage; the flash memory unit of the storage stores system image files in a partitioned form, and the physical addresses of the data stored in the same partition are continuous; the method for accelerating the startup includes:

[0038] Generate and send a startup instruction through the processor;

[0039] The main control unit of the storage reads the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to the startup instruction;

[0040] The main control unit of the storage reads the corresponding data from the flash memory unit to the memory according to each starting physical address and the corresponding ending physical address.

[0041] As described above, the present invention provides a storage, an electronic device, and a method for accelerating the startup of an electronic device. By optimizing the eMMC control strategy, without replacing hardware or compressing image files, the reading and writing efficiency can be improved, and the startup time can be shortened. Adopting the cooperative mechanism of double mapping table backup and data comparison table can ensure the consistency of mapping table update.

[0042] Of course, it is not necessary for any product implementing the present invention to achieve all the above advantages simultaneously. Description of the Drawings

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0044] Figure 1 It is a schematic diagram of an electronic device in an embodiment of the present invention;

[0045] Figure 2 It is a flowchart of a method for accelerating the startup of an electronic device in an embodiment of the present invention.

[0046] In the figure: 10, processor; 20, memory; 30, storage; 31, main control unit; 32, cache unit; 33, flash memory unit. Detailed implementation

[0047] The following will clearly and completely describe the technical solutions of the embodiments of the present invention with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0048] Please refer to Figure 1 , the present invention discloses an electronic device, which may include a processor 10, a memory 20, and a storage 30, etc. The processor 10 may be a central computing unit (CPU). The memory 20 may be a Static Random-Access Memory (SRAM), and the memory 20 may directly interact with the processor 10. The storage 30 may be an Embedded MultiMediaCard (eMMC), and the storage 30 may be used to store system image files. Among them, the processor 10 may load the system image file from the storage 30 into the memory 20 to start the electronic device.

[0049] Please refer to Figure 1 , in some embodiments, the storage 30 may include a main control unit 31, a cache unit 32, and a flash memory unit 33. The main control unit 31 may be a Microcontroller Unit (MCU). The main control unit 31 may be used to execute specific control tasks, such as reading data, processing instructions from the electronic device, etc. The core of the main control unit 31 may be designed based on the RISC-V architecture to execute various control and computing tasks.

[0050] In some embodiments, the cache unit 32 may include a write buffer and a read buffer. The write buffer and the read buffer may serve as a high-speed temporary storage area between the main control unit 31 and the flash memory unit 33 for storing data and instructions frequently accessed by the main control unit 31. The write buffer is mainly to improve the efficiency of data writing and optimize the performance of the write operation. The read buffer is mainly to improve the speed of data reading and reduce the access to the flash memory unit.

[0051] In some embodiments, the flash memory cell 33 can be a physical unit (NAND) in the memory for storing data. The flash memory cell 33 can be composed of multiple memory blocks. Each memory block can contain multiple pages. Each page is the minimum unit for read / write operations, while a block is the minimum unit for erase operations. Data is usually read and written in units of pages, while the entire block needs to be erased during erasure.

[0052] In some embodiments, when the processor 10, as the computing core of the electronic device, detects that a system image file needs to be installed, it can generate a specific installation instruction (such as CMD56 + arg 0x00000001). After receiving the installation instruction, the main control unit 31 can configure the working mode of the flash memory cell 33 through a hardware interface (such as the ONFI protocol). After the flash memory cell 33 enters the single-level storage mode, all read and write operations are performed at 1 bit / cell to improve the write / read speed.

[0053] In some embodiments, when installing the system image file into the flash memory cell 33 of the memory 30, the main control unit 31 of the memory 30 can control the flash memory cell 33 to enter the single-level storage mode according to the installation instruction. Among them, the flash memory cell 33 may be in the two-level storage mode or the three-level storage mode. The single-level storage mode (Single-Level Cell, SLC) means that each storage cell stores only 1 bit of data. The multi-level storage mode (Multi-Level Cell, MLC) means that each storage cell stores 2 bits of data. The triple-level storage mode (Triple-Level Cell, TLC) means that each storage cell stores 3 bits of data. Since the read and write speed of the flash memory cell 33 in the SLC mode is significantly higher than that in the MLC / TLC mode, in order to improve the read and write speed, the flash memory cell 33 can be forced to enter the SLC mode.

[0054] In some embodiments, the main control unit 31 receives the system image file transmitted by the processor 10 and writes the system image file into the flash memory cell 33 in sequential write mode. Specifically, the sequential write mode (Sequential Write Mode) means that data is written sequentially in the order of physical addresses instead of randomly. By continuously writing data, the addressing overhead can be reduced, and the write speed and read speed can be improved. The system image file is usually a large file (such as an operating system image). Sequential writing can reduce the addressing time (without frequent jumps to physical addresses) and utilize caches (Cache) and pipelines (Pipeline) for optimization to improve throughput.

[0055] In some embodiments, when the flash memory unit 33 is in MLC mode and its storage capacity is 8GB, after it is forced into SLC mode, it can only store 4GB of data. When the data exceeds 4GB, the flash memory unit 33 will release the SLC mode and revert to the MLC mode to continue storing data. When the flash memory unit 33 is in TLC mode and its storage capacity is 32GB, after it is forced into SLC mode, it can only store 8GB of data. When the data exceeds 8GB, the flash memory unit 33 will release the SLC mode and revert to the TLC mode to continue storing data. Therefore, during the process of writing the system image file, the main control unit 31 needs to determine the storage capacity of the flash memory unit 33 in the single-level storage mode. The main control unit 31 can monitor the amount of written data in real time to dynamically determine whether to switch modes. For example, in SLC mode, when the storage capacity of the flash memory unit 33 is exhausted, it can automatically fall back to MLC mode or TLC mode.

[0056] In some embodiments, if the amount of data written to the system image file in the flash memory unit 33 does not reach the storage capacity, the flash memory unit 33 can be controlled to maintain a single-level storage mode until the storage capacity is reached or the writing is completed. For example, if the system image file has a data volume of 3.5GB and a storage capacity of 4GB, after the system image file is completely loaded into the flash memory unit 33, the flash memory unit 33 can still maintain a single-level storage mode to achieve high-speed write / read operations.

[0057] In some embodiments, when the amount of data written to the system image file in the flash memory unit 33 reaches the storage capacity, the flash memory unit 33 can be controlled to exit the single-level storage mode and continue to write the remaining system image file to the flash memory unit 33 until the writing is complete. For example, if the system image file has a data volume of 5GB and a storage capacity of 4GB, after loading the 4GB system image file into the flash memory unit 33, the flash memory unit 33 in the single-level storage mode has no free storage capacity. In this case, in order to completely load the system image file, it is necessary to control the flash memory unit 33 to exit the single-level storage mode.

[0058] In some embodiments, when loading the system image file into the flash memory unit 33, the flash memory unit 33 may store the system image file in the form of partitions, and the physical addresses of the data stored within the same partition are consecutive. Among them, the space sizes of different partitions are different. For example, the size of a certain partition is only 4M, and the size of another partition is 1G. Each partition stores data for a specific function (such as the kernel, drivers, user applications). For example, the Android system may include more than 20 partitions ("bootloader", "boot", "vendor", "odm", etc.). For each partition, corresponding space is reserved, but the actual data is usually not full (for example, the size of a certain partition is 1GB, and the actual data is only 500MB). When burning the system image file, it is necessary to fill the remaining space of each partition with all 0 data (for example, for a 1GB partition with 500MB of actual data, the latter 500MB is filled with 0). At this time, the main control unit 31 may consider the data between different partitions to be consecutive (such as logical addresses 0x0000 to 0xFFFF are all valid data).

[0059] In some embodiments, the main control unit 31 may, according to the power-on instruction generated by the processor of the electronic device, read the start physical address and end physical address of the data written in each partition from a preset data mapping table, and according to each start physical address and the corresponding end physical address, read the corresponding data from the flash memory unit 33 into the memory 20 of the electronic device. Specifically, the data mapping table can be used to record the start physical address (StartLBA) and end physical address (End LBA) of the data written in each partition. The data mapping table can be stored in the read-only memory (ROM) of the memory 30. After the electronic device is powered on, the processor 10 may send a start instruction to the main control unit 31. The main control unit 31 may load the data mapping table from the read-only memory into the internal cache, and sequentially read the data from the flash memory unit 33 into the memory 20 according to the start physical address and end physical address of the data written in each partition in the table.

[0060] In some embodiments, the main control unit 31 may create a data mapping table when the electronic device is started for the first time. Among them, the main control unit 31 may sequentially obtain and judge the amount of data written in each partition according to the writing order of the system image file written to each partition. The main control unit 31 may sequentially check the amount of data written in each partition (such as partitions A, B, C, etc.), and adopt different strategies according to whether the amount of data written exceeds the threshold.

[0061] In some embodiments, when the amount of data written in a partition is less than or equal to a threshold value (e.g., 4MB), the starting physical address and the ending physical address of the data written in the partition can be directly updated to a preset data mapping table. The specific size of the threshold value may not be set. For example, it can match the erasure block size of the flash memory cell 33 (such as 4MB) to avoid performance degradation caused by cross-block reading and writing.

[0062] In some embodiments, when the amount of data written in a partition is greater than the threshold value, the data written in the partition is split according to the threshold value to obtain multiple sub-partitions; the starting physical address and the ending physical address of the data written in the sub-partitions are updated to the data mapping table; wherein, the amount of data written in each sub-partition is less than or equal to the threshold value, and the physical addresses of the data written in each sub-partition are consecutive. When the physical addresses of the data are consecutive, the main control unit 31 can read the entire sub-partition through a single command, reducing the addressing time.

[0063] In some embodiments, the main control unit 31 can read the data of the flash memory cell 33 to the memory 20 of the electronic device. The main control unit 31 can sequentially read the corresponding data from the flash memory cell 33 according to the starting physical address and the ending physical address recorded in the data mapping table, and form corresponding data packets for transmission to the cache unit 32 of the memory 30. The data packet may include all the data of a partition or a sub-partition.

[0064] In some embodiments, when the cache unit 32 receives a data packet, it sends the data packet to the memory 20, and during the sending process, it simultaneously receives the next data packet transmitted by the flash memory cell 33 until all the data packets are read from the flash memory cell to the memory. When the cache unit 32 sends a data packet to the memory 20, the flash memory cell 33 can simultaneously prepare the next data packet to mask the flash reading latency.

[0065] In some embodiments, for example, data packets such as A1, A2, A3, A4, A5, and A6 are stored in the flash memory cell 33. The flash memory cell 33 can first read A1 to the cache unit 32. When the cache unit 32 receives all of A1, it can transmit A1 to the memory 20. At the same time, during the transmission process, the flash memory cell 33 can read A2 to the cache unit 32. And so on, until all the data packets are transmitted to the memory 20.

[0066] In some embodiments, during the operation of the electronic device, the system image file will inevitably be upgraded and optimized. The main control unit 31 is further configured to receive a system update file through the processor 10, update the system image file stored in the flash memory unit 33 according to the system update file, and update the data mapping table according to the start physical address and the end physical address of the data written in each partition in the updated system image file. Specifically, the main control unit 31 may query the data mapping table to find the physical addresses of the data written in all partitions / sub-partitions in the flash memory unit 33. Subsequently, in-place update or out-of-place update may be used to update the data in the partition / sub-partition. In-place update means directly overwriting the original partition data (the flash block needs to be erased first). Out-of-place update means writing the new data into the free area of the flash memory unit 33 and then updating the mapping table to point to the new address.

[0067] In some embodiments, after the main control unit 31 completes the update of the system image file, the data mapping table needs to be updated. Specifically, after the electronic device restarts, the main control unit 31 may sequentially obtain and judge the amount of data written in each updated partition according to the writing order of the updated system image file in each partition. The main control unit 31 may sequentially check the amount of data written in each partition (such as partitions A, B, C, etc.) and adopt different strategies according to whether the amount of data exceeds the threshold.

[0068] In some embodiments, when the amount of data written in the updated partition is less than or equal to the threshold, the start physical address and the end physical address of the data written in this partition are updated to a preset data comparison table.

[0069] In some embodiments, when the amount of data written in the updated partition is greater than the threshold, the data in this partition is split according to the threshold to obtain a plurality of updated sub-partitions; the start physical address and the end physical address of the data written in the updated sub-partitions are updated to the data comparison table; wherein, the amount of data in each updated sub-partition is less than or equal to the threshold, and the physical addresses of the data in each updated sub-partition are continuous.

[0070] In some embodiments, the main control unit 31 may update the data in the data comparison table to the data mapping table. Among them, the main control unit 31 may update the data in the data comparison table to a preset backup mapping table and clear the data in the data comparison table. By clearing the data comparison table, residual data interference in subsequent operations can be avoided.

[0071] In some embodiments, after the memory 30 is restarted, the main control unit 31 may repeatedly obtain the start physical address and the end physical address of the updated partition and the updated sub - partition according to the writing order of the updated system image file in each partition, and update them to the data comparison table. The splitting process of the partition and the sub - partition may be similar to that in the above - mentioned embodiments and will not be elaborated here.

[0072] In some embodiments, the main control unit 31 may update the data mapping table according to the comparison result between the data in the data comparison table and the data in the backup mapping table. The main control unit 31 may check whether the start and end addresses of each partition / sub - partition in the two tables are the same to determine whether the data in the data comparison table is the same as the data in the backup mapping table.

[0073] In some embodiments, when the data in the data comparison table is the same as the data in the backup mapping table, the main control unit 31 may update the data mapping table according to the data in the backup mapping table, and clear the data in the data comparison table and the backup mapping table after the update is completed. By emptying the data comparison table and the backup mapping table, storage resources can be released, and residual data interference in subsequent operations can be avoided through cleaning.

[0074] In some embodiments, when the data in the data comparison table is different from the data in the backup mapping table, the main control unit 31 may update the data in the data comparison table to the backup mapping table and clear the data in the data comparison table; and after the memory is restarted next time, the judgment is repeated until the data in the data comparison table is the same as the data in the backup mapping table. Among them, when the data in the data comparison table is different from the data in the backup mapping table, it may be caused by an update interruption or a hardware error, and the data comparison table needs to be regenerated for verification. By overwriting the backup mapping table, the latest state can be retained as a retry benchmark.

[0075] It can be seen that in the above - mentioned solution, by optimizing the eMMC control strategy, without replacing hardware or compressing the image file, the read - write efficiency can be improved and the boot time can be shortened. By adopting the cooperation mechanism of dual - mapping - table backup and data comparison table, the consistency of mapping - table update can be ensured.

[0076] Please refer to Figure 2 , the present invention also provides a method for accelerating the boot of an electronic device. The electronic device includes a processor, a memory, and a memory; the flash memory unit of the memory is used to store the system image file in the form of partitions, and the physical addresses of the data stored in the same partition are continuous; the method for accelerating the boot includes:

[0077] Step S10, generating and sending a boot instruction through the processor;

[0078] Step S20: The main control unit of the memory reads the start physical address and the end physical address of the data stored in each partition from a preset data mapping table according to the power-on instruction;

[0079] Step S30: The main control unit of the memory reads the corresponding data from the flash memory cells to the memory according to each start physical address and the corresponding end physical address.

[0080] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification in order to better explain the principle and practical application of the present invention, so that those skilled in the art can well understand and utilize the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A memory, characterized in that, Including: A flash memory unit for storing a system image file; the flash memory unit stores the system image file in a partitioned form, and the physical addresses of the data stored in the same partition are continuous; A main control unit for, according to a power-on instruction, reading the start physical address and end physical address of the data stored in each partition from a preset data mapping table, and reading the corresponding data from the flash memory unit to the memory of the electronic device according to each of the start physical addresses and the corresponding end physical addresses; The main control unit is further configured to: Obtain a system update file, and update the system image file stored in the flash memory unit according to the system update file; According to the writing order of the updated system image file written to each partition, sequentially obtain and judge the amount of data written in each updated partition: When the amount of data written in the updated partition is less than or equal to a threshold, update the start physical address and end physical address of the data written in this partition to a preset data comparison table; When the amount of data written in the updated partition is greater than the threshold, split the data written in this partition according to the threshold to obtain a plurality of updated sub-partitions; update the start physical address and end physical address of the data written in the updated sub-partitions to the data comparison table; wherein, the amount of data written in each updated sub-partition is less than or equal to the threshold, and the physical addresses of the data written in each updated sub-partition are continuous; Update the data in the data comparison table to the data mapping table.

2. The memory according to claim 1, wherein The flash memory unit stores the system image file according to the following steps: The main control unit controls the flash memory unit to enter a single-level storage mode; The main control unit receives the system image file and writes the system image file into the flash memory unit in a sequential write mode; The main control unit judges the storage capacity of the flash memory unit in the single-level storage mode: When the amount of data of the system image file written into the flash memory unit has not reached the storage capacity, control the flash memory unit to maintain the single-level storage mode until the storage capacity is reached or the writing is completed; When the amount of data of the system image file written into the flash memory unit reaches the storage capacity, control the flash memory unit to cancel the single-level storage mode, and continue to write the remaining system image file into the flash memory unit until the writing is completed.

3. The memory according to claim 1, characterized in that, The main control unit creates a data mapping table according to the following steps: According to the writing order of the system image file written to each partition, sequentially obtain and judge the amount of data written in each partition: When the amount of data written in the partition is less than or equal to a threshold, update the start physical address and end physical address of the data written in this partition to a preset data mapping table; When the amount of data written in the partition is greater than the threshold, split the data written in this partition according to the threshold to obtain a plurality of sub-partitions; update the start physical address and end physical address of the data written in the sub-partitions to the data mapping table; wherein, the amount of data written in each sub-partition is less than or equal to the threshold, and the physical addresses of the data written in each sub-partition are continuous.

4. The memory according to claim 1, characterized in that, The main control unit reads the data of the flash memory unit to the memory of the electronic device according to the following steps: According to the starting physical address and the ending physical address recorded in the data mapping table, sequentially read the corresponding data from the flash memory unit in order and form corresponding data packets to be transmitted to the cache unit of the memory; When the cache unit receives a data packet, send the data packet to the memory, and during the sending process, simultaneously receive the next data packet transmitted by the flash memory unit until all data packets are read from the flash memory unit to the memory.

5. The memory according to claim 1, characterized in that, The main control unit updates the data of the data comparison table to the data mapping table according to the following steps: Update the data of the data comparison table to a preset backup mapping table and clear the data of the data comparison table; After the memory is restarted, according to the writing order of the updated system image file written to each partition, repeatedly obtain the starting physical address and the ending physical address of the data written in the updated partition and the data written in the updated sub-partition, and update them to the data comparison table; Update the data mapping table according to the comparison result between the data of the data comparison table and the data of the backup mapping table.

6. The memory according to claim 5, wherein The main control unit updates the data mapping table according to the following steps: Judge whether the data of the data comparison table is the same as the data of the backup mapping table: If they are the same, update the data mapping table according to the data of the backup mapping table, and after the update is completed, clear the data of the data comparison table and the backup mapping table; If they are not the same, update the data of the data comparison table to the backup mapping table and clear the data of the data comparison table; And after the memory is restarted next time, repeat the judgment until the data of the data comparison table is the same as the data of the backup mapping table.

7. An electronic device, characterized in that, Including the memory according to any one of claims 1 to 6.

8. A method for accelerating the startup of an electronic device, characterized in that, The electronic device includes a processor, a memory, and the memory according to any one of claims 1 to 6; The flash memory unit of the memory stores the system image file in the form of partitions, and the physical addresses of the data stored in the same partition are continuous; the boot-up acceleration method includes: Generate and send a boot instruction through the processor; The main control unit of the memory reads the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to the boot instruction; The main control unit of the memory reads the corresponding data from the flash memory unit to the memory according to each starting physical address and the corresponding ending physical address.

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