Display device
By setting up a compensation module in the display driver chip, the position information of the partitioned frequency division line and display uneven area is obtained, and the corresponding pixel rows are compensated, which solves the problem of displaying uneven areas in traditional display devices and achieves higher display uniformity.
Patent Information
- Application Number
- CN202510244788.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-03
- Publication Date
- 2025-05-27
AI Technical Summary
When traditional display devices use partition frequency division technology, uneven display areas will appear, especially at the dividing line between high refresh rate areas and low refresh rate areas. Lateral, penetrating, linear uneven display areas may occur during the process, affecting the display quality and user experience.
The compensation module is provided in the display driver chip, and the display data of the corresponding pixel rows is compensated by obtaining the position information of the partitioned frequency division line and displaying the uneven area. The compensation module uses gradient-changing compensation voltage values to apply a larger compensation voltage value to the pixel rows close to the dividing line, and a smaller compensation voltage value to the pixel rows far away from the dividing line, so as to adjust the display brightness and eliminate the display uneven area.
Through the compensation measures of the compensation module, the display brightness of each pixel row in the display uneven area can be accurately adjusted, effectively eliminate the display uneven area, and improve the display uniformity of the display device.
Smart Images

Figure CN120048221A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technologies, and particularly to a display device. Background Art
[0002] In order to further reduce the power consumption of an Active Matrix Organic Light Emitting Diode (AMOLED) display device, the industry has developed a technology of dividing the display area into zones and using different refresh rates (also known as local refresh or zone refresh technology). This technology reduces the power consumption of the Display Driver IC (DDIC) by using different refresh rates for different areas of the display panel.
[0003] However, in the actual application of the technology of dividing the display area into zones and using different refresh rates, a display uneven area (Mura) about 0.2 mm wide will appear at the boundary between the high refresh rate area AA1 and the low refresh rate area AA2 of the display panel, as Figure 1 shown. This display uneven area will move as the position of the division of the display area into zones and using different refresh rates moves. When the difference in refresh rates between adjacent areas is greater, the display uneven area is more obvious.
[0004] In addition to the display uneven area caused by the division of the display area into zones and using different refresh rates, horizontal, penetrating, and linear display uneven areas may also be generated during the manufacturing process of the display panel, as Figure 2 shown. These display uneven areas will reduce the display quality of the display panel and affect the user's viewing experience. Summary of the Invention
[0005] The purpose of this application is to provide a display device to improve the technical problem of display uneven areas in the pictures displayed by traditional display devices.
[0006] An embodiment of this application provides a display device. The display device includes a display panel and a display driver chip. The display driver chip includes: a receiving module for receiving display data; a compensation module for obtaining the position information of the division boundary of the display area into zones and using different refresh rates of the display panel, and compensating the display data of at least a first predetermined number of pixel rows located on at least one side of the division boundary of the display area into zones and using different refresh rates. The division boundary of the display area into zones and using different refresh rates is the boundary between two adjacent display sub-areas with different refresh rates in the display area of the display panel; and an output module for outputting a source drive signal to the display panel according to the compensated display data.
[0007] In the above display device, the compensation voltage values applied by the compensation module to the display data of at least a first predetermined number of pixel rows located on at least one side of the division boundary of the display area into zones and using different refresh rates change in a gradient manner.
[0008] In the above display device, the compensation voltage value applied by the compensation module to the display data of the pixel rows far from the partition frequency division boundary line is smaller than the compensation voltage value applied by the compensation module to the display data of the pixel rows close to the partition frequency division boundary line.
[0009] In the above display device, in a first refresh frequency region on one side of the partition frequency division boundary line, in a direction from the pixel rows far from the partition frequency division boundary line to the pixel rows close to the partition frequency division boundary line, the compensation voltage value of the display data of every second predetermined number of pixel rows increases by a first predetermined voltage value.
[0010] In the above display device, in a second refresh frequency region on the other side of the partition frequency division boundary line, in a direction from the pixel rows far from the partition frequency division boundary line to the pixel rows close to the partition frequency division boundary line, the compensation voltage value of the display data of every third predetermined number of pixel rows increases by a second predetermined voltage value.
[0011] In the above display device, the compensation module includes: a digital compensation unit for compensating the display data based on the minimum unit of grayscale data; or an analog compensation unit for compensating the analog voltage corresponding to the display data based on the minimum unit of gamma voltage.
[0012] An embodiment of the present application further provides a display device, the display device includes a display panel and a display driving chip, and the display driving chip includes: a receiving module for receiving display data; a compensation module for obtaining position information of a display uneven region of the display panel, and compensating the display data of a fourth predetermined number of pixel rows located in the display uneven region or the analog voltage corresponding to the display data according to the position information of the display uneven region; and an output module for outputting a source driving signal to the display panel according to the compensated display data or the analog voltage corresponding to the display data.
[0013] In the above display device, the fourth predetermined number is less than or equal to the number of pixel rows in the display uneven region.
[0014] In the above display device, the compensation voltage values of any two of the fourth predetermined number of pixel rows located in the display uneven region are equal.
[0015] In the above display device, the compensation module includes: a digital compensation unit for compensating the display data based on the minimum unit of grayscale data; or an analog compensation unit for compensating the analog voltage corresponding to the display data based on the minimum unit of gamma voltage.
[0016] The display device provided by the present application can effectively improve the technical problem of uneven display areas on the display panel by setting a compensation module in the display driving chip. Specifically, for the uneven display area at the partition frequency division boundary, the compensation module obtains the position information of the partition frequency division boundary and compensates the display data of a predetermined number of pixel rows on at least one side of the boundary according to the position information. By applying an appropriate compensation voltage to the pixel rows close to the boundary, the display brightness of each pixel row in the uneven display area can be accurately adjusted, eliminating the uneven display area and improving the display uniformity of the display device.
[0017] For the uneven display area caused by the manufacturing process, the compensation module obtains the position information of the uneven display area and compensates the display data or the corresponding analog voltage of a predetermined number of pixel rows in this area. By applying a compensation voltage value to the pixel rows in the uneven display area, the brightness of the uneven display area can be accurately adjusted, so that the local uneven display area can be effectively eliminated and the display uniformity of the display device is improved. Brief Description of the Drawings
[0018] Figure 1 It is a schematic diagram of the uneven display area that appears when the traditional display device applies the partition frequency division technology.
[0019] Figure 2 It is a schematic diagram of the uneven display area caused by the manufacturing process of the traditional display device.
[0020] Figure 3 It is a schematic diagram of the display device provided by the present application.
[0021] Figure 4 It is a block diagram of the display driving chip in the display device provided by the present application.
[0022] Figure 5 It is a schematic diagram of the uneven display area that appears when the first embodiment of the display device provided by the present application applies the partition frequency division technology.
[0023] Figure 6 It is a waveform diagram of the source driving signal of the first embodiment of the display device provided by the present application.
[0024] Figure 7 It is a waveform diagram of the source driving signal of the second embodiment of the display device provided by the present application. Detailed Description of the Embodiments
[0025] The following will describe the specific embodiments of the present application in detail with reference to the accompanying drawings.
[0026] The terms "first", "second" and similar terms do not denote any order, quantity or importance, but are only used to distinguish different technical features. The terms "a plurality of" and similar terms mean two or more, unless otherwise clearly defined.
[0027] Embodiments of the present application can be combined with each other.
[0028] Currently, in the process of applying the zoning and frequency division technology, there is a problem of uneven display in traditional display devices. Specifically, when a display device performs zoned display with different refresh rates, an uneven display area will appear at the boundary position where the refresh rate changes. For example, as Figure 1 shown, when the zoned refresh rate of the display device changes from 120 Hz to 1 Hz, an uneven display area about 0.2 mm wide will appear above the boundary line (zoning and frequency division boundary line) L where the refresh rate changes. This uneven display area has the following characteristics: First, the uneven display area will move as the zoning and frequency division position moves; Second, the greater the difference in refresh rates between adjacent areas, the more obvious the uneven display area; Third, the intensity of the uneven display area shows a gradual change distribution, and is most obvious when approaching the zoning and frequency division boundary line L and on the side of the high refresh rate area AA1. In addition, traditional display devices also have horizontal, penetrating, linear uneven display areas caused by the manufacturing process, as Figure 2 shown.
[0029] To solve the above technical problems, the present application proposes a display device. The display device includes a display panel and a display driving chip. The display device realizes compensation for the uneven display area by setting a compensation module 503 inside the display driving chip. The compensation module 503 can adjust the gray-scale voltage of local pixel rows, so as to compensate for the local uneven display area. This compensation scheme can not only optimize the uneven display phenomenon at the zoning refresh boundary position, but also improve the uneven display phenomenon caused by the manufacturing process.
[0030] In the embodiments of the present application, the compensation module 503 can fine-tune the source driving signal within a specific width range. For example, the compensation module 503 can fine-tune the source driving signal with a width of 40 horizontal pixels.
[0031] As Figure 3 shown, the display device provided by the embodiments of the present application can be, for example, an OLED display device, a Mini-LED display device, or a Micro-LED display device. The embodiments of the present application will be described by taking the OLED display device as an example.
[0032] As Figure 3As shown in the figure, the display device provided by the embodiment of the present application includes a display panel, a timing controller, a display driver chip, and a power management chip (the power management chip can be integrated with the timing controller into the same chip). The display panel is an organic light-emitting diode display panel.
[0033] The display panel includes a display area and a non-display area. The display area is provided with m×n pixels PX arranged in an array, where m and n are integers greater than 1. The non-display area is located around the display area and is used to arrange drive circuits and various signal lines. The display panel further includes a plurality of scan lines SCAN, a plurality of data lines DATA, and a gate drive circuit. The plurality of scan lines SCAN extend along a first direction and are arranged along a second direction, and the plurality of data lines DATA extend along the second direction and are arranged along the first direction, and the first direction is perpendicular to the second direction. The gate drive circuit is disposed in the non-display area and is electrically connected to the plurality of scan lines SCAN. The display driver chip is electrically connected to the plurality of data lines DATA through a flexible circuit board. The timing controller is electrically connected to the gate drive circuit and the display driver chip respectively.
[0034] The display panel includes an organic light-emitting diode array substrate and a packaging layer. The organic light-emitting diode array substrate includes a substrate, a buffer layer disposed on the substrate, an active layer disposed on the buffer layer, a gate insulating layer disposed on the active layer, a first metal layer disposed on the gate insulating layer, an interlayer insulating layer disposed on the first metal layer, a second metal layer disposed on the interlayer insulating layer, a planarization layer disposed on the second metal layer, a first electrode layer disposed on the planarization layer, a pixel defining layer disposed on the first electrode layer, an organic light-emitting layer disposed in the opening area defined by the pixel defining layer, and a second electrode layer disposed on the organic light-emitting layer. The first metal layer includes scan lines SCAN, gate electrodes, etc. The second metal layer includes data lines DATA, source electrodes, drain electrodes, etc. The packaging layer is hermetically connected to the organic light-emitting diode array substrate to prevent moisture and oxygen from invading the organic light-emitting layer.
[0035] Each pixel PX includes a pixel drive circuit and an organic light-emitting diode OLED (light-emitting device). The pixel drive circuit includes at least two thin-film transistors and a storage capacitor. One of the thin-film transistors serves as a switching transistor, whose gate is electrically connected to the corresponding scan line, and whose source is electrically connected to the corresponding data line; the other thin-film transistor serves as a driving transistor, whose gate is electrically connected to the drain of the switching transistor, whose source is electrically connected to the first power supply voltage line, and whose drain is electrically connected to the anode of the organic light-emitting diode OLED. One end of the storage capacitor is electrically connected to the gate of the driving transistor, and the other end is electrically connected to the source or drain of the driving transistor. The cathode of the organic light-emitting diode OLED is electrically connected to the second power supply voltage line.
[0036] The gate driving circuit includes n cascaded gate driving sub - circuits, and each gate driving sub - circuit is electrically connected to a scanning line. Under the control of the timing controller, the gate driving sub - circuits sequentially output scanning signals to scan each row of pixels PX in the display area row by row. The display driving chip generates and outputs data signals according to the image data under the control of the timing controller. The timing controller is used to receive and process externally input image data and timing signals, generate control signals, and transmit the image data to the display driving chip. The power management chip PMIC is used to provide operating voltages for various parts of the display device, including providing a second power voltage VSS for the cathode of the organic light - emitting diode OLED, providing a first power voltage VDD for the first power voltage line, providing gate driving voltages VGH / VGL for the gate driving circuit, etc.
[0037] For the display non - uniform area at the partition refresh boundary, an embodiment of the present application provides a first compensation scheme:
[0038] As Figure 4 、 Figure 5 and Figure 6 shown, the display driving chip includes a receiving module 501, a compensation module 503, and an output module 505. Among them, the compensation module 503 is electrically connected to the receiving module 501, the output module 505 is electrically connected to the compensation module 503, the display driving chip further includes a digital gamma module 502 and a digital - to - analog conversion module 504, and the digital gamma module 502 and the digital - to - analog conversion module 504 are electrically connected to the compensation module 503. The receiving module 501 is used to receive display data. The compensation module 503 is used to obtain the position information of the partition frequency - division boundary line L of the display panel, and compensate the display data of at least a first predetermined number of pixel rows located on at least one side of the partition frequency - division boundary line L. The partition frequency - division boundary line L is the boundary line between two adjacent display sub - areas with different refresh rates in the display area of the display panel, and the value range of the first predetermined number is from 3 to 30. The output module 505 is used to output a source driving signal to the display panel according to the compensated display data.
[0039] The timing controller is used to generate the position information of the partition frequency - division boundary line L according to the display mode configuration information. The receiving module 501 is further used to receive the position information of the partition frequency - division boundary line L and store the position information of the partition frequency - division boundary line L in a register. The compensation module 503 obtains the position information of the partition frequency - division boundary line L by reading the register. When the position information of the i - th row is obtained as the partition frequency - division boundary line L, the compensation module 503 starts to perform the compensation operation, where i is a positive integer.
[0040] The synchronous compensation timing generator in the display driving chip receives the synchronous signal Hsync and generates a compensation enable signal based on this signal. This compensation enable signal is used to ensure that the writing period of the compensation voltage value is strictly synchronized with the writing period of the source driving signal of the corresponding row, thereby ensuring the accuracy of compensation.
[0041] The display uneven area at the partition frequency division boundary line L is most obvious near the partition frequency division boundary line L, and mainly appears on one side of the high refresh rate area (the first refresh rate area) AA1 of the partition frequency division boundary line L. Through experimental observation, it is found that at the transition from the high refresh rate area AA1 to the low refresh rate area (the second refresh rate area) AA2, the display uneven area mainly appears at 10 pixel rows (10 pixel lines) on the side of the partition frequency division boundary line L towards the high refresh rate area AA1. These 10 pixel rows constitute the first predetermined number of pixel rows that need to be compensated.
[0042] The compensation module 503 is used to adjust the voltages of the source driving signals of the (i - 10)th row to the (i - 1)th row according to the obtained position information of the partition frequency division boundary line L (this position information can be, for example, the row number of the pixel row corresponding to this partition frequency division boundary line L, for example, the i-th row).
[0043] As Figure 6 shown, the compensation voltage values (mV) applied by the compensation module 503 to the display data of the first predetermined number of pixel rows located on at least one side of the partition frequency division boundary line L change in a gradient.
[0044] Specifically, the compensation module 503 adopts a gradient compensation scheme and applies different compensation voltage values to the display data of the first predetermined number of pixel rows (for example, 10 pixel rows) located on at least one side of the partition frequency division boundary line L.
[0045] In the high refresh rate area AA1, the closer to the low refresh rate area AA2, the greater the coupling influence of the pixel rows in the low refresh rate area AA2 on the display effect of the pixel rows. Therefore, for the pixel rows in the high refresh rate area AA1 on one side of the partition frequency division boundary line L, the compensation voltage value applied by the compensation module 503 to the display data of the pixel rows in the high refresh rate area AA1 far from the partition frequency division boundary line L is less than the compensation voltage value applied by the compensation module 503 to the display data of the pixel rows close to the partition frequency division boundary line L. That is, the compensation module 503 applies a larger compensation voltage value to the pixel rows close to the partition frequency division boundary line L and a smaller compensation voltage value to the pixel rows far from the partition frequency division boundary line L. In the direction from the partition frequency division boundary line L towards the inside of the high refresh rate area, the compensation voltage value decreases by 5 mV every two pixel rows.
[0046] In the direction from the pixel rows far from the partition frequency dividing line L to the pixel rows close to the partition frequency dividing line L, the compensation voltage value of the display data of every second predetermined number of pixel rows increases by a first predetermined voltage value. That is, the compensation module 503 applies different compensation amounts to different pixel rows: the voltage of the source driving signals for the (i - 1)-th row and the (i - 2)-th row increases by 16 compensation units (for example, 80 mV); the voltage of the source driving signals for the (i - 3)-th row and the (i - 4)-th row increases by 15 compensation units (for example, 75 mV); the voltage of the source driving signals for the (i - 5)-th row and the (i - 6)-th row increases by 14 compensation units (for example, 70 mV); the voltage of the source driving signals for the (i - 7)-th row and the (i - 8)-th row increases by 13 compensation units (for example, 65 mV); the voltage of the source driving signals for the (i - 9)-th row and the (i - 10)-th row increases by 12 compensation units (for example, 60 mV). The compensation module 503 does not compensate the voltage of the source driving signals for the pixel rows other than the (i - 1)-th row to the (i - 10)-th row (for example, the (i - 11)-th row to the (i - 40)-th row).
[0047] Although the display uneven area at the partition frequency dividing line L mainly appears on one side of the high refresh rate area AA1 of the partition frequency dividing line L, it may also appear on one side of the low refresh rate area AA2 of the partition frequency dividing line L at the same time.
[0048] Based on the above technical problems, considering that in the low refresh rate area AA2, the closer to the high refresh rate area AA1, the greater the impact on the display effect of the pixel rows. Therefore, for the pixel rows in the low refresh rate area AA2 on one side of the partition frequency dividing line L, the compensation voltage value applied by the compensation module 503 to the display data of the pixel rows far from the partition frequency dividing line L in this low refresh rate area AA2 is less than the compensation voltage value applied by the compensation module 503 to the display data of the pixel rows close to the partition frequency dividing line L. That is, the compensation module 503 applies a smaller compensation voltage value to the pixel rows far from the partition frequency dividing line L and a larger compensation voltage value to the pixel rows close to the partition frequency dividing line L. In the direction from the pixel rows far from the partition frequency dividing line L to the pixel rows close to the partition frequency dividing line L, the compensation voltage value of the display data of every third predetermined number of pixel rows increases by a second predetermined voltage value. The second predetermined number and the third predetermined number may be equal or may not be equal. For example, the second predetermined number is greater than the third predetermined number. The second predetermined voltage value and the first voltage value may be equal or may not be equal. For example, the first predetermined voltage value is greater than the second predetermined voltage value. In the case where the second predetermined voltage value is equal to the first voltage value, in the inner direction of the low refresh area from the partition frequency dividing line L, the compensation voltage value decreases by 5 mV every other two rows of pixels.
[0049] The compensation module 503 is used to compensate the pixels of three colors, namely red, green, and blue (R, G, B), respectively. The compensation module 503 includes a digital compensation unit and an analog compensation unit, and the digital compensation unit and the analog compensation unit compensate the display data at different signal processing stages.
[0050] The digital compensation unit is used to receive the gamma-corrected digital display data, and uses the minimum unit of the grayscale data as the compensation accuracy to compensate the display data. Specifically, the digital compensation unit compensates the grayscale data of the pixels of three colors, namely red, green, and blue (R, G, B), respectively, according to the compensation values stored in the compensation look-up table. The digital compensation unit outputs the compensated digital display data to the digital-to-analog converter.
[0051] The analog compensation unit is used to receive the analog driving voltage output by the digital-to-analog converter, and uses the minimum unit of the gamma voltage as the compensation accuracy to compensate the driving voltage. Specifically, the analog compensation unit compensates the driving voltages of the pixels of three colors, namely red, green, and blue (R, G, B), respectively, according to the compensation values stored in the compensation look-up table. The compensation module 503 sets the minimum compensation step to 5 millivolts, and this step corresponds one-to-one with the least significant bit of the 12-bit digital-to-analog converter, so as to ensure that the accuracy of the compensation matches the accuracy of the digital-to-analog converter.
[0052] The digital compensation unit is used to compensate the display data after gamma correction and before digital-to-analog conversion; the analog compensation unit is used to compensate the driving voltage after digital-to-analog conversion.
[0053] The compensation module 503 configures independent compensation look-up tables for the pixels of three colors, namely red, green, and blue (R, G, B). Each compensation look-up table stores the compensation voltage values corresponding to different grayscale values, and the compensation voltage values change non-linearly with the change of the grayscale values. The data of the compensation look-up table can be updated through the I2C interface.
[0054] The compensation module 503 provides three preset compensation modes: linear attenuation mode, exponential attenuation mode, and look-up table mode. In the linear attenuation mode, the compensation voltage value is equal to the maximum compensation voltage value (with a value range of 60 mV to 100 mV) minus the product of the attenuation coefficient (with a value range of 0.1 to 1) and the distance from the pixel row to the partition frequency division boundary line L. Here, the distance from the pixel row to the partition frequency division boundary line L is equal to the absolute value of the difference between the row number of the pixel row and the row number of the partition frequency division boundary line L; in the exponential attenuation mode, the compensation voltage value is equal to the maximum compensation voltage value multiplied by e to the negative x power, where x is the distance from the pixel row to the partition frequency division boundary line L divided by the characteristic distance, and the characteristic distance is the distance from the pixel row to the partition frequency division boundary line L when the compensation voltage value decays to 1 / e of the maximum compensation voltage value; in the look-up table mode, the compensation module 503 directly reads the compensation voltage value corresponding to each pixel row from the memory. After the compensation is completed, the output module 505 converts the compensated signal into a source drive signal and outputs it to the display panel.
[0055] The timing controller is used to generate display timing signals and display data, and its output terminal is electrically connected to the input terminal of the receiving module 501. After the digital gamma module 502 performs gamma correction on the input display data, it transmits the gamma-corrected data to the input terminal of the compensation module 503 through its output terminal. After the compensation module 503 performs compensation processing on the display data, it transmits the compensated display data to the input terminal of the digital-to-analog conversion module 504 through its output terminal. After the digital-to-analog conversion module 504 converts the digital signal into an analog signal, it transmits the source drive signal to the corresponding pixel row of the display panel through its output terminal.
[0056] In an actual application scenario, there may also be static display non-uniform areas in the display device due to the manufacturing process. In response to this situation, the compensation module 503 adopts a fixed compensation mode: within the pre-identified display non-uniform area (row numbers j to k), the same compensation value is applied to all pixel rows, and both j and k are integers. For the horizontally displayed non-uniform area caused by the manufacturing process, the embodiment of the present application provides a second compensation scheme:
[0057] Such as Figure 4 and Figure 7As shown in the figure, the display device includes a display panel and a display driving chip. The display driving chip includes a receiving module 501, a compensation module 503, and an output module 505. The compensation module 503 is electrically connected to the receiving module 501, and the output module 505 is electrically connected to the compensation module 503. The receiving module 501 is configured to receive display data. The compensation module 503 is configured to obtain position information of a display uneven area of the display panel, and compensate display data of a fourth predetermined number of pixel rows located in the display uneven area or an analog voltage corresponding to the display data according to the position information of the display uneven area. The output module 505 is configured to output a source driving signal to the display panel according to the compensated display data or the analog voltage corresponding to the display data.
[0058] The fourth predetermined number is less than or equal to the number of pixel rows in the display uneven area. For example, the number of pixel rows in the display uneven area ranges from 3 to 50, and the fourth predetermined number also ranges from 3 to 50.
[0059] As Figure 6 shown, the compensation voltage values of any two pixel rows among the fourth predetermined number of pixel rows located in the display uneven area are equal.
[0060] For example, through testing the display effect, it is determined that the range of the display uneven area is 10 rows of pixels. The compensation module 503 simultaneously applies the same compensation amount to the j-th row to the k-th row (i.e., the fourth predetermined number of pixel rows) within the display uneven area, and increases the voltage of the source driving signal by 15 compensation units (for example, 75 mV). For the 1st row to the (j - 1)-th row and the (k + 1)-th to the n-th row, the voltage of the source driving signal remains unchanged, that is, increases by 0 compensation units (for example, 0 mV). That is, the compensation module 503 does not compensate the voltage of the source driving signal except for the j-th row to the k-th row.
[0061] The synchronous compensation timing generator in the compensation module 503 receives a vertical synchronization signal Hsync and generates a compensation enable signal, which is used to ensure that the writing time of the compensation voltage is strictly synchronized with the writing period of the source driving signal corresponding to the row.
[0062] The compensation module 503 is configured to compensate pixels of three colors, namely red, green, and blue (R, G, B), respectively. The compensation module 503 includes a digital compensation unit and an analog compensation unit, and the digital compensation unit and the analog compensation unit compensate the display data at different signal processing stages.
[0063] The digital compensation unit is used to receive the gamma-corrected digital display data, and takes the minimum unit of the grayscale data as the compensation accuracy to compensate the display data. Specifically, the digital compensation unit compensates the grayscale data of the pixels (R, G, B) of the three colors of red, green, and blue respectively according to the compensation values stored in the compensation lookup table. The digital compensation unit outputs the compensated digital display data to the digital-to-analog converter.
[0064] The analog compensation unit is used to receive the analog driving voltage output by the digital-to-analog converter, and takes the minimum unit of the gamma voltage as the compensation accuracy to compensate the driving voltage. Specifically, the analog compensation unit compensates the driving voltages of the pixels (R, G, B) of the three colors of red, green, and blue respectively according to the compensation values stored in the compensation lookup table. The compensation module 503 sets the minimum compensation step size to 5 mV, and this step size corresponds one-to-one with the least significant bit of the 12-bit digital-to-analog converter, so as to ensure that the compensation accuracy matches the accuracy of the digital-to-analog converter.
[0065] The digital compensation unit is used to compensate the display data after gamma correction and before digital-to-analog conversion; the analog compensation unit is used to compensate the driving voltage after digital-to-analog conversion.
[0066] In the second compensation scheme, the compensation module 503 applies the same compensation voltage value to the fourth predetermined number of pixel rows in the display uneven area. The magnitude of the compensation voltage value is determined according to the degree of display unevenness, and the range is 60 mV to 100 mV. After the compensation is completed, the output module 505 converts the compensated signal into a source drive signal and outputs it to the display panel.
[0067] The display device provided by this application can effectively improve the technical problem of the display uneven area on the display panel by setting the compensation module 503 in the display driving chip. Specifically, for the display uneven area at the partition frequency dividing line L, the compensation module 503 obtains the position information of the partition frequency dividing line L, and compensates the display data of the predetermined number of pixel rows on at least one side of the partition frequency dividing line L according to this position information. By applying an appropriate compensation voltage to the pixel rows close to the partition frequency dividing line L, the display brightness of each pixel row in the display uneven area can be accurately adjusted, the display uneven area is eliminated, and the display uniformity of the display device is improved.
[0068] For the display uneven area caused by the manufacturing process, the compensation module 503 obtains the position information of the display uneven area, and compensates the display data or the corresponding analog voltage of the predetermined number of pixel rows in this area. By applying a compensation voltage value to the pixel rows in the display uneven area, the brightness of the display uneven area can be accurately adjusted, so the local display uneven area can be effectively eliminated, and the display uniformity of the display device is improved.
[0069] The embodiments of the present application have been described in detail above. The content of this specification should not be construed as a limitation on the protection scope of the present application.
Claims
1. A display device, characterized in that: The display device comprises a display panel and a display driver chip, wherein the display driver chip comprises: A receiving module, used for receiving display data; a compensation module, configured to obtain position information of a partition-and-frequency-dividing boundary of the display panel, and compensate display data of a first predetermined number of pixel rows located on at least one side of the partition-and-frequency-dividing boundary according to the position information of the partition-and-frequency-dividing boundary, wherein the partition-and-frequency-dividing boundary is a boundary between two adjacent display sub-areas with different refresh rates in a display area of the display panel; and The output module is used to output a source driving signal to the display panel according to the compensated display data.
2. The display device according to claim 1, characterized in that The compensation voltage value applied by the compensation module to the display data of the first predetermined number of pixel rows located on at least one side of the partition frequency dividing line changes in a gradient.
3. The display device according to claim 2, characterized in that: The compensation voltage value applied by the compensation module to the display data of the pixel row far from the partition frequency dividing line is smaller than the compensation voltage value applied by the compensation module to the display data of the pixel row close to the partition frequency dividing line.
4. The display device according to claim 3, characterized in that: In the first refresh frequency area on one side of the partition frequency dividing line, from the pixel row far away from the partition frequency dividing line to the pixel row close to the partition frequency dividing line, the compensation voltage value of the display data of every second predetermined number of pixel rows increases by a first predetermined voltage value.
5. The display device according to claim 4, characterized in that: In the second refresh frequency area on the other side of the partition frequency dividing line, from the pixel row far away from the partition frequency dividing line to the pixel row close to the partition frequency dividing line, the compensation voltage value of the display data of every third predetermined number of pixel rows increases by a second predetermined voltage value.
6. The display device according to claim 1, characterized in that: The compensation module comprises: a digital compensation unit, configured to compensate the display data based on a minimum unit of grayscale data; or The analog compensation unit is used to compensate the analog voltage corresponding to the display data based on the minimum unit of the gamma voltage.
7. A display device, characterized in that: The display device comprises a display panel and a display driver chip, wherein the display driver chip comprises: A receiving module, used for receiving display data; a compensation module, configured to obtain position information of a display uneven area of the display panel, and compensate display data of a fourth predetermined number of pixel rows located in the display uneven area or an analog voltage corresponding to the display data according to the position information of the display uneven area; and The output module is used to output a source driving signal to the display panel according to the compensated display data or an analog voltage corresponding to the display data.
8. The display device according to claim 7, characterized in that: The fourth predetermined number is less than or equal to the number of the pixel rows in the display unevenness area.
9. The display device according to claim 8, characterized in that: The compensation voltage values of any two pixel rows among the fourth predetermined number of pixel rows located in the display uneven area are equal.
10. The display device according to claim 7, characterized in that: The compensation module comprises: a digital compensation unit, configured to compensate the display data based on a minimum unit of grayscale data; or The analog compensation unit is used to compensate the analog voltage corresponding to the display data based on the minimum unit of the gamma voltage.
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Display driving method and display device
CN122050283A
Display driving method and display device
CN122050283B