Semiconductor product measurement method and device, storage medium and electronic equipment

Abstract

The invention discloses a semiconductor product measurement method and device, a storage medium and electronic equipment, and relates to the technical field of semiconductor equipment, and the method comprises the steps: obtaining a processing strategy adopted by a target wafer batch at a process site if it is monitored that the target wafer batch enters a measurement site, the processing strategy comprises a combination of one or more seed devices and formula groups; judging whether an invalid measurement combination exists in the processing strategy or not; and if the invalid measurement combination exists, carrying out wafer drawing measurement on the target wafer batch according to an intelligent wafer drawing rule, the intelligent wafer extraction rule comprises preferentially extracting the wafers processed by adopting the invalid measurement combination, preferentially extracting the wafers processed by adopting the invalid measurement combination with shorter measurement validity period, and extracting the invalid measurement combination with the maximum coverage of the extracted wafers. According to the wafer drawing measurement method and device, wafer drawing measurement with higher efficiency and higher coverage can be realized, and the monitoring and positioning accuracy and efficiency of process abnormality in the wafer processing process are improved.

Description

Technical Field

[0001] This application relates to the technical field of semiconductor devices, and particularly to a method, apparatus, storage medium, and electronic device for measuring semiconductor products. Background Art

[0002] The manufacturing of chips goes through hundreds of processes, and each process will affect the final performance of the chips. When manufacturing chips, wafers are usually sent into the production line in wafer lots (LOTs) as processing units and processed in the processing equipment at the process stations. At the measurement station, wafer lots in the production line are sampled and selected according to a fixed batch sampling rate, and wafers are extracted from the selected wafer lots for measurement, so as to monitor and locate the processing equipment with process anomalies based on the measurement results.

[0003] However, in the method of sampling and selecting wafer lots in the production line according to a fixed batch sampling rate and extracting wafers from fixed slots, it is easy that the wafers processed by a certain processing equipment or the wafers processed by a certain chamber (i.e., a certain sub-device) in a multi-chamber (i.e., multi-sub-device) processing equipment using a certain recipe group are not measured. That is, the wafer measurement is one-sided, and the coverage of the measurement for the equipment, sub-devices, and recipe groups is not comprehensive enough, resulting in poor accuracy of monitoring and locating process anomalies. Summary of the Invention

[0004] An embodiment of this application provides a solution that can be effective.

[0005] Embodiments of this application provide the following technical solutions:

[0006] According to an embodiment of this application, a method for measuring semiconductor products includes: if it is monitored that a target wafer lot enters the measurement station, obtaining the processing strategy adopted by the target wafer lot at the process station, where the processing strategy includes a combination of one or more sub-devices and recipe groups; determining whether there is an invalid measurement combination in the processing strategy, where the invalid measurement combination refers to a combination for which there is no corresponding previous wafer lot being sampled and measured within the corresponding measurement validity period; if there is an invalid measurement combination, then performing wafer sampling and measurement on the target wafer lot according to an intelligent wafer sampling rule, where the intelligent wafer sampling rule includes preferentially extracting wafers processed using the invalid measurement combination, preferentially extracting wafers processed using an invalid measurement combination with a shorter measurement validity period, and extracting wafers that cover the most invalid measurement combinations.

[0007] In some embodiments of the present application, after determining whether there is an invalid measurement combination in the processing strategy, the method further includes: if there is no invalid measurement combination, obtaining the number of wafers to be measured at the measurement station for the target wafer lot; obtaining the standard lot sampling rate matching the target wafer lot and the number of wafers from the measurement configuration data; obtaining the actual lot sampling rate corresponding to each combination at the measurement station from the measurement monitoring data; if there is an actual lot sampling rate less than the standard lot sampling rate, performing sampling measurement on the target wafer lot according to the intelligent wafer sampling rule.

[0008] In some embodiments of the present application, determining whether there is an invalid measurement combination in the processing strategy includes: obtaining the invalid flags marked for each combination in the processing strategy; determining the combination with the invalid flag being the first flag as the invalid measurement combination, where the combination for which there is no corresponding previous wafer lot sampled and measured within the corresponding measurement validity period is marked with the first flag.

[0009] In some embodiments of the present application, after determining to perform sampling measurement on the target wafer lot, the method further includes: obtaining the out - station time of the target wafer lot at the process station; obtaining the preset effective duration corresponding to each combination; changing the invalid flag corresponding to each combination to the second flag, and updating the measurement validity period corresponding to each combination to the sum of the preset effective duration corresponding to each combination and the out - station time.

[0010] In some embodiments of the present application, the method further includes: determining whether the system real - time time exceeds the measurement validity period corresponding to each combination; updating the invalid flag corresponding to the combination whose system real - time time exceeds the corresponding measurement validity period to the first flag.

[0011] In some embodiments of the present application, after determining to perform or not perform sampling measurement on the target wafer lot, the method further includes: obtaining the total number of wafers entering the station and the determined measurement lot number corresponding to each combination at the measurement station; calculating and updating the actual lot sampling rate corresponding to each combination at the measurement station according to the determined measurement lot number and the total number of wafers entering the station corresponding to each combination.

[0012] In some embodiments of the present application, the method further includes: determining whether the total number of wafers entering the station at the measurement station reaches a predetermined measurement threshold; resetting the total number of wafers entering the station, the determined measurement lot number, and the actual lot sampling rate corresponding to the measurement station.

[0013] In some embodiments of the present application, when it is monitored that a target wafer lot enters the measurement station, obtaining the processing strategy adopted by the target wafer lot at the process station includes: when it is monitored that a target wafer lot enters the measurement station, obtaining the predetermined lot sampling rule corresponding to the target wafer lot from the measurement configuration data; if the predetermined lot sampling rule is an intelligent sampling rate rule, obtaining the processing strategy adopted by the target wafer lot at the process station.

[0014] In some embodiments of the present application, when there is an invalid measurement combination, performing a wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule includes: when there is an invalid measurement combination, obtaining the predetermined wafer sampling rule corresponding to the target wafer lot from the measurement configuration data; if the predetermined wafer sampling rule is the intelligent wafer sampling rule, performing a wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule.

[0015] According to an embodiment of the present application, a semiconductor product measurement device includes: a lot sampling processing module, configured to: when it is monitored that a target wafer lot enters the measurement station, obtain the processing strategy adopted by the target wafer lot at the process station, where the processing strategy includes a combination of one or more sub-devices and recipe groups; and determine whether there is an invalid measurement combination in the processing strategy, where the invalid measurement combination refers to a combination in which there is no corresponding previous wafer lot sampled and measured within the corresponding measurement validity period; a wafer sampling processing module, configured to: when there is an invalid measurement combination, perform a wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule, where the intelligent wafer sampling rule includes preferentially extracting wafers processed with the invalid measurement combination, preferentially extracting wafers processed with an invalid measurement combination with a shorter measurement validity period, and extracting wafers that cover the most invalid measurement combinations.

[0016] According to another embodiment of the present application, a storage medium stores a computer program, and when the computer program is executed by a processor of a device, the device is caused to execute the method described in the embodiments of the present application.

[0017] According to another embodiment of the present application, an electronic device may include: a memory storing a computer program; a processor reading the computer program stored in the memory to execute the method described in the embodiments of the present application.

[0018] According to another embodiment of the present application, a computer program product or a computer program includes computer instructions stored in a computer-readable storage medium. A processor of a device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, causing the device to execute the methods provided in the various alternative implementations described in the embodiments of the present application.

[0019] In the embodiments of the present application, if it is monitored that a target wafer lot enters a measurement station, the processing strategy adopted by the target wafer lot at a process station is obtained. The processing strategy includes a combination of one or more sub-devices and recipe groups. It is determined whether there is an invalid measurement combination in the processing strategy, where the invalid measurement combination refers to a combination in which there is no corresponding previous wafer lot being sampled and measured within the corresponding measurement validity period. If there is an invalid measurement combination, wafer sampling and measurement are performed on the target wafer lot according to intelligent wafer sampling rules, where the intelligent wafer sampling rules include preferentially sampling wafers processed with invalid measurement combinations, preferentially sampling wafers processed with invalid measurement combinations having a shorter measurement validity period, and the sampled wafers covering the most invalid measurement combinations.

[0020] In this way of the embodiments of the present application, by obtaining the processing strategy adopted by the target wafer lot at the process station, the processing strategy is further broken down into a combination of one or more sub-devices and recipe groups for judgment. When it is determined that there is an invalid measurement combination in the processing strategy, wafers are sampled from the target wafer lot according to the intelligent wafer sampling rules of the embodiments of the present application for measurement, which can achieve higher-efficiency and higher-coverage wafer sampling and measurement, and improve the accuracy and efficiency of monitoring and positioning process anomalies during wafer processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative efforts.

[0022] Figure 1 Shows a flowchart of a semiconductor product measurement method according to an embodiment of the present application.

[0023] Figure 2 Shows an architecture diagram of a semiconductor product measurement system according to an embodiment of the present application.

[0024] Figure 3 Shows an equipment information table according to an embodiment of the present application.

[0025] Figure 4 Shows an equipment recipe information table according to an embodiment of the present application.

[0026] Figure 5 Shows a recipe group information table according to an embodiment of the present application.

[0027] Figure 6Shows a validity information table according to an embodiment of the present application.

[0028] Figure 7 Shows a rule information table according to an embodiment of the present application.

[0029] Figure 8 Shows a measurement judgment flowchart according to an embodiment of the present application.

[0030] Figure 9 Shows a measurement monitoring record form according to an embodiment of the present application.

[0031] Figure 10 Shows a block diagram of a semiconductor product measurement device according to an embodiment of the present application.

[0032] Figure 11 Shows a block diagram of an electronic device according to an embodiment of the present application. Detailed implementation manners

[0033] The following further details the present disclosure in conjunction with the accompanying drawings and embodiments. It should be understood that the embodiments provided herein are only for explaining the present disclosure and are not used to limit the present disclosure. In addition, the embodiments provided below are partial embodiments for implementing the present disclosure, rather than all embodiments for implementing the present disclosure. Without conflict, the technical solutions described in the embodiments of the present disclosure can be implemented in any combined manner.

[0034] It should be noted that in the embodiments of the present disclosure, the term "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion, so that a method or device including a series of elements not only includes the elements specifically recited, but also includes other elements not explicitly listed, or further includes elements inherent to the implementation of the method or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional related elements in the method or device including the element (such as steps in the method or units in the device, and the units can be partial circuits, partial processors, partial programs or software, etc.).

[0035] For example, the semiconductor product measurement method provided in the embodiments of the present disclosure includes a series of steps, but the semiconductor product measurement method provided in the embodiments of the present disclosure is not limited to the recited steps. Similarly, the semiconductor product measurement device provided in the embodiments of the present disclosure includes a series of units, but the device provided in the embodiments of the present disclosure is not limited to including the specifically recited units, and may further include units required for obtaining relevant information or processing based on the information.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this disclosure belongs. The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit this disclosure.

[0037] It can be understood that in the specific implementation of this application, when it comes to relevant data, when the embodiments in this application are applied to specific products or technologies, user permission or consent is required, and the collection, use, and processing of relevant data need to comply with the relevant laws, regulations, and standards of relevant countries and regions.

[0038] Figure 1 The flowchart of a semiconductor product measurement method according to an embodiment of the present application is schematically shown. The execution subject of this semiconductor product measurement method can be a terminal and / or a server with processing capabilities. The terminal can be, for example, a computer, a calculator, a host computer, etc., and the server can be, for example, a cloud server or a physical server, etc. In one embodiment of the present application, the semiconductor product measurement method described in the present application is applied to a Manufacturing Execution System (MES). Through the simple and intuitive configuration of the manufacturing execution system, comprehensive monitoring and sampling of all devices, sub-devices, and recipe groups can be easily achieved.

[0039] As Figure 1 shown, this semiconductor product measurement method may include step S110 to step S130.

[0040] Step S110, if it is monitored that a target wafer lot enters the measurement site, obtain the processing strategy adopted by the target wafer lot at the process site, and the processing strategy includes a combination of one or more sub-devices and recipe groups;

[0041] Step S120, determine whether there is an invalid measurement combination in the processing strategy, where the invalid measurement combination refers to a combination in which there is no corresponding previous wafer lot being sampled and measured within the corresponding measurement validity period;

[0042] Step S130, if there is an invalid measurement combination, then perform sampling and measurement on the target wafer lot according to the intelligent wafer sampling rule, where the intelligent wafer sampling rule includes preferentially sampling wafers processed with invalid measurement combinations, preferentially sampling wafers processed with invalid measurement combinations with shorter measurement validity periods, and the sampled wafers covering the most invalid measurement combinations.

[0043] One or more processing devices can be set in the process site. For example, refer to Figure 2In one example, two processing devices, CVD 01 and CVD 02, can be used in the process station 210. Further, each processing device can have one or more chambers, and each chamber is a sub-device. For a processing device with only one chamber, the processing device can be regarded as a sub-device. Further, a chamber can also have multiple heaters, and each heater can also be regarded as a sub-device.

[0044] Each wafer lot sent to the process station for processing is regarded as a target wafer lot for monitoring. When it is monitored that the target wafer lot enters the metrology station 220 after being processed at the process station 210, the processing strategy adopted by the target wafer lot at the process station 210 is obtained. The processing strategy includes a combination of one or more sub-devices and recipe groups. The recipe group (RecipeGroup) is the group to which the process recipe (Recipe) belongs. For example, process recipe 001 and process recipe 002 can belong to recipe group Group1.

[0045] If the target wafer lot LOT1 is processed using process recipe 001 in the single-chamber processing device CVD01, then the processing strategy adopted by the target wafer lot LOT1 at the process station includes a combination in which the sub-device is CVD01 and the recipe group is Group1; if some wafers in the target wafer lot LOT1 are processed using process recipe 001 in chamber A (sub-device CVD01A) of the two-chamber processing device CVD01, and some other wafers are processed using process recipe 001 in chamber B (sub-device CVD01B) of the processing device CVD 01, then the processing strategy includes two combinations. The first combination has the sub-device CVD01A and the recipe group Group1, and the second combination has the sub-device CVD01B and the recipe group Group1.

[0046] For one or more combinations in the processing strategy, it is further determined whether there is an invalid metrology combination in the processing strategy. An invalid metrology combination refers to a combination for which there is no corresponding previous wafer lot being sampled and measured within the corresponding metrology validity period. Specifically, a corresponding metrology validity period is set for each combination in advance. If the previous wafer lot processed using a certain combination has not been sampled and measured within the corresponding metrology validity period of the combination, then the certain combination is an invalid metrology combination. Sampling and measurement means extracting wafers from the wafer lot for measurement.

[0047] If it is determined that there is an invalid measurement combination, wafer sampling measurement is performed on the target wafer lot according to the intelligent wafer sampling rule, so as to measure the sampled wafers at the measurement site. Among them, the intelligent wafer sampling rule includes: (1) giving priority to sampling wafers processed with invalid measurement combinations (that is, first sampling wafers from the wafers processed with invalid measurement combinations in the target wafer lot, and if the target number of wafers is not reached, then sampling wafers from the wafers not processed with invalid measurement combinations), (2) giving priority to sampling wafers processed with invalid measurement combinations with a shorter measurement validity period (that is, when sampling wafers from the wafers processed with invalid measurement combinations, giving priority to sampling wafers from the wafers processed with invalid measurement combinations with a shorter measurement validity period), (3) the sampled wafers cover the most invalid measurement combinations (that is, when the target number of wafers is less than or equal to the number of invalid measurement combinations, one wafer is sampled from each wafer set (each wafer processed with an invalid measurement combination is a wafer set) in the order of the measurement validity period from short to long; when the target number of wafers is greater than the number of invalid measurement combinations, one wafer is sampled from each wafer set (each wafer processed with an invalid measurement combination is a wafer set) in a loop in the order of the measurement validity period from short to long).

[0048] In this way of the embodiment of the present application, by obtaining the processing strategy adopted by the target wafer lot at the process site, the processing strategy is further divided into a combination of one or more sub-devices and recipe groups for judgment. When it is determined that there is an invalid measurement combination in the processing strategy, wafers are sampled from the target wafer lot according to the intelligent wafer sampling rule of the embodiment of the present application for measurement, which can achieve higher-efficiency and higher-coverage wafer sampling measurement, and improve the accuracy and efficiency of monitoring and positioning process anomalies in the wafer processing process.

[0049] The following description Figure 1 For specific embodiments that are further optional in each step when performing semiconductor product measurement in the embodiment.

[0050] In one embodiment, before obtaining the processing strategy adopted by the target wafer lot at the process site if it is monitored that the target wafer lot enters the measurement site, the method may further include: configuring measurement configuration data through the manufacturing execution system, where the measurement configuration data includes device information, recipe information, validity information, and rule information.

[0051] The device information may include relevant information about the processing devices and sub-devices adopted at the process site. For example, as Figure 3 The device information recorded in the example device information table includes information such as device identification and parent device identification.

[0052] The recipe information may include the process recipes adopted by each device and / or each sub-device, and the recipe groups to which each process recipe belongs. For example, as Figure 4The corresponding relationships between different devices and / or sub-devices and process recipes are recorded in the example device recipe information table. For example, Figure 5 The corresponding relationships between different process recipes and recipe groups are recorded in the example recipe group information table.

[0053] The validity information may include the corresponding relationships between combinations of different devices / sub-devices and recipe groups and preset valid durations. For example, Figure 6 The corresponding relationships between different combinations and preset valid durations are recorded in the example validity information table.

[0054] The rule information may include the corresponding relationships between part numbers, process stations, measurement stations, predetermined batch sampling rules, predetermined measurement thresholds, the number of wafers, standard batch sampling rates, predetermined wafer sampling rules, and the number of pieces. For example, Figure 7 The corresponding relationships between part numbers, process stations, measurement stations, predetermined batch sampling rules, predetermined measurement thresholds, the number of wafers, standard batch sampling rates, predetermined wafer sampling rules, and the target number of pieces are recorded in the example rule information table.

[0055] In one embodiment, obtaining the processing strategy adopted by the target wafer batch at the process station when it is monitored that the target wafer batch enters the measurement station may include: when it is monitored that the target wafer batch enters the measurement station, obtaining the predetermined batch sampling rule corresponding to the target wafer batch from the measurement configuration data; if the predetermined batch sampling rule is an intelligent sampling rate rule, obtaining the processing strategy adopted by the target wafer batch at the process station.

[0056] When it is monitored that the target wafer batch enters the measurement station, obtaining the predetermined batch sampling rule corresponding to the target wafer batch from the measurement configuration data. For example, the predetermined batch sampling rule corresponding to the target wafer batch can be obtained from the rule information in the measurement configuration data as Figure 7 shown. If the obtained predetermined batch sampling rule is an intelligent sampling rate rule (for example, smart+rate), the predetermined batch sampling rule corresponding to the target wafer batch is an intelligent sampling rate rule, and then the intelligent batch sampling processing logic is executed. Among them, in the intelligent batch sampling processing logic, first obtain the processing strategy adopted by the target wafer batch at the process station, and then execute subsequent steps such as determining whether there is an invalid measurement combination in the judgment of the processing strategy. In this way, it is possible to determine whether to execute the intelligent batch sampling processing logic for batch sampling judgment according to the user's configuration, and judge whether to perform wafer sampling measurement on the target wafer batch.

[0057] Further, in one embodiment, if so, wafer sampling measurement is performed on the target wafer lot according to the intelligent wafer sampling rule, including: if there is an invalid measurement combination, obtaining the predetermined wafer sampling rule corresponding to the target wafer lot from the measurement configuration data; if the predetermined wafer sampling rule is the intelligent wafer sampling rule, performing wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule.

[0058] If it is determined that there is an invalid measurement combination in the processing strategy, first obtain the predetermined wafer sampling rule corresponding to the target wafer lot from the measurement configuration data. For example, it can be obtained from the rule information in the measurement configuration data as shown in Figure 7 The predetermined wafer sampling rule corresponding to the target wafer lot. If the obtained predetermined wafer sampling rule is the intelligent wafer sampling rule (for example, smart), perform wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule. In this way, it can be determined whether to perform wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule according to the user's configuration.

[0059] In one embodiment, refer to Figure 8 , after determining whether there is an invalid measurement combination in the processing strategy, the method may further include: step S310, if there is no invalid measurement combination, obtaining the number of wafers to be measured of the target wafer lot at the measurement station; step S320, obtaining the standard batch sampling rate corresponding to the target wafer lot and the number of wafers from the measurement configuration data; step S330, obtaining the actual batch sampling rate corresponding to each combination at the measurement station from the measurement monitoring data; step S340, if there is an actual batch sampling rate less than the standard batch sampling rate, performing wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule.

[0060] If it is determined that there is no invalid measurement combination in the processing strategy, first obtain the number of wafers to be measured of the target wafer lot at the measurement station. The number of wafers to be measured may be equal to the total number of wafers (Wafers) in all batches to be measured at the measurement station. Further, it can be obtained from, for example, Figure 7 The rule information in the measurement configuration data as shown, to obtain the standard batch sampling rate jointly matching the target wafer lot and the number of wafers to be measured.

[0061] The measurement monitoring data may be the monitoring data obtained by a preset monitoring module for the entire measurement process monitoring of each wafer lot. The measurement monitoring data may include the actual batch sampling rate corresponding to each combination of wafer lots processed at the measurement station. For example, the total number of batches of wafer lots processed using combination 1 is 4, and 2 batches of wafer lots are sampled for wafers, then the actual batch sampling rate corresponding to combination 1 at the measurement station is equal to 2 / 4 (i.e., 50%).

[0062] Then, compare the actual batch sampling rate corresponding to each combination with the standard batch sampling rate. If there is an actual batch sampling rate less than the standard batch sampling rate, it is determined that wafer sampling measurement is to be performed on the target wafer batch according to the intelligent wafer sampling rule. On the contrary, if there is no actual batch sampling rate less than the standard batch sampling rate, it is determined that wafer sampling measurement is not to be performed on the target wafer batch according to the intelligent wafer sampling rule. Furthermore, although it is determined that there is no invalid measurement combination as described above, by further comparing the actual batch sampling rate with the standard batch sampling rate to further determine whether to perform wafer sampling measurement according to the intelligent wafer sampling rule, the measurement coverage can be further improved.

[0063] Furthermore, determining whether there is an invalid measurement combination in the processing strategy includes: obtaining the invalid flags marked for each combination in the processing strategy; determining the combination with the invalid flag being the first flag as the invalid measurement combination, where the combination for which there is no corresponding previous wafer batch sampled and measured within the corresponding measurement validity period is marked with the first flag.

[0064] Refer to Figure 9 , during initialization, when the target wafer batch has not entered the measurement station, the valid flag corresponding to the CVD01 and Group1 combination is the first flag N (because there was no corresponding previous wafer batch sampled and measured for this combination before). The combination adopted during the processing of the target wafer batch LOT1 at the process station is the CVD01 and Group1 combination. When the target wafer batch LOT1 enters the measurement station, the valid flag corresponding to the CVD01 and Group1 combination is the first flag N. Thus, it can be determined that the CVD01 and Group1 combination is an invalid measurement combination at this time. Therefore, further wafer sampling measurement needs to be performed on the target wafer batch LOT1 according to the intelligent wafer sampling rule. At this time, the measurement validity period of the CVD01 and Group1 combination is the sum of the outbound time of LOT1 at the process station, 14:50, and the preset valid duration of 2 hours, which is 16:50.

[0065] Furthermore, the combination adopted during the processing of the target wafer batch LOT2 at the process station is also the CVD01 and Group1 combination. When the target wafer batch LOT2 enters the measurement station at 15:10, since there is a corresponding previous wafer batch (i.e., LOT1) sampled and measured within the measurement validity period of 16:50 for the CVD01 and Group1 combination, the valid flag of the CVD01 and Group1 combination is the second flag Y at this time. Thus, the CVD01 and Group1 combination is not an invalid measurement combination at this time.

[0066] By marking the combination for which there is no corresponding previous wafer batch sampled and measured within the corresponding measurement validity period with the first flag, it is possible to efficiently and accurately determine whether the combination is an invalid measurement combination.

[0067] Further, in one embodiment, after determining the sampling measurement for the target wafer lot, the method further includes:

[0068] Obtain the outbound time of the target wafer lot at the process station; obtain the preset effective duration corresponding to each combination; change the invalid flag corresponding to each combination to a second flag, and update the measurement validity period corresponding to each combination to the sum of the preset effective duration corresponding to each combination and the outbound time.

[0069] When it is determined that there is an invalid measurement combination in the processing strategy, determine that sampling measurement needs to be performed on the target wafer lot; or, when further determining by comparing the actual batch sampling rate with the standard batch sampling rate, determine that sampling measurement needs to be performed according to the intelligent wafer sampling rule.

[0070] The outbound time of the target wafer lot at the process station can be obtained from the measurement monitoring data, and the preset effective duration corresponding to each combination can be obtained from the measurement configuration data. After determining the sampling measurement for the target wafer lot, the invalid flag corresponding to each combination can be changed to a second flag (Y), and the measurement validity period corresponding to each combination is updated to the sum of the preset effective duration corresponding to each combination and the outbound time.

[0071] For example, as Figure 9 shown in the row where LOT1 is located, when the target wafer lot LOT1 enters the measurement station, the effective flag corresponding to the combination of CVD01 and Group1 is the first flag N, it can be determined that the combination of CVD01 and Group1 is an invalid measurement combination at this time, so sampling measurement needs to be performed on the target wafer lot LOT1 according to the intelligent wafer sampling rule. Thereafter, the effective flag corresponding to the combination of CVD01 and Group1 can be changed to a second flag (Y), and the measurement validity period of the combination of CVD01 and Group1 is updated to the sum of the preset effective duration of 2h corresponding to the combination of CVD01 and Group1 and the outbound time of 14:50, which is 16:50.

[0072] In this implementation manner, by updating the invalid flag and the measurement validity period, the high-coverage measurement of the incoming wafer lot at the measurement station can be reliably and continuously controlled, and high coverage can be further achieved with the least amount of measurement work, improving the measurement efficiency while ensuring high coverage.

[0073] In one embodiment, the method further includes: determining whether the system real-time time exceeds the measurement validity period corresponding to each combination; updating the invalid flag corresponding to the combination whose system real-time time exceeds the corresponding measurement validity period to the first flag.

[0074] Refer toFigure 9 When the system real-time time is 18:07, the corresponding measurement validity period of the combination of CVD01 and Group1 is still 18:06. At this time, the system real-time time exceeds the corresponding measurement validity period of the combination of CVD01 and Group1. Further, the invalid flag corresponding to this combination of CVD01 and Group1 is updated to the first flag (N), which can further avoid long-term non-sampling measurement of the incoming wafer batches and further improve the measurement reliability. Further, the measurement validity period corresponding to the combination whose system real-time time exceeds the corresponding measurement validity period can be set to empty to reconfigure the measurement validity period.

[0075] In one embodiment, after determining whether to perform sampling measurement on the target wafer batch, the method further includes: obtaining the total number of incoming wafer batches corresponding to each combination at the measurement site and the determined measurement batch quantity; calculating and updating the actual batch sampling rate corresponding to each combination at the measurement site according to the determined measurement batch quantity corresponding to each combination and the total number of incoming wafer batches.

[0076] After each target wafer batch enters the measurement site, after determining whether to perform sampling measurement on the incoming target wafer batch, updating the actual batch sampling rate corresponding to each combination at the measurement site can further ensure the accuracy of subsequent determination of whether to perform sampling detection by comparing the actual batch sampling rate and the standard batch sampling rate. The determined measurement batch quantity is the total number of wafer batches that need to be sampled and measured among the wafer batches that enter the measurement site before being reset; the total number of incoming wafer batches is the total number of batches of wafer batches that enter the measurement site before being reset.

[0077] Specifically, referring to Figure 9 , after LOT1 enters the station, before the judgment "that is, before determining whether to perform sampling measurement on the target wafer batch LOT2", the actual batch sampling rate corresponding to the combination of CVD01 and Group1 is 00%. After the judgment "that is, after determining whether to perform sampling measurement on the target wafer batch", at this time, since only LOT1 is determined to be sampled and measured, the determined measurement batch quantity is 1, and the total number of incoming wafer batches is also 1. Furthermore, the measurement batch quantity / the total number of incoming wafer batches = 100%, so the actual batch sampling rate corresponding to the combination of CVD01 and Group1 is updated to 100%.

[0078] Further, after LOT2 enters the station, before the judgment, that is, before it is determined that no sampling measurement is performed on the target wafer lot LOT2, the actual batch sampling rate corresponding to the combination of CVD01 and Group1 is 100% after the previous step of update. After the judgment, that is, after it is determined that no sampling measurement is performed on the target wafer lot LOT2, at this time, since only LOT1 is determined to be sampled and measured among LOT1 and LOT2, the number of measurement batches is still determined to be 1, while the total number of wafer lots entering the station becomes 2. Furthermore, the number of measurement batches / the total number of wafer lots entering the station = 50%. Thus, the actual batch sampling rate corresponding to the combination of CVD01 and Group1 is updated to 50%.

[0079] Further, in one embodiment, the method may further include: determining whether the total number of wafer lots entering the station at the measurement station reaches a predetermined measurement threshold; resetting the total number of wafer lots entering the station corresponding to the measurement station, the determined number of measurement batches, and the actual batch sampling rate.

[0080] The predetermined measurement threshold can be set according to the actual situation. For example, in one example, the predetermined measurement threshold is 10. Refer to Figure 9 , after the target wafer lot LOT10 enters the station, the total number of wafer lots entering the station at the measurement station reaches the predetermined measurement threshold of 10. At this time, the total number of wafer lots entering the station corresponding to the measurement station, the determined number of measurement batches, and the actual batch sampling rate are reset to 0, 0, and 00% respectively. Furthermore, after subsequent target wafer lots such as LOT11 enter the station, measurement judgment is performed again, which can further avoid the situation that the wafer lots entering the station have not been sampled and measured for a long time, and further improve the measurement reliability.

[0081] To facilitate better implementation of the semiconductor product measurement method provided in the embodiments of the present application, the embodiments of the present application further provide a semiconductor product measurement device based on the above semiconductor product measurement method. The meanings of the terms are the same as those in the above semiconductor product measurement method, and the specific implementation details can refer to the description in the method embodiments. Figure 10 The block diagram of a semiconductor product measurement device according to an embodiment of the present application is shown.

[0082] As Figure 10As shown, the semiconductor product measurement device 400 may include: a batch sampling processing module, configured to: if it is monitored that a target wafer batch enters the measurement station, obtain the processing strategy adopted by the target wafer batch at the process station, where the processing strategy includes a combination of one or more sub-devices and recipe groups; and determine whether there is an invalid measurement combination in the processing strategy, where the invalid measurement combination refers to a combination in which there is no corresponding previous wafer batch being sampled and measured within the corresponding measurement validity period; a wafer sampling processing module, configured to: if there is an invalid measurement combination, perform sampling and measurement on the target wafer batch according to the intelligent wafer sampling rule, where the intelligent wafer sampling rule includes preferentially sampling wafers processed with the invalid measurement combination, preferentially sampling wafers processed with an invalid measurement combination with a shorter measurement validity period, and sampling wafers that cover the most invalid measurement combinations.

[0083] In some embodiments of the present application, after determining whether there is an invalid measurement combination in the processing strategy, the batch sampling processing module is configured to: if there is no invalid measurement combination, obtain the number of wafers to be measured of the target wafer batch at the measurement station; obtain the standard batch sampling rate matching the target wafer batch and the number of wafers from the measurement configuration data; obtain the actual batch sampling rate corresponding to each combination at the measurement station from the measurement monitoring data; if there is an actual batch sampling rate less than the standard batch sampling rate, perform sampling and measurement on the target wafer batch according to the intelligent wafer sampling rule.

[0084] In some embodiments of the present application, the batch sampling processing module is configured to: obtain the invalid identification marked for each combination in the processing strategy; determine the combination with the invalid identification being the first identification as the invalid measurement combination, where a combination in which there is no corresponding previous wafer batch being sampled and measured within the corresponding measurement validity period is marked with the first identification.

[0085] In some embodiments of the present application, after determining to perform sampling and measurement on the target wafer batch, the device further includes a data processing module, configured to: obtain the outbound time of the target wafer batch at the process station; obtain the preset effective duration corresponding to each combination; change the invalid identification corresponding to each combination to the second identification, and update the measurement validity period corresponding to each combination to the sum of the preset effective duration corresponding to each combination and the outbound time.

[0086] In some embodiments of the present application, the data processing module is configured to: determine whether the system real-time time exceeds the measurement validity period corresponding to each combination; update the invalid identification corresponding to the combination whose system real-time time exceeds the corresponding measurement validity period to the first identification.

[0087] In some embodiments of the present application, after determining whether to perform or not perform wafer sampling measurement on the target wafer lot, the data processing module is configured to: obtain the total number of wafers of each combination entering the measurement site corresponding to the wafer lot and the determined number of measurement lots; calculate and update the actual batch sampling rate of each combination corresponding to the measurement site according to the determined number of measurement lots and the total number of wafers of the wafer lot corresponding to each combination.

[0088] In some embodiments of the present application, the data processing module is configured to: determine whether the total number of wafers of the wafer lot entering the measurement site reaches a predetermined measurement threshold; reset the total number of wafers of the wafer lot corresponding to the measurement site, the determined number of measurement lots, and the actual batch sampling rate.

[0089] In some embodiments of the present application, the batch sampling processing module is configured to: if it is monitored that the target wafer lot enters the measurement site, obtain the predetermined batch sampling rule corresponding to the target wafer lot from the measurement configuration data; if the predetermined batch sampling rule is an intelligent sampling rate rule, obtain the processing strategy adopted by the target wafer lot at the process site.

[0090] In some embodiments of the present application, the wafer sampling processing module is configured to: if there is an invalid measurement combination, obtain the predetermined wafer sampling rule corresponding to the target wafer lot from the measurement configuration data; if the predetermined wafer sampling rule is the intelligent wafer sampling rule, perform wafer sampling measurement on the target wafer lot according to the intelligent wafer sampling rule.

[0091] It should be noted that although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present application, the features and functions of the two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0092] In addition, the embodiments of the present application also provide an electronic device, as Figure 11 shown, Figure 11 The block diagram of the electronic device according to an embodiment of the present application is shown. Specifically:

[0093] The electronic device may include a processor 501 with one or more processing cores, a memory 502 with one or more computer-readable storage media, a power supply 503, an input unit 504 and other components. Those skilled in the art can understand, Figure 11The structure of the electronic device shown does not limit the electronic device, and it may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0094] Wherein:

[0095] The processor 501 is the control center of the electronic device, connecting various parts of the entire computer device through various interfaces and circuits. By running or executing software programs and / or modules stored in the memory 502, and by calling the data stored in the memory 502, it executes various functions of the computer device and processes data, thereby monitoring the electronic device as a whole. Optionally, the processor 501 may include one or more processing cores; preferably, the processor 501 may integrate an application processor and a modem processor. Among them, the application processor mainly processes the operating system, user interfaces, and application programs, etc., and the modem processor mainly processes wireless communications. It can be understood that the above-mentioned modem processor may not be integrated into the processor 501.

[0096] The memory 502 can be used to store software programs and modules. The processor 501 executes various functional applications and data processing by running the software programs and modules stored in the memory 502. The memory 502 may mainly include a program storage area and a data storage area. Among them, the program storage area can store the operating system, application programs required for at least one function (such as a sound playback function, an image playback function, etc.); the data storage area can store data created according to the use of the computer device. In addition, the memory 502 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state storage devices. Correspondingly, the memory 502 may also include a memory controller to provide the processor 501 with access to the memory 502.

[0097] The electronic device further includes a power supply 503 for supplying power to each component. Preferably, the power supply 503 can be logically connected to the processor 501 through a power management system, so as to implement functions such as management of charging, discharging, and power consumption management through the power management system. The power supply 503 may also include any components such as one or more DC or AC power supplies, a recharge system, a power failure detection circuit, a power converter or inverter, and a power status indicator.

[0098] The electronic device may further include an input unit 504, which can be used to receive input digital or character information, and generate keyboard, mouse, joystick, optical, or trackball signal inputs related to user settings and function controls.

[0099] Although not shown, the electronic device may further include a display unit and the like, which will not be elaborated herein. Specifically, in this embodiment, the processor 501 in the electronic device will load the executable files corresponding to the processes of one or more computer programs into the memory 502 according to the following instructions, and the processor 501 will run the computer programs stored in the memory 502, so as to implement various functions in the foregoing embodiments of the present application.

[0100] For example, the processor 501 may execute the steps of: if it is monitored that a target wafer lot enters the measurement site, obtaining the processing strategy adopted by the target wafer lot at the process site, where the processing strategy includes a combination of one or more sub-devices and recipe groups; determining whether there is an invalid measurement combination in the processing strategy, where the invalid measurement combination refers to a combination in which there is no corresponding previous wafer lot being sampled and measured within the corresponding measurement validity period; if there is an invalid measurement combination, then performing sampling and measurement on the target wafer lot according to the intelligent wafer sampling rule, where the intelligent wafer sampling rule includes preferentially sampling wafers processed with the invalid measurement combination, preferentially sampling wafers processed with an invalid measurement combination with a shorter measurement validity period, and sampling wafers that cover the most invalid measurement combinations.

[0101] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the foregoing embodiments can be completed by a computer program, or by controlling related hardware through a computer program. The computer program can be stored in a computer-readable storage medium and loaded and executed by a processor.

[0102] Therefore, the embodiment of the present application further provides a storage medium, in which a computer program is stored, and the computer program can be loaded by a processor to execute the steps in any one of the methods provided by the embodiment of the present application.

[0103] Among them, the storage medium may be a computer-readable storage medium, and the storage medium may include: read-only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), a magnetic disk or an optical disc, etc.

[0104] Since the computer program stored in the storage medium can execute the steps in any one of the methods provided by the embodiment of the present application, the beneficial effects that can be achieved by the method provided by the embodiment of the present application can be realized. For details, see the foregoing embodiments and will not be elaborated herein.

[0105] Other embodiments of the present application will be readily apparent to those skilled in the art upon consideration of the specification and practice of the embodiments disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include known common general knowledge or conventional technical means in the technical field not disclosed in the present application.

[0106] It should be understood that the present application is not limited to the embodiments described above and shown in the drawings, and various modifications and changes can be made without departing from its scope.

Claims

1. A semiconductor product measurement method, characterized in that: include: If it is monitored that the target wafer batch enters the measurement site, the processing strategy adopted by the target wafer batch at the process site is obtained, wherein the processing strategy includes a combination of one or more sub-equipment and recipe groups; Determining whether there is an invalid measurement combination in the processing strategy, wherein the invalid measurement combination refers to a combination for which no corresponding previous wafer batch is measured within the corresponding measurement validity period; If an invalid measurement combination exists, the target wafer batch is sampled and measured according to the intelligent wafer sampling rules, wherein the intelligent wafer sampling rules include giving priority to extracting wafers processed by invalid measurement combinations, giving priority to extracting wafers processed by invalid measurement combinations with shorter measurement validity periods, and extracting wafers that cover the most invalid measurement combinations.

2. The method according to claim 1, characterized in that: After determining whether there is an invalid measurement combination in the processing strategy, the method further includes: If there is no invalid measurement combination, obtaining the number of wafers to be measured in the target wafer batch in the measurement site; Obtaining a standard batch sampling rate for matching the target wafer batch with the wafer quantity from the measurement configuration data; Obtaining the actual batch sampling rate corresponding to each of the combinations at the measurement site from the measurement monitoring data; If the actual batch sampling rate is less than the standard batch sampling rate, the target wafer batch is sampled and measured according to the intelligent wafer sampling rule.

3. The method according to claim 1 or 2, characterized in that: The determining whether there is an invalid measurement combination in the processing strategy includes: Obtaining invalid flags marked for each combination in the processing strategy; The combination with the invalid mark as the first mark is determined as the invalid measurement combination, wherein the combination that does not have a corresponding previous wafer batch to be sampled and measured within the corresponding measurement validity period is marked with the first mark.

4. The method according to claim 3, characterized in that After determining to perform wafer sampling measurement on the target wafer batch, the method further includes: Obtaining the exit time of the target wafer batch at the process site; Obtaining the preset effective duration corresponding to each of the combinations; The invalid flag corresponding to each of the combinations is changed to a second flag, and the measurement validity period corresponding to each of the combinations is updated to the sum of the preset validity period corresponding to each of the combinations and the exit time.

5. The method according to claim 3, characterized in that: The method further comprises: Determine whether the system real time exceeds the measurement validity period corresponding to each of the combinations; The invalid flag corresponding to the combination whose system real time exceeds the corresponding measurement validity period is updated to the first flag.

6. The method according to claim 1 or 2, characterized in that: After determining whether to perform wafer sampling measurement on the target wafer batch or not, the method further includes: Obtaining the total number of wafer batches entering the measurement site corresponding to each of the combinations and determining the number of measurement batches; According to the determined measurement batch quantity corresponding to each of the combinations and the total number of wafer batches entering the station, the actual batch sampling rate corresponding to each of the combinations at the measurement site is calculated and updated.

7. The method according to claim 6, characterized in that The method further comprises: Determining whether the total number of wafer batches entering the measurement site reaches a predetermined measurement threshold; If yes, the total number of wafer batches entering the measurement site, the number of batches to be measured and the actual batch sampling rate are reset.

8. The method according to claim 1, characterized in that If it is monitored that the target wafer batch enters the measurement site, obtaining the processing strategy adopted by the target wafer batch at the process site includes: If it is monitored that the target wafer batch enters the measurement site, a predetermined batch sampling rule corresponding to the target wafer batch is obtained from the measurement configuration data; If the predetermined batch sampling rule is an intelligent sampling rate rule, the processing strategy adopted by the target wafer batch at the process site is obtained.

9. The method according to claim 1, characterized in that: If there is an invalid measurement combination, the target wafer batch is subjected to wafer sampling measurement according to the intelligent wafer sampling rule, including: If there is an invalid measurement combination, obtaining a predetermined wafer extraction rule corresponding to the target wafer batch from the measurement configuration data; If the predetermined wafer extraction rule is the intelligent wafer extraction rule, extraction measurement is performed on the target wafer batch according to the intelligent wafer extraction rule.

10. A semiconductor product measuring device, characterized in that: include: The batch sampling processing module is used to: if a target wafer batch is monitored to enter a measurement site, obtain the processing strategy adopted by the target wafer batch at the process site, wherein the processing strategy includes a combination of one or more sub-equipment and recipe groups; and determine whether there is an invalid measurement combination in the processing strategy, wherein the invalid measurement combination refers to a combination for which no corresponding previous wafer batch is sampled and measured within the corresponding measurement validity period; The wafer sampling processing module is used to: if there is an invalid measurement combination, perform sampling measurement on the target wafer batch according to the intelligent wafer sampling rules, wherein the intelligent wafer sampling rules include giving priority to wafers processed by invalid measurement combinations, giving priority to wafers processed by invalid measurement combinations with shorter measurement validity periods, and giving priority to wafers covering the most invalid measurement combinations.

11. A storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor of the device, the device is caused to execute the method according to any one of claims 1 to 9.

12. An electronic device, characterized in that: include: a memory storing a computer program; A processor reads a computer program stored in a memory to execute the method according to any one of claims 1 to 9.

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