Differential line packaging matching structure

Abstract

The invention discloses a differential line packaging matching structure which comprises a pair of PCB differential lines arranged on a PCB, the PCB differential lines are connected with a packaging chip through solder balls, the packaging chip is provided with a metal wiring layer, the metal wiring layer is provided with a pair of matching structures and a pair of chip differential lines, and the matching structures are connected with the chip differential lines through solder balls. The matching structures and the chip differential lines are in one-to-one correspondence with the solder balls, and the pair of matching structures adjusts the differential mode transmission impedance by controlling the gap and the length of the part right opposite to the matching structures. The matching structures are arranged on the metal wiring layer, the gap between the pair of matching structures and the length of the opposite part are controlled, and the differential mode transmission impedance is adjusted, so that the loss caused by impedance mismatch during transmission is reduced, and the transmission quality of differential signals is improved.

Description

Technical Field

[0001] The invention relates to the field of chip packaging, and in particular to a differential line packaging matching structure. Background Art

[0002] Differential lines are two parallel, equal-length lines used to transmit the same signal with a phase difference of 180 degrees. One line transmits the "+ signal" and the other transmits the "- signal". They have strong anti-interference capabilities and EMI suppression effects.

[0003] Existing technologies such as Figure 2 As shown in the figure, due to the limitation of processing technology, the distance between the two solder balls is greater than the distance between the two chip differential lines, which makes the impedance of the chip differential line mismatch in this area. This leads to impedance mismatch when the differential signal is transmitted between the PCB and the chip, which brings additional loss to the differential signal. Summary of the invention

[0004] The main technical problem solved by the present invention is to provide a differential line packaging matching structure.

[0005] In order to solve the above technical problems, a technical solution adopted by the present invention is: a differential line packaging matching structure, including: a pair of PCB differential lines arranged on a PCB, the PCB differential lines are connected to the packaging chip through solder balls, the packaging chip is provided with a metal wiring layer, the metal wiring layer is provided with a pair of matching structures and a pair of chip differential lines, the matching structures and the chip differential lines are arranged in a one-to-one correspondence with the solder balls, and the pair of matching structures adjust the differential mode transmission impedance by controlling the gap and the length of the matching structure facing part.

[0006] Preferably, the mode transmission impedance |Z| is mainly related to the solder ball radius r and spacing s, the differential signal operating frequency f, the metal wiring thickness t, the dielectric material relative dielectric constant εr, the gap D between a pair of matching structures, and the length W of the directly facing portion of the matching structure, and has the following relationship:

[0007]

[0008] Preferably, the material of the metal wiring layer of the packaged chip and the PCB differential line includes: one or a combination of gold, copper, aluminum, nickel, titanium, and chromium.

[0009] Preferably, a teardrop structure is provided at the connection between the matching structure and the chip differential line.

[0010] Preferably, the metal wiring layer of the packaged chip can be implemented on a ceramic or resin substrate, or implemented by RDL metal wiring in wafer-level packaging.

[0011] Beneficial effects of the present invention:

[0012] By setting a matching structure on the metal wiring layer and controlling the gap between a pair of matching structures and the length of the facing part, the differential mode transmission impedance is adjusted, thereby reducing the loss caused by impedance mismatch during transmission and improving the quality of differential signal transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic diagram of the overall structure of a differential line package matching structure of the present invention;

[0014] Figure 2 It is a schematic diagram of the structure of a product in which impedance mismatch occurs in the prior art;

[0015] Figure 3 This is the connection method between the matching structure and the chip differential line in Embodiment 1 of the present invention;

[0016] Figure 4 This is the connection method between the matching structure and the chip differential line in Embodiment 2 of the present invention;

[0017] Figure 5 This is the loss of the differential signal before and after adding the matching structure.

[0018] The components in the accompanying drawings are marked as follows: 1. PCB differential line; 2. Solder ball; 3. Package chip; 4. Metal wiring layer; 401. Matching structure; 402. Chip differential line. DETAILED DESCRIPTION

[0019] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0020] like Figure 1 , Figure 3 As shown, a differential line package matching structure includes: a pair of PCB differential lines 1 arranged on a PCB, the PCB differential lines 1 are connected to a packaged chip 3 through a solder ball 2, the packaged chip 3 is provided with a metal wiring layer 4, the metal wiring layer 4 is provided with a pair of matching structures 401 and a pair of chip differential lines 402, the matching structures 401 and the chip differential lines 402 are arranged in a one-to-one correspondence with the solder balls 2, and the pair of matching structures 401 adjusts the differential mode transmission impedance by controlling the gap and the length of the facing part.

[0021] The PCB differential line 1 is arranged on the PCB to provide the chip with an input and output port for external interaction; the solder ball 2 is used to connect the PCB and the chip to provide a differential signal transmission path.

[0022] The matching structure 401 and the chip differential line 402 are both implemented by the metal wiring layer 4 of the package chip 3 .

[0023] By adjusting the gap D and the length W of the facing portion in the matching structure 401 , the loss caused by impedance mismatch when the differential signal is transmitted between the PCB and the chip can be reduced, thereby improving the transmission quality of the differential signal.

[0024] Key parameters D and W of the matching structure 401 are closely related to the size and spacing of the solder balls 2, the operating frequency of the differential signal, the thickness of the metal wiring, and the conductivity of the dielectric material, and can be adjusted between several microns and hundreds of microns.

[0025] The materials of the metal wiring layer 4 of the package chip 3 and the PCB differential line 1 include: one or a combination of gold, copper, aluminum, nickel, titanium, and chromium.

[0026] In practical applications of differential lines, the differential mode transmission impedance Z of the differential line is usually required. d It is a fixed value, such as 100 ohms.

[0027] The PCB differential line 1 part and the chip differential line 402 part have simple structures. According to the transmission line principle, their differential mode transmission impedance can be designed to be the same as Z d Impedance matching is achieved.

[0028] In the case of impedance matching, differential signaling will not incur additional losses.

[0029] The structure near the matching structure 401 is complex, and its differential mode transmission impedance |Z| cannot be accurately calculated based on the transmission line principle. It is mainly related to the radius r and spacing s of the solder ball 2, the differential signal operating frequency f, the metal wiring thickness t, the relative dielectric constant εr of the dielectric material, the gap D between a pair of matching structures 401, and the length W of the directly facing portion of the matching structure 401, and has the following relationship:

[0030]

[0031] |Z| is directly proportional to the sizes of the three variables s, f, and D, and |Z| is inversely proportional to the sizes of the four variables r, t, εr, and W.

[0032] D and W in the above formula are the key parameters of the matching structure 401 of the present invention. In the prior art, since there is no matching structure 401, that is, without adjusting D and W, |Z|≠Z d situation, that is, impedance mismatch.

[0033] The radius r and spacing s of the solder ball 2 are determined by the chip packaging process parameters, and are usually a pair of combined values, such as r=210um, s=650um; or r=160um, s=500um; or r=75um, s=300um, etc.

[0034] The metal wiring thickness t is determined by the chip packaging process parameters, and its value range can be from several microns to tens of microns.

[0035] In the actual application of differential lines, the operating frequency f of the differential signal is determined by the specific transmission protocol to which the differential line is applied. It is related to the application scenario and technological development, and the value range can be from several MHz to hundreds of GHz.

[0036] Once the five parameters r, s, f, t, and εr are determined, they cannot be adjusted freely.

[0037] The values ​​of D and W are related to the mismatch of |Z|, that is, the values ​​of f, r, s, t, and εr. Usually, adjusting D and W within the range of several microns to hundreds of microns can effectively improve the quality of differential signal transmission.

[0038] In actual design, the differential line model can be established by selecting appropriate parameters such as r, s, t, and εr based on the differential line application frequency f and the packaging process parameters. Then, the differential impedance |Z| of the model is calculated through electromagnetic simulation. If |Z|>Z d , you can appropriately reduce D or increase W and then simulate and calculate |Z| again, repeating this process until |Z|=Z d ; On the contrary, if |Z|<Z d , you can appropriately increase D or decrease W and then simulate and calculate |Z| again, repeating this process until |Z|=Z d .

[0039] According to the transmission line principle, impedance mismatch will cause additional loss of differential signals and reduce the transmission quality of differential signals.

[0040] By adjusting D and W, |Z| can be made close to Z d , thereby reducing the loss caused by impedance mismatch and improving the transmission quality of differential signals.

[0041] The metal wiring of the packaged chip 3 can be implemented on a ceramic or resin substrate, or by RDL metal wiring in wafer-level packaging.

[0042] Figure 5 As shown, after adding the matching structure, the loss of the differential signal within its operating frequency range is better than the case without the matching structure. The solid line represents the case where the matching structure is added, and the dotted line represents the case where the matching structure is not set.

[0043] Embodiment 1:

[0044] The differential signal operating frequency f ranges from 75 to 95 GHz;

[0045] Solder ball 2 radius r = 160um, spacing s = 500um;

[0046] Metal wiring thickness t = 10um;

[0047] The relative dielectric constant of the dielectric material εr = 3.2;

[0048] According to the above formula, the optimal W=226um and D=18.5um are obtained after simulation optimization.

[0049] Embodiment 2:

[0050] like Figure 1 , Figure 4 As shown, a teardrop structure is provided at the connection between the matching structure 401 and the chip differential line 402; the teardrop structure can improve the reliability of the chip metal wiring.

[0051] The differential signal operating frequency f ranges from 75 to 95 GHz;

[0052] Solder ball 2 radius r = 160um, spacing s = 500um;

[0053] Metal wiring thickness t = 10um;

[0054] The relative dielectric constant of the dielectric material εr = 3.2;

[0055] According to the above formula, the optimal W=215um and D=20um are obtained after simulation optimization.

[0056] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A differential line package matching structure, characterized in that: include: A pair of PCB differential lines are arranged on the PCB, and the PCB differential lines are connected to the packaged chip through solder balls. The packaged chip is provided with a metal wiring layer, and the metal wiring layer is provided with a pair of matching structures and a pair of chip differential lines. The matching structures and the chip differential lines are arranged in a one-to-one correspondence with the solder balls. The pair of matching structures adjust the differential mode transmission impedance by controlling the gap and the length of the matching structure facing part.

2. The differential line package matching structure according to claim 1, characterized in that: The differential mode transmission impedance |Z| is mainly related to the solder ball radius r and spacing s, the differential signal operating frequency f, the metal wiring thickness t, the relative dielectric constant εr of the dielectric material, the gap D between a pair of matching structures, and the length W of the facing part of the matching structure, and has the following relationship:

3. The differential line package matching structure according to claim 1, characterized in that: The materials of the metal wiring layer of the packaged chip and the PCB differential line include: one or a combination of gold, copper, aluminum, nickel, titanium, and chromium.

4. The differential line package matching structure according to claim 1, characterized in that: A teardrop structure is provided at the connection between the matching structure and the chip differential line.

5. The differential line package matching structure according to claim 1, characterized in that: The metal wiring layer of the packaged chip can be implemented on a ceramic or resin substrate, or implemented by RDL metal wiring in wafer-level packaging.

Images