Amplification circuit

Abstract

The present disclosure provides an amplifier circuit that suppresses changes in characteristics of a resistor or deterioration of the resistor. The amplifier circuit includes: an amplifier that amplifies a high-frequency signal input to an input terminal and outputs the amplified high-frequency signal to an output terminal; a first inductor having a first end connected to a line between the amplifier and the output terminal; a resistance member (30), which has a first end connected to a second end of the first inductor, is mounted on the upper surface of the base substrate, and is provided with an insulating substrate (31) having a thermal conductivity of 20 W / mK or more and a band gap energy of 1.5 eV or more, and a resistance film (36) provided on the upper surface of the insulating substrate; and a first capacitor having a first end connected to the second end of the resistance member and a second end connected to a reference potential, the absolute value of the impedance of the first inductor at the center frequency of the operating band of the amplifier being greater than the absolute value of the impedance of the first capacitor at a frequency equivalent to the bandwidth of the operating band.

Description

Technical Field

[0001] The present invention relates to an amplifier circuit. Background Art

[0002] It is known to provide a baseband termination circuit (such as a video bypass circuit or an envelope frequency termination circuit) in a line between an amplifier and an output terminal of a high-output power amplifier circuit for high-frequency signals such as microwaves (for example, Patent Documents 1 to 4, Non-Patent Document 1, and Non-Patent Document 2). It is known to provide a resistor provided in the baseband termination circuit on a substrate mounted on a base of a package (for example, Patent Document 1 or Patent Document 2).

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2022-138983

[0006] Patent Document 2: European Patent Application Publication No. 3273596

[0007] Patent Document 3: Japanese Patent Application Laid-Open No. 2006-501678

[0008] Patent Document 4: Japanese Unexamined Patent Application Publication No. 2018-101975

[0009] Non-Patent Documents

[0010] Non-Patent Document 1: Hussain Ladhani et.al. “Analysis of the Baseband Termination of High Power RF Transistors” 2019 IEEE / MTT-S International Microwave Symposium

[0011] Non-Patent Document 2: Ning Zhu et.al. “Compact High-Efficiency High-Power Wideband GaN Amplifier Supporting 395MHz Instantaneous Bandwidth” 2019 IEEE / MTT-S International Microwave Symposium

[0012] The baseband terminal circuit is configured to exhibit a low impedance to signals in the baseband frequency range so that signals in the baseband frequency range, which are lower than the frequency of the operating band of the amplifier, form a terminal at the reference potential. In addition, the baseband terminal circuit is configured to exhibit a high impedance to the frequency of the operating band of the amplifier so that signals at the frequency of the operating band of the amplifier do not flow in as much as possible. Therefore, it is considered that a high-power output signal amplified by the amplifier is basically not applied to the resistor of the baseband terminal circuit. However, a part of the signal in the operating band may be applied to the resistor of the baseband terminal circuit, resulting in a change in the characteristics of the resistor or deterioration of the resistor. Summary of the Invention

[0013] The present disclosure has been made in view of the above problems, and an object thereof is to suppress changes in the characteristics of a resistor or deterioration of the resistor.

[0014] One embodiment of the present disclosure is an amplifier circuit including: an amplifier that amplifies a high-frequency signal input to an input terminal and outputs the amplified high-frequency signal to an output terminal; a first inductor, a first end of the first inductor being connected to a line between the amplifier and the output terminal; a resistor component, a first end of the resistor component being connected to a second end of the first inductor, the resistor component being mounted on an upper surface of a base substrate and including an insulating substrate having a thermal conductivity of 20 W / m·K or more and a bandgap energy of 1.5 eV or more and a resistor film provided on the upper surface of the insulating substrate; and a first capacitor, a first end of the first capacitor being connected to a second end of the resistor component, a second end of the first capacitor being connected to a reference potential, and an absolute value of an impedance of the first inductor at a center frequency of the operating band of the amplifier being greater than an absolute value of an impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating band.

[0015] Advantages of the Invention

[0016] According to the present disclosure, changes in the characteristics of a resistor or deterioration of the resistor can be suppressed. Brief Description of the Drawings

[0017] Figure 1 is a circuit diagram of the amplifier circuit of Embodiment 1.

[0018] Figure 2 is a circuit diagram of the semiconductor device in Embodiment 1.

[0019] Figure 3 is a top view of the semiconductor device in Embodiment 1.

[0020] Figure 4 is Figure 3 a cross-sectional view taken along line A-A of

[0021] Figure 5 isFigure 3 Cross-sectional view taken along line B - B

[0022] Figure 6 Top view of the resistor component in Embodiment 1

[0023] Figure 7 is Figure 6 Cross-sectional view taken along line A - A

[0024] Figure 8 Another circuit diagram of the semiconductor device in Embodiment 1

[0025] Figure 9 Top view of the semiconductor device of Modified Example 1 of Embodiment 1

[0026] Figure 10 Top view of the semiconductor device of Modified Example 2 of Embodiment 1

[0027] Figure 11 Circuit diagram of the semiconductor device in Embodiment 2

[0028] Figure 12 Top view of the semiconductor device in Embodiment 2

[0029] Figure 13 Top view of the semiconductor device of Modified Example 1 of Embodiment 2

[0030] Figure 14 Circuit diagram of the semiconductor device in Embodiment 3

[0031] Figure 15 Top view of the semiconductor device in Embodiment 3

[0032] Figure 16 Top view of the semiconductor device in Embodiment 4

[0033] Explanation of reference numerals

[0034] 10: Amplifier circuit

[0035] 11: Package

[0036] 12: Substrate

[0037] 13: Cover

[0038] 14: Frame

[0039] 16: Amplifier

[0040] 18: Transistor

[0041] 20: Semiconductor chip

[0042] 21: Semiconductor substrate

[0043] 22, 23, 24, 27, 28, 34, 35, 38, 42, 43, 47: Electrodes;

[0044] 25, 40, 45, 54: Capacitive components;

[0045] 26, 41, 46: Dielectric substrates;

[0046] 30: Resistance components;

[0047] 30a: Wiring components;

[0048] 31, 31a: Insulating substrates;

[0049] 32, 32a: Circuit patterns;

[0050] 33, 33a, 34a: Pads;

[0051] 36: Resistance films;

[0052] 48: Bonding layers;

[0053] 50: Output leads;

[0054] 51: Input leads;

[0055] 56, 58: Integrated components;

[0056] 61, 62, 63, 64, 65, 66, 67, 68: Bonding wires;

[0057] 70: Baseband terminal circuits;

[0058] 71: Internal output matching circuits;

[0059] 72: External output matching circuits;

[0060] 73: Internal input matching circuits;

[0061] 74: External input matching circuits;

[0062] 100, 102, 104, 106, 108, 110: Semiconductor devices. Detailed implementation manners

[0063] [Description of the embodiments of the present disclosure]

[0064] First, the content of the embodiments of the present disclosure will be listed for description.

[0065] (1) One embodiment of the present disclosure is an amplifier circuit, which includes: an amplifier that amplifies a high-frequency signal input to an input terminal and outputs the amplified high-frequency signal to an output terminal; a first inductor, the first end of the first inductor being connected to a line between the amplifier and the output terminal; a resistor component, the first end of the resistor component being connected to the second end of the first inductor, the resistor component being mounted on the upper surface of a substrate, and including an insulating substrate having a thermal conductivity of 20 W / m·K or more and a bandgap energy of 1.5 eV or more, and a resistor film provided on the upper surface of the insulating substrate; and a first capacitor, the first end of the first capacitor being connected to the second end of the resistor component, the second end of the first capacitor being connected to a reference potential, and the absolute value of the impedance of the first inductor at the center frequency of the operating band of the amplifier being greater than the absolute value of the impedance of the first capacitor at a frequency corresponding to the bandwidth of the operating band. Thus, changes in the characteristics of the resistor component caused by a temperature rise of the resistor component for a baseband terminal circuit can be suppressed. Deterioration of the resistor component caused by the application of a high voltage can be suppressed. Deviation from desired characteristics due to parasitic capacitance can be suppressed.

[0066] (2) In the above (1), it may also be that the absolute value of the impedance of the first inductor at the center frequency of the operating band is 10 Ω or more, and the absolute value of the impedance of the first capacitor at a frequency corresponding to the bandwidth of the operating band is 1 Ω or less. Thus, the first inductor and the first capacitor can function as a baseband terminal circuit.

[0067] (3) In the above (1) or (2), it may also be that the inductance of the first inductor is 100 pH or more, and the capacitance of the first capacitor is 100 pF or more. Thus, the first inductor and the first capacitor can function as a baseband terminal circuit.

[0068] (4) In any one of the above (1) to (3), it may also be that the amplifier circuit includes a matching circuit, the matching circuit is provided in the line and includes a second inductor and a second capacitor, the inductance of the first inductor is greater than the inductance of the second inductor, and the capacitance of the first capacitor is greater than the capacitance of the second capacitor. Thus, the first inductor and the first capacitor can function as a baseband terminal circuit.

[0069] (5) In any one of the above (1) to (4), it may also be that the center frequency of the operating band is 0.5 GHz or more and 10 GHz or less, and the bandwidth of the operating band is 100 MHz or more. Thus, the amplifier circuit can be used for a mobile communication base station.

[0070] (6) In the above (5), it may also be that the saturation power of the high-frequency signal output from the output terminal is 10 W or more. Thus, even when a high power is applied to the resistive component, changes or deterioration of the characteristics of the resistive component can be suppressed.

[0071] (7) In any one of the above (1) to (6), it may also be that the first inductor includes a circuit pattern provided on the upper surface of the insulating substrate. Thus, an increase in the temperature of the first inductor can be suppressed.

[0072] (8) In any one of the above (1) to (7), it may also be that the amplifier circuit includes a third capacitor, and the third capacitor is connected in parallel with the first capacitor between the circuit and the reference potential. Thus, the frequency band width suppressed by the baseband terminal circuit can be broadened. Through the resistive component, resonance caused by the first capacitor and the third capacitor can be suppressed.

[0073] (9) In any one of the above (1) to (8), it may also be that the insulating substrate is an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate. Thus, deterioration of the resistive component can be suppressed.

[0074] (10) In any one of the above (1) to (9), it may also be that the first capacitor includes: a dielectric substrate mounted on the upper surface of the base substrate; and electrodes provided on the upper surface of the dielectric substrate and connected to the second end of the resistive component, and the amplifier includes: a semiconductor substrate mounted on the upper surface of the base substrate; and a transistor provided on the semiconductor substrate. Thus, the amplifier circuit can be miniaturized.

[0075] [Details of Embodiments of the Present Disclosure]

[0076] Hereinafter, a specific example of the amplifier circuit according to the embodiment of the present disclosure will be described with reference to the drawings. It should be noted that the present disclosure is not limited to these examples, but is shown by the claims, and is intended to include all changes within the meaning and scope equivalent to the claims.

[0077] [Example 1]

[0078] As the amplifier circuit, a high-output power high-frequency amplifier circuit for a mobile communication base station will be described as an example. Figure 1 is a circuit diagram of the amplifier circuit of Example 1. As Figure 1As shown, the amplifier circuit 10 includes a semiconductor device 100, an external output matching circuit 72, and an external input matching circuit 74. The semiconductor device 100 includes an amplifier 16, an internal output matching circuit 71, an internal input matching circuit 73, and a baseband terminal circuit 70 (also referred to as a video bypass circuit or an envelope frequency terminal circuit). The input terminal Tin is connected to the amplifier 16 via the external input matching circuit 74 and the internal input matching circuit 73. The external input matching circuit 74 and the internal input matching circuit 73 match the load connected to the input terminal Tin with the input impedance of the amplifier 16.

[0079] The amplifier 16 is connected to the output terminal Tout via the internal output matching circuit 71 and the external output matching circuit 72. The internal output matching circuit 71 and the external output matching circuit 72 match the load connected to the output terminal Tout with the output impedance of the amplifier 16. The high-frequency signal input to the input terminal Tin is transmitted to the amplifier 16 via the external input matching circuit 74 and the internal input matching circuit 73. The amplifier 16 amplifies the high-frequency signal and outputs the amplified signal to the output terminal Tout via the internal output matching circuit 71 and the external output matching circuit 72.

[0080] The baseband terminal circuit 70 is connected between the node N1 between the internal output matching circuit 71 and the external output matching circuit 72 and a reference potential such as ground. The baseband terminal circuit 70 is a circuit for increasing the VBW (Video Bandwidth). The video bandwidth is used as an index representing the frequency band of distortion. When the VBW is small, when measuring the third-order intermodulation distortion (IMD3: 3rd order InterModulation Distortion) of a two-tone signal equivalent to the bandwidth of the amplifier (for example, 400 MHz), there is a difference in signal strength between the IMD3 component on the low-frequency side and the IMD3 component on the high-frequency side. When the IMD3 becomes asymmetric in this way, even if distortion compensation based on DPD (Digital Predistortion) is performed, the improvement amount of distortion decreases and sufficient distortion characteristics cannot be obtained (for example, refer to Non-Patent Document 1). As a cause of the asymmetry of the IMD3, an intermodulation distortion IMD2 component generated in the difference frequency component of the two-tone signal is known. This difference frequency component is a signal component in the low-frequency band included in the baseband frequency range. Therefore, by providing the baseband terminal circuit 70, the impedance of the low-frequency band at the node N1 is reduced, whereby the video bandwidth becomes larger and the IMD2 component is suppressed. As a result, the asymmetry of the IMD3 is improved, and sufficient distortion compensation can be performed by DPD.

[0081] Figure 2 is the circuit diagram of the semiconductor device in Embodiment 1. AsFigure 2 As shown, the semiconductor device 100 includes a package 11. An amplifier 16, an internal output matching circuit 71, an internal input matching circuit 73, and a baseband terminal circuit 70 are mounted within the package 11. An output lead 50 and an input lead 51 connect the circuits within the package 11 to the outside.

[0082] The amplifier 16 includes a transistor 18. The transistor 18 is, for example, a FET (Field Effect Transistor) such as a GaN HEMT (Gallium Nitride High Electron Mobility Transistor) or an LDMOS (Laterally Diffused Metal Oxide Semiconductor). The source S of the transistor 18 is grounded. The gate G of the transistor 18 is electrically connected to the input lead 51 via the internal input matching circuit 73. The drain D of the transistor 18 is electrically connected to the output lead 50 via the internal output matching circuit 71.

[0083] The internal output matching circuit 71 includes an inductor L11. The internal output matching circuit 71 may also be a low-pass circuit having two inductors connected in series and a capacitor shunt-connected to the node between the two inductors. The internal output matching circuit 71 may also be a high-pass circuit having an inductor connected in series, an inductor shunt-connected, and a DC cut-off capacitor connected between the inductor and the ground. The number of inductors and the number of capacitors in the internal output matching circuit 71 can be set appropriately.

[0084] The internal input matching circuit 73 is an L-C-L T-type low-pass circuit, which includes an inductor L21, an inductor L22, and a capacitor C21. The internal input matching circuit 73 may also be just one inductor connected in series. The internal input matching circuit 73 may also be a low-pass circuit formed by connecting two L-C-L T-type low-pass circuits in series. The internal input matching circuit 73 may also be a circuit in which an inductor and a capacitor connected in series are shunt-connected to the subsequent stage of the L-C-L T-type low-pass circuit. The number of inductors and the number of capacitors in the internal input matching circuit 73 can be set appropriately.

[0085] The baseband terminal circuit 70 includes an inductor L1, a resistor R1, and a capacitor C1. The first end of the inductor L1 (first inductor) is electrically connected to the node N1 of the line between the amplifier 16 and the output lead 50. The first end of the resistor R1 is electrically connected to the second end of the inductor L1. The first end of the capacitor C1 (first capacitor) is electrically connected to the second end of the resistor R1, and the second end of the capacitor C1 is electrically connected to the reference potential.

[0086] The inductor L1 has a function of suppressing high-frequency signals (e.g., above 0.5 GHz and below 10 GHz) in the operating frequency band amplified by the amplifier 16 from leading to the ground via the capacitor C1. Therefore, the inductor L1 has an inductance that is high impedance within the frequency band of the operating frequency band. The inductance of the inductor L1 is, for example, 1 nH or more. The capacitor C1 has a low impedance at a frequency (e.g., greater than 0 MHz and 400 MHz or less) corresponding to the bandwidth of the high-frequency signal amplified by the amplifier 16. Therefore, the capacitor C1 has a large capacitance and is large-sized. The capacitance of the capacitor C1 is, for example, 1 nF or more. The resistor R1 is a damping resistor. For example, when a capacitor (e.g., parasitic capacitance) is connected in parallel with the capacitor C1 and the inductor L1, unnecessary resonance may occur. By providing the resistor R1, unnecessary resonance can be suppressed. The resistance value of the resistor R1 is, for example, 1 Ω or more and 100 Ω or less.

[0087] Figure 3 is a top view of the semiconductor device in Embodiment 1. Figure 4 and Figure 5 are respectively Figure 3 the A-A cross-sectional view and the B-B cross-sectional view of. In Figure 3 , the lid 13 is not shown. The normal direction of the upper surface of the base substrate 12 is set as the Z direction, the direction from the input lead 51 to the output lead 50 is set as the X direction, and the direction orthogonal to the X direction and the Z direction is set as the Y direction.

[0088] As Figures 3 to 5 shown, in the semiconductor device 100 of Embodiment 1, the package 11 has a base substrate 12, a frame 14, and a lid 13. The base substrate 12 is a conductive substrate such as a laminated substrate of copper and molybdenum, for example. A reference potential such as a ground potential is supplied to the base substrate 12. The frame 14 and the lid 13 are dielectric layers made of resin or ceramic such as FR-4 (Flame Retardant Type 4), for example. A semiconductor chip 20, a resistor component 30, a capacitive component 25, and a capacitive component 40 are mounted on the base substrate 12. The capacitive component 25 and the semiconductor chip 20 are arranged in the X direction. The frame 14 is provided on the base substrate 12 so as to surround the semiconductor chip 20, the resistor component 30, the capacitive component 25, and the capacitive component 40. The frame 14 is joined to the upper surface of the base substrate 12 through a joining layer (not shown) such as metal paste or solder. The lid 13 is joined to the upper surface of the frame 14 through an insulating adhesive (not shown) such as resin. The frame 14 and the lid 13 seal the semiconductor chip 20 in a void.

[0089] The planar shape of the housing 14 is substantially rectangular. The input lead 51 and the output lead 50 are substantially T-shaped. The input lead 51 and the output lead 50 may also be formed of the same metal layer or metal plate in an integrated manner. The input lead 51 and the output lead 50 may also be joined to rod-shaped leads on a metal layer provided on the housing 14, respectively. The input lead 51 and the output lead 50 are, for example, a metal layer or metal plate such as copper.

[0090] The semiconductor chip 20 includes a semiconductor substrate 21, electrodes 22 and 23 provided on the upper surface of the semiconductor substrate 21, and an electrode 24 formed on the lower surface of the semiconductor substrate 21. The electrodes 22, 23, and 24 are a gate electrode, a drain electrode, and a source electrode, respectively, and the electrodes 22 and 23 are an input pad and an output pad, respectively. A transistor 18 as shown is provided in the semiconductor substrate 21. Figure 2 as shown Figure 3 , Figure 4 The illustration of the transistor 18 is omitted. When the transistor 18 is a GaN HEMT, the semiconductor substrate 21 is, for example, a silicon carbide (SiC) substrate, a sapphire substrate, or a gallium nitride (GaN) substrate. When the transistor 18 is an LDMOS, the semiconductor substrate 21 is, for example, a silicon (Si) substrate. The electrodes 22, 23, and 24 are, for example, a metal layer such as a gold layer.

[0091] The capacitive component 25 includes a dielectric substrate 26, an electrode 27 provided on the upper surface of the dielectric substrate 26, and an electrode 28 provided on the lower surface of the dielectric substrate 26. A capacitor C21 as shown is formed by the dielectric substrate 26 and the electrodes 27 and 28 disposed therebetween. Figure 2 The capacitive component 40 includes a dielectric substrate 41, an electrode 42 provided on the upper surface of the dielectric substrate 41, and an electrode 43 provided on the lower surface of the dielectric substrate 41. A capacitor C1 as shown is formed by the dielectric substrate 41 and the electrodes 42 and 43 disposed therebetween. Figure 2 The dielectric substrate 26 is, for example, alumina, and the dielectric substrate 41 is a high dielectric such as barium titanate having a relative dielectric constant higher than that of alumina. The electrodes 27, 28, 42, and 43 are, for example, a metal layer such as a gold layer.

[0092] Figure 6 is a top view of the resistance component in Embodiment 1. Figure 7 is Figure 6 The A-A cross-sectional view of. As Figure 6 and Figure 7As shown, the resistor component 30 includes an insulating substrate 31, a wiring pattern 32 provided on the upper surface of the insulating substrate 31, pads 33, electrodes 34, 35, and a resistor film 36. The pads 33 are connected to bonding wires 64. The wiring pattern 32 is a wiring pattern extending in the X direction. The planar shape of the wiring pattern 32 may also be a spiral shape or a meandering shape. The electrodes 34 and 35 are respectively provided on both end portions in the X direction of the resistor film 36 so as to be electrically connected to both end portions. The resistor R1 shown in Figure 2 is formed by the resistor film 36. A part of the inductor L1 shown in Figure 2 is formed by the wiring pattern 32. The resistor film 36 is, for example, a metal nitride film such as tantalum nitride (TaN or Ta 2 N), a metal oxide film, or an alloy film such as a nickel-chromium (NiCr) alloy. An electrode 38 is provided on the lower surface of the insulating substrate 31. The wiring pattern 32, the pads 33, the electrodes 34, 35, and the electrode 38 are formed of, for example, the same metal layer, for example, a gold layer.

[0093] The electrodes 24, 38, 28, and 43 of the semiconductor chip 20, the resistor component 30, the capacitive component 25, and the capacitive component 40 are respectively bonded to the upper surface of the base substrate 12 by a bonding layer 48 such as a metal paste or solder. Thus, the potentials of the electrodes 24, 28, 38, and 43 are the reference potentials supplied to the base substrate 12.

[0094] The bonding wire 61 electrically connects the input lead 51 and the electrode 27. The bonding wire 62 electrically connects the electrode 27 and the electrode 22. The bonding wire 63 electrically connects the electrode 23 and the output lead 50. The bonding wire 64 electrically connects the output lead 50 and the pad 33. The bonding wire 65 electrically connects the electrode 35 and the electrode 42. The bonding wires 61 to 65 extend in the substantially X direction in a plan view. The bonding wires 61, 62, and 63 respectively form Figure 2 the inductors L21, L22, and L11. The bonding wire 64 forms Figure 2 a part of the inductor L1.

[0095] Figure 8 is another circuit diagram of the semiconductor device in the first embodiment. As Figure 8 shown, an inductor L2 is provided between the resistor R1 and the capacitor C1. The first end of the inductor L2 is electrically connected to the second end of the resistor R1, and the second end of the inductor L2 is electrically connected to the first end of the capacitor C1. Figure 3 and Figure 5 The bonding wires 65 shown form Figure 8inductor L2. The inductor L2 may also not be provided. When a bonding wire 65 is provided to electrically connect the resistor component 30 and the capacitive component 40, the inductor L2 is formed. The inductance of the inductor L2 is less than the inductance of the inductor L1, for example, 1 / 2 or less of the inductance of the inductor L1.

[0096] The problems in the case of using a silicon substrate or an alumina substrate as the insulating substrate 31 of the resistor component 30 will be described. The silicon substrate and the alumina substrate are inexpensive, so they are convenient insulating substrates to use. In the baseband terminal circuit 70, the high-frequency signal in the operating frequency band hardly reaches the resistor R1 due to the inductor L1. Therefore, it is considered that a high-power signal will not be applied to the resistor R1. However, for example, in the amplifier circuit 10 for a base station, the saturation power of the output signal in the operating frequency band output by the amplifier 16 is 10 W or more, and the amplitude of the output signal is 50 V or more. When the suppression of the output signal achieved by the inductor L1 is insufficient, a part of the output signal is applied to the resistor R1, and the temperature of the resistor R1 rises. As a result, the resistance value of the resistor R1 becomes different from the desired value. In addition, the resistor R1 deteriorates due to temperature.

[0097] Moreover, for example, when the bias voltage of the drain D of the transistor 18 is 50 V, the amplitude of the output signal may be about 100 V. The voltage of the output signal not completely suppressed by the inductor L1 is applied to the resistor R1. In addition, during operation or testing, the voltage applied to the resistor R1 is sometimes about 200 V. When such a high voltage is applied to the resistor R1, the resistor R1 deteriorates. Also, when the parasitic capacitance added to the resistor R1 is large, the baseband terminal circuit 70 sometimes fails to achieve the desired characteristics.

[0098] Table 1 is a table showing the thermal conductivity, bandgap energy, and relative dielectric constant of each material. In Table 1, Si, Al 2 O 3 , AlN, GaN, and SiC represent silicon, alumina, aluminum nitride, gallium nitride, and silicon carbide, respectively. The bandgap represents the bandgap energy. It should be noted that materials with a large bandgap energy are considered to have high breakdown voltage.

[0099] [Table 1]

[0100] Material Si <![CDATA[Al 2 O 3 > AIN GaN SiC Thermal Conductivity [W / m·K] 151 17 170 130 490 Band Gap [eV] 1.1 8.8 6.2 3.4 3.2 Relative Dielectric Constant 11.9 10 8.5 9.5 6.5

[0101] When using a silicon substrate as the insulating substrate 31, the thermal conductivity of silicon is high. Therefore, the temperature rise of the resistor component 30 can be suppressed. However, the bandgap energy of silicon is small and the breakdown voltage is low. Therefore, when a high voltage is applied to the resistor R1, the resistor component 30 deteriorates. In addition, the relative dielectric constant of silicon is high. Therefore, parasitic capacitance is generated, and the characteristics of the baseband terminal circuit 70 deviate from the desired characteristics.

[0102] When an alumina substrate is used as the insulating substrate 31, the bandgap energy of alumina is higher than that of silicon, and the breakdown voltage of alumina is higher than that of silicon. Therefore, even when a high voltage is applied to the resistor R1, deterioration of the resistor component 30 can be suppressed. In addition, the relative permittivity of alumina is lower than that of silicon, and deviation of the characteristics of the baseband terminal circuit 70 from the desired characteristics can be suppressed. However, the thermal conductivity of alumina is low. Therefore, the temperature of the resistor component 30 rises and the resistance value changes.

[0103] When the baseband terminal circuit 70 is provided in the amplifier circuit 10, a substrate having a thermal conductivity of 20 W / m·K or more and a bandgap energy of 1.5 eV or more is used as the insulating substrate 31 of the resistor component 30 forming the resistor R1. By making the thermal conductivity of the insulating substrate 31 20 W / m·K or more, the thermal conductivity of the insulating substrate 31 is higher than that of alumina. Thereby, the temperature rise of the resistor component 30 can be suppressed. From the viewpoint of suppressing the temperature rise, the thermal conductivity of the insulating substrate 31 is, for example, 50 W / m·K or more, 100 W / m·K or more. Regarding the thermal conductivity of the insulating substrate 31, it is 1000 W / m·K or less in general materials. By making the bandgap energy of the insulating substrate 31 1.5 eV or more, the bandgap energy is higher than that of silicon. Thereby, even when a high voltage is applied to the resistor R1, deterioration of the resistor component 30 can be suppressed. From the viewpoint of improving the breakdown voltage, the bandgap energy of the insulating substrate 31 is, for example, 2.0 eV or more, 3.0 eV or more. Regarding the bandgap energy of the insulating substrate 31, it is 10 eV or less in general materials.

[0104] When a aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate is used as the insulating substrate 31, the thermal conductivity of the insulating substrate 31 can be made higher than that of alumina, and the breakdown voltage can be made higher than that of silicon. Since the bandgap energy of aluminum nitride is higher than that of gallium nitride and silicon carbide, in order to improve the breakdown voltage, an aluminum nitride substrate can be used as the insulating substrate 31. The relative permittivities of aluminum nitride, gallium nitride, and silicon carbide are lower than those of silicon and alumina. Thereby, deviation of the characteristics of the baseband terminal circuit 70 from the desired characteristics due to parasitic capacitance can be suppressed. The relative permittivity of the insulating substrate 31 can be set to 10 or less, for example. The aluminum nitride substrate, gallium nitride substrate, or silicon carbide substrate used as the insulating substrate 31 is, for example, polycrystalline or single crystal. By using a polycrystalline substrate or a sintered substrate as the insulating substrate 31, an inexpensive insulating substrate 31 can be used. The thickness of the insulating substrate 31 is, for example, 300 μm or less, 200 μm or less, 100 μm or less. Thereby, the temperature rise of the resistor component 30 can be suppressed. From the manufacturing viewpoint, the thickness of the resistor component 30 is, for example, 10 μm or more.

[0105] In the baseband terminal circuit 70, the absolute value of the impedance of the inductor L1 at the center frequency of the operating band of the amplifier 16 is greater than the absolute value of the impedance of the capacitor C1 at a frequency corresponding to the bandwidth of the operating band. Thus, the inductor L1 suppresses the leakage of high-frequency signals in the operating band to the reference potential, and the capacitor C1 allows low-frequency signals to pass to the reference potential. Therefore, the inductor L1 and the capacitor C1 can function as the baseband terminal circuit 70. The absolute value of the impedance of the inductor L1 at the center frequency of the operating band can be set to be 10 times or more, and can be set to be 20 times or more, the absolute value of the impedance of the capacitor C1 at a frequency corresponding to the bandwidth of the operating band.

[0106] The absolute value of the impedance of the inductor L1 at the center frequency of the operating band is, for example, 10 Ω or more and 100 Ω or more. The absolute value of the impedance of the capacitor C1 at a frequency corresponding to the bandwidth of the operating band is, for example, 1 Ω or less and 0.1 Ω or less. Thus, the inductor L1 and the capacitor C1 can function as the baseband terminal circuit 70.

[0107] The inductance of the inductor L1 is, for example, 100 pH or more and 1 nH or more. The capacitance of the capacitor C1 is 100 pF or more and, for example, 1 nF or more. When the inductor L1 and the capacitor C1 are too large, the semiconductor device becomes large-sized. From this viewpoint, the inductance of the inductor L1 is 1 μH or less, and the capacitance of the capacitor C1 is 1 μF or less. Thus, the inductor L1 and the capacitor C1 can function as the baseband terminal circuit 70.

[0108] When the amplifier circuit 10 is used in a mobile communication base station, the center frequency of the operating band of the amplifier 16 is, for example, 0.5 GHz or more and 10 GHz or less, and the bandwidth of the operating band is, for example, 0.01 times or more and 0.5 times or less the center frequency of the operating band. For example, the bandwidth of the operating band is 100 MHz or more. The center frequency of the operating band of the amplifier 16 can also be 0.5 GHz or more and 5 GHz or less, and the bandwidth of the operating band is 0.1 times or more and 0.3 times or less the center frequency of the operating band.

[0109] The saturation power of the high-frequency signal output from the output terminal Tout (for example, the saturation power of the amplifier 16) is, for example, 10 W or more, 100 W or more, and 500 W or more. In such a case, a high-power signal may be applied to the resistor component 30. Therefore, an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate is used as the insulating substrate 31. Thus, even when a high power is applied to the resistor component 30, changes or deterioration of the characteristics of the resistor component 30 can be suppressed. The saturation power output from the output terminal Tout is, for example, 1500 W or less.

[0110] It is only necessary to form the resistor R1 with the resistor component 30 mounted on the base substrate 12, and the capacitor C21 and the amplifier 16 may not be provided separately on the capacitive component 25 and the semiconductor chip 20, respectively. The capacitor C21 and the amplifier 16 are provided separately on the capacitive component 25 and the semiconductor chip 20 mounted on the base substrate 12. Thus, the semiconductor device 100 can be miniaturized.

[0111] [Modification Example 1 of Embodiment 1]

[0112] Figure 9 is a top view of the semiconductor device of Modification Example 1 of Embodiment 1. As Figure 9 shown, in the semiconductor device 102 of Modification Example 1 of Embodiment 1, the wiring pattern 32 and the pad 33 are not provided on the resistor component 30. The bonding wire 64 electrically connects the output lead 50 and the electrode 34. The bonding wire 64 forms Figure 2 the inductor L1. The other configurations are the same as those of Embodiment 1, and the description thereof is omitted.

[0113] [Modification Example 2 of Embodiment 1]

[0114] Figure 10 is a top view of the semiconductor device of Modification Example 2 of Embodiment 1. As Figure 10 shown, in the semiconductor device 104 of Modification Example 2 of Embodiment 1, a wiring component 30a is provided separately from the resistor component 30. The wiring component 30a includes an insulating substrate 31a, a wiring pattern 32a, pads 33a and 34a provided on the upper surface of the insulating substrate 31a, and an electrode (not shown) provided on the lower surface of the insulating substrate 31a. The electrode on the lower surface of the insulating substrate 31a is bonded to the base substrate 12 through a conductive bonding layer and is supplied with a reference potential. The bonding wire 64, the wiring pattern 32a, and the bonding wire 66 form Figure 2 the inductor L1. The insulating substrate 31 and the insulating substrate 31a may be substrates of the same material or different materials. From the viewpoints of suppressing the temperature rise in the wiring component 30a, deterioration caused by high voltage, and deviation of the characteristics of the baseband terminal circuit 70 from the desired characteristics caused by parasitic capacitance, the insulating substrate 31a may be an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate. The other configurations are the same as those of Embodiment 1, and the description thereof is omitted.

[0115] As in Embodiment 1 and its Modification Example 1 and Modification Example 2, the inductor L1 can be formed by the bonding wire 64, or can be formed by the bonding wire 64 and the wiring pattern 32 or the bonding wire 64 and the wiring pattern 32a. Also, as in Patent Document 1, at least a part of the inductor L1 is a wiring pattern provided on the frame 14.

[0116] In order to suppress the temperature of the inductor L1 from rising due to the current flowing through the inductor L1, for the insulating substrate 31 or insulating substrate 31a provided with the wiring pattern 32 or wiring pattern 32a, for example, a substrate having a thermal conductivity of 20 W / m·K or more and a bandgap energy of 1.5 eV or more is used. For example, an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate is used. Also, for miniaturization, the wiring pattern 32 may be provided on the resistor component 30.

[0117] In the case where the wiring pattern 32a forming a part of the inductor L1 is provided on the wiring component 30a separate from the resistor component 30 as in the modified example 2 of the first embodiment, the material of the insulating substrate 31a may be the same as or different from the material of the insulating substrate 31. The wiring pattern 32a does not generate heat like the resistor film 36. Therefore, the thermal conductivity of the insulating substrate 31a may also be lower than the thermal conductivity of the insulating substrate 31.

[0118] [Embodiment 2]

[0119] Figure 11 is the circuit diagram of the semiconductor device in Embodiment 2. As Figure 11 shown, in the semiconductor device 106 of Embodiment 2, compared with that of the first embodiment Figure 8 an inductor L3 and a capacitor C2 are provided. The first end of the inductor L3 is electrically connected to the node N2 between the inductor L1 and the resistor R1. The first end of the capacitor C2 is electrically connected to the second end of the inductor L3, and the second end of the capacitor C2 is electrically connected to the reference potential. The capacitance of the capacitor C2 is different from the capacitance of the capacitor C1. For example, the capacitance of the capacitor C2 is 1 / 2 or less of the capacitance of the capacitor C1. Thereby, the frequency band suppressed by the baseband terminal circuit 70 can be increased.

[0120] Figure 12 is the top view of the semiconductor device in Embodiment 2. As Figure 12 shown, in the semiconductor device 106 of Embodiment 2, a capacitive component 45 is provided on the base substrate 12. The capacitive component 45 includes a dielectric substrate 46, an electrode 47 provided on the upper surface of the dielectric substrate 46, and an electrode (not shown) provided on the lower surface of the dielectric substrate 46. The electrode on the lower surface of the dielectric substrate 46 is bonded to the base substrate 12 through a conductive bonding layer and is supplied with the reference potential. The bonding wire 67 electrically connects the electrode 34 and the electrode 47. Through the dielectric substrate 46 and the electrode 47 disposed therebetween and the electrode on the lower surface of the dielectric substrate 46, the Figure 11 shown capacitor C2 is formed. The capacitor C2 is formed through the bonding wire 67 Figure 11The inductor L3 shown. The dielectric substrate 46 and the dielectric substrate 41 can be substrates of the same material or different materials. The inductor L3 may not be provided. When a bonding wire 67 that electrically connects the resistor component 30 and the capacitive component 45 is provided, the inductor L3 is formed. The inductance of the inductor L3 is less than the inductance of the inductor L1, for example, 1 / 2 or less of the inductance of the inductor L1.

[0121] The electrode 47 of the capacitive component 45 can also be provided within the resistor component 30. In this case, the resistor R1 and the capacitor C2 are integrated on the same insulating substrate 31. In this case, Figure 11 The inductor L3 is a line pattern or a via wiring that connects the electrode 34 and the electrode 47. The inductance of the inductor L3 is less than the inductance of the bonding wire 67.

[0122] [Modification Example 1 of Embodiment 2]

[0123] Figure 13 is a top view of the semiconductor device in Modification Example 1 of Embodiment 2. As Figure 13 shown, in the semiconductor device 108 of Modification Example 1 of Embodiment 2, a lead 52 is provided on the housing 14. The bonding wire 68 electrically connects the electrode 34 and the lead 52. The end of the lead 52 extends to the outside of the package 11 and is electrically connected to the first end of an external capacitive component 54. The second end of the capacitive component 54 is electrically connected to the reference potential. The bonding wire 68 and the lead 52 form Figure 11 The inductor L3, and the capacitive component 54 corresponds to the capacitor C2. By disposing the capacitive component 54 externally, the capacitance of the capacitor C2 can be increased. The capacitance of the capacitor C2 is, for example, greater than the capacitance of the capacitor C1, for example, more than twice the capacitance of the capacitor C1. Thus, the frequency band of the frequency suppressed by the baseband terminal circuit 70 can be increased. Other configurations are the same as those in Embodiment 2 and will not be described.

[0124] In Embodiment 2 and its modification examples, the first end of the bonding wire 67 or the bonding wire 68 may not be connected to the electrode 34 but to the electrode 35, or may be connected to the pad 33. An example in which there is one capacitor C2 has been described, but two or more capacitors C2 connected in parallel with the capacitor C1 between the node N1 and the reference potential may be provided. The capacitor C2 may also be provided in Modification Example 1 and Modification Example 2 of Embodiment 1.

[0125] As in Embodiment 2 and its modified examples, the capacitor C2 (third capacitor) is connected in parallel with the capacitor C1 between the line between the amplifier 16 and the output terminal Tout and the reference potential. Thus, by making the capacitances of the capacitor C1 and the capacitor C2 different, the frequency band of the frequencies suppressed by the baseband terminal circuit 70 can be increased. Further, resonance is likely to occur due to the capacitor C1 and the capacitor C2. Therefore, by providing the resistor R1, resonance can be suppressed.

[0126] [Embodiment 3]

[0127] Figure 14 is a circuit diagram of the semiconductor device in Embodiment 3. As Figure 14 shown, in the semiconductor device 110 of Embodiment 3, the internal output matching circuit 71 is an L-C-L T-type low-pass circuit, which includes an inductor L11, an inductor L12, and a capacitor C11. The inductor L11 and the inductor L12 are connected in series between the amplifier 16 and the node N1. The capacitor C11 is shunt-connected to the node N3 between the inductor L11 and the inductor L12.

[0128] Figure 15 is a top view of the semiconductor device in Embodiment 3. As Figure 15 shown, in the semiconductor device 110 of Embodiment 3, within one package 11, in addition to the semiconductor chip 20, the capacitive component 25, the capacitive component 40, and the resistive component 30 being mounted, a capacitive component 25a is also mounted. The capacitive component 25a includes a dielectric substrate 26a, an electrode 27a provided on the upper surface of the dielectric substrate 26a, and an electrode (not shown) provided on the lower surface of the dielectric substrate 26a. Through the dielectric substrate 26a and the electrode 27a and the electrode not shown disposed therebetween, the Figure 14 shown capacitor C11 is formed. The configuration of the dielectric substrate 26a and the electrode 27a of the capacitive component 25a is the same as that of the capacitive component 25.

[0129] The bonding wire 63 electrically connects the electrode 23 and the electrode 27a. The bonding wire 69 electrically connects the electrode 27a and the output lead 50. The bonding wire 63 and the bonding wire 69 respectively form Figure 14 the inductors L11 and L12.

[0130] The internal output matching circuit 71 may also include an inductor L11, an inductor L12 (second inductor), and a capacitor C11 (second capacitor). The capacitance of the capacitor C11 for the matching circuit is 10 pF or less, and this capacitance is small. Therefore, the capacitance of the capacitor C1 is greater than the capacitance of the capacitor C11, for example, 10 times or more, and 100 times or more the capacitance of the capacitor C11. In addition, the inductance of the inductor L11 and the inductor L12 for the matching circuit is 10 nH or less, and this inductance is small. Therefore, the inductance of the inductor L1 is greater than the inductance of the inductor L11 and the inductor L12, for example, 10 times or more, and 100 times or more the inductance of the inductor L11 and the inductor L12. Thereby, the inductor L1 and the capacitor C1 can function as the baseband terminal circuit 70. Other configurations are the same as those in the first embodiment, and the description thereof is omitted.

[0131] [Embodiment 4]

[0132] Embodiment 4 is an example in which a plurality of semiconductor chips are provided in a package. Figure 16 is a top view of the semiconductor device in Embodiment 4. As Figure 16 shown, in the semiconductor device 112 of Embodiment 4, two integrated components 56 and 58 composed of a semiconductor chip 20, a capacitive component 25, a capacitive component 40, a resistive component 30, an input lead 51, and an output lead 50 are provided in one package 11. The two integrated components 56 and 58 are arranged in the Y direction. The integrated component 56 is, for example, the main amplifier of a Doherty amplifier circuit. The integrated component 58 is, for example, the peak amplifier of a Doherty amplifier circuit. Three or more integrated components 56 and 58 may also be provided. Other configurations are the same as those in the first embodiment, and the description thereof is omitted. Three or more integrated components 56 and 58 may also be provided in the modified example of the first embodiment, the second embodiment, and the modified example of the second embodiment.

[0133] It should be considered that the embodiments disclosed herein are illustrative in all respects and not restrictive. The scope of the present disclosure is not shown by the above meanings, but by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

Claims

1. An amplifier circuit, comprising: an amplifier, amplifying the high-frequency signal input to the input terminal, and outputting the amplified high-frequency signal to the output terminal; a first inductor, a first end of the first inductor being connected to a line between the amplifier and the output terminal; a resistor component, wherein a first end of the resistor component is connected to a second end of the first inductor, the resistor component is mounted on an upper surface of a base substrate, and comprises an insulating substrate having a thermal conductivity of 20 W / m·K or more and a band gap energy of 1.5 eV or more, and a resistor film provided on an upper surface of the insulating substrate; as well as a first capacitor, a first end of the first capacitor being connected to the second end of the resistance component, and a second end of the first capacitor being connected to a reference potential, An absolute value of the impedance of the first inductor at a center frequency of an operating frequency band of the amplifier is larger than an absolute value of the impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating frequency band.

2. The amplifier circuit according to claim 1, wherein: An absolute value of the impedance of the first inductor at the center frequency of the operating frequency band is greater than or equal to 10Ω, and an absolute value of the impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating frequency band is less than or equal to 1Ω.

3. The amplifier circuit according to claim 1 or 2, wherein: The inductance of the first inductor is greater than 100 pH, The capacitance of the first capacitor is greater than 100 pF.

4. The amplifier circuit according to claim 1 or 2, wherein: The amplifier circuit includes a matching circuit, which is provided in the line and includes a second inductor and a second capacitor. The inductance of the first inductor is greater than the inductance of the second inductor, The capacitance of the first capacitor is greater than the capacitance of the second capacitor.

5. The amplifier circuit according to claim 1 or 2, wherein: The center frequency of the operating frequency band is greater than 0.5 GHz and less than 10 GHz, The bandwidth of the working frequency band is above 100 MHz.

6. The amplifier circuit according to claim 5, wherein: The saturation power of the high-frequency signal output from the output terminal is 10 W or more.

7. The amplifier circuit according to claim 1 or 2, wherein: The first inductor includes a circuit pattern provided on an upper surface of the insulating substrate.

8. The amplifier circuit according to claim 1 or 2, wherein: The amplifier circuit includes a third capacitor connected in parallel with the first capacitor between the line and the reference potential.

9. The amplifier circuit according to claim 1 or 2, wherein: The insulating substrate is an aluminum nitride substrate, a gallium nitride substrate or a silicon carbide substrate.

10. The amplifier circuit according to claim 1 or 2, wherein: The first capacitor includes: a dielectric substrate mounted on the upper surface of the base substrate; and an electrode provided on the upper surface of the dielectric substrate and connected to the second end of the resistor component. The amplifier includes: a semiconductor substrate mounted on an upper surface of the base substrate; and a transistor provided on the semiconductor substrate.

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