Restart delay circuit

Abstract

The present invention relates to the field of electronic circuit technology, and particularly discloses a restart delay circuit, comprising a switch unit having an input connected to a voltage source, an output connected to a load, and a control end of the switch unit connected to a switch control unit and a feedback control unit, respectively. The control end of the switch control unit is connected to the input of the switch unit and the delay control unit, and the control end of the feedback control unit and the control end of the delay control unit are connected to the output of the switch unit. When power is on, the switch unit conducts the connection between the voltage source and the load according to the control of the switch control unit or the feedback control unit. After power is off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to turn off within a preset delay time, so as to maintain the switch unit disconnected from the voltage source and the load within the preset delay time. The restart delay circuit ensures that voltage fluctuations of the voltage source within the preset delay time do not affect the load end.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a restart delay circuit. Background Art

[0002] Power supplies play a crucial role in electronic devices, and their quality directly impacts their performance, reliability, and lifespan. When voltage instability causes devices to be repeatedly powered on and off within a short period of time, frequent voltage fluctuations can increase the electrical stress on components within the circuit. This is especially true for components designed for a specific operating voltage range. Operating beyond their rated values ​​can lead to performance degradation or even permanent damage. Each power cycle can generate a transient process, during which the sudden high current and high voltage can impact internal components and damage the circuit. Summary of the Invention

[0003] Based on this, it is necessary to provide a restart delay circuit to address the problem that repeated power-on in a short period of time may cause circuit damage.

[0004] A restart delay circuit includes a switch unit, a switch control unit, a feedback control unit, and a delay control unit, wherein the input end of the switch unit is connected to a voltage source, the output end of the switch unit is connected to a load, the control end of the switch unit is connected to the switch control unit and the feedback control unit respectively, the control end of the switch control unit is connected to the input end of the switch unit and the delay control unit, and the control end of the feedback control unit and the control end of the delay control unit are connected to the output end of the switch unit; when powered on, the switch unit turns on the connection between the voltage source and the load according to the control of the switch control unit or the feedback control unit; after power is turned off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to turn off within a preset delay time to keep the switch unit from disconnecting the voltage source and the load within the preset delay time.

[0005] In one embodiment, the switching unit includes a first transistor, a first diode and a first resistor, the first electrode of the first transistor serves as the input end of the switching unit, the second electrode of the first transistor serves as the output end of the switching unit, the gate of the first transistor serves as the control end of the switching unit, the positive electrode of the first diode and the first end of the first resistor are connected to the gate of the first transistor, and the negative electrode of the first diode and the second end of the first resistor are connected to the first electrode of the first transistor.

[0006] In one embodiment, the switch control unit includes a second transistor, a second diode, and a second resistor, the first electrode of the second transistor is connected to the control end of the switch unit, the second electrode of the second transistor is grounded, the gate of the second transistor is connected to the input end of the switch unit, the anode of the second diode and the first end of the second resistor are connected to the second electrode of the second transistor, and the cathode of the second diode and the second end of the second resistor are connected to the gate of the second transistor.

[0007] In one embodiment, the feedback control unit includes a third transistor, a third diode, and a third resistor, the first electrode of the third transistor is connected to the control end of the switching unit, the second electrode of the third transistor is grounded, the gate of the third transistor is connected to the output end of the switching unit, the positive electrode of the third diode and the first end of the third resistor are connected to the second electrode of the third transistor, and the negative electrode of the third diode and the second end of the third resistor are connected to the gate of the third transistor.

[0008] In one embodiment, the delay control unit includes a fourth transistor, a fourth diode, a fifth diode, a first capacitor, a fourth resistor, and a fifth resistor. The first electrode of the fourth transistor is connected to the input end of the switch unit, the second electrode of the fourth transistor is grounded, the positive electrode of the fourth diode, the first end of the first capacitor, and the first end of the fourth resistor are connected to the second electrode of the fourth transistor, the negative electrode of the fourth diode, the second end of the first capacitor, and the second end of the fourth resistor are connected to the gate of the fourth diode, the first end of the fifth resistor is connected to the gate of the fourth diode, the second end of the fifth resistor is connected to the negative electrode of the fifth diode, and the positive electrode of the fifth diode is connected to the output end of the switch unit.

[0009] In one embodiment, the fourth resistor is an adjustable resistor.

[0010] In one embodiment, the discharge time of the first capacitor is adjusted by adjusting the resistance value of the fourth resistor.

[0011] In one embodiment, the preset delay time is determined according to the discharge time of the first capacitor.

[0012] In one embodiment, the fifth diode is a Schottky diode.

[0013] In one embodiment, the first transistor is a P-type transistor, and the second transistor, the third transistor, and the fourth transistor are N-type transistors.

[0014] In the restart delay circuit, a switch unit is connected between a voltage source and a load. The control terminals of the switch unit are connected to a switch control unit and a feedback control unit, respectively. The switch control unit and the feedback control unit can adjust the switch state of the switch unit by varying the voltage at the control terminals of the switch unit, thereby controlling the connection or disconnection between the voltage source and the load. A delay control unit is connected to the control terminal of the switch control unit and can adjust the state of the switch control unit by varying the voltage at the control terminal of the switch control unit. During power-on, the switch unit opens under the control of the switch control unit or the feedback control unit to connect the voltage source to the load, rapidly charging the delay control unit via the load voltage. After power-off, the feedback control unit closes, and the delay control unit controls the switch control unit to close within a preset delay time, maintaining the disconnection between the voltage source and the load within the preset delay time. The restart delay circuit, through the coordinated operation of the switch unit, the switch control unit, the feedback control unit, and the delay control unit, controls the switch unit to remain closed within the preset delay time after power-off, i.e., disconnecting the voltage source and the load within the preset delay time. This ensures that voltage fluctuations of the voltage source within the preset delay time do not affect the load, and the load is not damaged by repeated power cycles within a short period of time. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the implementation methods of this specification or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the implementation methods or the description of the prior art. Obviously, the drawings described below are only some implementation methods recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0016] Figure 1 This is a structural diagram of a restart delay circuit in one of the embodiments of the present application;

[0017] Figure 2 This is a circuit diagram of a restart delay circuit in one embodiment of the present application;

[0018] Figure 3 This is a circuit diagram of a restart delay circuit in another embodiment of the present application;

[0019] Figure 4 This is a circuit diagram of a restart delay circuit in yet another embodiment of the present application;

[0020] Figure 5 FIG. 1 is a schematic diagram of the timing waveforms at +VOUT and +VIN in one embodiment of the present application. DETAILED DESCRIPTION

[0021] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0023] Figure 1 This is a structural diagram of a restart delay circuit in one embodiment of the present application. In one embodiment, the restart delay circuit may include a switch unit 100, a switch control unit 200, a feedback control unit 300 and a delay control unit 400.

[0024] The input end of the switch unit 100 can be connected to the voltage source 10, the output end of the switch unit 100 can be connected to the load 20, and the control end of the switch unit 100 can be connected to the switch control unit 200 and the feedback control unit 300 respectively. The control end of the switch control unit 200 can be connected to the input end of the switch unit 100 and the delay control unit 400, and the control end of the feedback control unit 300 and the control end of the delay control unit 400 can be connected to the output end of the switch unit 100.

[0025] During power-up, the switch control unit 200 can control the switch unit 100 to turn on based on the voltage signal at the input terminal of the switch unit 100. After the switch unit 100 is turned on, the voltage signal input by the voltage source 10 can be transmitted to the load 20 through the switch unit 100. Simultaneously, after the switch unit 100 is turned on, the feedback control unit 300 can be turned on based on the voltage signal at the output terminal of the switch unit 100. That is, after power-up, the switch control unit 200 and / or the feedback control unit 300 are used to control the switch unit 100 to remain in the on state, thereby establishing a connection between the voltage source 10 and the load 20.

[0026] After power is turned off, the feedback control unit 300 is turned off, and the delay control unit 400 controls the switch control unit 200 to turn off within the preset delay time T. Since both the feedback control unit 300 and the delay control unit 400 are turned off, the switch unit 100 is also turned off within the preset delay time T, thereby disconnecting the voltage source 10 and the load 20 within the preset delay time T. Therefore, even if the voltage source 10 powers on the restart delay circuit again within the preset delay time T, the load 20 will not receive a voltage signal. After the preset delay time T, the delay control unit 400 ends its delay control of the switch control unit 200, allowing the switch control unit 200 to again control the switch unit 100 to conduct according to the signal input from the voltage source 10.

[0027] In the restart delay circuit described above, the switch unit 100 is connected between the voltage source 10 and the load 20. The control terminal of the switch unit 100 is connected to the switch control unit 200 and the feedback control unit 300, respectively. The switch control unit 200 and the feedback control unit 300 can adjust the switching state of the switch unit 100 by changing the voltage at the control terminal of the switch unit 100, thereby controlling the conduction or disconnection between the voltage source 10 and the load 20. The delay control unit 400 is connected to the control terminal of the switch control unit 200 and can adjust the state of the switch control unit 200 by changing the voltage at the control terminal of the switch control unit 200. After power is applied, the switch unit 100 will be opened according to the control of the switch control unit 200 or the feedback control unit 300 to conduct the connection between the voltage source 10 and the load 20, and the delay control unit 400 will be quickly charged by the load terminal voltage. After power off, the feedback control unit 300 is turned off, and the delay control unit 400 controls the switch control unit 200 to turn off within the preset delay time T, so as to keep the switch unit 100 disconnecting the voltage source 10 and the load 20 within the preset delay time T.

[0028] The restart delay circuit controls the switch unit 100 to remain closed within the preset delay time T after power is turned off through the coordinated cooperation of the switch unit 100, the switch control unit 200, the feedback control unit 300 and the delay control unit 400. That is, the connection between the voltage source 10 and the load 20 is disconnected within the preset delay time T, so as to ensure that the voltage fluctuation of the voltage source 10 within the preset delay time T will not affect the load 20, and the load 20 will not be damaged due to repeated power on and off in a short period of time.

[0029] Figure 2 This is a circuit diagram of a restart delay circuit in one embodiment of the present application. In one embodiment, the switch unit 100 may include a first transistor Q1, a first diode D1, and a first resistor R1.

[0030] In the embodiments of the present disclosure, a transistor refers to an element that includes at least a gate, a drain, and a source. In the present disclosure, the first electrode of a transistor can be a drain, the second electrode can be a source, or the first electrode can be a source, and the second electrode can be a drain. In cases where transistors with opposite polarities are used or the direction of current changes during circuit operation, the functions of the "source" and "drain" are sometimes interchanged. In the embodiments of the present disclosure, the gate of all or part of the transistors can be the control electrode of the transistor, and the first electrode and the second electrode can be interchangeable as needed.

[0031] The first electrode of the first transistor Q1 can serve as the input terminal of the switch unit 100, the second electrode of the first transistor Q1 can serve as the output terminal of the switch unit 100, and the gate of the first transistor Q1 can serve as the control terminal of the switch unit 100. The anode of the first diode D1 and the first end of the first resistor R1 can be connected to the gate of the first transistor Q1, and the cathode of the first diode D1 and the second end of the first resistor R1 can be connected to the first electrode of the first transistor Q1.

[0032] In a specific embodiment, the first diode D1 can be a voltage-stabilizing diode, and the first resistor R1 can be an ordinary resistor. The first diode D1 can provide a stable voltage reference point to the gate of the first transistor Q1. When the input voltage exceeds the breakdown voltage of the voltage-stabilizing diode, it will begin to conduct and absorb the excess voltage, thereby preventing excessive voltage from damaging the first transistor Q1. The first resistor R1 can act as a current-limiting resistor to limit the current flowing into the control terminal of the first transistor Q1, thereby preventing the first transistor Q1 from being damaged by excessive current. At the same time, by appropriately selecting the resistance value, the impact of voltage fluctuations caused by external interference on the first transistor Q1 can be reduced, thereby improving the stability and anti-interference capability of the switch unit 100.

[0033] In one embodiment, the switch control unit 200 may include a second transistor Q2, a second diode D2, and a second resistor R2. The first electrode of the second transistor Q2 may be connected to the control terminal of the switch unit 100, the second electrode of the second transistor Q2 may be grounded (GND), and the gate of the second transistor Q2 may be connected to the input terminal of the switch unit 100. Specifically, the first electrode of the second transistor Q2 may be connected to the gate of the first transistor Q1, and the gate of the second transistor Q2 may be connected to the first electrode of the first transistor Q1. The anode of the second diode D2 and the first end of the second resistor R2 are connected to the second electrode of the second transistor Q2, and the cathode of the second diode D2 and the second end of the second resistor R2 are connected to the gate of the second transistor Q2.

[0034] Similarly, in the switch control unit 200, the second diode D2 can be a voltage-stabilizing diode, and the second resistor R2 can be a conventional resistor. The second diode D2 can prevent excessive voltage from damaging the second transistor Q2. The second resistor R2 can also serve as a current-limiting resistor to limit the current flowing into the control terminal of the second transistor Q2, preventing damage to the second transistor Q2 due to excessive current, thereby improving the stability and anti-interference capabilities of the switch control unit 200.

[0035] In one embodiment, the feedback control unit 300 may include a third transistor Q3, a third diode D3, and a third resistor R3. The first electrode of the third transistor Q3 may be connected to the control terminal of the switch unit 100, the second electrode of the third transistor Q3 may be grounded (GND), and the gate of the third transistor Q3 may be connected to the output terminal of the switch unit 100. Specifically, the first electrode of the third transistor Q3 may be connected to the gate of the first transistor Q1, and the gate of the third transistor Q3 may be connected to the second electrode of the first transistor Q1. The anode of the third diode D3 and the first end of the third resistor R3 are connected to the second electrode of the third transistor Q3, and the cathode of the third diode D3 and the second end of the third resistor R3 are connected to the gate of the third transistor Q3.

[0036] Similarly, in the feedback control unit 300, the third diode D3 can be a voltage-stabilizing diode, and the third resistor R3 can be a conventional resistor. The third diode D3 prevents excessive voltage from damaging the third transistor Q3. The third resistor R3 can also function as a current-limiting resistor to limit the current flowing into the control terminal of the third transistor Q3, preventing damage to the third transistor Q3 due to excessive current, thereby improving the stability and anti-interference capabilities of the feedback control unit 300.

[0037] Figure 3 This is a circuit diagram of a restart delay circuit in another embodiment of the present application. In one embodiment, the feedback control unit 300 may further include a second capacitor C2. The first end of the second capacitor C2 is connected to the second pole of the third transistor Q3, and the second end of the second capacitor C2 is connected to the gate of the third transistor Q3. By setting the second capacitor C2 at the gate of the third transistor Q3, when the voltage signal is transmitted to the gate of the third transistor Q3, the second capacitor C2 will be charged first. After the second capacitor C2 is fully charged and the voltage at the gate of the third transistor Q3 reaches the turn-on voltage, the third transistor Q3 is turned on again. That is, the second capacitor C2 can slow down the turning on of the third transistor Q3 and prevent the parasitic capacitance in the first transistor Q1 from affecting the circuit.

[0038] Figure 4This is a circuit diagram of a restart delay circuit in another embodiment of the present application. In one embodiment, the feedback control unit 300 may further include a sixth resistor R6. A first end of the sixth resistor R6 is connected to the gate of the third transistor Q3, and a second end of the sixth resistor R6 is connected to the output end of the switch unit 100.

[0039] Specifically, the first end of the sixth resistor R6 is respectively connected to the gate of the third transistor Q3, the second end of the second capacitor C2, the cathode of the third diode D3, and the second end of the third resistor R3. The second end of the sixth resistor R6 is connected to the second electrode of the first transistor Q1. The second capacitor C2 can be quickly discharged through the sixth resistor R6, preventing the electrical signal stored in the second capacitor C2 from affecting the shutdown time of the third transistor Q3.

[0040] See Figure 4 In one embodiment, the restart delay circuit may further include a seventh resistor R7. The switch control unit 200 and the feedback control unit 300 may be connected to the control end of the switch unit 100 through the seventh resistor R7. Specifically, the first end of the seventh resistor R7 may be connected to the first electrode of the second transistor Q2 and the first electrode of the third transistor Q3, respectively, and the second end of the seventh resistor R7 may be connected to the first end of the first resistor R1, the positive electrode of the first diode D1, and the gate of the first transistor Q1, respectively. The seventh resistor R7 may serve as a current limiting resistor to further protect the safety of the second transistor Q2 and the third transistor Q3. When the second transistor Q2 and the third transistor Q3 are turned on, current will flow from the voltage source 10 to the ground through the seventh resistor R7. The seventh resistor R7 limits the maximum current passing through the second transistor Q2 and the third transistor Q3 to prevent device damage due to excessive current.

[0041] In one embodiment, the delay control unit 400 may include a fourth transistor Q4, a fourth diode D4, a fifth diode D5, a first capacitor C1, a fourth resistor R4, and a fifth resistor R5. A first electrode of the fourth transistor Q4 may be connected to the input terminal of the switch unit 100, and a second electrode of the fourth transistor Q4 may be grounded (GND). An anode of the fourth diode D4, a first end of the first capacitor C1, and a first end of the fourth resistor R4 may be connected to the second electrode of the fourth transistor Q4. A cathode of the fourth diode D4, a second end of the first capacitor C1, and a second end of the fourth resistor R4 may be connected to the gate of the fourth transistor Q4. A first end of the fifth resistor R5 is connected to the gate of the fourth transistor Q4. A second end of the fifth resistor R5 is connected to the cathode of the fifth diode D5. An anode of the fifth diode D5 may be connected to the output terminal of the switch unit 100. Specifically, a first electrode of the fourth transistor Q4 may be connected to the first electrode of the first transistor Q1, and an anode of the fifth diode D5 may be connected to the second electrode of the first transistor Q1.

[0042] The fourth diode D4 can prevent excessive voltage from damaging the fourth transistor Q4, and the fifth diode D5 can serve as a protective element to prevent reverse current or voltage surges from damaging the fourth transistor Q4. Since the first capacitor C1 is connected to the gate of the fourth transistor Q4, the first capacitor C1 can be charged when the voltage signal is transmitted to the gate of the fourth transistor Q4. When the voltage at the gate of the fourth transistor Q4 drops, the electrical signal stored in the first capacitor C1 can be discharged through the fourth resistor R4 to ensure that the voltage at the gate of the fourth transistor Q4 is maintained at the turn-on voltage. When the first capacitor C1 is discharging, after the voltage at the gate of the fourth transistor Q4 is less than the turn-on voltage of the fourth transistor Q4, the fourth transistor Q4 will be turned off.

[0043] In one embodiment, the fifth diode D5 is a Schottky diode. A Schottky diode is a special diode that has a lower forward voltage drop and faster switching speed than a common PN junction diode. Due to its structural characteristics, a Schottky diode has a very short reverse recovery time, allowing it to switch states quickly at high frequencies without generating significant reverse current, thereby reducing energy loss and improving efficiency.

[0044] In one embodiment, the fourth resistor R4 can be an adjustable resistor. The discharge time of the first capacitor C1 can be adjusted by adjusting the resistance value of the fourth resistor R4. The preset delay time T of the restart delay circuit can be determined based on the discharge time of the first capacitor C1. Therefore, in actual applications, the discharge time of the first capacitor C1 can be adjusted by adjusting the resistance value of the fourth resistor R4 to adjust the preset delay time T of the restart delay circuit according to different application requirements.

[0045] In addition, in actual applications, the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 can be adaptively designed according to different application requirements. Similarly, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 can also be adaptively designed according to requirements. In a preferred embodiment, the charging time of the first capacitor C1 is much shorter than the discharging time.

[0046] See Figure 4In one embodiment, the delay control unit 400 may further include an eighth resistor R8, which is connected to the input terminal of the switch unit 100 via the eighth resistor R8. Specifically, the first end of the eighth resistor R8 is connected to the first electrode of the fourth transistor Q4, and the second end of the eighth resistor R8 is connected to the first electrode of the first transistor Q1. The eighth resistor R8 can serve as a current-limiting resistor to further protect the safety of the fourth transistor Q4. When the fourth transistor Q4 is turned on, current will flow from the voltage source 10 to ground through the eighth resistor R8. The eighth resistor R8 limits the maximum current passing through the fourth transistor Q4, preventing device damage caused by excessive current.

[0047] In one embodiment, the first transistor Q1 is a P-type transistor, and the second, third, and fourth transistors Q2, Q3, and Q4 are N-type transistors. That is, the first transistor Q1 is turned on by a low level and turned off by a high level, while the second, third, and fourth transistors Q2, Q3, and Q4 are turned on by a high level and turned off by a low level. Thus, the restart delay circuit can utilize the conduction characteristics of each transistor in the circuit to prevent the circuit from repeatedly powering on and off within a short period of time.

[0048] In some other embodiments, the device selection of each unit in the restart delay circuit can also be other appropriate functional elements according to actual application requirements.

[0049] In this embodiment, Figure 4 Taking the restart delay circuit shown as an example, its working process is explained. The description is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. Figure 4 , +VIN is the signal received by the input end of the switch unit 100, and +VOUT is the signal output by the output end of the switch unit 100. The first transistor Q1 is a P-type transistor, and the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are N-type transistors. In a specific embodiment, the resistance value of the first resistor R1 can be 1KΩ, the resistance value of the second resistor R2 can be 1000KΩ, the resistance value of the third resistor R3 can be 1000KΩ, the fourth resistor R4 can be an adjustable resistor, and the maximum resistance value of the fourth resistor R4 can be 10MΩ, the resistance value of the fifth resistor R5 can be 1KΩ, the resistance value of the sixth resistor R6 can be 1KΩ, the resistance value of the seventh resistor R7 can be 100Ω, and the resistance value of the eighth resistor R8 can be 10KΩ.

[0050] Power-on process:

[0051] After +VIN is powered on for the first time, the power signal output by the voltage source 10 is transmitted to the first electrode of the first transistor Q1. Since the gate of the second transistor Q2 is connected to the first electrode of the first transistor Q1 through the eighth resistor R8, the second transistor Q2 will be turned on according to the voltage at its gate. After the second transistor Q2 is turned on, the gate of the first transistor Q1 will be grounded through the seventh resistor R7 and the second transistor Q2. That is, the potential at the gate of the first transistor Q1 will be pulled low, thereby turning on the first transistor Q1. The power signal output by the voltage source 10 will be transmitted to the load 20 through the first transistor Q1, and at this time, +VOUT powers on the load 20.

[0052] After +VOUT is powered on, +VOUT charges the second capacitor C2 through the sixth resistor R6. As the second capacitor C2 is fully charged, the voltage at the gate of the third transistor Q3 gradually becomes the turn-on voltage, thereby turning on the third transistor Q3. At the same time, +VOUT charges the first capacitor C1 through the fifth diode D5 and the fifth resistor R5. As the first capacitor C1 is fully charged, the voltage at the gate of the fourth transistor Q4 gradually becomes the turn-on voltage, thereby turning on the fourth transistor Q4. After the fourth transistor Q4 is turned on, it will pull down the voltage at the gate of the second transistor Q2, thereby turning off the second transistor Q2.

[0053] Power-off process:

[0054] After +VIN is powered off for the first time, +VOUT is also powered off. The second capacitor C2 discharges rapidly through the sixth resistor R6, reducing the voltage at the gate of the third transistor Q3, which in turn turns off the third transistor Q3. Simultaneously, the first capacitor C1 begins discharging through the fourth resistor R4. During the discharge of the first capacitor C1, the voltage at the gate of the fourth transistor Q4 is greater than the turn-on voltage of the fourth transistor Q4, causing the fourth transistor Q4 to remain in the on state. While the fourth transistor Q4 is on, the second transistor Q2 remains in the off state. At the same time, because the third transistor Q3 is also turned off due to +VOUT, the first transistor Q1 does not meet the turn-on condition and is turned off. That is, after the first power-off, the time it takes to ensure that the second transistor Q2 remains on and the third transistor Q3 and the first transistor Q1 remain off due to the discharge of the first capacitor C1 is the preset delay time T. During this period, because the first transistor Q1 remains off, +VOUT cannot be powered on regardless of when +VIN is powered on. During the preset delay time T, the connection between the voltage source 10 and the load 20 is in a disconnected state, ensuring that the voltage fluctuation of the voltage source 10 during the preset delay time T will not affect the load 20, and the load 20 will not be damaged due to repeated power on and off in a short period of time.

[0055] The discharge time of the first capacitor C1 can be adjusted by adjusting the resistance of the fourth resistor R4 , thereby adjusting the preset delay time T.

[0056] During the discharge process of the first capacitor C1, when the voltage at the gate of the second transistor Q2 drops below the turn-on voltage of the second transistor Q2, the second transistor Q2 is turned off. After the second transistor Q2 is turned off, the restart delay circuit can be restarted again based on the power-up of +VIN. If +VIN is powered on, the power-up sequence repeats the above power-up process. If +VIN is powered off again after being powered on, the above power-down process is repeated. Figure 5 This is a schematic diagram of the timing waveforms at +VOUT and +VIN in one embodiment of the present application. After +VIN is powered on, +VOUT is also powered on synchronously; when +VIN is powered off for the first time after being powered on, +VOUT is also powered off synchronously. During the preset delay time T, the switch unit 100 remains off, and the connection between the voltage source 10 and the load 20 remains disconnected, so +VOUT also remains powered off. That is, during the preset delay time T, the repeated powering on and off of +VIN will not affect the load 20. After the preset delay time T, the second transistor Q2 is turned off, and the restart delay circuit can be restarted according to the power signal input by the voltage source 10, that is, +VOUT will be powered on synchronously with the powering on of +VIN.

[0057] The restart delay circuit provided in this application can prevent device damage caused by repeated power-on cycles due to unstable voltage. Furthermore, because the restart delay circuit is composed entirely of discrete components, it offers the advantage of low cost. Furthermore, the restart delay circuit can proactively prevent repeated power-on cycles without requiring the involvement of other circuits, resulting in high circuit stability and ease of implementation.

[0058] Throughout this specification, references to terms such as "some embodiments," "other embodiments," and "desired embodiments" indicate that a particular feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. Although these terms are used interchangeably throughout this specification, they do not necessarily refer to the same embodiment or example.

[0059] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0060] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. The above-mentioned embodiments only express several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, without departing from the concept of the present invention, several variations and improvements can be made, which all fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent of this invention shall be based on the attached claims.

Claims

1. A restart delay circuit, characterized in that: It includes a switch unit, a switch control unit, a feedback control unit and a delay control unit, The input end of the switch unit is connected to a voltage source, the output end of the switch unit is connected to a load, the control end of the switch unit is connected to the switch control unit and the feedback control unit respectively, the control end of the switch control unit is connected to the input end of the switch unit and the delay control unit, and the control end of the feedback control unit and the control end of the delay control unit are connected to the output end of the switch unit; When powered on, the switch unit switches on the connection between the voltage source and the load according to the control of the switch control unit or the feedback control unit; After power is turned off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to turn off within a preset delay time, so as to keep the switch unit disconnecting the voltage source and the load within the preset delay time; The switch unit includes a first transistor and a first resistor, wherein a first end of the first resistor is connected to a gate of the first transistor, and a second end of the first resistor is connected to a first electrode of the first transistor; The switch control unit includes a second transistor and a second resistor, wherein a first electrode of the second transistor is connected to the gate of the first transistor, a second electrode of the second transistor is grounded, the gate of the second transistor is connected to the first electrode of the first transistor, a first end of the second resistor is connected to the second electrode of the second transistor, and a second end of the second resistor is connected to the gate of the second transistor; The delay control unit includes a fourth transistor, a first capacitor, and a fourth resistor. The first electrode of the fourth transistor is connected to the first electrode of the first transistor, the second electrode of the fourth transistor is grounded, the first end of the first capacitor and the first end of the fourth resistor are connected to the second electrode of the fourth transistor, and the second end of the first capacitor and the second end of the fourth resistor are connected to the gate of the fourth transistor.

2. The restart delay circuit according to claim 1, characterized in that: The switching unit includes a first diode, the first electrode of the first transistor serves as the input end of the switching unit, the second electrode of the first transistor serves as the output end of the switching unit, the gate of the first transistor serves as the control end of the switching unit, the positive electrode of the first diode is connected to the gate of the first transistor, and the negative electrode of the first diode is connected to the first electrode of the first transistor.

3. The restart delay circuit according to claim 1, characterized in that: The switch control unit includes a second diode, an anode of the second diode is connected to the second electrode of the second transistor, and a cathode of the second diode is connected to the gate of the second transistor.

4. The restart delay circuit according to claim 1, wherein: The feedback control unit includes a third transistor, a third diode, and a third resistor. The first electrode of the third transistor is connected to the control end of the switching unit, the second electrode of the third transistor is grounded, the gate of the third transistor is connected to the output end of the switching unit, the anode of the third diode and the first end of the third resistor are connected to the second electrode of the third transistor, and the cathode of the third diode and the second end of the third resistor are connected to the gate of the third transistor.

5. The restart delay circuit according to claim 1, characterized in that: The delay control unit includes a fourth diode, a fifth diode, and a fifth resistor. The positive electrode of the fourth diode is connected to the second electrode of the fourth transistor, the negative electrode of the fourth diode is connected to the gate of the fourth transistor, the first end of the fifth resistor is connected to the gate of the fourth transistor, the second end of the fifth resistor is connected to the negative electrode of the fifth diode, and the positive electrode of the fifth diode is connected to the output end of the switching unit.

6. The restart delay circuit according to claim 5, characterized in that: The fourth resistor is an adjustable resistor.

7. The restart delay circuit according to claim 6, characterized in that: The discharge time of the first capacitor is adjusted by adjusting the resistance value of the fourth resistor.

8. The restart delay circuit according to claim 5, characterized in that: The preset delay time is determined according to the discharge time of the first capacitor.

9. The restart delay circuit according to claim 5, characterized in that: The fifth diode is a Schottky diode.

10. The restart delay circuit according to any one of claims 2 to 5, characterized in that: The first transistor is a P-type transistor, and the second transistor, the third transistor, and the fourth transistor are N-type transistors.

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