Photoelectric conversion device and equipment

Abstract

Photoelectric conversion devices and apparatuses are disclosed. An apparatus in which a photoelectric conversion unit is disposed on a semiconductor substrate including a first surface and a second surface on an opposite side of the first surface. The photoelectric conversion unit includes: a first region of a first conductivity type, the first region constituting a part of the first surface and being connected to a detection circuit configured to detect an avalanche breakdown; a second region of the first conductivity type, the second region disposed away from the first region; a third region of a second conductivity type opposite to the first conductivity type, the third region being disposed at a position closer to the second surface than the first region and the second region; and a fourth region disposed between the first region and the second region. The second and third regions serve as avalanche photodiodes. The first region and the second region are configured to be conductive to each other via the fourth region.

Description

Technical Field

[0001] The present disclosure relates to a photoelectric conversion device and equipment. Background Art

[0002] A single photon avalanche diode (SPAD) is known as a photon counting device using avalanche multiplication. Japanese Patent Application Publication No. 2018-064086 discusses a photodetector having a pixel including an avalanche photodiode (APD) used as a SPAD.

[0003] Consider the charge multiplication factor of the APD. In SPAD, in general, a voltage obtained by adding an overvoltage Vex to a breakdown voltage Vbd is applied between the cathode and anode of the APD, and avalanche breakdown is detected based on the change (decrease) in the potential of the cathode when an avalanche current flows. If the cathode capacitance of the APD is Cc, and the amount of change in the potential of the cathode when avalanche breakdown occurs is ΔV, then the amount of charge discharged from the cathode due to avalanche breakdown is represented by Cc×ΔV. If the basic charge is qe, then the number of electron-hole pairs generated by avalanche breakdown - that is, the carrier multiplication factor is represented by Cc×ΔV / qe. The charge multiplication factor is the same as the carrier multiplication factor, so it will be referred to as the "multiplication factor" hereinafter. The cathode capacitance Cc, whose main component comes from the wiring pattern connected to the cathode or the detection circuit for detecting avalanche breakdown, is, for example, about 8fF. If the change in cathode potential ΔV when avalanche breakdown is detected is ΔV=2.4V (which is equivalent to the overvoltage Vex), the multiplication factor is 120,000. With a high multiplication factor, it is possible to detect weak light at the single photon level, but it also causes the following problems.

[0004] Many carriers generated by avalanche breakdown flow between the anode and cathode to which the breakdown voltage Vbd is applied. Therefore, much energy is consumed by the large current flowing due to the incidence of a single photon. If many pixels are deployed and the number of incident photons is large, the consumed energy increases a lot. Summary of the invention

[0005] According to one aspect of the present embodiment, a device in which a photoelectric conversion unit is disposed on a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface located on the opposite side of the first surface. The photoelectric conversion unit comprises: a first region of a first conductivity type, the first region constituting a portion of the first surface and connected to a detection circuit configured to detect avalanche breakdown; a second region of the first conductivity type, the second region being disposed away from the first region; a third region of a second conductivity type opposite to the first conductivity type, the third region being disposed at a position closer to the second surface than the first region and the second region; and a fourth region, the fourth region being disposed between the first region and the second region. The second region and the third region serve as avalanche photodiodes. The first region and the second region are configured to be conductive with each other via the fourth region.

[0006] Further features of the present disclosure will become apparent from the following description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a diagram illustrating an example of the configuration of the photoelectric conversion device according to the present exemplary embodiment.

[0008] Figure 2 It is a graphic Figure 1 A block diagram of an example of the configuration of a pixel of a photoelectric conversion device.

[0009] Figure 3A It is a graphic Figure 2 A diagram of an example of the operation of a pixel in a photoelectric conversion device.

[0010] Figure 3B It is a graphic Figure 2 A diagram of an example of the operation of a pixel in a photoelectric conversion device.

[0011] Figure 4A It is a graphic Figure 2 A diagram of an example of the operation of a pixel in a photoelectric conversion device.

[0012] Figure 4B It is a graphic Figure 2 A diagram of an example of the operation of a pixel in a photoelectric conversion device.

[0013] Figure 5 It is a graphic Figure 1 A plan view of an example of the configuration of an avalanche photodiode (APD) and a photodiode (PD) in a pixel of a photoelectric conversion device.

[0014] Figure 6 It is a graphic Figure 5A cross-sectional view of an example of the configuration of an APD and a PD.

[0015] Fig. 7A It is a graphic Figure 5 Figure 2 is an equivalent circuit diagram of a pixel in FIG.

[0016] Figure 7B It is a graphic Figure 5 FIG. 7 is an example of an operation on pixels in FIG.

[0017] Figure 8 It is a graphic Figure 1 A plan view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0018] Fig. 9 It is a graphic Figure 5 A cross-sectional view of an example of the configuration of an APD and a PD.

[0019] Fig.10 It is a graphic Figure 1 A plan view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0020] Fig.11 It is a graphic Fig.10 A cross-sectional view of an example of the configuration of an APD and a PD.

[0021] Fig.12 It is a graphic Fig.11 Cross-sectional views of variations of APD and PD.

[0022] Fig.13 It is a graphic Figure 1 A cross-sectional view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0023] Fig.14 It is a graphic Figure 1 A cross-sectional view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0024] Fig.15 It is a graphic Figure 1 A cross-sectional view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0025] Fig.16 This diagram is used to manufacture Fig.15 A portion of the method of pixels in FIG.

[0026] Fig.17 It is a graphic Figure 1 A cross-sectional view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0027] Fig.18 This diagram is used to manufacture Fig.17 A portion of the method of pixels in FIG.

[0028] Fig.19 It is a graphic Fig.17 A diagram showing the distribution of impurity ions in the depth direction of the semiconductor substrate in the pixel region.

[0029] Fig. 20 It is a graphic Figure 1 An equivalent circuit diagram of an example of the configuration of a pixel of a photoelectric conversion device.

[0030] Fig.21 It is a graphic Figure 1 A plan view of an example of the configuration of an APD and a PD in a pixel of a photoelectric conversion device.

[0031] Fig. 22 It is a graphic Fig.21 A cross-sectional view of an example of the configuration of an APD and a PD.

[0032] Fig.23A It is a graphic Fig.21 Figure 2 is an equivalent circuit diagram of a pixel in FIG.

[0033] Fig. 23B It is a graphic Fig.21 FIG. 7 is an example of an operation on pixels in FIG.

[0034] Fig.24 It is a graphic Figure 1 An equivalent circuit diagram of an example of the configuration of a pixel of a photoelectric conversion device.

[0035] Fig.25 It is a graphic Fig.24 FIG. 7 is an example of an operation on pixels in FIG.

[0036] Fig.26 is a diagram illustrating an example of the configuration of equipment incorporating the photoelectric conversion device according to the present exemplary embodiment. DETAILED DESCRIPTION

[0037] The exemplary embodiments will be described in detail below with reference to the accompanying drawings. The following exemplary embodiments do not limit the present disclosure according to the appended claims. Although multiple features are described in the exemplary embodiments, not all of the multiple features are necessary for the present disclosure, and multiple features can be optionally combined together. In addition, in the accompanying drawings, the same or similar components are represented by the same reference numerals and are not repeatedly described.

[0038] refer to Figures 1 to 26, a photoelectric conversion device according to an exemplary embodiment of the present disclosure is described. Each of the following exemplary embodiments illustrates an example of the present disclosure and does not limit the present disclosure according to the attached claims. In the following exemplary embodiments, the signal charge carrier is an electron, and a single photon avalanche diode (SPAD) that detects a potential change of the cathode caused by an avalanche current is described. Therefore, the semiconductor region of the first conductivity type in which the majority carriers are electrons is an N-type semiconductor region, and the semiconductor region of the second conductivity type opposite to the first conductivity type is a P-type semiconductor region. However, holes can be signal charge carriers, or a configuration for detecting a potential change of the anode can be adopted. In this case, the semiconductor region of the first conductivity type in which the majority carriers are holes is a P-type semiconductor region, and the semiconductor region of the second conductivity type opposite to the first conductivity type is an N-type semiconductor region.

[0039] First, refer to Figure 1 , a photoelectric conversion device applicable to an exemplary embodiment of the present disclosure is described based on a general SPAD operation. Figure 1 1 is a block diagram illustrating an example of the configuration of the photoelectric conversion device 100 according to the present exemplary embodiment. The photoelectric conversion device 100 includes a pixel array 101, a control pulse generation circuit 115, a horizontal scanning circuit 111, a reading circuit 112, a vertical scanning circuit 110, a signal line 113, and drive lines 213 and 214. In the pixel array 101, a plurality of pixels 104 are arranged in a matrix form. Each pixel 104 may include a photoelectric conversion unit 102 and a signal processing circuit 103, the photoelectric conversion unit 102 including an avalanche photodiode (APD). The photoelectric conversion unit 102 converts light into an electrical signal. The signal processing circuit 103 outputs the electrical signal obtained by the conversion to the reading circuit 112.

[0040] The vertical scanning circuit 110 receives the control pulse supplied from the control pulse generating circuit 115, and supplies the control pulse to the pixel 104. As the vertical scanning circuit 110, a logic circuit such as a shift register or an address decoder is used.

[0041] A signal output from the photoelectric conversion unit 102 of each pixel 104 is processed by the signal processing circuit 103. For example, a counter and a memory are provided in the signal processing circuit 103. The memory holds a digital value.

[0042] In order to read a signal from the memory of the pixel 104 holding the digital signal, the horizontal scanning circuit 111 inputs a control pulse for sequentially selecting a column to the signal processing circuit 103. A signal is output from the signal processing circuit 103 of the pixel 101 selected by the vertical scanning circuit 110 in the selected column to the signal line 113. The signal output to the signal line 113 is output to a recording device or a signal processing device disposed outside the photoelectric conversion device 100 via the output circuit 114.

[0043] exist Figure 1 In the configuration shown in , the pixels 104 are two-dimensionally arranged in the pixel array 101. However, aspects of the embodiments are not limited thereto. The pixels 104 may be one-dimensionally arranged in the pixel array 101. The functions of the signal processing circuit 103 do not necessarily need to be provided in a one-to-one correspondence with all pixels 104, and for example, a single signal processing circuit 103 may be shared by a plurality of pixels 104 and perform signal processing sequentially.

[0044] Figure 2 It is a graphic Figure 1 A block diagram of an example of a configuration of one of the pixels 104 shown in FIG. Figure 2 , Figure 3A and Figure 3B as well as Figure 4A and Figure 4B , describing the basic configuration and operation of the pixel 104 including the APD. Next, referring to Figure 5 2 and subsequent figures, describe the detailed configuration of the pixel 104 according to the present exemplary embodiment.

[0045] like Figure 2 As shown in , the APD 201 is disposed in the photoelectric conversion unit 102 of the pixel 104. The APD 201 generates a charge pair corresponding to the incident light by photoelectric conversion. A potential VL is supplied to the anode of the APD 201. A potential VH higher than the potential VL supplied to the anode is supplied to the cathode of the APD 201. Therefore, a reverse bias voltage is supplied between the anode and the cathode of the APD 201 to cause the APD 201 to perform an avalanche multiplication operation. The APD 201 is brought into a state where such a voltage is supplied, whereby the charge generated by the incident light causes avalanche multiplication and generates an avalanche current. In the following description, for simplicity, VL=-Vbd, and VH=Vex. Vbd is the breakdown voltage of the APD 201, and Vex is the overvoltage of the APD 201. Typically, the potential VL is approximately -20V to -30V, and the potential VH is approximately 2V to 3V.

[0046] like Figure 2As shown in FIG. 1 , the signal processing circuit 103 of the pixel 104 may include a quenching element 202, a waveform shaping circuit 210, a counter circuit 211, and a selection circuit 212. However, aspects of the present embodiment are not limited thereto. The signal processing circuit 103 may include other circuits related to signal processing.

[0047] The quenching element 202 is connected to the supply line for supplying the potential VH and the APD 201. The quenching element 202 has a function of converting the avalanche current generated in the APD 201 into a voltage signal. The quenching element 202 serves as a load circuit (quenching circuit), and reduces the voltage supplied to the APD 201 when avalanche multiplication occurs, thereby preventing avalanche multiplication (quenching operation).

[0048] The waveform shaping circuit 210 shapes the change in the cathode potential of the APD 201 obtained when a photon is detected. Then, the waveform shaping circuit 210 outputs a pulse signal. Therefore, the waveform shaping circuit 210 is used as a detection circuit for detecting avalanche breakdown occurring in the APD 201. As the waveform shaping circuit 210, for example, an inverter circuit can be used. It is possible to include a single inverter as a configuration example of the waveform shaping circuit 210. However, aspects of the embodiment are not limited to this. As the waveform shaping circuit 210, a circuit in which a plurality of inverters are connected in series can be used. Alternatively, as the waveform shaping circuit 210, other circuits having a waveform shaping effect can be used.

[0049] The counter circuit 211 counts the number of pulse signals output from the waveform shaping circuit 210 and holds the counted value. Figure 1 The vertical scanning circuit 110 shown in FIG. 1 supplies a reset control pulse to the counter circuit 211 via the driving line 213 , and the value held in the counter circuit 211 is reset.

[0050] Via drive line 214 from Figure 1 The vertical scanning circuit 110 shown in FIG. 1 supplies a selection control pulse to the selection circuit 212, thereby switching the electrical connection and disconnection between the counter circuit 211 and the signal line 113. For example, the selection circuit 212 may include a buffer circuit for outputting a signal.

[0051] A switching element such as a transistor may be disposed between the quenching element 202 and the APD 201 or between the photoelectric conversion unit 102 and the signal processing circuit 103 to switch the electrical connection. Similarly, a switching element such as a transistor may be used to electrically switch the supply of the potential VH or the potential VL to the photoelectric conversion unit 102.

[0052] Figure 2The configuration using the counter circuit 211 is illustrated. However, aspects of the embodiment are not limited thereto. The photoelectric conversion device 100 may use a time-to-digital converter (TDC) and a memory instead of the counter circuit 211 to acquire the timing of detecting the pulse signal output from the waveform shaping circuit 210. In this case, the generation timing of the pulse signal output from the waveform shaping circuit 210 is converted into a digital signal by the TDC. In order to measure the timing of the output pulse signal, a control pulse pREF is supplied to the TDC from the vertical scanning circuit 110 via a drive line (which may be similar to the drive lines 213 and 214). Using the control pulse pREF as a reference, the TDC acquires a signal whose input timing of the signal output from the pixel 104 via the waveform shaping circuit 210 is a relative time as a digital signal.

[0053] Figure 3A and Figure 3B is a diagram schematically illustrating the relationship between the operation of the APD 201 and the output signal. Figure 3A It is a graphic Figure 2 FIG. 2 is a diagram of an extract of the APD 201 , the quenching element 202 , and the waveform shaping circuit 210 shown in FIG. Figure 3B Changes in the potentials of nodes A and B are illustrated.

[0054] From time t0 to time t1, a potential difference (voltage) between the potentials VH and VL is applied to the APD 201. At time t1, if a photon is incident on the APD 201, avalanche breakdown occurs in the APD 201, an avalanche multiplication current flows through the quenching element 202, and the potential of the node A drops. If the amount of potential drop becomes larger and the potential difference applied to the APD 201 becomes smaller, then as shown at time t2, the avalanche breakdown in the APD 201 stops, and the potential level of the node A does not drop by a certain value or more. The potential when the avalanche breakdown stops is approximately 0 V, that is, the potential when the voltage applied to the APD 201 is equal to the breakdown voltage Vbd. Then, between time t2 and time t3, a current that compensates for the potential drop flows through the node A from the potential VL. At time t3, the node A becomes static at the original potential level. At this time, the portion of the output waveform of the node A that exceeds a certain threshold value is waveform-shaped by the waveform shaping circuit 210 and is output to the node B as a signal.

[0055] The quenching element 202 and the waveform shaping circuit 210 may be formed on the same semiconductor substrate as the APD 201. However, aspects of the embodiment are not limited thereto. A chip in which the APD 201 is disposed and a chip in which the quenching element 202 and the waveform shaping circuit 210 are disposed may be formed separately and laminated together. For example, Figure 2As indicated by the dotted lines in , the chip (semiconductor substrate) on which the photoelectric conversion unit 102 is disposed and the chip (semiconductor substrate) on which the signal processing circuit 103 is disposed may be separately formed and laminated together.

[0056] Figure 4A and Figure 4B is a schematic diagram showing a Figure 3A and Figure 3B FIG. 2 is a diagram showing the relationship between the operation and output signal of the APD 201 in different configurations. Figure 4A is with Figure 3A The corresponding equivalent circuit diagram, however, a P-channel type (P-type) metal oxide semiconductor (MOS) (metal-insulator-semiconductor (MIS)) transistor 203 is deployed instead of the quenching element 202. Figure 4B Picture shows Figure 4A The potential changes of nodes A and B and node C in . Figure 3A Nodes A and B are nodes on the input side and the output side of the waveform shaping circuit 210, respectively. Node C is a node connected to the gate electrode of the transistor 203.

[0057] The transistor 203 is a switch for resetting the potential of the node A to the potential VH, and is controlled based on the potential of the node C. Figure 4B , the potential of the node C shown in is high, then the transistor 203 is in the off state (non-conductive state, hereinafter sometimes referred to as "off"). If the potential of the node C is low, then the transistor 203 becomes in the on state (conductive state, hereinafter sometimes referred to as "on"). A periodic pulse is input to the node C, and Figure 4B The following describes a portion of a periodic pulse. Figure 4B The operations shown in .

[0058] First, at time t0, the potential of the node A is reset to the potential VH by the transistor 203. Then, if the transistor 203 is turned off, the potential of the node A enters a floating state at the potential VH.

[0059] Assume that at time t1, a photon is incident on the APD 201. If avalanche breakdown occurs in the APD 201 due to the incident photon, the potential of the node A decreases due to the avalanche current, and at time t2, the avalanche breakdown stops. The potential of the node A is in a floating state at a low potential. However, at time t3, if a pulse that resets the node A is input to the node C, the potential of the node A is reset to the potential VH again. Therefore, at the node B on the output side of the waveform shaping circuit 210, a high avalanche breakdown detection pulse is generated from the time when the potential of the node A reaches a certain threshold between time t1 and t2 to time t3.

[0060] exist Figure 4B In the operation shown in , consider the case where the next photon is incident between time t1 and time t3 when the first photon is incident, that is, the case where the next photon is incident while the potential of node A is kept low. In this case, the APD 201 cannot cause further avalanche breakdown by the second photon or subsequent photons between the incident of the first photon and time t3. Therefore, even if multiple photons are incident between time t1 and time t3, the number of times the waveform shaping circuit 210 detects avalanche breakdown is 1. For example, in Figure 4B In the operation shown in , if no photon is incident between time t0 and time t3, the potential of node A is maintained at potential VH, and the potential of node B is maintained at a low level. That is, the number of times avalanche breakdown is detected is zero.

[0061] In reference Figure 4B In the operation described above, during the period of one cycle of the reset pulse input to the node C, it is distinguished whether the number of times that photons are incident on the APD 201 is 0 or 1 or more. Therefore, if a plurality of photons are incident during the period of one cycle of the reset pulse input to the node C, a signal detection loss occurs. On the other hand, if photons are incident one after another without interruption, then in the reference Figure 3B In the described operation, the APD 201 enters a so-called pile-up state in which avalanche breakdown does not stop and avalanche current continues to flow. In the pile-up state, the potential of the node A remains low, and therefore, a detection pulse is not generated by the waveform shaping circuit 210, and a wasted current flows through the APD 201. Therefore, in terms of power consumption, pile-up is a major problem in SPAD operation.

[0062] In addition to the continuous flow of current due to the pile-up, the following problems may occur in the SPAD operation. As described above, because the multiplication factor in the SPAD operation is large, the following problems may occur.

[0063] One of the problems is light emission crosstalk. In the APD 201, the incidence of photons generates many carriers. It is known that some of the generated carrier pairs may recombine with the emitted light. If avalanche breakdown occurs due to an incident photon on a certain pixel 104 in the pixel array 101 including a plurality of pixels 104 (photoelectric conversion unit 102), the secondary photons emitted from the certain pixel 104 may be incident on a pixel 104 near the certain pixel 104 and become an erroneous signal. This is called light emission crosstalk. For example, if it is assumed as described above that the multiplication factor is one hundred and twenty thousand and 0.01% of the one hundred and twenty thousand carrier pairs generated by a single photon recombine, twelve secondary photons are generated that cause light emission crosstalk.

[0064] The next problem is the change of dark current. The carriers generated by avalanche multiplication are accelerated in the high electric field part and become so-called hot carriers. Some of the hot carriers are captured in the interface part near the cathode of APD 201, and the state of the interface part changes. In the APD discussed in Japanese Patent Application Publication No. 2018-064086, the part near the cathode is depleted, and many dark carriers are generated from the interface part of the cathode. However, the electric field strength near the cathode is relatively low, and only a small part of the carriers generated at the interface cause avalanche. The carriers generated at the interface that causes this avalanche appear as dark counts of SPAD. If the state of the interface part changes by capturing hot carriers, the carrier generation speed at the interface changes, and therefore, the dark count rate (DCR) changes. This change occurs when the SPAD continues to be used. Therefore, there may be a problem that the DCR cannot be corrected based on the initial DCR.

[0065] In addition, as described above, if the number of signal photons is large, the consumed energy is large.

[0066] For example, if Vbd = 25 V, it is estimated that one hundred and twenty thousand carriers are generated by incident photons and about 0.5 pJ of energy is consumed. If many pixels are deployed and the number of incident photons is large, the consumed energy increases. This may impose a large load on the power supply system of the photoelectric conversion device 100 that performs SPAD operation.

[0067] As described above, since the capacitance component caused by the wiring pattern connected to the cathode of the APD 201 or the detection circuit for detecting avalanche breakdown (such as the waveform shaping circuit 210) is large, the multiplication factor of the avalanche multiplication is large. Therefore, this may cause the problems of light emission crosstalk, change in dark current (i.e., DCR), and power consumption as described above. If the diode junction capacitance of the cathode of the APD 201 is large, then this may be a more serious problem. The diode junction capacitance of the cathode of the APD 201 is a capacitance component different from the capacitance caused by the wiring pattern connected to the cathode of the APD 201 or the detection circuit for detecting avalanche breakdown (such as the waveform shaping circuit 210).

[0068] exist Figure 3B The above problems may clearly occur under the accumulation conditions that may occur during the operation shown in FIG. Figure 4BThe operation shown in has a great advantage that such pile-up does not occur. If multiple photons are incident during the period of one cycle of the reset pulse input to node C, then signal detection loss may occur. However, SPAD is advantageous for detecting photons in the case where the number of incident photons is small. In the case where the number of incident photons is small, it is unlikely that multiple photons are incident during one cycle of the reset pulse. Therefore, it is believed that signal detection loss will hardly occur in this case. However, in Figure 4B The operation shown in may also present problems with light emission crosstalk, changes in dark current, and power consumption due to the large multiplication factor.

[0069] based on Figure 4B , a detailed description of the photoelectric conversion device 100 according to the present disclosure for reducing light emission crosstalk, changes in dark current, and power consumption is given below. However, each exemplary embodiment of the present disclosure is also applicable to Figure 3B The operations shown in .

[0070] A first exemplary embodiment is described. Figure 5 is a plan view of the photoelectric conversion unit 102 disposed in the pixel 104 according to the first exemplary embodiment of the present disclosure. Figure 6 It is along AB Figure 5 2 is a cross-sectional view of the photoelectric conversion unit 102 shown in FIG. Figure 5 yes Figure 6 2 is a plan view of a main surface 251 (first main surface) of a semiconductor substrate 250 shown in FIG.

[0071] The photoelectric conversion unit 102 included in the pixel 104 disposed in the photoelectric conversion device 100 is formed in a semiconductor substrate 250 including a main surface 251 and a main surface 252 (second main surface) on the opposite side of the main surface 251. Figure 5 and Figure 6 In the configuration shown in , the photoelectric conversion unit 102 includes a region 204 (first region), a region 206 (second region), a region 208 (third region), and a region 207 (fourth region).

[0072] The region 204 is a region of N-type conductivity with a high impurity concentration that constitutes a portion of the main surface 251 of the semiconductor substrate 250. The region 204 is connected to a detection circuit (e.g., a waveform shaping circuit 210) for detecting avalanche breakdown via a connection pattern 205. Although the connection pattern 205 does not constitute a portion of the main surface 251, in order to facilitate understanding of the connection position of the region 204 and the connection pattern 205, Figure 5 The connection pattern 205 is shown. The region 206 is a region of N-type conductivity type disposed away from the region 204 and having a high impurity concentration. Figure 6As shown in , region 206 may constitute a portion of a main surface 251 of a semiconductor substrate 250. Unlike region 204, region 206 is not directly connected to a connection pattern 205 leading to a detection circuit. As will be described below, region 206 is connected to connection pattern 205 via regions 207 and 204. Region 208 is a region of P-type conductivity opposite to N-type disposed at a position closer to a main surface 252 of the semiconductor substrate 250 than regions 204 and 206.

[0073] Region 204 may be a cathode of a photodiode (PD) including a PN junction formed by regions 204 and 208. Region 208 may be an anode of a PD formed by regions 204 and 208. Similarly, region 206 may be a cathode of an APD including a PN junction formed by regions 206 and 208. Region 208 may be an anode of an APD formed by regions 206 and 208. Figure 6 As shown in FIG. 2 , region 208 may be formed between regions 204 and 206 and a major surface 252 of semiconductor substrate 250 ( Figure 6 The area 204 and 206 below the area 204 and 206 in the image are shown on almost the entire surface of a single pixel 104 (a single photoelectric conversion unit 102). Figure 6 As shown in FIG. 1 , region 208 extends from region 230 on one side to region 230 on the other side in the cross-sectional view.

[0074] Region 207 is disposed between regions 204 and 206. Regions 204 and 206 are configured to be conductive with each other via region 207. In one embodiment, region 207 is a region having an impurity concentration lower than that of regions 204 and 206. Figure 5 and Figure 6 In the configuration shown in , region 207 is an N-type region with a low impurity concentration that serves as a resistor connecting regions 204 and 206 .

[0075] like Figure 6 As shown in , the photoelectric conversion unit 102 may further include regions 209, 230, 231, and 190. Region 209 is a P-type region formed to constitute the main surface 252 of the semiconductor substrate 250. Each region 230 is a P-type region formed at the boundary between the pixels 104 (photoelectric conversion unit 102) and separates the pixels 104. Region 231 (fifth region) is a photoelectric conversion region and is a P-type or N-type region having an impurity concentration lower than that of regions 204 and 206, and is disposed between region 208 and the main surface 252 (region 209) of the semiconductor substrate 250.

[0076] Region 190 is a region disposed between regions 204, 207, and 206 and region 208 in a region surrounded by main surface 251 of semiconductor substrate 250 and regions 208 and 230. Region 190 is a P-type or N-type region having an impurity concentration lower than that of regions 204 and 206. Regions 190 and 231 may be regions having an impurity concentration lower than that of regions 208, 209, and 230.

[0077] exist Figure 5 and Figure 6 In the configuration shown in , when light is incident on the photoelectric conversion unit 102 during operation of the photoelectric conversion device 100, the PN junction including the regions 206 and 208 functions as the APD 201 and causes avalanche breakdown. On the other hand, the PN junction including the regions 204 and 208 does not function as the APD 201 and does not substantially cause avalanche breakdown. Therefore, hereinafter, the PN junction including the regions 204 and 208 is sometimes referred to as a "parasitic PD 232".

[0078] In order to make regions 206 and 208 function as APD 201 and prevent regions 204 and 208 from functioning as APD 201, then Figure 6 As shown in , the distance D1 between regions 206 and 208 is smaller than the distance D2 between regions 204 and 208. Therefore, when the photoelectric conversion device 100 operates, an electric field higher than the electric field of the PN junction composed of regions 204 and 208 is generated in the PN junction composed of regions 206 and 208. Therefore, a depletion region is formed in the region 208 overlapping with region 206 in the orthogonal projection to the main surface 251 of the semiconductor substrate 250. The charge generated in region 231 by the incident light passes through the depletion region and flows into region 206, and avalanche breakdown is caused at this time. When the photoelectric conversion device 100 operates, region 190 is substantially depleted. Therefore, regions 204 and 206 are electrically connected to each other mainly via the N-type region 207 used as a resistor. The impurity concentration of the first conductivity type of region 204 can be lower than the impurity concentration of the first conductivity type of region 206. This can also make it less likely that avalanche breakdown will occur in regions 204 and 208.

[0079] In the present exemplary embodiment, the photons incident on the region 231 may be incident from the main surface 251 of the semiconductor substrate 250, or may be incident from the main surface 252 of the semiconductor substrate 250. In this case, the photons are incident from the main surface 252 of the semiconductor substrate 250. That is, the photoelectric conversion device 100 is a so-called back-incident photoelectric conversion device. The signal processing circuit 103 including the waveform shaping circuit 210 is formed on another substrate connected to the semiconductor substrate 250 on which the region 231 and the APD 201 are disposed via the connection pattern 205.

[0080] Fig. 7A and Figure 7B is a diagram illustrating the operation of the SPAD according to the present exemplary embodiment. Fig. 7A An equivalent circuit diagram of a part of the photoelectric conversion unit 102 and the signal processing circuit 103 is illustrated. Figure 7B FIG. 1 shows a potential change of each of nodes A to C and node D in SPAD operation. The positions of nodes A to C are related to Figure 4A Node D is the cathode of APD 201, that is, the potential of region 206. If the wiring resistance of connection pattern 205 is negligible, node A is the potential of region 204, which is the cathode of parasitic PD 232.

[0081] First, at time t0, the potential of the node A is reset to the potential VH and the potential of the node D is reset to the potential VH via the region 207 by the transistor 203. The transistor 203 functions as a reset circuit for resetting the potentials of the regions 204 and 206 to a predetermined potential (potential VH) according to a reset pulse input to the node C. Then, if the transistor 203 is turned off, the potentials of the nodes A and D enter a floating state at the potential VH.

[0082] Next, at time t1, if a photon is incident on the photoelectric conversion unit 102 and avalanche breakdown occurs in the APD 201, the potential of the node D decreases due to the avalanche current. At this time, the potential of the node A also decreases due to the current flowing through the region 207, but cannot follow the change in the potential of the node D, and the decrease in the potential of the node A is slow. At time t2, if the avalanche breakdown stops, the current flows through the region 207, making the potentials of the nodes A and D the same as each other. During this process, the potential of the node A exceeds the threshold of the waveform shaping circuit 210, and a pulse for detecting avalanche breakdown in the APD 201 is generated at the node B.

[0083] In the above operation, from time t1 to time t2, the avalanche current flows. Figure 4A The configuration in which the APD 201 shown in FIG. 1 is directly connected to the waveform shaping circuit 210 is referred to as a "comparative example configuration". Figure 7B In the potential change shown in FIG. , compared with the configuration of the comparative example, Figure 4B, the potential of the node D is reduced to a potential at which the avalanche breakdown stops, similar to the operation shown in . On the other hand, since the region 207 functions as a resistor, the potential of the node A to which a large capacitance component is added due to the connection pattern 205 or the waveform shaping circuit 210 (detection circuit) cannot follow the potential change of the node D, and the potential change of the node A at time t2 is small. Therefore, if the capacitance component of the parasitic PD 232 added to the configuration of the comparative example is sufficiently small compared to the other capacitance components added to the node A, the amount of charge discharged from the node A is reduced to a small value compared to the operation of the configuration of the comparative example. Therefore, the multiplication factor of the avalanche breakdown occurring in the APD 201 is reduced compared to the configuration of the comparative example.

[0084] A quantitative description is given. As a condition, it is assumed that the size of the pixel 104 is several square micrometers, such as 5 μm square. In this case, the diameter of each of the regions 204 and 206 is, for example, about 1 μm. The region 204 constituting the parasitic PD 232 may be smaller than the region 206. Under these conditions, the capacitance of the PN junction of the region 206 is about 0.8 fF, the additional capacitance (parasitic capacitance) from the connection pattern 205 to the input portion of the waveform shaping circuit 210 is about 7.2 fF, and the capacitance of the PN junction of the region 204 is about 0.6 fF. In the present exemplary embodiment, the capacitance due to the deployment of the region 204 is increased compared to the configuration of the comparative example. However, it should be understood that the capacitance component due to the region 204 is sufficiently smaller than the capacitance component due to the connection pattern 205 or the waveform shaping circuit 210 from the connection pattern 205 to the input portion of the waveform shaping circuit 210.

[0085] Next, consider to what extent the resistance value of region 207 used as a resistor should be set to achieve the effect of reducing the carrier multiplication factor. The resistance of region 207 is not necessarily an ohmic resistance. Assuming that I1 is the current flowing through region 207 when the potential difference between regions 204 and 206 is V1, the resistance of region 207 is defined as the value of V1 / I1, where I1 is 1uA.

[0086] First, the reduction in the potential of the cathode (region 206) of APD 201 when avalanche breakdown occurs is 2.4V. The avalanche current in this case is about 50μA under the above conditions, but this depends on the characteristics of APD 201. Therefore, in region 206 with a capacitance of 0.8fF, the time for the potential to decrease by 2.4V is about 40ps. At this time, in order to prevent the potential of region 204 from following the potential change of region 206, the product of the resistance value of region 207 and the capacitance value of region 206-that is, the so-called CR time constant needs to be about 40ps or more. Since the capacitance of region 206 is 0.8fF under the above conditions, it is calculated that the resistance value of region 207 needs to be about 50kΩ or more. In fact, the conditions may change to some extent. For example, if the avalanche current is 100μA, the time for the potential of region 206 to decrease by 2.4V is 20ps, and the resistance value of region 207 needs to be about 25kΩ. If the decrease in the potential of the cathode (region 206) when avalanche breakdown occurs is about 1.9 V, the resistance value of region 207 needs to be about 20 kΩ. Therefore, in one embodiment, region 207 functions as a resistor of 20 kΩ or more. If a configuration that can be actually formed such as the junction capacitance of region 206 and the current amount of avalanche current are considered, it is considered that the effect of reducing the multiplication factor cannot be expected unless the resistance value of region 207 is at least about 20 kΩ.

[0087] On the other hand, the greater the resistance value of region 207, the smaller the multiplication factor. However, if the resistance value of region 207 is too large, the response time from the actual start of avalanche breakdown to the detection circuit detecting the avalanche breakdown is long. For example, if the period of the pulse input to node C is 20 μs, unless the detection circuit responds in a time sufficiently shorter than the period of the pulse, the loss of detection of avalanche breakdown occurs. Therefore, if the response time is 0.2 μs or shorter as a condition, the estimated time constant is 0.2 μs or shorter, and the upper limit of the resistance value of region 207 is 250 MΩ. In general, it is difficult to form a resistor of several hundred megohms in pixel 104 (semiconductor substrate 250). Therefore, the lower limit of the resistance value of region 207 is important in the design of the actual pixel 104 (actual photoelectric conversion unit 102).

[0088] As described above, if the multiplication factor when avalanche breakdown occurs is small, the potential change (potential reduction) of node A is also small. Therefore, in one embodiment, for avalanche breakdown in the waveform shaping circuit 210, the determination threshold is set to a value corresponding to the reduced multiplication factor.

[0089] Summarizing the above references Figures 5 to 7A and Figure 7BThe present exemplary embodiment described. The capacitance of the PN junction of region 204 caused by the deployment of the parasitic PD 232 in the configuration of the comparative example is added to the node A, which is disadvantageous in reducing the multiplication factor when avalanche breakdown occurs. However, the capacitance component of the PN junction of region 204 is sufficiently smaller than the capacitance component caused by the connection pattern 205 or the waveform shaping circuit 210. Therefore, the capacitance component of the PN junction of region 204 does not affect the multiplication factor. On the other hand, by setting the resistance value of region 207 to an appropriate value, it is possible to reduce the electrical conduction between nodes A and D to a desired extent. Therefore, compared with the SPAD operation in the configuration of the comparative example, it is possible to significantly reduce the amount of charge discharged from node A when avalanche breakdown occurs. That is, with the configuration of the present exemplary embodiment, the carrier multiplication factor when avalanche breakdown occurs is reduced, and the present exemplary embodiment exerts the effect of solving each of the three problems - namely, light emission crosstalk, changes in dark current, and power consumption when many photons are incident.

[0090] The configuration of each of the parasitic PD 232, the APD 201, and the region 207 is not limited to Figure 5 and Figure 6 For example, Figure 8 As shown in FIG, region 207 may connect region 204 and region 206 not through the shortest path but through a path surrounding region 204 and region 206. Region 207 arranged in a detour extends the distance between region 204 and region 206, and thus the resistance value may be easily increased.

[0091] For example, in Fig. 9 In the configuration shown in , the region 206 for constituting the APD 201 has a double-layer configuration of regions 206a and 206b. The region 206a in the region 206 is a shallow N-type region similar to the region 204 and in contact with the main surface 251 of the semiconductor substrate 250. The region 206b in the region 206 is an N-type region formed in a portion deeper than the region 206a (closer to the main surface 252 of the semiconductor substrate 250) and continuous from the region 206a.

[0092] Figure 6 The regions 204 and 206 shown in FIG. 1 are both regions having a single-layer structure and having depths different from each other, and thus can be formed by processing using different masks. Fig. 9The region 204 shown in FIG. 2 and the region 206a in the region 206 can be formed using the same mask. Therefore, the region 204 and the region 206 (region 206a) are formed so that the planar positional relationship between the region 204 and the region 206 (region 206a) on the main surface 251 of the semiconductor substrate 250 is a constant positional relationship, regardless of the misalignment of the mask. This leads to the stable formation of the resistance value of the region 207, which is the electrically conductive path connecting the regions 204 and 206. The region 206b in the region 206 is formed using a mask different from the mask used to form the regions 204 and 206a.

[0093] Also in this case, only the position of the depletion region in the P-type region 208 is determined, and misalignment of the mask in the region 206 b relative to the region 206 a does not have a large influence on the characteristics.

[0094] Can be used in combination Figure 8 and Fig. 9 The configuration shown in . Apply Figure 8 and Fig. 9 The configuration shown in , whereby it is possible to realize SPAD operation with a reduced multiplication factor and stable characteristics. That is, this can contribute to further improvement of the characteristics of the photoelectric conversion device 100.

[0095] exist Figure 6 and Fig. 9 In the configuration shown in , region 206 is disposed in a region closer to the main surface 252 of semiconductor substrate 250 than region 204, so that the distance between regions 206 and 208 is shorter than the distance between regions 204 and 208. However, the disclosure of the embodiments is not limited thereto. For example, regions 204 and 206 may have the same shape, and a portion of region 208 overlapping region 206 may have a step to approach region 206. For example, regions 204 and 206 may be formed using the same mask. On the other hand, region 208 may include a Figure 6 and Fig. 9 , and a region continuous from the uniform region to approach the region 206 in the region overlapping with the region 206 in the orthogonal projection to the main surface 251 of the semiconductor substrate 250. This can also achieve SPAD operation in which the multiplication factor of the combination of the APD 201 and the parasitic PD 232 is reduced as described above. Since a single mask can be used to form the regions 204 and 206, similar to Fig. 9 The configuration shown in can stabilize the characteristics of SPAD operation.

[0096] The outer edge of each of the regions 204, 206, and 208 may be a portion of the region having a concentration that is one tenth of the concentration of the portion having the highest impurity concentration. For example, the outer edge of each of the regions 204, 206, and 208 may be a portion of the region having a concentration that is one hundredth of the concentration of the portion having the highest impurity concentration. In addition, for example, the outer edge of each of the regions 204, 206, and 208 may be a portion of the region having a concentration that is continuous with the portion having the highest impurity concentration in the region and having an impurity concentration of 1×10 16 If each region and a region adjacent to the region are of different conductivity types from each other, the outer edge of each region may be a portion where the conductivity type is changed.

[0097] Next, a photoelectric conversion device 100 according to a second exemplary embodiment of the present disclosure is described. Fig.10 is a plan view of the photoelectric conversion unit 102 disposed in the pixel 104 according to the present exemplary embodiment. Fig.11 It is along AB Fig.10 2 is a cross-sectional view of the photoelectric conversion unit 102 shown in FIG. Fig.10 yes Fig.11 2 is a plan view of a main surface 251 of a semiconductor substrate 250 shown in FIG. Fig.10 and Fig.11 The equivalent circuit according to the present exemplary embodiment shown in FIG. 1 can be similar to Fig. 7A As shown and referenced in Figures 5 to 9 The circuit according to the first exemplary embodiment is described, and the operation according to the present exemplary embodiment can also be similar to the operation according to the first exemplary embodiment.

[0098] In this exemplary embodiment, Fig.11 As shown in , regions 204 and 206 have a structure that together forms regions 204 and 206 in the depth direction. More specifically, region 206 is disposed between regions 204 and 208. The depth direction is a direction from main surface 251 to main surface 252 of semiconductor substrate 250. Hereinafter, there is a case where a position is expressed as "becoming deeper" as it approaches main surface 252 from main surface 251.

[0099] APD 201 is composed of regions 206 and 208. In region 207, low-concentration P-type impurities or low-concentration N-type impurities are doped. In region 207, when the photoelectric conversion device 100 operates, a low-concentration electron layer of N-type conductivity type is formed regardless of the conductivity type of the impurity. Then, region 207 serves as a resistor connecting regions 204 and 206. In the case where region 207 is an effective N-type region, the operation of region 207 is similar to that in the first exemplary embodiment. The "effective" conductivity type refers to a conductivity type with a higher impurity concentration when P-type impurities and N-type impurities coexist, and the difference between the concentrations of the impurities is an effective concentration. In the above and following exemplary embodiments, the conductivity type of each region may be an effective conductivity type.

[0100] A description is given below of a case where the region 207 is an effective P-type region and the majority carriers of the region 207 are electrons. If the region 207 as an effective P-type impurity region is a neutral region or is in a completely depleted state when the photoelectric conversion device 100 operates, the electrical conduction between the regions 204 and 206 is disconnected, and the region 206 of the APD 201 is always in a floating state. Therefore, information on the occurrence of avalanche breakdown in the APD 201 is not transmitted to the region 204, and the APD 201 does not function as a SPAD.

[0101] On the other hand, if the thickness and impurity concentration in the depth direction of the P-type region 207 are appropriate, the majority carriers of the region 207 may be low-concentration electrons, and the region 207 may be used as a resistor between the regions 204 and 206. Specifically, the Debye length of the P-type region 207 is set to be equivalent to the thickness in the depth direction of the region 207. Therefore, the majority carriers of the region 207 may be low-concentration electrons.

[0102] Regions 204 and 206 are high-concentration N-type regions and have high-concentration electrons as majority carriers. The quasi-Fermi levels of regions 204 and 206 do not change, so the majority carriers of P-type region 207 are holes. This is because the limit on the change of the quasi-Fermi level is determined based on the Debye length. Therefore, in P-type region 207, although the concentration of electrons is low, electrons are majority carriers, and region 207 can act as a resistor. In the case where region 207 is a P-type region with an appropriate concentration, it is easier to achieve an electron layer with a lower concentration than in the case where region 207 is an N-type region. Therefore, region 207 is easily used as a region with higher resistance. Fig.11 The distance between regions 204 and 206 in the configuration shown in FIG. 2 can be compared to the distance between regions 204 and 206 in the configuration shown in FIG. Figures 5 to 9 The distance in the configuration described is short. Therefore, it is more necessary to increase the resistance per unit length of the region 207 than in the above configuration.

[0103] As described above, where region 207 acts as a resistor and indicates the desired resistance value, then based on the reference Figures 5 to 9 By using an operating principle similar to that of the first exemplary embodiment described above, it is possible to further reduce the multiplication factor when avalanche breakdown occurs compared to the SPAD in the comparative example. Fig.10 and Fig.11 The configuration shown in makes it possible to solve the problems of light emission crosstalk, changes in dark current, and power consumption caused by large multiplication factors.

[0104] In addition, if Fig.10 and Fig.11 As shown in FIG. 2 , regions 204 and 206 are arranged to overlap each other in an orthogonal projection to a main surface 251 of a semiconductor substrate 250. Therefore, the areas of regions 204 and 206 are smaller than Figure 5 The area in the plan view in . Therefore, in the case where the size of the pixel 104 (photoelectric conversion unit 102) is reduced, this configuration can be easily applied. In addition, three layers, that is, regions 204, 206, and 207 can be formed using the same mask. Therefore, changes in characteristics due to misalignment of the mask between regions 204, 206, and 207 are less likely to occur. In addition, it is possible to reduce manufacturing costs.

[0105] Fig.12 yes Fig.11 A variation of the configuration shown in . Fig.12 In the configuration shown in , region 233 (sixth region) is a P-type region, and effective P-type impurities are doped into the P-type region at a concentration that substantially depletes the P-type region when the photoelectric conversion device 100 is in operation. Region 207 is an N-type or P-type impurity doped region, has a depth that is almost the same as that of region 233, and is locally formed in the central portion of regions 204 and 206 in an orthogonal projection to the main surface 251 of the semiconductor substrate 250. As described above, region 207 is a region where low-concentration electrons are majority carriers when the photoelectric conversion device 100 is in operation. Therefore, in the case where region 207 is P-type, the effective impurity concentration of region 207 is lower than the effective impurity concentration of region 233.

[0106] exist Fig.11 and Fig.12 In the configuration shown in , region 207 is an electrically conductive path between regions 204 and 206. Fig.12 In the configuration shown in FIG. , region 207 is connected to Fig.11 Compared with the configuration shown in , the cross-sectional area is smaller than that orthogonal to the current flow direction, so it is possible to obtain a larger resistance value. The regions 204, 206 and 233 can be formed using the same mask. Fig.12In the configuration shown in , N-type impurities can be further doped into region 207 in region 233 using a mask different from the mask used to form regions 204, 206, and 233. Therefore, region 207 can be a P-type region or an effective N-type region having an effective impurity concentration lower than that of region 233. The mask used to form connection pattern 205 can be used to form region 207. The N-type impurity used to form region 206 has a distribution in which the central portion substantially extends in the depth direction. Therefore, depending on the design of the distribution of the impurity concentration of each region, when regions 204, 206, and 233 are formed using the same mask, region 207 may be partially formed at the same time.

[0107] In the configuration of the present exemplary embodiment, regions 204 and 206 are disposed to overlap each other in orthogonal projection to main surface 251 of semiconductor substrate 250. In this case, region 206 may be disposed within region 204. Alternatively, region 204 may be disposed within region 206.

[0108] Moreover, with the configuration of this exemplary embodiment, similar to the configuration shown in the first exemplary embodiment, it is possible to reduce the carrier multiplication factor when avalanche breakdown occurs. Therefore, this exemplary embodiment exerts the effect of solving each of the above-mentioned problems of light emission crosstalk, change in dark current, and power consumption. In addition, also in the case where the size of pixel 104 is small, it is possible to effectively apply the configuration of this exemplary embodiment in which regions 204, 207, and 206 overlap each other. In addition, with the configuration in which regions 204, 207, and 206 overlap each other, it is possible to prevent an increase in manufacturing processes and further reduce changes in characteristics.

[0109] Next, refer to Fig.13 , a photoelectric conversion device 100 according to a third exemplary embodiment of the present disclosure is described. Fig.13 is a cross-sectional view of a photoelectric conversion unit 102 disposed in a pixel 104 according to the present exemplary embodiment. Fig.12 The photoelectric conversion device 100 of the modification of the second exemplary embodiment shown in FIG. 1 is different in that the photoelectric conversion unit 102 includes a region 232. Except for this difference and the points described below, the present exemplary embodiment is substantially similar to the second exemplary embodiment, and therefore, descriptions of similar parts are occasionally omitted. The circuit diagram and SPAD operation according to the present exemplary embodiment are also similar to those of the reference 1. Figure 5 as well as Fig. 7A and Figure 7B The circuit diagram in the described operation is similar to the SPAD operation.

[0110] The region 232 according to the present exemplary embodiment is connected to a detection circuit for detecting avalanche breakdown via the connection pattern 205. The region 232 is a region of N-type conductivity type having a high impurity concentration constituting a portion of the main surface 251 of the semiconductor substrate 250. The region 232 establishes an ohmic connection between the region 204 and the connection pattern 205. The N-type impurity concentration of the region 232 is higher than the N-type impurity concentration of the region 204. In a plan view, the region 204 is disposed around the region 232.

[0111] In the plan view, the region 207 is disposed at a position overlapping with the connection pattern 205. In this case, after the process of forming the through hole provided with the connection pattern 205, the region 207 can be formed using the through hole. N-type impurities may be doped to a depth comparable to the depth of the region 233. On the other hand, in this case, the resistance value of the region 207 may be affected by the region 232. In order to make the resistance value less likely to be affected, as Fig.14 As shown in , the region 207 and the connection pattern 205 may be placed so as not to overlap each other in a plan view.

[0112] The appropriate impurity concentration of each region is described below. "Impurity concentration" refers to the effective impurity concentration and refers to the difference between the impurity concentrations of the coexisting P-type impurities and N-type impurities. The following impurity concentrations are only examples, and the regions described in the exemplary embodiments are not limited to the ranges of the following impurity concentrations.

[0113] For example, in one embodiment, the impurity concentration of region 204 is 1×10 15 Up to 1×10 20 cm -3 , and the impurity concentration of region 206 is within 5×10 16 Up to 2×10 18 cm -3 The impurity concentration of region 206 is set to a predetermined value or more, thereby making it easy for region 206 to be used as a part of APD 201. The impurity concentration of region 206 is set to a predetermined value or less, thereby making it easy for region 206 to be electrically separated from region 204. In another embodiment, the impurity concentration of region 208 is within a range of 2×10 16 Up to 2×10 17 cm -3The impurity concentration of region 208 is set to a predetermined value or more, thereby making it easy for region 208 to function as a part of APD 201. The impurity concentration of region 208 is set to a predetermined value or less, thereby making it easy for a part of region 208 to be depleted up and down through region 208 when the photoelectric conversion device 100 operates. The impurity concentration of region 233 is determined based on the distance between regions 204 and 206 and the impurity distribution in regions 204 and 206. Therefore, in one embodiment, the impurity concentration of region 233 is, for example, 2×10 16 Up to 2×10 18 cm -3 , but this range varies depending on the conditions, and the impurity concentration of each of the regions 209 and 230 is, for example, 5×10 16 Up to 2×10 18 cm -3 In another embodiment, the impurity concentration of region 232 is, for example, 1×10 19 Up to 1×10 20 cm -3 As described above, it is not important whether region 207 is of P type or N type. For example, by doping N type impurities into a portion of region 233, region 207 is formed as having an impurity concentration of, for example, 5×10 16 cm -3 When the photoelectric conversion device 100 operates, the region 233 is depleted, but the potential of the portion of the region 207 in the depletion region 233 becomes low for electrons, and this portion becomes a conduction path for electrons. If the semiconductor substrate 250 before the ion implantation is P-type, there may also be a case where a portion of the semiconductor substrate 250 located between the regions 204 and 206 is the P-type region 233 without doping the P-type impurity ions used to form the region 233.

[0114] Although in Fig.13 In the embodiment, the impurity concentrations of regions 204 and 232 are different, but region 204 can be formed with a high impurity concentration comparable to that of region 232, and impurities may not be doped into a region equivalent to region 232. When region 232 is formed, region 207 can be naturally formed by pulling the tail of the N-type impurity distribution in the depth direction.

[0115] Also, with the configuration of the present exemplary embodiment, similarly to the configurations shown in the first exemplary embodiment and the second exemplary embodiment, the carrier multiplication factor when avalanche breakdown occurs can be reduced.

[0116] Therefore, the present exemplary embodiment exerts an effect of solving each of the above-mentioned problems of light emission crosstalk, change in dark current, and power consumption. In addition, due to the presence of region 232, even in the case where the size of pixel 104 is small, it is possible to effectively apply the configuration of the present exemplary embodiment in which regions 204, 207, and 206 overlap each other. In addition, with the configuration in which regions 204, 207, and 206 overlap each other, it is possible to prevent an increase in manufacturing processes and further reduce variations in characteristics.

[0117] Next, refer to Fig.15 , a photoelectric conversion device 100 according to a fourth exemplary embodiment of the present disclosure is described. Fig.15 is a cross-sectional view of a photoelectric conversion unit 102 disposed in a pixel 104 according to the present exemplary embodiment. Fig.13 The photoelectric conversion device 100 according to the third exemplary embodiment shown in FIG. 1 is different in that the region 233 has a ring shape, wherein the central portion of the region 233 is hollow in a plan view. Except for this difference and the points described below, the present exemplary embodiment is substantially similar to the third exemplary embodiment, and therefore, descriptions of similar parts are occasionally omitted. The circuit diagram and SPAD operation according to the present exemplary embodiment are also similar to those of the reference 1. Figure 5 as well as Fig. 7A and Figure 7B The circuit diagram in the described operation is similar to the SPAD operation.

[0118] Fig.16 2 is a diagram illustrating a method for forming the region 233 of the photoelectric conversion unit 102 disposed in the pixel 104 according to the present exemplary embodiment. Fig.16 In the embodiment, a resist 240 is disposed on a semiconductor substrate 250. The resist 240 is used to form the regions 204, 206, and 233. The P-type impurity ions 241 are ions used to form the region 233.

[0119] According to a general semiconductor manufacturing process, after the resist 240 is applied to the entire surface of the semiconductor substrate 250 , the resist 240 in the region overlapping with the regions 204 and 206 in plan view is partially removed by etching.

[0120] Next, a region 204 corresponding to the first cathode is formed by shallowly implanting N-type impurity ions. A region 206 corresponding to the second cathode is formed by implanting N-type impurity ions at a predetermined depth. Fig.16As shown in , a ring-shaped region 233 is formed by obliquely injecting P-type impurity ions 241 into the interface of the semiconductor substrate 250 while rotating the semiconductor substrate 250. The hollow portion is an N-type semiconductor or a P-type semiconductor with a low impurity concentration. By controlling the impurity concentration of the region 190, the impurity concentration of the region 233, and the diameter of the hollow portion, it is possible to form a desired region 207.

[0121] In order to form a P-type or N-type region 207 having a low impurity concentration by doping N-type impurities into the region 233, the amount of N-type impurities doped per unit area needs to be almost equal to the amount of P-type impurities in the region 233. For example, if the P-type impurity concentration of the region 233 is 1×10 17 / cm 3 The impurity concentration of the N-type impurity to be doped to form the region 207 is 1.1×10 17 / cm 3 , then the formation has 1×10 16 / cm 3 concentration of N-type region 207. The combined concentration is 2.1×10 17 / cm 3 The P-type and N-type impurity ions are doped to a concentration of 1×10 16 / cm 3 If the region 207 is a cube with a side length of 0.3 μm, then there is a concentration of 1.1×10 17 ×(0.3×10 -4 ) to the cube of N-type impurity ions, that is, 2970 N-type impurity ions. Similarly, there are 2700 P-type impurity ions in region 207. Then, the effective number of N-type impurity ions is (2970-2700), that is, 270. These numbers are averages, and the actual numbers are different. Statistics show that the standard deviation of the variation is the root of the average. In this case, the variation in the total number of P-type and N-type impurity ions is the root of (2970+2700), that is, about 75. That is, relative to the average value of 270 for the effective number of N-type impurity ions, the standard deviation of the variation is 75. Therefore, even in a system with a 1×10 16 / cm 3 In the case of an N-type carrier conduction path with a concentration of , if the N-type carrier conduction path is represented by a change equivalent to the change in the standard deviation, then the concentration is also 1±0.28×10 16 / cm 3, and a very large change has occurred. The reason for this large change is the coexistence of many P-type impurity ions and many N-type impurity ions in region 207 as described above. If a large change occurs in region 207 among many pixels 104, that is, the resistance value of region 207 is greatly different with respect to each pixel 104, then the effect of the aspect of the embodiment is reduced in actual operation. However, according to this exemplary embodiment, there are only a small amount of impurities in the hollow portion at the center of region 233, which is region 207. If the numerical value in the above example is applied, there is only an average value of 270 N-type impurity ions in region 207. The standard deviation of the change of 270 N-type impurity ions is the root of 270, that is, about 16, and is greatly reduced compared with the standard deviation of the change in the above example (that is, 75). Therefore, according to this exemplary embodiment, the change of characteristics between many pixels is small, and similar to the first exemplary embodiment to the third exemplary embodiment, this exemplary embodiment plays an effect of solving each of the three problems-that is, light emission crosstalk, change of dark current, and power consumption when many photons are incident.

[0122] Next, refer to Fig.17 , a photoelectric conversion device 100 according to a fifth exemplary embodiment of the present disclosure is described. Fig.17 is a cross-sectional view of a photoelectric conversion unit 102 disposed in a pixel 104 according to the present exemplary embodiment. Fig.13 The photoelectric conversion device 100 according to the third exemplary embodiment shown in FIG. 1 is different in that the photoelectric conversion unit 102 includes regions 238 and 239. Except for this difference and the points described below, the present exemplary embodiment is substantially similar to the third exemplary embodiment, and therefore, descriptions of similar parts are occasionally omitted. The circuit diagram and SPAD operation according to the present exemplary embodiment are also similar to those of the reference 1. Figure 5 as well as Fig. 7A and Figure 7B The circuit diagram in the described operation is similar to the SPAD operation.

[0123] Region 238 is a P-type region formed in a wider range than region 233, and surrounds region 233 in a plan view at a depth equivalent to the depth of region 233 in a cross-sectional view. Region 239 is an N-type region formed in a wider range than region 206, and surrounds region 206 in a plan view at a depth equivalent to the depth of region 206 in a cross-sectional view. Regions 233 and 206 have shapes that overlap with region 204 in a plan view. Regions 238 and 239 have shapes that overlap each other in a plan view. Although the following description is given on the premise that the regions have the above-mentioned shapes, the regions are not limited to these shapes.

[0124] The region 207 may be formed by doping an N-type impurity into a portion of the region 233. However, in this case, as described in the fourth exemplary embodiment, if the impurity concentration of the region 233 is high, the characteristics of the region 207 may vary greatly. In order to reduce the large variation in characteristics, in one embodiment, the concentration of the P-type impurity of the region 233 is reduced. However, it may be difficult to reduce the concentration of the P-type impurity of the region 233 without causing variation.

[0125] Fig.16 The diagram shows a state where P-type impurity ions 241 for forming a ring-shaped region 233 are obliquely implanted into a semiconductor substrate 250 after regions 204 and 206 are formed in the opening portion of the resist 240. However, it is not easy to form a ring shape with high precision. Therefore, basically, a uniform region 233 is formed by implanting P-type impurity ions 241 almost vertically into a semiconductor substrate 250. When regions 204 and 206 are formed, an N-type impurity layer with a significant concentration is deposited between regions 204 and 206, that is, in a region where region 233 should be formed. Therefore, in order to form a region 233 that exceeds the concentration of N-type impurities and electrically separates regions 204 and 206, a situation in which a larger amount of P-type impurities is to be doped may occur. When region 206 is formed, this problem occurs. Generally speaking, if impurity ions are implanted, a certain distribution appears in the depth direction of the semiconductor substrate. Therefore, also when region 206 is formed, a certain N-type impurity distribution appears on the shallower side of the peak of region 206. However, this problem is caused by another mechanism.

[0126] Generally speaking, when forming a semiconductor element, it is repeated to form a desired opening portion in the resist and then to implant the impurity ions into the process in the semiconductor substrate. Basically, in one embodiment, only the impurity ions entering the opening portion of the resist are selectively doped into the semiconductor substrate. However, if the area of ​​the opening is small and the energy for implanting the impurity ions is high to form an element in the deep part, the phenomenon that some impurity ions implanted into the resist enter the opening portion is significant. That is, the ions implanted into the resist and having relatively high energy travel in the depth direction inside the resist while gradually losing kinetic energy. These impurity ions move randomly in the planar direction, and therefore, the impurity ions implanted at the position close to the opening of the resist may reach the opening portion of the resist and enter the semiconductor substrate in the opening portion. This impurity ion loses some kinetic energy when the impurity ion reaches the opening portion of the resist, and the impurity ion as a whole is deposited on the shallower side of the desired depth. Many such unwanted impurity ions are generated near the boundary of the opening portion of the resist. If the area of ​​the opening of the resist is large, such unwanted impurity ions affect the vicinity of the boundary of the opening of the resist. However, if the area of ​​the opening is small, such unwanted impurity ions actually enter the entire area of ​​the opening of the resist.

[0127] When N-type impurity ions are implanted to form region 206, the above situation occurs, and the unwanted N-type impurity ions that pass through the resist are deposited on the shallower side of the depth at which region 206 is formed, that is, in the region where region 233 should be formed. Therefore, more P-type impurity ions are used to form region 233. In the portion where region 207 is formed, many P-type and N-type impurity ions coexist, and as described in the fourth exemplary embodiment, this may cause large non-uniformity in the characteristics of region 207. A method for facilitating reduction of such large variations in the characteristics of region 207 is described below.

[0128] In the present exemplary embodiment, the impurity concentration of region 206 is reduced, thereby reducing the amount of N-type ions implanted when forming region 206. Unnecessary N-type impurity ions that enter the region where region 233 should be formed are also reduced in proportion to the implantation amount. On the other hand, region 206, which is equivalent to the second cathode, plays a role in forming APD 201 together with region 208, and therefore uses a minimum impurity concentration. Therefore, region 239, which has a planar area wider than region 206, plays a part in forming region 206. Region 239 is formed by implanting N-type impurity ions under almost the same energy conditions as those for implanting N-type impurity ions used to form region 206. Thus, it is possible to reduce the amount of N-type impurity ions used to form region 206.

[0129] For example, assuming that the amount per unit area of ​​N-type impurity ions used for region 206 is 1×10 13 / cm 2 Then, the amount of N-type impurity ions implanted to form the region 206 is 6×10 12 / cm 2 , and the amount of N-type impurities implanted to form region 239 is 4×10 12 / cm 2 In one embodiment, the N-type impurity ions to be doped into the region 206 by combining the two implantation amounts are 1×10 13 / cm 2 , which is the amount used. In one embodiment, when the region 239 is formed, the unwanted N-type impurity ions that pass through the resist only affect the vicinity of the boundary of the region of the region 239 and hardly enter the region of the region 233. Therefore, the region 206 is formed together with the region 239, so that it is possible to reduce the amount of unwanted N-type impurity ions that enter the region of the region 233. Therefore, it is possible to reduce the amount of P-type impurity ions to be doped to form the region 233, that is, the amount of N-type impurity ions to be doped to form the region 207. Therefore, it is possible to reduce the non-uniformity in the characteristics of the region 207. When the photoelectric conversion device 100 operates, in one embodiment, in the region 239, the region outside the region 206 is depleted. This is because, if this is not the case, the capacitance of the PN junction of the region 206 increases, and the reduction of the carrier multiplication factor when avalanche occurs, which is the original purpose of the aspect of the embodiment, is at least partially destroyed.

[0130] Fig.18 is formed Fig.17 238 and 239 of the processing pixel shown in FIG. After the ions are implanted into the regions 204, 206 and 233, the heat treatment is performed without performing the heat treatment. Fig.18 The processing shown in Fig.18 , a resist 242 having a region where the region 238 is formed as an opening is disposed on a semiconductor substrate 250. The arrow indicates the implantation direction of P-type impurity ions 243 for forming the region 238. After the region 238 is formed, next, N-type impurity ions for forming the region 239 are implanted using the same resist 242.

[0131] It is known that, in general, if the impurity ions are injected parallel to the crystal axis of the semiconductor substrate, the ions are channelized and deeply penetrate into the semiconductor substrate beyond the desired depth in the semiconductor substrate. Usually, the direction perpendicular to the surface of the semiconductor substrate is also the direction of the crystal axis, so if the impurity ions are injected in the direction perpendicular to the surface of the semiconductor substrate, channelization occurs. On the other hand, the crystal structure of the semiconductor region doped with the impurity ions at a high concentration partially collapses, and the semiconductor region is partially amorphized. Therefore, even if the impurity ions are injected into the amorphized region, channelization is prevented due to the collapse of the crystal axis.

[0132] exist Fig.18 In the process of , ions have been implanted into regions 204, 206 and 233. In particular, the ions have a density of about 1×10 18 cm -3 Impurity ions of a high concentration of or higher are doped into region 204, and this portion is amorphized. If P-type impurity ions for forming region 238 are implanted in this state, channeling is prevented in the portion of region 204 in the plan view, while channeling occurs in other portions. The P-type impurity ions deeply enter the portion where channeling occurs, and some of the P-type impurity ions also reach region 239. Therefore, the effective N-type impurity concentration of region 239 is reduced, and region 239 may be depleted in this portion. On the other hand, in the portions of regions 204 and 206 in the plan view, the proportion of P-type impurity ions reaching the depth of region 206 is small, and the effective N-type impurity concentration of region 206 does not decrease much. Therefore, the portion for forming Fig.18 The method of the region 238 shown in selectively reduces the N-type impurity concentration of the region 239 other than the portion of the regions 204 and 206 in plan view, thereby enabling this portion to be depleted when the photoelectric conversion device 100 operates.

[0133] Fig.19 The depth-direction distribution of impurity ions in regions 204, 238, and 239 is shown. Between the two distributions of impurity ions in region 238, the solid line indicates the distribution in the portions of regions 204 and 206 on the planar layout. The dotted line indicates the distribution in the other portions, and indicates that the distribution largely extends to region 239.

[0134] The P-type impurity concentration of region 233 is based on Fig.16 The process shown in FIG. 1 is the implantation of P-type impurities and Fig.18 The sum of the P-type impurities implanted in the process shown in is determined. However, there may also be Fig.16, and the like. The case where the P-type impurity is not implanted in the process shown in . In order to prevent channeling, the N-type impurity ion implantation into the region 206 or 239 may be implanted in an inclined direction slightly deviating from the direction of the axis perpendicular to the surface of the semiconductor substrate 250. In this way, the characteristics of the APD 201 formed by the regions 206 and 208 are excellent, and the impurity distribution in the region 239 other than the region 206 largely overlaps with the impurity distribution in the region 238. Therefore, this region is likely to be depleted in actual operation.

[0135] exist Fig.18 After the processes of forming region 238 and forming region 239 shown in FIG. are completed, region 207 is formed. Region 207 may be formed in the same process as region 232, or may be formed in a different process from region 232. In the case of different processes, as shown in FIG. Fig.14 As shown in , regions 207 and 232 may be disposed at positions that do not overlap each other in a plan view. There may also be a case where the N-type impurity concentration of region 204 is set to a very high concentration and region 232 is not formed. Region 232 may be formed slightly deeply, thereby also forming region 207 at the same time.

[0136] Also with the configuration of this exemplary embodiment, similar to the configurations shown in the first to fifth exemplary embodiments, it is also possible to reduce the carrier multiplication factor when avalanche breakdown occurs. According to this exemplary embodiment, after the variation in characteristics is reduced, this exemplary embodiment exerts an effect of solving each of the three problems - namely, light emission crosstalk, changes in dark current, and power consumption when many photons are incident.

[0137] Next, refer to Fig. 20 , describing the SPAD operation according to the sixth exemplary embodiment of the present disclosure. Fig. 20 is an equivalent circuit diagram of a portion of the photoelectric conversion unit 102 and the signal processing circuit 103. Fig. 20 In the configuration shown in Fig. 7A Compared to the equivalent circuit shown in , transistor 234 is added. Transistor 234 is an N-type MOS transistor. The gate electrode of transistor 234 is connected to node B. If node B becomes high, transistor 234 is turned on and sets the potentials of nodes A and D to a potential level at which APD201 does not cause avalanche breakdown. In other words, transistor 234 is used as a setting circuit, which sets the potentials of regions 204 and 206 to a potential at which avalanche breakdown does not occur in the photoelectric conversion unit 102 when the waveform shaping circuit 210 (detection circuit) detects avalanche breakdown. Fig. 20 In the configuration shown in , if transistor 234 is turned on, the potentials of regions 204 and 206 become 0 V, which is a ground level.

[0138] In the first exemplary embodiment to the fifth exemplary embodiment, as Figure 7B As shown in , since the multiplication factor when avalanche breakdown occurs is reduced, the potentials of nodes A and D maintain a high potential even after avalanche breakdown occurs. Therefore, if photons are further incident in this state, further avalanche breakdown may occur, and the potentials of nodes A and D may become lower potentials due to the discharge caused by the avalanche current. In this case, node B is already at a high level by the incidence of the first photon, and the state of node B will not change due to the incidence of the second photon or subsequent photons. That is, the avalanche breakdown caused by the incidence of the second photon or subsequent photons is not detected as a signal, and unwanted electron-hole pairs are generated.

[0139] Therefore, in Fig. 20 The transistor 234 is disposed in the circuit shown in . If avalanche breakdown occurs due to the incidence of a single photon during one cycle of the periodic reset pulse input to the node C, the signal of the node B emitted from the waveform shaping circuit 210 becomes a high level, which indicates that the avalanche breakdown is detected. Therefore, the transistor 234 is turned on, and the nodes A and D become ground levels. Therefore, even if a subsequent photon is incident before the next reset pulse is input to the node C, avalanche breakdown does not occur in the APD 201. That is, the occurrence of avalanche breakdown is reduced to the required minimum.

[0140] The present exemplary embodiment is effective in the case where the transistor 203 operates as a reset circuit for resetting the potential of the region 204 (node ​​A) and the region 206 (node ​​D) to a predetermined potential. When the nodes A and D are reset by the transistor 234 (the transistor 234 is turned on), no electron-hole pairs are generated in the APD 201. The reset of the transistor 234 is by discharge of a potential difference of about 2V to the ground level. Therefore, the required electric energy is much smaller than the electric energy required for discharge of a potential difference of about 20 to 30V to a large negative potential VL when avalanche breakdown occurs.

[0141] According to the present exemplary embodiment, in addition to reducing the carrier multiplication factor when avalanche breakdown occurs, it is also possible to prevent unwanted avalanche breakdown from occurring within one cycle of a reset pulse periodically input to the node C. Therefore, compared with the first to fifth exemplary embodiments, the present exemplary embodiment has a greater effect of solving the problems of light emission crosstalk, changes in dark current, and power consumption.

[0142] Next, refer to Figures 21 to 23A and Fig. 23B , a photoelectric conversion device 100 according to a seventh exemplary embodiment of the present disclosure is described. Fig.21is a plan view of the photoelectric conversion unit 102 disposed in the pixel 104 according to the present exemplary embodiment. Fig. 22 It is along AB Fig.21 2 is a cross-sectional view of the photoelectric conversion unit 102 shown in FIG. Fig.21 yes Fig. 22 2 is a plan view of a main surface 251 of a semiconductor substrate 250 shown in FIG. Fig.23A An equivalent circuit diagram of a part of the photoelectric conversion unit 102 and the signal processing circuit 103 is illustrated. Fig. 23B FIG. 1 shows a potential change of each of nodes A to D and node E in SPAD operation. The positions of nodes A to D are related to Fig. 7A Node E is a node connected to the gate electrode 235 of the transistor 237.

[0143] exist Fig.21 and Fig. 22 In the configuration shown in , region 206 can constitute a part of the main surface 251 of the semiconductor substrate 250. In addition, the photoelectric conversion unit 102 includes a transistor 237, which causes each of regions 204 and 206 to function as a source region or a drain region and causes region 207 to function as a channel region. Transistor 237 is an N-type MOS transistor. Transistor 237 includes a gate electrode 235 and a gate insulating film 236 disposed between the gate electrode 235 and the main surface 251 of the semiconductor substrate 250. Since region 190 is substantially depleted when the photoelectric conversion device 100 operates, whether a channel region (region 207) is formed directly below the gate electrode 235 is determined by controlling the potential of the gate electrode 235. Therefore, conduction between regions 204 and 206 is controlled by transistor 237. As shown in FIG. Fig.23A As shown in the equivalent circuit diagram in , the transistor 237 is disposed between a node D connected to the cathode of the APD 201 and a node A connected to the cathode of the parasitic PD 232 .

[0144] Next, refer to Fig. 23B , describing the SPAD operation according to the present exemplary embodiment. A pulse that periodically turns on the transistor 237 is input to the node E connected to the gate electrode 235 of the transistor 237. Therefore, the transistor 237 becomes conductive in a predetermined cycle. A reset pulse is input to the node C in the same cycle as the node E. Therefore, the transistor 203 used as a reset circuit for resetting the potential of the regions 204 and 206 to a predetermined potential (potential VH) resets the potential of the regions 204 and 206 in the same cycle as the transistor 237.

[0145] At time t0, the reset of nodes A and D ends. When transistor 237 is turned on by inputting a pulse to node E, a reset pulse is input to node C, and transistor 203 is turned on. Therefore, the reset starts, and not only the potential of region 204 (node ​​A) is reset, but also the potential of region 206 (node ​​D) is reset. Next, transistor 237 is turned off, and then transistor 203 is turned off. Therefore, nodes A and D enter a floating state at the potential VH.

[0146] At time t1, if a photon is incident, avalanche breakdown occurs in APD 201. Then, the potential of region 206 (node ​​D) decreases to near the ground level, and avalanche multiplication stops. At this time, the discharge capacitance of node D with a small capacitance is small, so the carrier multiplication factor is small. At time t2, node D remains in a floating state at the potential where avalanche multiplication stops.

[0147] Next, at time t3, node E becomes high and transistor 237 is turned on. Therefore, nodes A and D become conductive, and the potentials of nodes A and D change to the same potential. The potential of node A decreases, and the potential of node D increases, but the capacitance added to node A is large, and the capacitance added to node D is small. Therefore, the change in the potential of node A is small. The waveform shaping circuit 210 (detection circuit) detects avalanche breakdown based on the potential of node A (region 204) when transistor 237 becomes conductive.

[0148] Therefore, the determination threshold for the waveform shaping circuit 210 is set to an appropriate value so that the waveform shaping circuit 210 can detect a small change in the potential of the node A, thereby detecting avalanche breakdown in the APD 201 .

[0149] At time t4, if the potential of node C becomes low and transistor 203 is turned on, nodes A and D are reset again. Next, at time t5, if the potential of node C becomes high, nodes A and D return to the state at time t0 again.

[0150] In the present exemplary embodiment, the carrier multiplication factor when avalanche breakdown occurs can be reduced to be smaller than that of the first exemplary embodiment to the fifth exemplary embodiment. In the configurations shown in the first exemplary embodiment to the fifth exemplary embodiment, nodes A and D are always electrically connected to each other to a certain extent via the region 207 used as a resistor. Therefore, when avalanche breakdown occurs in the APD 201, some discharge occurs at the node A having a large capacitance. On the other hand, in the present exemplary embodiment, when the transistor 237 is turned off and the channel region is not generated, the electrical conduction between the nodes A and D can be almost completely disconnected. Therefore, when avalanche breakdown occurs in the APD 201, discharge occurs at the node D having a small load capacitance.

[0151] Consider the case where multiple photons are incident during one cycle in which transistor 203 (reset circuit) performs reset. Even in this case, in the present exemplary embodiment, the potential of node D is sufficiently reduced to approximately ground level due to the avalanche breakdown that occurs due to the first incident photon. Therefore, avalanche breakdown does not occur due to the incidence of the second photon or subsequent photons. Therefore, in the present exemplary embodiment, it is not necessary to deploy transistor 234 as shown in the third exemplary embodiment.

[0152] According to the present exemplary embodiment, it is possible to further reduce the carrier multiplication factor when avalanche breakdown occurs compared to the above exemplary embodiment. Therefore, the present exemplary embodiment exerts the effect of further solving each of the above three problems, namely, light emission crosstalk, change in dark current, and power consumption.

[0153] Next, a photoelectric conversion device 100 according to an eighth exemplary embodiment of the present disclosure is described. This exemplary embodiment can also be said to be a modification of the seventh exemplary embodiment. Fig.21 and Fig. 22 Similar to the configuration shown in , APD 201 and parasitic PD 232 are connected together through transistor 237.

[0154] On the other hand, in this embodiment, if Fig.24 As shown in FIG. 2 , as a detection circuit for detecting avalanche breakdown, a comparator 220 is used instead of the waveform shaping circuit 210 . Node A is connected to the “−” input terminal of the comparator 220 . Node F is connected to the “+” input terminal of the comparator 220 .

[0155] Next, refer to Fig.25 , describing the SPAD operation according to the present exemplary embodiment. In the present exemplary embodiment, in a single signal detection operation (an operation between two consecutive reset pulses input to the node C), the photoelectric conversion device 100 operates to count the number of incident photons and performs signal processing in response to the incidence of multiple photons.

[0156] like Fig.25 As shown in , also in the present exemplary embodiment, similarly to the seventh exemplary embodiment, a pulse is periodically input to the node E, and the transistor 237 is turned on in a predetermined cycle. On the other hand, unlike the seventh exemplary embodiment, a reset pulse is not input to the node C in the same cycle as the node E, and a reset pulse that resets the potentials of the regions 204 and 206 is input each time the transistor 237 becomes turned on a predetermined number of times. Fig.25 In the example shown in , if the pulse is input to the node E four times, then a single reset pulse is input to the node C. When the reset pulse is input to the node C, the relationship between the reset pulse input to the node C and the pulse input to the node E may be similar to Fig. 23BThe relationship shown in .

[0157] During one cycle of inputting a reset pulse to the node C, a pulse that turns on the transistor 237 multiple times is periodically input to the node E. Fig.25 In the example shown in , photons are incident at times t1, t2, and t3. This is the incidence in the first, third, and fourth cycles among the four cycles in which a pulse is input to node E during one cycle in which a reset pulse is input to node C. Even if photons are incident and avalanche breakdown occurs in APD 201, transistor 237 becomes conductive due to the input of a pulse to node E, and the potential of node D (region 206) rises. Therefore, three avalanche breakdowns occur in APD 201 in response to the corresponding three incident photons. Each time transistor 237 is turned on, the potential of node A decreases. Therefore, the potential of node A decreases by an amount corresponding to the total discharge amount in the avalanche breakdown that occurs three times. The potential of node A from time t4 to time t5 is a potential that has dropped by an amount corresponding to the total discharge amount in the avalanche breakdown that occurs three times. The capacitance added to APD 201 (region 206) is small, and the discharge amount in the avalanche breakdown that occurs once is small. Therefore, the present exemplary embodiment uses the fact that avalanche breakdown can occur multiple times in the APD 201 even in a case where the node A (and the node D) are not reset to the potential VH.

[0158] Fig.25 Nodes F and B from time t4 to time t5 are illustrated in an enlarged manner. Step-shaped potentials V0, V1, V2, V3, and V4 are input to node F connected to the "+" input terminal of the comparator 220. Vn (n = 0, 1, 2, 3, 4) is a potential corresponding to the number of times avalanche breakdown occurs during one cycle of a reset pulse input to node C. Each value is set so that if Vn (where n ≥ k) in response to avalanche breakdown occurring k times is input to node F, node B corresponding to the output of the comparator 220 is reversed from high to low.

[0159] Generally speaking, current always flows through the comparator 220 when the comparator 220 operates, and therefore, the comparator 220 can operate during the period from time t4 to time t5. During the current shutoff period other than the period from time t4 to time t5, the potential of the node B can also be set to high. Since the circuit configuration of this comparator is very general, the details are not described again.

[0160] exist Fig.25In the example shown in , at time t6 when node F becomes V3, node B is reversed. Therefore, it is determined that the number of times avalanche breakdown occurs is three times. As described above, before transistor 237 becomes conductive a predetermined number of times and transistor 203 (reset circuit) resets the potentials of nodes A and D, comparator 220 (detection circuit) generates a multi-value signal according to the potential of node A. Therefore, in a single signal detection operation (operation between two consecutive reset pulses input to node C), it is possible to count the number of avalanche breakdowns that occur multiple times by the incidence of multiple photons.

[0161] The present exemplary embodiment is not limited to Fig.24 The configuration shown in . There may also be a circuit configuration in which a constant current is not applied when the comparator 220 operates. There may also be a case in which the connection between the parasitic PD 232 and the APD 201 is a region 207 used as a resistor as in the first exemplary embodiment and the second exemplary embodiment. In the case where the region 207 is used as a resistor, it is possible to deploy an N-type transistor whose source region is connected to the node A and whose drain region is connected to the "-" input terminal of the comparator 220 between the "-" input terminal of the comparator 220 and the node A, and the gate electrode of the N-type transistor is set to a constant potential. Using the saturation region operation of this transistor, discharge is performed from the drain region by the avalanche breakdown occurring in the APD 201. As long as the saturation region operation is maintained, a potential change corresponding to the total amount of discharged charge caused by the avalanche current corresponding to the avalanche breakdown occurring multiple times occurs in the drain region. The comparator 220 can detect the change in the potential of the drain region and count the number of times the avalanche breakdown occurs.

[0162] The numerical value counted by the comparator 220 and the number of avalanche breakdowns that actually occur do not necessarily match each other. A circuit is included that converts an analog quantity, that is, the total amount of discharge charge generated by multiple avalanche breakdowns that occur, into a digital quantity. For example, a digital signal "1" may correspond to "2.5" avalanche breakdowns that occur in the APD 201. That is, the conversion gain obtained by dividing the digital signal by the number of avalanche breakdowns that actually occur may also take a value other than 1. If the conversion gain is set small, it is possible to use a small digital signal to represent a large number of avalanche breakdowns.

[0163] In addition, for example, instead of the comparator 220, a circuit equivalent to a source follower may be connected to the node A. In this case, the circuit connected to the node A may have a configuration used in a read circuit of a so-called complementary metal oxide semiconductor (CMOS) sensor that performs analog-to-digital (AD) conversion on the output of the source follower.

[0164] As reference Figure 2As described, in general, in SPAD, the number of times avalanche breakdown occurs is added using the counter circuit 211 in each pixel 104. The maximum count value is determined based on the number of bits of the counter circuit 211. Since the size of the pixel 104 is limited, the number of bits of the counter that can be formed is also limited. Therefore, if the conversion gain obtained by dividing the digital signal by the number of avalanche breakdowns that actually occur is reduced, it is possible to handle the incidence of a larger number of photons. That is, it is possible to increase the saturation signal of the pixel 104. In particular, in the case where the number of incident photons is large, this reduction in conversion gain can be effective.

[0165] According to the present exemplary embodiment, similar to the seventh exemplary embodiment, it is possible to reduce the carrier multiplication factor when avalanche breakdown occurs. That is, the present exemplary embodiment exerts the effect of solving the above-mentioned three problems - namely, light emission crosstalk, change in dark current and power consumption. Compared with the seventh exemplary embodiment, it is also possible to reduce the period of the reset pulse input to the node C. Therefore, it is possible to reduce the power consumption required for the drive pulse (reset pulse).

[0166] In addition, as mentioned above, it is also possible to increase the saturation signal of the pixel.

[0167] Application examples of the photoelectric conversion device 100 according to each of the exemplary embodiments described above are described below. Fig.26 Schematic diagram of equipment EQP equipped with photoelectric conversion device 100. Fig.26 As shown in , the photoelectric conversion device 100 is accommodated in a semiconductor package PKG. The package PKG may include a base to which the photoelectric conversion device 100 is fixed, a cover (such as glass) opposite to the photoelectric conversion device 100, and a conductive connection member (such as a bonding wire or a bump) connecting a terminal provided in the base and a terminal provided in the photoelectric conversion device 100. The equipment EQP may also include at least any one of a control device CTRL, a processing device PRCS, a display device DSPL, and a storage device MMRY.

[0168] The optical system OPT forms an image on the pixel array 101, and may be, for example, a lens, a shutter, or a reflector. The control device CTRL controls the operation of the photoelectric conversion device 100, and may be a semiconductor device such as an application-specific integrated circuit (ASIC). The processing device PRCS processes a signal output from the photoelectric conversion device 100, and may be a semiconductor device such as a central processing unit (CPU) or an ASIC. The display device DSPL may be an electroluminescent (EL) display device or a liquid crystal display device that displays data obtained by the photoelectric conversion device 100. The storage device MMRY may be a magnetic device or a semiconductor device that stores data obtained by the photoelectric conversion device 100. The storage device MMRY may be a volatile memory such as a static random access memory (SRAM) or a dynamic random access memory (DRAM), or a non-volatile memory such as a flash memory or a hard disk drive. The machine device MCHN may include a movable unit or a propulsion unit, such as a motor or an engine. For example, the machine device MCHN drives components of the optical system OPT to perform zoom, focus, or shutter operations. The equipment EQP displays data output from the photoelectric conversion apparatus 100 on the display device DSPL or transmits data output from the photoelectric conversion apparatus 100 to the outside using a communication device (not shown) included in the equipment EQP. To this end, the equipment EQP may include a storage device MMRY or a processing device PRCS.

[0169] The equipment EQP incorporating the photoelectric conversion device 100 can also be applied to a vehicle camera or a surveillance camera mounted on transportation equipment such as an automobile, a railway vehicle, a ship, an airplane, or an industrial robot. In addition, the equipment EQP incorporating the photoelectric conversion device 100 can be applied not only to transportation equipment but also to equipment that widely uses object recognition, such as an intelligent transportation system (ITS).

[0170] The equipment EQP is applicable to electronic devices, such as information terminals (e.g., smart phones or wearable terminals) or cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, or surveillance cameras) with imaging functions. The equipment EQP may also be transportation equipment, such as vehicles, ships, or airplanes. The equipment EQP as a transportation equipment is applicable to transportation equipment that transports the photoelectric conversion device 100, or transportation equipment that assists and / or automates driving (manipulation) through imaging functions. The processing device PRCS for assisting and / or automating driving (manipulation) may perform processing to operate the machine device MCHN as a mobile device based on information obtained by the photoelectric conversion device 100. Alternatively, the equipment EQP may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office device such as a copier, or an industrial device such as a robot.

[0171] According to the above-described exemplary embodiment, it is possible to provide a technique that is advantageous for reducing the multiplication factor. Therefore, if the photoelectric conversion device 100 according to the present exemplary embodiment is used in equipment EQP, it is also possible to improve the value of the equipment.

[0172] The present disclosure is not limited to the above exemplary embodiments, and can be changed and modified in various ways without departing from the spirit and scope of the present disclosure. Therefore, the appended claims disclose the scope of aspects of the embodiments.

[0173] The disclosure of this specification includes the following photoelectric conversion devices and equipment.

[0174] (Item 1)

[0175] A photoelectric conversion device in which a photoelectric conversion unit is disposed on a semiconductor substrate including a first main surface and a second main surface located on an opposite side of the first main surface,

[0176] The photoelectric conversion unit comprises:

[0177] a first region of a first conductivity type, the first region constituting a portion of the first major surface and connected to a detection circuit configured to detect avalanche breakdown;

[0178] a second region of the first conductivity type, the second region being disposed away from the first region;

[0179] a third region of a second conductivity type opposite to the first conductivity type, the third region being disposed at a position closer to the second major surface than the first region and the second region; and

[0180] a fourth region disposed between the first region and the second region, wherein the second region and the third region function as an avalanche photodiode, and

[0181] The first region and the second region are configured to be conductively connected to each other via the fourth region.

[0182] (Item 2)

[0183] The photoelectric conversion device according to item 1, wherein the first region and the third region do not function as avalanche photodiodes.

[0184] (Item 3)

[0185] The photoelectric conversion device according to item 1 or 2, wherein a distance between the second region and the third region is shorter than a distance between the first region and the third region.

[0186] (Item 4)

[0187] A photoelectric conversion device in which a photoelectric conversion unit is disposed on a semiconductor substrate including a first main surface and a second main surface located on an opposite side of the first main surface,

[0188] The photoelectric conversion unit includes:

[0189] a first region of a first conductivity type, the first region constituting a portion of the first major surface and connected to a detection circuit configured to detect avalanche breakdown;

[0190] a second region of the first conductivity type, the second region being disposed away from the first region;

[0191] a third region of a second conductivity type opposite to the first conductivity type, the third region being disposed closer to the second major surface than the first region and the second region; and

[0192] a fourth area, the fourth area being deployed to connect the first area and the second area,

[0193] The distance between the second area and the third area is shorter than the distance between the first area and the third area.

[0194] (Item 5)

[0195] The photoelectric conversion device according to any one of items 1 to 4, wherein the impurity concentration of the fourth region is lower than the impurity concentrations of the first region and the second region.

[0196] (Item 6)

[0197] The photoelectric conversion device according to any one of items 1 to 5,

[0198] wherein the photoelectric conversion unit further includes a fifth region between the third region and the second main surface, the impurity concentration of the fifth region being lower than the impurity concentrations of the first region and the second region, and

[0199] The charges generated in the fifth region by incidence of light flow into the second region through a depletion region formed in a region of the third region overlapping with the second region in orthogonal projection onto the first major surface.

[0200] (Item 7)

[0201] The photoelectric conversion device according to any one of items 1 to 6, wherein the fourth region includes a region of the first conductivity type.

[0202] (Item 8)

[0203] The photoelectric conversion device according to item 7, wherein the fourth region functions as a resistor connecting the first region and the second region.

[0204] (Item 9)

[0205] The photoelectric conversion device according to item 8, wherein the fourth region functions as a resistor of 20 kΩ or more.

[0206] (Item 10)

[0207] The photoelectric conversion device according to any one of items 1 to 9, wherein the second region constitutes a part of the first major surface.

[0208] (Item 11)

[0209] The photoelectric conversion device according to any one of items 1 to 9, wherein the second region is disposed between the first region and the third region.

[0210] (Item 12)

[0211] A photoelectric conversion device according to any one of items 1 to 11, wherein the photoelectric conversion unit further includes a setting circuit configured to set the potential of the first region and the second region to a potential at which avalanche breakdown does not occur in the photoelectric conversion unit when the detection circuit detects avalanche breakdown.

[0212] (Item 13)

[0213] The photoelectric conversion device according to any one of items 1 to 12, wherein the photoelectric conversion unit further includes a reset circuit configured to reset the potentials of the first region and the second region to a predetermined potential.

[0214] (Item 14)

[0215] The photoelectric conversion device according to any one of items 1 to 6,

[0216] wherein the second region constitutes part of the first major surface,

[0217] wherein the photoelectric conversion unit further includes a transistor configured so that each of the first region and the second region functions as a source region or a drain region and configured so that the fourth region functions as a channel region, and

[0218] The transistor controls conduction between the first region and the second region.

[0219] (Item 15)

[0220] The photoelectric conversion device according to item 14,

[0221] The photoelectric conversion unit further includes a reset circuit configured to reset the potentials of the first region and the second region to a predetermined potential.

[0222] wherein the transistor becomes conductive in a predetermined period, and

[0223] The reset circuit resets the potentials of the first region and the second region in the same cycle as that of the transistor.

[0224] (Item 16)

[0225] The photoelectric conversion device according to item 15, wherein the detection circuit detects the avalanche breakdown based on the potential of the first region in a case where the transistor becomes conductive.

[0226] (Item 17)

[0227] The photoelectric conversion device according to item 14,

[0228] The photoelectric conversion unit further includes a reset circuit configured to reset the potentials of the first region and the second region to a predetermined potential.

[0229] wherein the transistor becomes conductive in a predetermined period, and

[0230] The reset circuit resets the potentials of the first region and the second region each time the transistor becomes conductive a predetermined number of times.

[0231] (Item 18)

[0232] The photoelectric conversion device according to item 17, wherein the detection circuit generates a digital signal according to the potential of the first region before the transistor becomes conductive a predetermined number of times and the reset circuit resets the potentials of the first region and the second region.

[0233] (Item 19)

[0234] The photoelectric conversion device according to any one of items 15 to 18, wherein the reset circuit starts resetting the potentials of the first region and the second region when the transistor is turned on.

[0235] (Item 20)

[0236] The photoelectric conversion device according to item 11, wherein the photoelectric conversion unit further includes a sixth region of the second conductivity type, the sixth region including at least a region overlapping the first region and the second region in a plan view, the sixth region being disposed at a depth between the first region and the second region.

[0237] (Item 21)

[0238] The photoelectric conversion device according to item 20, wherein the fourth region is surrounded by the sixth region in a plan view, has a depth almost the same as that of the sixth region, and is a second conductivity type region having an impurity concentration lower than that of the sixth region or a first conductivity type region.

[0239] (Item 22)

[0240] A device comprising:

[0241] The photoelectric conversion device according to any one of items 1 to 21; and

[0242] A processing device is configured to process a signal output from the photoelectric conversion device.

[0243] According to the present invention, it is possible to provide a technique that is advantageous for reducing the multiplication factor.

[0244] While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

Claims

1. A device in which a photoelectric conversion unit is disposed on a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface located on an opposite side of the first surface, The photoelectric conversion unit comprises: a first region of a first conductivity type, the first region constituting a portion of the first surface and connected to a detection circuit configured to detect avalanche breakdown; a second region of the first conductivity type, the second region being disposed away from the first region; a third region of a second conductivity type opposite to the first conductivity type, the third region being disposed closer to the second surface than the first region and the second region; as well as a fourth area, the fourth area being disposed between the first area and the second area, wherein the second region and the third region function as an avalanche photodiode, and The first region and the second region are configured to be electrically connected to each other via the fourth region. 2 . The device according to claim 1 , wherein an impurity concentration of the fourth region is lower than impurity concentrations of the first region and the second region. The device of claim 1 , wherein the first region and the third region do not function as avalanche photodiodes. 4 . The device according to claim 1 , wherein a distance between the second area and the third area is shorter than a distance between the first area and the third area.

5. A device in which a photoelectric conversion unit is disposed on a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface located on an opposite side of the first surface, The photoelectric conversion unit comprises: a first region of a first conductivity type, the first region constituting a portion of the first surface and connected to a detection circuit configured to detect avalanche breakdown; a second region of the first conductivity type, the second region being disposed away from the first region; a third region of a second conductivity type opposite to the first conductivity type, the third region being disposed closer to the second surface than the first region and the second region; as well as a fourth area, the fourth area being deployed to connect the first area and the second area, The distance between the second area and the third area is shorter than the distance between the first area and the third area. 6 . The device according to claim 5 , wherein an impurity concentration of the fourth region is lower than impurity concentrations of the first region and the second region.

7. The device according to claim 1, wherein the photoelectric conversion unit further includes a fifth region between the third region and the second surface, the impurity concentration of the fifth region being lower than the impurity concentrations of the first region and the second region, and The charges generated in the fifth region by incidence of light flow into the second region through a depletion region formed in a region of the third region overlapping with the second region in an orthogonal projection onto the first surface. The device of claim 1 , wherein the fourth region comprises a region of the first conductivity type. 9 . The device of claim 8 , wherein the fourth region functions as a resistor connecting the first region and the second region. 10 . The device according to claim 9 , wherein the fourth region functions as a resistor of 20 kΩ or more. The device according to claim 1 , wherein the second area constitutes a part of the first surface. 12 . The apparatus of claim 1 , wherein the second area is disposed between the first area and the third area.

13. The device according to claim 1, wherein the photoelectric conversion unit further comprises a setting circuit, wherein the setting circuit is configured to set the potentials of the first region and the second region to potentials at which avalanche breakdown does not occur in the photoelectric conversion unit when the detection circuit detects avalanche breakdown. 14 . The device according to claim 1 , wherein the photoelectric conversion unit further comprises a reset circuit configured to reset the potentials of the first region and the second region to a predetermined potential.

15. The device according to claim 1, wherein the second area constitutes a part of the first surface, wherein the photoelectric conversion unit further includes a transistor configured to cause each of the first region and the second region to function as a source region or a drain region and configured to cause the fourth region to function as a channel region, and The transistor controls conduction between the first region and the second region.

16. The device according to claim 15, wherein the photoelectric conversion unit further includes a reset circuit configured to reset the potentials of the first region and the second region to a predetermined potential, wherein the transistor becomes conductive in a predetermined period, and The reset circuit resets the potentials of the first region and the second region in the same cycle as that of the transistor. 17 . The apparatus of claim 16 , wherein the detection circuit detects avalanche breakdown based on a potential of the first region if the transistor becomes conductive.

18. The device according to claim 15, wherein the photoelectric conversion unit further includes a reset circuit configured to reset the potentials of the first region and the second region to a predetermined potential, wherein the transistor becomes conductive in a predetermined period, and The reset circuit resets the potentials of the first region and the second region each time the transistor becomes conductive a predetermined number of times. 19 . The device according to claim 18 , wherein the detection circuit generates a digital signal according to the potential of the first region before the transistor becomes conductive the predetermined number of times and the reset circuit resets the potentials of the first region and the second region.

20. The device according to claim 16, wherein the reset circuit starts resetting the potentials of the first region and the second region when the transistor is turned on.

21. The device according to claim 12, wherein the photoelectric conversion unit further includes a sixth region of the second conductivity type, the sixth region at least including a region overlapping the first region and the second region in a plan view, and the sixth region is disposed at a depth between the first region and the second region.

22. A device according to claim 21, wherein the fourth region is surrounded by the sixth region in a plan view, has a depth almost the same as that of the sixth region, and is a region of the second conductivity type having an impurity concentration lower than that of the sixth region or a region of the first conductivity type.

23. An apparatus comprising: The device according to claim 1; as well as A processing device is configured to process a signal output from the device.

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