Three-machine synchronization method and system

Abstract

The invention discloses a three-machine synchronization method and system. The three-machine synchronization method comprises the following steps: detecting whether an external frequency scale is normal or not; if the external frequency scale signal is abnormal, the three machines are switched to the internal frequency scale at the same time; after the three machines are switched to the internal frequency marks at the same time, the three machines carry out internal frequency mark signal transmission; performing validity judgment on internal frequency scale periods of the left and right machines according to respective internal frequency scale signals sent by the left and right machines; and performing signal interruption processing on the internal frequency scale signal according to the validity judgment result. According to the three-machine synchronization method provided by the invention, the defect that the cycle of a counter frequency mark synchronization method is slightly changed is overcome, the interruption generated by the internal frequency marks of the three machines can be accurately synchronized, and the synchronization method is simple.

Description

Technical Field

[0001] This application relates to the field of rockets, and specifically, to a method and system for triple-machine synchronization. Background Art

[0002] In some fields with high requirements for reliability, triple-machine redundancy is often used to improve the reliability of the system. The triple machines refer to three CPUs with the same underlying logic and upper-layer application software. The upper-layer application software needs to receive periodic interrupt signals. Normally, the triple machines use the same external frequency standard to generate interrupt signals. Since the triple machines use the same external frequency standard, the synchronization of the interrupts generated by the triple machines can be guaranteed. However, when the external frequency standard is abnormal, the triple machines need to switch to the internal frequency standard to generate interrupt signals. The internal frequency standard is independently generated by each of the triple machines. Although the internal frequency standard follows the external frequency standard when the external frequency standard is normal and can compensate for the period difference caused by the abnormality when the external frequency standard just becomes abnormal, if the three CPUs use their respective independent crystal oscillators as clock sources and run for a long time, the internal frequency standards of the triple machines will become asynchronous, and then the interrupts generated by the triple machines will also become asynchronous. Therefore, it is necessary to synchronize the interrupts generated by the internal frequency standards of the triple machines. The traditional method is to synchronize the internal frequency standards of the triple machines, and the interrupts generated by them will also be synchronized after the internal frequency standards are synchronized. The synchronization of the internal frequency standards of the triple machines is carried out by adjusting the frequency standard counters of each machine. That is, each of the triple machines has a frequency standard period counter, and when the counter value reaches the set value, the internal frequency standard signal of the local machine is generated. At the same time, the local machine receives the internal frequency standard signals of the other two machines. When the local machine finds that the internal frequency standard signal generated by the local machine is earlier than the other two machines, the counter value of the local machine is reduced to extend the period of the local machine; when the local machine finds that the internal frequency standard signal generated by the local machine is later than the other two machines, the counter value of the local machine is increased to shorten the period of the local machine; when the local machine finds that the internal frequency standard signal generated by the local machine is between the other two machines, the counter of the local machine is adjusted to be in the middle position between the other two machines. The goal of internal frequency standard synchronization can be achieved through several adjustments. However, since the counter value of the local machine needs to be continuously adjusted during operation, it will cause a slight change in the period of the local machine, making the period of the local machine unstable.

[0003] Therefore, how to provide a method for accurately synchronizing the interrupts generated by the internal frequency standards of the triple machines has become an urgent problem to be solved in this field. Summary of the Invention

[0004] This application proposes a method for triple-machine synchronization, including the following steps: detecting whether the external frequency standard is normal; if the external frequency standard signal is abnormal, the triple machines simultaneously switch to the internal frequency standard; after the triple machines simultaneously switch to the internal frequency standard, the triple machines perform internal frequency standard signal transmission; judging the validity of the internal frequency standard periods of the left and right machines according to the internal frequency standard signals sent by the left and right machines; and performing signal interruption processing on the internal frequency standard signals according to the validity judgment result.

[0005] The method of three-machine synchronization as described above, wherein if the external frequency standard is normal, the external frequency standard is used.

[0006] The method of three-machine synchronization as described above, wherein the three machines include the local machine, the left machine, and the right machine; the internal frequency standard signal transmission among the three machines includes that the local machine sends its own internal frequency standard signal to the left and right machines, and at the same time receives the respective internal frequency standard signals sent by the left and right machines.

[0007] The method of three-machine synchronization as described above, wherein the validity discrimination of the internal frequency standard periods of the left and right machines includes performing validity discrimination on the internal frequency standard periods of the left and right machines according to the respective internal frequency standard signals sent by the left and right machines.

[0008] The method of three-machine synchronization as described above, wherein the signal interruption processing according to the validity discrimination result includes: if the internal frequency standard periods of the left and right machines are both valid, an interruption is generated after the internal frequency standard signals of the local machine, the left machine, and the right machine arrive.

[0009] A three-machine synchronization system, specifically including: a detection unit, an internal frequency standard switching unit, an internal frequency standard signal transmission unit, a validity discrimination unit, and an interruption processing unit; the detection unit is used to detect whether the external frequency standard is normal; if the external frequency standard signal is abnormal, the internal frequency standard switching unit switches the three machines to the internal frequency standard simultaneously; the internal frequency standard signal transmission unit is used for the three machines to perform internal frequency standard signal transmission; the validity discrimination unit is used to perform validity discrimination on the internal frequency standard periods of the left and right machines according to the respective internal frequency standard signals sent by the left and right machines; the interruption processing unit is used to perform signal interruption processing on the internal frequency standard signals according to the validity discrimination result.

[0010] The method of three-machine synchronization as described above, which further includes an external frequency standard using unit; if the external frequency standard is normal, the external frequency standard using unit uses the external frequency standard.

[0011] The method of three-machine synchronization as described above, wherein the three machines include the local machine, the left machine, and the right machine; the internal frequency standard signal transmission among the three machines in the internal frequency standard signal transmission unit includes that the local machine sends its own internal frequency standard signal to the left and right machines, and at the same time receives the respective internal frequency standard signals sent by the left and right machines.

[0012] The method of three-machine synchronization as described above, wherein the validity discrimination unit performs validity discrimination on the internal frequency standard periods of the left and right machines includes performing validity discrimination on the internal frequency standard periods of the left and right machines according to the respective internal frequency standard signals sent by the left and right machines.

[0013] The method for three-machine synchronization as described above, wherein the interrupt processing unit performs signal interruption processing according to the validity discrimination result, including: if the internal frequency standard periods of the left and right machines are both valid, an interruption is generated after the internal frequency standard signals of the local machine and the left and right machines arrive.

[0014] The present application has the following beneficial effects:

[0015] The method for three-machine synchronization proposed by the present application overcomes the defect of the tiny change in the period of the counter frequency standard synchronization method, can accurately synchronize the interruptions generated by the internal frequency standards of the three machines, and the synchronization method is simple. This synchronization method has been actually tested, and the interruption periods generated by the internal frequency standards of the three machines after synchronization are stable. Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings.

[0017] Figure 1 is a flowchart of the method for three-machine synchronization provided by an embodiment of the present application;

[0018] Figure 2 is a schematic diagram of the interconnection relationship of the internal frequency standards of the three machines provided by an embodiment of the present application;

[0019] Figure 3 is a timing diagram of the normal generation of interruptions by the internal frequency standards of the left and right machines provided by an embodiment of the present application;

[0020] Figure 4 is a schematic diagram of the internal structure of the three-machine synchronization system provided by an embodiment of the present application. Detailed Embodiments

[0021] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of them. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0022] The present application overcomes the defect of the tiny change in the period of the counter frequency standard synchronization method, can accurately synchronize the interruptions generated by the internal frequency standards of the three machines, and the synchronization method is simple. This synchronization method has been actually tested, and the interruption periods generated by the internal frequency standards of the three machines after synchronization are stable.

[0023] Embodiment 1

[0024] AsFigure 1 As shown, the method for three-machine synchronization provided by the embodiment of the present application specifically includes the following steps:

[0025] Step S110: Detect whether the external frequency standard is normal.

[0026] If the external frequency standard is normal, execute step S120; otherwise, execute step S130.

[0027] The method for detecting whether the external frequency standard is normal is to determine whether the period of the external frequency standard is too long or too short. If it is too long or too short, the external frequency standard is considered abnormal; otherwise, it is considered normal.

[0028] Step S120: Use the external frequency standard.

[0029] Step S130: The three machines simultaneously switch to the internal frequency standard.

[0030] The period of the internal frequency standard is the same as that of the original normal external frequency standard.

[0031] Specifically, the three machines include CPU1 (the local machine), CPU2 (the left machine), and CPU3 (the right machine). The interconnection relationship of the internal frequency standards in the three machines is as Figure 2 shown. The local machine sends internal frequency standard signals to the left and right machines and simultaneously receives the internal frequency standard signals from the left and right machines.

[0032] Step S140: After the three machines simultaneously switch to the internal frequency standard, the three machines perform internal frequency standard signal transmission.

[0033] Among them, the local machine sends its own internal frequency standard signal to the left and right machines and simultaneously receives the respective internal frequency standard signals sent by the left and right machines.

[0034] Step S150: After the internal frequency standard signal transmission, perform validity discrimination on the internal frequency standard periods of the left machine and the right machine.

[0035] Among them, the validity of the internal frequency standard periods of the left machine and the right machine is discriminated according to the respective internal frequency standard signals sent by the left machine and the right machine.

[0036] Step S160: Perform signal interruption processing according to the validity discrimination result.

[0037] Among them, if the internal frequency standard periods of the left and right machines are both valid, an interruption is generated after the internal frequency standard signals of the local machine, the left machine, and the right machine arrive. As Figure 3 shown, it is the interruption timing diagram when the internal frequency standards of the left and right machines are normal.

[0038] If the left machine is determined to be invalid, an interruption is generated after the internal frequency standard signals of the local machine and the right machine arrive.

[0039] If the right device is determined to be invalid, an interruption is generated after waiting for the internal frequency standard signals of the local device and the left device.

[0040] It should be noted that if the left and right devices are determined to be invalid, they cannot be restored to valid, and the internal frequency standard signals of the invalid left or right device will no longer be waited for later.

[0041] If the internal frequency standards of both the left and right devices are invalid, an interruption is generated according to the internal frequency standard of the local device.

[0042] In this embodiment, a synchronization method of generating interruptions simultaneously after waiting for all is adopted, which can monitor the validity of the internal frequency standards of the left and right devices. If the left device and / or the right device is invalid, it will no longer wait, and at the same time, it can automatically compensate for the cycle fluctuations caused by waiting for invalid signals.

[0043] Embodiment 2

[0044] As Figure 4 shown, this embodiment provides a three-device synchronization system, which specifically includes: a detection unit 410, an external frequency standard usage unit 420, an internal frequency standard switching unit 430, an internal frequency standard signal transmission unit 440, a validity discrimination unit 450, and an interruption processing unit 460.

[0045] The detection unit 410 is used to detect whether the external frequency standard is normal.

[0046] If the external frequency standard is normal, the external frequency standard usage unit 420 is executed; otherwise, the internal frequency standard switching unit 430 is executed.

[0047] The method for detecting whether the external frequency standard is normal is to judge whether the period of the external frequency standard is too long or too short. If it is too long or too short, the external frequency standard is considered abnormal; otherwise, the external frequency standard is considered normal.

[0048] The external frequency standard usage unit 420 is used for using the external frequency standard.

[0049] The internal frequency standard switching unit 430 is used to switch the three devices to the internal frequency standard simultaneously.

[0050] Among them, the period of the internal frequency standard is the same as the period of the original normal external frequency standard.

[0051] Specifically, the three devices include CPU1 (local device), CPU2 (left device), and CPU3 (right device). The interconnection relationship of the internal frequency standards in the three devices is as Figure 2 shown. The local device sends internal frequency standard signals to the left and right devices and simultaneously receives the internal frequency standard signals of the left and right devices.

[0052] The internal frequency standard signal transmission unit 440 is used for transmitting internal frequency standard signals among the three devices after the three devices are simultaneously switched to the internal frequency standard.

[0053] Among them, the local machine sends its own internal frequency standard signal to the left and right machines, and at the same time receives the internal frequency standard signals sent by the left and right machines respectively.

[0054] The validity discrimination unit 450 is used to discriminate the validity of the internal frequency standard periods of the left machine and the right machine after the internal frequency standard signals are transmitted.

[0055] Among them, the validity of the internal frequency standard periods of the left machine and the right machine is discriminated according to the internal frequency standard signals sent by the left machine and the right machine respectively.

[0056] The interruption processing unit 460 is used to perform signal interruption processing according to the validity discrimination result.

[0057] Among them, if the internal frequency standard periods of the left and right machines are both valid, an interruption is generated after the internal frequency standard signals of the local machine, the left machine, and the right machine arrive. As Figure 3 shown, it is the normal interruption timing diagram of the internal frequency standards of the left and right machines.

[0058] If the left machine is determined to be invalid, an interruption is generated after the internal frequency standard signals of the local machine and the right machine.

[0059] If the right machine is determined to be invalid, an interruption is generated after the internal frequency standard signals of the local machine and the left machine.

[0060] It should be noted that if the left machine and the right machine are determined to be invalid, they cannot be restored to be valid, and the internal frequency standard signals of the invalid left machine or right machine will no longer be waited for later.

[0061] If the internal frequency standards of the left and right machines are both invalid, an interruption is generated according to the internal frequency standard of the local machine.

[0062] In this embodiment, the synchronous method of generating interruptions simultaneously after waiting for all signals to arrive is adopted, which can monitor the validity of the internal frequency standards of the left and right machines. If the left machine and / or the right machine is invalid, it will no longer wait, and at the same time, it can automatically compensate for the cycle fluctuations caused by waiting for invalid signals.

[0063] This application has the following beneficial effects:

[0064] The three-machine synchronization method proposed by this application overcomes the defect of the slight change in the cycle of the counter frequency standard synchronization method, can accurately synchronize the interruptions generated by the internal frequency standards of the three machines, and the synchronization method is simple. This synchronization method has been actually tested, and the interruption cycle generated by the internal frequency standards in the three machines is stable after synchronization.

[0065] Although the examples referred to in the current application are described, they are only for the purpose of explanation and not a limitation to this application. Changes, additions, and / or deletions to the implementation manners can be made without departing from the scope of this application.

[0066] As described above, it is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims described above.

Claims

1. A method for synchronizing three machines, characterized in that: The following steps are involved: Check whether the external frequency standard is normal; If the external frequency standard signal is abnormal, the three machines will switch to the internal frequency standard at the same time; After the three machines switch to the internal frequency standard at the same time, the three machines transmit the internal frequency standard signal; According to the internal frequency mark signals sent by the left and right machines, the validity of the internal frequency mark periods of the left and right machines is judged; The internal frequency standard signal is interrupted according to the validity judgment result.

2. The method for three-machine synchronization as claimed in claim 1, characterized in that: If the external frequency standard is normal, use the external frequency standard.

3. The method for three-machine synchronization as claimed in claim 1, characterized in that: The three machines include this machine, the left machine and the right machine; The internal frequency mark signal transmission among the three machines includes: this machine sends its own internal frequency mark signal to the left and right machines, and at the same time receives the respective internal frequency mark signals sent by the left and right machines.

4. The method for three-machine synchronization as claimed in claim 1, characterized in that: Judging the validity of the internal frequency mark periods of the left and right machines includes judging the validity of the internal frequency mark periods of the left and right machines according to the respective internal frequency mark signals sent by the left and right machines.

5. The method for three-machine synchronization as claimed in claim 4, characterized in that: Signal interrupt processing based on validity determination results includes: If the internal frequency mark periods of the left and right machines are both valid, an interrupt will be generated after the internal frequency mark signals of this machine and the left and right machines arrive at the same time.

6. A three-machine synchronization system, characterized in that: Specifically include: Detection unit, internal frequency standard switching unit, internal frequency standard signal transmission unit, validity determination unit and interrupt processing unit; A detection unit, used to detect whether the external frequency standard is normal; If the external frequency standard signal is abnormal, the internal frequency standard switching unit switches the three machines to the internal frequency standard at the same time; An internal frequency standard signal transmission unit is used for internal frequency standard signal transmission among three machines; A validity determination unit, used for determining the validity of the internal frequency mark periods of the left and right machines according to the respective internal frequency mark signals sent by the left and right machines; The interrupt processing unit is used to perform signal interrupt processing on the internal frequency standard signal according to the validity judgment result.

7. The three-machine synchronization system according to claim 6, characterized in that: Also includes an external frequency standard using unit; If the external frequency standard is normal, the external frequency standard using unit uses the external frequency standard.

8. The three-machine synchronization system according to claim 6, characterized in that: The three machines include this machine, a left machine and a right machine; the internal frequency standard signal transmission unit includes the following: this machine sends its own internal frequency standard signal to the left and right machines, and receives the respective internal frequency standard signals sent by the left and right machines.

9. The three-machine synchronization system according to claim 6, characterized in that: The validity judging unit judges the validity of the internal frequency mark periods of the left and right machines, including judging the validity of the internal frequency mark periods of the left and right machines according to the respective internal frequency mark signals sent by the left and right machines.

10. The three-machine synchronization system according to claim 9, characterized in that: The interrupt processing unit performs signal interrupt processing according to the validity judgment result, including: If the internal frequency mark periods of the left and right machines are both valid, an interrupt will be generated after the internal frequency mark signals of this machine and the left and right machines arrive at the same time.

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