Peripheral interface framework system and method easy to develop and transplant

Abstract

The invention discloses a peripheral interface framework system and method easy to develop and transplant, and the system comprises a peripheral equipment driving module which is used for interacting with peripheral equipment and providing data transmission and reception; the serial interface core module is connected with the peripheral equipment driving module and is used for receiving a peripheral equipment driving request and selecting an adaptive serial interface adaptive module to perform equipment communication; and the serial interface adaptation module is connected with the serial interface core module through an interface bus and is used for managing the interface bus and configuring an interface register and a pin. According to the main technical scheme and effects, the system has the beneficial effects that each module of the system can be independently developed and tested by dividing the framework system into a plurality of layers; due to the hierarchical design, other parts of the system cannot be influenced when the peripheral equipment is newly added or modified, so that the development process is greatly simplified, and the development efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of interfaces, and in particular, to a peripheral interface framework system and method that are easy to develop and transplant. Background Art

[0002] With the rapid development of microelectronics technology, computer technology has been rapidly and widely integrated with various industries and deeply embedded, making embedded applications increasingly widespread, with diverse embedded product forms and ubiquitous presence. It has also led to an increasing number of functions and types of embedded-related components, as well as an increasing complexity. SPI (Serial Peripheral Interface), as an efficient serial communication protocol, is widely used to connect microcontrollers with various peripheral devices, such as sensors, memories, displays, etc.

[0003] Although the SPI protocol itself is relatively simple, its implementation on different hardware platforms varies significantly. For example, the SPI register configurations, interrupt handling methods, and driver interface of different microcontrollers may all be different, which results in the need to rewrite a large amount of underlying code when implementing the SPI function on a new platform, increasing the development difficulty and maintenance cost. Summary of the Invention

[0004] Object of the Invention: The object of the present invention is to solve the defect of great difficulty in implementing serial communication on a new platform in the prior art, and to provide a peripheral interface framework system and method that are easy to develop and transplant, which realizes hiding hardware details, enables the SPI interface to be easily transplanted on different hardware platforms, and provides a set of standardized SPI interfaces, enabling application programs to seamlessly switch between different platforms.

[0005] Technical Solution:

[0006] In a first aspect, the present application proposes a peripheral interface framework system that is easy to develop and transplant, including:

[0007] A peripheral device driver module, which is used to interact with peripheral devices and provide data sending and receiving;

[0008] A serial interface core module, which is connected to the peripheral device driver module and is used to receive requests from the peripheral device driver and select an appropriate serial interface adapter module for device communication;

[0009] A serial interface adapter module, which is connected to the serial interface core module through an interface bus and is used to manage the interface bus, configure interface registers, and pins;

[0010] The processor interface module is connected to the serial interface adaptation module and is used to define the pins used by all serial interfaces and the processing operations for the corresponding pin level changes, so that the serial interface adaptation module can implement the control of each interface bus through the pin definition and level processing provided by the processor interface module.

[0011] Preferably, the serial interface core module decouples the peripheral device from the serial interface adaptation module by providing a unified interface.

[0012] Preferably, it includes at least one serial interface adaptation module, which is used to manage the bus, complete the initialization of the interface bus and the sending and receiving operations of data, and provide a unified interface for the serial interface core module to call.

[0013] Preferably, the serial interface adaptation module is connected to multiple interface buses. Each serial interface adaptation module corresponds to one interface bus, can configure the interface register and the pins of each bus according to the requirements of different peripheral devices, and supports different interface modes.

[0014] Preferably, the peripheral device driver module communicates with the serial interface adaptation module by calling the unified interface provided by the serial interface core module and realizes the data sending and receiving operations.

[0015] Preferably, the serial interface core module passes the device information provided by the peripheral device driver module to the serial interface adaptation module through parameter passing, so as to realize the communication of different devices.

[0016] Preferably, when the peripheral device driver module performs a read operation, it first sends a read command and address information through the serial interface adaptation module, then sends dummy data, and then receives the returned actual data.

[0017] Preferably, the serial interface adaptation module distinguishes multiple interface buses by using different interface bus numbers and supports parallel communication using multiple interface buses in a system at the same time.

[0018] Preferably, the peripheral device driver module can initiate specific communication operations through the serial interface core module, including sending device commands, data addresses, and data contents, and performing data processing when receiving.

[0019] This application proposes a method for an easily developed and portable peripheral interface framework, including the following steps:

[0020] Step 1: Divide the framework system into multiple layers, namely the peripheral device driver module, the serial interface core module, the serial interface adaptation module, and the processor interface module;

[0021] Step 2, when adding a new peripheral device, first determine the bus number used by the current peripheral device according to the hardware. At the same time, define the pins and related functions used by the peripheral device in the processor interface module. After completion, add the chip select pin definition on its corresponding bus, and add the index of its pins in the interface bus in the peripheral device driver module;

[0022] Step 3, during transplantation, according to the target hardware platform, implement interface register configuration and interrupt handling in the serial interface adaptation module. Define all the key pins defined in the processor interface module according to the latest hardware, and replace their pin definitions accordingly in the serial interface adaptation module.

[0023] Beneficial effects: By dividing the framework system into multiple layers (such as the peripheral device driver module, the serial interface core module, the serial interface adaptation module, and the processor interface module), each module of the system can be developed and tested independently. When adding or modifying a peripheral device, it will not affect other parts of the system, thus greatly simplifying the development process and improving the development efficiency;

[0024] When it is necessary to transplant to different hardware platforms, only need to configure the underlying hardware abstraction parts such as interface registers and interrupt handling in the adaptation module, and adjust the pin definitions according to the hardware of the target platform. This enables the same software framework to be used on different hardware platforms, reducing the complexity of transplantation;

[0025] This framework can encapsulate the specific hardware details in the serial interface adaptation module and the processor interface module, so that the upper-layer applications and peripheral device driver modules do not need to care about the hardware implementation. In this way, developers can focus on the implementation of higher-layer functions without caring about the details of the hardware layer. In this way, the hardware platform of the system can be flexibly replaced, and peripheral devices can be quickly connected without affecting the upper-layer application code;

[0026] When adding a new peripheral device, the framework simplifies the process of peripheral device access by automatically determining the bus number used and defining the pins and related functions in the processor interface module. Developers only need to define the necessary pins and chip select pins according to the hardware platform to complete the access of the device, avoiding manual handling of complex hardware connections and configurations;

[0027] In the serial interface adaptation module, it supports parallel communication through multiple interface buses simultaneously, can flexibly meet the needs of different peripheral devices, and increases the scalability and compatibility of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the framework structure provided by the present invention;

[0029] Figure 2Schematic diagram of the framework process structure for the present invention. Detailed implementation manners

[0030] To make the technical solution of the present invention clearer, the following further describes the present invention in detail with specific embodiments in conjunction with the accompanying drawings.

[0031] Embodiment 1

[0032] To make the purpose, technical solution and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meaning understood by those of ordinary skill in the art in the field to which the present invention belongs. The words such as "including" used herein mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0033] Regarding the problems existing in the prior art, as Figure 1 shown, an easily developed and transplanted peripheral interface framework system includes:

[0034] A peripheral device driver module, used to interact with peripheral devices and provide data sending and receiving;

[0035] A serial interface core module, connected to the peripheral device driver module, used to receive requests from the peripheral device driver and select an appropriate serial interface adapter module for device communication;

[0036] A serial interface adapter module, connected to the serial interface core module through an interface bus, used to manage the interface bus, configure interface registers and pins;

[0037] A processor interface module, connected to the serial interface adapter module, used to define all the pins used by the serial interface and the processing operations for the corresponding pin level changes, so that the serial interface adapter module can control each interface bus through the pin definitions and level processing provided by the processor interface module.

[0038] Specifically, the system clearly separates functional modules such as peripheral device drivers, serial interface cores, serial interface adapters, and processor interfaces. Each module works independently and can be replaced. Such a modular design not only ensures the flexibility of the system but also enhances the reusability and scalability of each part. The interaction between the peripheral device driver module and the underlying hardware (such as the SPI bus) is achieved through the serial interface core module. The device driver layer does not need to concern itself with the specific implementation method of the underlying interface. Developers only need to focus on the development of device functions and do not need to consider too many details of hardware control. The design of the processor interface module and the serial interface adapter module enables the system to adapt to different hardware platforms and interface standards. By configuring different pin definitions and level change processing, it can support different processors and interface hardware, greatly enhancing the portability of the system. Through the intermediary role of the serial interface core module, the peripheral device driver module can communicate with a variety of SPI adapters and peripherals transparently without caring about the specific bus or adapter details, simplifying the complexity of device communication.

[0039] In some specific embodiments, when the peripheral device driver module performs a read operation, it first sends a read command and address information through the serial interface adapter module, then sends dummy data, and finally receives the returned actual data.

[0040] Specifically, the peripheral device driver module sends a read command to the peripheral through the serial interface adapter module, along with the address information of the data to be read. This command tells the peripheral device driver module that a read operation will be performed next and specifies the starting position (address) of the data to be read. In the read operation, in order to synchronize with the peripheral, the driver module then sends a certain length of dummy data. The dummy data is virtual and does not participate in data transmission, but its sending ensures that the peripheral is in the correct state during the reading process and helps to pull the actual data. After sending the read command and dummy data, the peripheral device starts to return the actual data.

[0041] In some specific embodiments, there are a peripheral device driver module (dev) and multiple serial interface adapter modules (SPIadapter).

[0042] Specifically, the relationship between the peripheral device driver module (dev) and multiple serial interface adapter modules (SPI adapter) is connected and coordinated through the serial interface core module (SPI core).

[0043] In some specific embodiments, the peripheral device driver module communicates with the serial interface adapter module by calling the unified interface (interface function) provided by the serial interface core module and realizes data sending and receiving operations.

[0044] Specifically, the peripheral device driver module (dev module) requests read and write operations of data by calling the interface functions (such as SPI_read(dev), SPI_write(dev), etc.) provided by the serial interface core module (SPI core module). When the dev calls the SPI core, it will pass device-related information (such as device selection, SPI adapter selection, data content, etc.) to the SPI core module. The SPI core module provides a unified interface (function interface) for handling the interaction between different devices and SPI adapter modules. This design decouples the device layer from the underlying hardware control, simplifies the development of the dev module, and avoids tight coupling with the hardware implementation.

[0045] In some specific embodiments, the peripheral device driver module can initiate specific communication operations through the serial interface core module, including sending device commands, data addresses, and data content, and performing data processing when receiving.

[0046] Specifically, before sending data, the peripheral device driver module needs to send a device command and the address information of the data, which is usually part of the device protocol requirements. For example, in the operation of reading or writing an external memory (such as Flash), it is necessary to first send a read or write command and attach the storage address of the data. This process can be to send all the data at once or in steps, depending on the protocol requirements of the peripheral device.

[0047] In some specific embodiments, the serial interface core module decouples the peripheral device from the serial interface adapter module by providing a unified interface.

[0048] Specifically, the serial interface core module (SPI core), as the middle layer in the system, plays the role of connecting the peripheral device and the serial interface adapter module. Its main function is to provide a unified interface so that there is no need for direct coupling between the peripheral device driver module (dev) and the specific serial interface adapter module (SPI adapter), thus achieving decoupling;

[0049] Specifically: The peripheral device driver module (dev) is responsible for interacting with the actual hardware peripherals and handling the sending and receiving of specific device commands, data addresses, and data content;

[0050] The serial interface adapter module (SPI adapter) is responsible for interacting with the hardware SPI bus to complete the actual data transmission work; each SPI adapter module corresponds to an SPI bus and is responsible for initializing, configuring the bus parameters, and managing the hardware resources related to the SPI bus (such as pins MISO, MOSI, SCK, CS, etc.);

[0051] The serial interface core module provides a unified interface and achieves decoupling through the following steps:

[0052] Receive device requests: The dev module initiates data read and write operations by calling the interface functions provided by the SPI core (such as SPI_read(dev), SPI_write(dev));

[0053] Select the SPI adaptation module: Based on the requests from the dev module, the SPI core selects the correct SPI adaptation module and communicates with the underlying SPI bus through the SPI adaptation module;

[0054] Unified interface communication: The SPI core provides a set of standardized interface functions to perform all hardware operations. The dev module only needs to call these interfaces to complete data sending and receiving, without caring about the specific details of the SPI bus or the implementation of the SPI adaptation module.

[0055] In some specific embodiments, the serial interface core module passes the device information provided by the peripheral device driver module to the serial interface adaptation module through parameter passing, so as to achieve communication between different devices.

[0056] In some specific embodiments, the serial interface core module provides a unified interface, allowing each peripheral device driver module to perform pin initialization, data sending, and receiving operations of the interface bus according to the selected serial interface adaptation module.

[0057] Specifically, by providing a unified interface, the serial interface core module (SPI core) enables the peripheral device driver module to perform pin initialization, data sending, and receiving operations of the interface bus according to the selected serial interface adaptation module. This design enhances the modularity, flexibility, scalability, and maintainability of the system, simplifies the development work of peripheral device drivers, and through loose coupling and standard interfaces, the system can easily support different devices, SPI buses, and hardware platforms, with strong adaptability and portability.

[0058] In some specific embodiments, each serial interface adaptation module represents one SPI bus, and multiple peripheral devices can be connected to each SPI bus.

[0059] Specifically, by designing that each SPI adaptation module is connected to one SPI bus and multiple peripheral devices can be connected to each bus, the system realizes the reuse of hardware resources, simplifies the hardware design, reduces the development complexity, enhances the scalability of the system, and supports independent communication between multiple devices. Each SPI adaptation module manages one SPI bus and selects different devices for communication through the chip select pin, ensuring the stability and independence of the communication process. This design not only reduces the hardware cost but also improves the flexibility, customizability, and scalability of the system, making it very suitable for embedded systems that require multiple peripherals but have limited hardware resources.

[0060] In some specific embodiments, there is at least one serial interface adaptation module for managing the bus, completing the initialization of the interface bus and the sending and receiving operations of data, and providing a unified interface for the serial interface core module to call.

[0061] Specifically, the serial interface adaptation module is responsible for managing the SPI bus and providing a unified interface for the serial interface core module to call, thus achieving the decoupling and modularization of all levels of the system. Through this design, the system can flexibly configure and manage multiple devices at the hardware level, while providing a simple and unified interface at the application layer, simplifying the development of peripheral device drivers and enhancing the scalability and portability of the system.

[0062] In some specific embodiments, the serial interface adaptation module is connected to multiple interface buses. Each serial interface adaptation module corresponds to one interface bus and can configure the interface registers and the pins of each bus according to the requirements of different peripheral devices, and supports different interface modes.

[0063] Specifically, the serial interface adaptation module is responsible for managing multiple interface buses. Each adaptation module manages one SPI bus and performs corresponding bus configuration according to the requirements of the device. The adaptation module can configure the interface registers for each interface bus, ensuring that each device can meet its respective communication requirements when transmitting data on different SPI buses. The communication of each interface bus requires the use of specific pins, such as MISO (Master In Slave Out), MOSI (Master Out Slave In), SCK (Clock), CS (Chip Select), etc. The serial interface adaptation module is responsible for configuring these pins for each bus and ensuring their correct connection to external devices. The pin configuration also includes selecting different chip select pins for each peripheral device to ensure that different peripherals can be correctly selected for communication under the same bus.

[0064] In some specific embodiments, the serial interface adaptation module differentiates multiple interface buses by using different interface bus numbers and supports parallel communication using multiple interface buses in a system simultaneously.

[0065] Specifically, by assigning a unique serial number to each bus, the serial interface adaptation module enables multiple SPI buses to work simultaneously in the same system, achieving parallel communication. Multiple devices can transmit and receive data on different buses simultaneously, thus greatly improving communication efficiency and reducing communication waiting time.

[0066] In some specific embodiments, the device may include multiple SPI buses. The serial interface adaptation module distinguishes different SPI buses by differentiating the serial numbers. Each SPI adapter is named in a way such as spi_x_adapter.c and spi_x_adapter.h, where x represents the serial number.

[0067] Specifically, the serial interface adaptation module distinguishes different SPI buses by assigning a unique serial number to each SPI bus, such as spi_1_adapter.c and spi_2_adapter.c. Each bus has a corresponding adaptation module file (.c and.h) in the code, where x represents the bus serial number. In this way, the system can independently manage and configure each SPI bus, thus avoiding resource conflicts between different buses;

[0068] The adapter of each SPI bus is defined in the corresponding module file, named in a way such as spi_1_adapter.c and spi_1_adapter.h, so that different SPI bus adapters can be clearly distinguished in the code and managed through a clear modular structure. This naming method can effectively avoid confusion of bus numbers and ensure that each adapter only works with its corresponding SPI bus.

[0069] In some specific embodiments, the serial interface adaptation module, as a bus adapter, includes all the interface buses (SPI buses) of the current device, and selects the MISO, MOSI, CLK, and multiple CS pins according to the pin definitions of the processor interface module to complete the initialization and data transceiver processing of the bus.

[0070] In some specific embodiments, the processor interface module, as the underlying interface of the processor, defines all the pins used by the SPI bus and the processing operations for the changes in pin levels.

[0071] Specifically, as a bus adapter, the serial interface adaptation module manages all SPI buses (multiple SPI buses) on the current device. Operations such as configuration, initialization, data transmission and reception of each SPI bus are responsible by the corresponding adapter module. According to the pin definitions provided by the processor interface module, the SPI adaptation module selects the correct pins for connecting signals such as MISO (Master In Slave Out), MOSI (Master Out Slave In), CLK (clock line), and CS (Chip Select).

[0072] The processor interface module is responsible for defining the pins used by all SPI buses. The serial interface adaptation module configures the pins and initializes the buses according to these definitions. For example, the SPI adapter will correctly configure the MISO, MOSI, CLK, and multiple CS pins to ensure that the SPI bus can work properly. Different peripherals may use different SPI buses. The adapter completes the initialization of each bus by selecting different pins and configuring different signal lines.

[0073] In some specific embodiments, a method for an easily developed and transplanted peripheral interface framework is also proposed. Combining Figure 2 , includes the following steps:

[0074] Step 1: Divide the framework system into multiple layers, namely the peripheral device driver module, the serial interface core module, the serial interface adaptation module, and the processor interface module;

[0075] Step 2: When adding a new peripheral device, first determine the bus number used by the current peripheral device according to the hardware. At the same time, define the pins and related functions used by the peripheral device in the processor interface module. After completion, add the chip select pin definition on its corresponding bus, and add the index of its pins in the interface bus in the peripheral device driver module;

[0076] Step 3: During transplantation, according to the target hardware platform, implement interface register configuration and interrupt handling in the serial interface adaptation module. Define all key pins defined in the processor interface module according to the latest hardware, and replace the pin definitions accordingly in the serial interface adaptation module.

[0077] Specifically, Step 1: Divide the framework system into multiple layers

[0078] Peripheral device driver module: Responsible for communicating with the peripheral device and handling tasks such as data transmission and reception; it serves as a bridge between the application layer and the underlying hardware, providing a unified interface so that the application layer does not need to care about the details of the underlying hardware.

[0079] Serial Interface Core Module: As the middle layer, it coordinates the communication between the peripheral driver module and the serial interface adaptation module by providing a unified interface. It selects a suitable serial interface adaptation module for communication operations according to the device information passed by the peripheral driver module;

[0080] Serial Interface Adaptation Module: This module is responsible for managing and configuring the interface bus, controlling the interface registers, selecting the correct pins, and performing data transmission and reception tasks. Each serial interface adaptation module corresponds to an SPI bus, and multiple peripherals can be configured;

[0081] Processor Interface Module: As the underlying hardware interface, the processor interface module defines the pins of each SPI bus and their level processing. It decouples the hardware details from the upper-layer communication framework, minimizing the impact on the upper-layer applications when the hardware changes;

[0082] Step 2: Operations for Adding Peripheral Devices

[0083] Determine the Bus Number: When adding a peripheral device, it is necessary to determine the SPI bus to which the device is connected according to the hardware design. Each peripheral device needs to select a suitable bus for communication. The system can determine the bus number it uses through the hardware configuration of the device, which is usually related to the connection position of the device in the hardware design;

[0084] Define Pins and Functions: In the processor interface module, according to the hardware requirements of the peripheral device, define the pins of the SPI bus used by the device (such as MISO, MOSI, CLK, and CS pins), which ensures that the device can be correctly connected to the system and communicate through the SPI bus;

[0085] In the device driver module, add the definition of the chip select pin of the device on this bus. The chip select pin is the key pin for selecting the target device among multiple peripherals, and it usually needs to define an independent value for each peripheral;

[0086] Add Pin Index: In the peripheral device driver module, define the index of the pins of the device on this bus. In this way, in subsequent communications, the device driver can refer to the correct pins through the index to complete data transmission and reception tasks;

[0087] Step 3: Transplantation Operations

[0088] Hardware Platform Adaptation: During the transplantation process, it is necessary to modify the configuration of the interface registers in the serial interface adaptation module according to the specific requirements of the target hardware platform. These registers are responsible for configuring the parameters of each SPI bus, including communication rate, data format, etc.;

[0089] All key pin definitions in the processor interface module need to be updated according to the hardware design of the target platform. For example, some hardware platforms may have different SPI pin assignments or may use different level standards;

[0090] Update of pin definitions: During transplantation, the serial interface adaptation module needs to replace the pin definitions therein according to the requirements of the new hardware. The pins defined in the processor interface module (such as MISO, MOSI, CLK, CS, etc.) need to be adjusted according to the connection method of the target hardware platform.

[0091] As described above, it is only the specific implementation manner of the embodiments of the present invention, but the protection scope of the embodiments of the present invention is not limited thereto. Any changes or substitutions within the technical scope disclosed in the embodiments of the present invention should be covered within the protection scope of the embodiments of the present invention. Therefore, the protection scope of the embodiments of the present invention shall be subject to the protection scope of the claims.

Claims

1. A peripheral interface framework system that is easy to develop and transplant, characterized in that: include: Peripheral device driver module, used to interact with peripheral devices and provide data transmission and reception; The serial interface core module is connected to the peripheral device driver module and is used to receive a request from the peripheral device driver and select an adapted serial interface adapter module for device communication; The serial interface adapter module is connected to the serial interface core module through the interface bus and is used to manage the interface bus and configure the interface registers and pins; The processor interface module is connected to the serial interface adapter module and is used to define the pins used by all serial interfaces and the processing operations corresponding to the pin level changes, so that the serial interface adapter module can realize the control of each interface bus through the pin definition and level processing provided by the processor interface module.

2. The system according to claim 1, characterized in that The serial interface core module decouples the peripheral device from the serial interface adapter module by providing a unified interface.

3. The system according to claim 1, characterized in that It includes at least one serial interface adapter module, which is used to manage the bus, complete the initialization of the interface bus and the sending and receiving operations of data, and provide a unified interface for the serial interface core module to call.

4. The system according to claim 1, characterized in that The serial interface adapter module is connected to a plurality of interface buses, each serial interface adapter module corresponds to an interface bus, and can configure the interface registers and the pins of each bus according to the requirements of different peripheral devices, and support different interface modes.

5. The system according to claim 1, characterized in that The peripheral device driver module communicates with the serial interface adapter module by calling the unified interface provided by the serial interface core module, and implements data sending and receiving operations.

6. The system according to claim 1, characterized in that The serial interface core module transmits the device information provided by the peripheral device driver module to the serial interface adapter module through parameter transmission, so as to realize the communication between different devices.

7. The system according to claim 1, characterized in that When the peripheral device driver module performs a read operation, it first sends a read command and address information through the serial interface adapter module, then sends dummy data, and then receives the returned actual data.

8. The system according to claim 1, characterized in that The serial interface adapter module distinguishes multiple interface buses by using different interface bus serial numbers to support using multiple interface buses for parallel communication in a system.

9. The system according to claim 1, characterized in that The peripheral device driver module can initiate specific communication operations through the serial interface core module, including sending device commands, data addresses and data contents, and performing data processing when receiving.

10. A method for easily developing and transplanting a peripheral interface framework, characterized in that: The steps include: Step 1, divide the framework system into multiple levels, namely, peripheral device driver module, serial interface core module, serial interface adapter module, and processor interface module; Step 2, when adding a new peripheral device, first determine the bus number used by the current peripheral device according to the hardware, and define the pins and related functions used by the peripheral device in the processor interface module. After completion, add the chip select pin definition to its corresponding bus, and add the index of its pin in the interface bus in the peripheral device driver module; Step 3, during porting, implement interface register configuration and interrupt handling in the serial interface adapter module according to the target hardware platform, define all key pins defined in the processor interface module accordingly according to the latest hardware, and replace their pin definitions in the serial interface adapter module accordingly.

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