Server scheduling method, device, storage medium and program product
By decomposing the computing tasks into subtasks and using precompiled acceleration template libraries and reconfigurable logic devices to dynamically match and reconstruct hardware resources, the problems of delay and energy consumption in dynamic computing tasks are solved, and computing efficiency and resource utilization are improved.
Patent Information
- Application Number
- CN202510529949.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2045-04-25
AI Technical Summary
In the face of large-scale computing tasks with dynamic changes, the prior art cannot adjust the hardware resource configuration in real time and accurately, resulting in increased operation delay and increased energy consumption.
Decompose the operation task into multiple subtasks, and extract the corresponding hardware acceleration templates from the precompiled acceleration template library, dynamically match and reconstruct the target area, and use reconstructible logic devices to adjust hardware resources in real time.
Through rapid matching and reconstruction, system delay and energy consumption are reduced, computing performance and resource utilization are improved, and real-time adjustment and rapid update of hardware resources are achieved.
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Figure CN120066800B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of server scheduling, and in particular to a server scheduling method, device, storage medium, and program product. Background Art
[0002] In the distributed computing scenarios of large-scale artificial intelligence models, efficient utilization and dynamic adjustment of computing resources are becoming increasingly important. Reconfigurable technology, as a method that can flexibly adjust hardware logic to adapt to different computing needs, enables optimized resource allocation while maintaining uninterrupted operation.
[0003] In related technologies, most server systems use fixed hardware configurations and relatively simple scheduling algorithms. However, when faced with dynamically changing large-scale model computing tasks, especially when computing requirements, task properties or resource status change, related technologies are unable to adjust hardware resource configurations in real time and accurately when processing dynamic and changeable computing tasks, resulting in deficiencies in load change response and energy consumption control. Summary of the Invention
[0004] The present application provides a server scheduling method, device, storage medium and program product to at least solve the problem that the related technology cannot adjust the hardware resource configuration in real time and accurately when facing dynamically changing computing tasks, resulting in increased computing delay and high energy consumption.
[0005] The present application provides a server scheduling method, comprising: decomposing a computing task sent by a target object to obtain a plurality of subtasks; extracting a hardware acceleration template corresponding to a subtask among the plurality of subtasks from a precompiled acceleration template library; the hardware acceleration template stored in the precompiled acceleration template library refers to a hardware circuit configuration precompiled for tasks of different computing types; determining a target reconstruction area corresponding to a subtask among the plurality of subtasks from a plurality of reconstruction areas; the plurality of reconstruction areas refer to logic blocks divided out on a reconfigurable logic device that allow independent reconfiguration of logic circuits; performing a reconstruction operation on the target reconstruction area corresponding to the subtask among the plurality of subtasks according to the hardware acceleration template corresponding to the subtask among the plurality of subtasks to obtain a new target reconstruction area corresponding to the subtask among the plurality of subtasks, and executing the corresponding subtask through the new target reconstruction area corresponding to the subtask among the plurality of subtasks.
[0006] The present application also provides a server scheduling device, including: a task decomposition module, used to decompose the computing task sent by the target object to obtain multiple subtasks; an acceleration template matching module, used to extract hardware acceleration templates corresponding to subtasks in the multiple subtasks from a pre-compiled acceleration template library; the hardware acceleration templates stored in the pre-compiled acceleration template library refer to hardware circuit configurations pre-compiled for tasks of different computing types; a reconstruction area determination module, used to determine target reconstruction areas corresponding to subtasks in the multiple subtasks from multiple reconstruction areas; the multiple reconstruction areas refer to logic blocks divided out on a reconfigurable logic device that allow independent reconfiguration of logic circuits; a task execution module, used to perform reconstruction operations on target reconstruction areas corresponding to subtasks in the multiple subtasks according to the hardware acceleration templates corresponding to the subtasks in the multiple subtasks, obtain new target reconstruction areas corresponding to the subtasks in the multiple subtasks, and execute the corresponding subtasks through the new target reconstruction areas corresponding to the subtasks in the multiple subtasks.
[0007] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned server scheduling methods when executing the computer program.
[0008] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned server scheduling methods are implemented.
[0009] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned server scheduling methods when executed by a processor.
[0010] The present invention divides a computing task into multiple subtasks and uses an intelligent matching algorithm to dynamically select the most suitable hardware acceleration template and corresponding target reconstruction area for each subtask, thereby improving computing efficiency and reducing latency and solving the problem that static configuration cannot adapt to dynamically changing computing needs. A pre-compiled acceleration template library is used to pre-store hardware acceleration templates optimized for different computing types, so that they can be quickly called when a task arrives, avoiding the delay of real-time compilation, improving the matching speed and accuracy of hardware resources, reducing latency and energy consumption, and accurately matching each subtask with the corresponding hardware acceleration template. The hardware acceleration template corresponding to each subtask is transmitted to the corresponding reconstruction area via a high-speed configuration link to perform a reconstruction operation on the reconstruction area. Then, the corresponding subtask is executed based on the newly reconstructed reconstruction area after reconstruction, significantly reducing system latency and energy consumption, improving computing performance and resource utilization, and allowing the selected reconstruction area to be partially updated during operation without restarting, thereby reducing reconstruction latency and realizing real-time adjustment and rapid updating of hardware resources. This solves the problem that the related art cannot adjust the hardware resource configuration in real time and accurately when facing dynamically changing computing tasks, resulting in increased computing latency and high energy consumption. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0012] Figure 1 A schematic diagram of an application scenario of a server scheduling method provided in an embodiment of the present application.
[0013] Figure 2 A flowchart of an optional server scheduling method provided for an application embodiment.
[0014] Figure 3 A server structure is provided for an application embodiment.
[0015] Figure 4 A flowchart of a task decomposition process is provided for an application embodiment.
[0016] Figure 5 A schematic diagram of a process flow for hardware-accelerated template matching provided in an application embodiment.
[0017] Figure 6 This is a flowchart of partial reconstruction and hardware loading provided in an embodiment of the present application.
[0018] Figure 7This is a flow chart of state monitoring and feedback adjustment provided in an embodiment of the present application.
[0019] Figure 8 This is a flowchart of a storage module storing task results provided in an embodiment of the present application.
[0020] Figure 9 A structural block diagram of an optional server scheduling device provided in an embodiment of the application. DETAILED DESCRIPTION
[0021] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0022] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.
[0023] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0024] According to one aspect of the embodiment of the present application, a server scheduling method is provided. Optionally, in this embodiment, the server scheduling method can be applied to, but is not limited to, Figure 1 The hardware environment shown includes a terminal device 102 and a server 104. The server 104 can be connected to the terminal device 102 via a network and can be used to provide services (e.g., application services, etc.) for the terminal device 102 or a client installed on the terminal device 102. A database can be set on the server 104 or independently of the server 104 to provide data storage services for the server 104.
[0025] The aforementioned network may include, but is not limited to, at least one of the following: a wired network and a wireless network. The aforementioned wired network may include, but is not limited to, at least one of the following: a wide area network, a metropolitan area network, or a local area network. The aforementioned wireless network may include, but is not limited to, at least one of the following: Wi-Fi (Wireless Fidelity) and Bluetooth. The terminal device 102 may be, but is not limited to, a personal computer (PC), a mobile phone, a tablet computer, etc. The server 104 may be, but is not limited to, a cloud server, a server cluster, or other server types.
[0026] The server scheduling method of the embodiment of the present application is executed by the server 104. The embodiment of the present application provides a server scheduling method, Figure 2 is a flow chart of an optional server scheduling method according to an embodiment of the present application, such as Figure 2 As shown, the process of the method may include steps S202 to S208.
[0027] Step S202: Decompose the computing task sent by the target object into multiple subtasks.
[0028] Computational tasks refer to computational instructions or data processing requests for large-scale artificial intelligence models (such as deep neural networks and large language models) submitted by target objects or upper-layer applications and required to be executed on server systems. Computational tasks typically have high computational complexity and data throughput requirements, and have strict requirements for real-time execution and energy consumption control. By decomposing a computational task, multiple subtasks can be obtained, where a subtask refers to an independently executable computational unit derived from the decomposition of the original computational task. Each subtask is accompanied by a clear computation type (such as matrix multiplication, convolution operation, activation function, etc.), data block size, real-time requirements, and energy consumption budget to facilitate subsequent template matching and resource scheduling.
[0029] Optionally, Figure 3 The structure of a server provided in the embodiment of the present application is as follows: Figure 3 As shown in the figure, the server's internal components include a control and scheduling module. This module utilizes a dedicated high-performance processor and customized control logic, integrating a task decomposition engine, a state monitoring unit, a reconstruction decision module, and a template matching module. This module implements task decomposition, system state monitoring, reconstruction decision-making, template matching, and task scheduling. Through real-time monitoring and intelligent scheduling algorithms, the control and scheduling module dynamically adjusts the resource allocation of each computing unit, optimizes task decomposition and scheduling strategies, and improves overall system efficiency and stability. Figure 4 This is a flowchart of a task decomposition process provided by an embodiment of the present application, such as Figure 4As shown, after the server receives the computing task of the target object, the control scheduling module parses the running task description and decomposes the large-scale or complex computing tasks into multiple smaller and more manageable subtasks according to their computing needs, data dependencies and real-time requirements through the task decomposition engine, and collects the real-time load and energy consumption data of the current server system.
[0030] Step S204 , extracting hardware acceleration templates corresponding to subtasks in the plurality of subtasks from a precompiled acceleration template library; the hardware acceleration templates stored in the precompiled acceleration template library refer to hardware circuit configurations precompiled for tasks of different operation types.
[0031] The precompiled acceleration template library refers to a preset hardware circuit configuration database that stores precompiled and optimized hardware acceleration templates for different operation types (such as matrix multiplication, convolution operations, activation function calculations, etc.). The establishment of the precompiled acceleration template library is based on a large amount of preliminary experiments and data analysis to ensure that each hardware acceleration template can efficiently perform specific types of computing tasks while meeting the system design goals of low power consumption and low latency. During the operation of the server system, the precompiled acceleration template library provides the control scheduling module with the basic resources required for dynamic matching, achieving rapid mapping of tasks to hardware.
[0032] A hardware acceleration template refers to a pre-compiled hardware circuit configuration for accelerating a specific type of operation. After compilation, the hardware acceleration template has been solidified into configuration data that can be directly loaded into the available reconstruction area in the reconfigurable logic device. By quickly retrieving and loading it at runtime, hardware acceleration of different computing tasks is achieved. In an embodiment of the present application, the hardware acceleration template contains detailed hardware resource allocation (such as DSP (Digital Signal Processor, digital signal processor), BRAM (Block RAM, block random access memory), the number and layout of logic units), circuit design (such as pipeline structure, parallel processing unit) and control logic (such as data flow management, state machine control) information, which can be directly loaded into the reconstruction area to quickly achieve hardware-level customized acceleration. Each hardware acceleration template is optimized for specific computing requirements, which can significantly reduce computing delays, improve resource utilization, and control energy consumption. It is a key component for achieving system adaptive optimization.
[0033] Alternatively, as Figure 3 As shown, the template matching module in the control scheduling module is used to query the pre-compiled acceleration template library according to the task attributes of each subtask (such as operation type, computing requirement data, etc.) to find the hardware acceleration template that matches each subtask.
[0034] Step S206 , determining a target reconfiguration region corresponding to a subtask in the subtasks from the multiple reconfiguration regions; the multiple reconfiguration regions refer to logic blocks divided on the reconfigurable logic device that allow independent reconfiguration of logic circuits.
[0035] A reconfigurable logic device (RLD) is an integrated circuit whose internal logic circuitry can be reconfigured through software after leaving the factory to adapt to different application requirements. For example, a reconfigurable logic device can be an FPGA (Field-Programmable Gate Array). As the core computing acceleration module in server systems, FPGAs use dynamic partial reconfiguration technology to accelerate and optimize large-scale AI model computing tasks.
[0036] To support dynamic partial reconfiguration, the reconfigurable logic device (RLD) is divided into several independent logic regions. Each region contains a specific amount of logic resources (such as programmable logic units (PLUs), digital signal processors (DSPs), and block RAMs (BRAMs)) and has independent configuration capabilities. This region is known as the reconfiguration region. Each reconfiguration region has clear hardware boundaries and resource configurations (such as DSPs, BRAMs, and logic units). This design allows the system to dynamically adjust the hardware logic within a designated reconfiguration region based on task requirements without interrupting overall operations, achieving rapid response and resource optimization.
[0037] During the task decomposition and template matching phase, the control scheduling module determines the most suitable reconstruction region from multiple reconstruction regions for executing a subtask based on the specific computational requirements of the subtask and the real-time resource status of the reconstruction region. This region, known as the "target reconstruction region," will be loaded with a specific hardware acceleration template to execute the corresponding subtask operations, achieving efficient utilization of computing resources and accelerating task execution.
[0038] Optionally, Figure 5 This is a flow chart of a hardware accelerated template matching process provided by an embodiment of the present application, such as Figure 5 As shown, the control and scheduling module extracts the hardware acceleration template that matches each subtask from the precompiled acceleration template library and obtains the detailed parameters and configuration instructions for each subtask. The reconstruction decision module within the control and scheduling module continuously monitors the current resource status of all reconstruction areas, including resource usage, computing power, and reconstruction delay estimates. It performs optimal matching calculations based on the current resource status of each reconstruction area and determines the target reconstruction area for each subtask.
[0039] Step S208, according to the hardware acceleration template corresponding to the subtask in the multiple subtasks, reconstruct the target reconstruction area corresponding to the subtask in the multiple subtasks to obtain a new target reconstruction area corresponding to the subtask in the multiple subtasks, and execute the corresponding subtask through the new target reconstruction area corresponding to the subtask in the multiple subtasks.
[0040] Reconfiguration refers to the process of updating or reconfiguring the logic circuits in a selected reconfiguration region within a reconfigurable logic device based on a specific hardware acceleration template. This operation allows for dynamic adjustment of hardware resources during system operation to adapt to changing computing task requirements. Through a high-speed configuration link, the control and scheduling module can quickly load pre-compiled acceleration templates into the target reconfiguration region. Part of the reconfigurable logic control logic within the reconfigurable logic device is responsible for completing hardware resource updates, such as the reallocation of DSP, BRAM, and logic units, within milliseconds, thereby achieving hardware acceleration of computing tasks.
[0041] A new target reconfiguration region is the reconfigurable logic device's reconfiguration area, designated for executing a specific subtask, after a reconfiguration operation. This reconfiguration region has its internal logic updated according to the corresponding hardware acceleration template to meet the computational requirements of the subtask, such as accelerating compute-intensive operations, optimizing memory bandwidth, or controlling reconfiguration latency. Through intelligent matching algorithms and dynamic partial reconfiguration technology, the new target reconfiguration region is assigned the optimal hardware configuration required to execute the subtask, thereby improving task execution efficiency and overall system performance.
[0042] like Figure 3 As shown, the server's internal components also include a reconfigurable computing acceleration module, an auxiliary computing module, and a storage module. The reconfigurable computing acceleration module is internally divided into multiple independent reconfigurable areas, each containing fixed interface logic, computing units, and local storage units. The reconfigurable computing acceleration module includes a precompiled acceleration template library. Each hardware acceleration template is designed for a specific neural network operation (matrix multiplication, convolution, activation function calculation, etc.) to ensure efficient computing. The reconfigurable computing acceleration module utilizes a high-speed configuration link to support partial reconfiguration within the reconfigurable area, enabling hardware logic updates without halting overall system operations. The control and scheduling module communicates with the reconfigurable computing acceleration module using the high-speed PCIe bus, ensuring low-latency transmission of reconfiguration commands and status feedback. The reconfigurable computing acceleration module's internal reconfigurable areas are interconnected via an internal bus. Leveraging dynamic partial reconfiguration technology and a precompiled template library, the reconfigurable computing acceleration module provides dedicated hardware acceleration for large model computing tasks, rapidly responding to varying workload requirements while effectively reducing power consumption and latency.
[0043] The auxiliary computing module, comprised of a high-performance processor and dedicated coprocessors, is designed for data pre-processing, post-processing, and auxiliary computing tasks. It supports parallel computing with the reconfigurable computing acceleration module, ensuring coordinated processing of data flows and computing tasks in large-scale model calculations. The auxiliary computing module is physically connected to the control and scheduling module, the reconfigurable computing acceleration module, and the storage module using high-speed network protocols and independent network interfaces to ensure data consistency and task coordination.
[0044] The storage module integrates an NVMe (Non-Volatile Memory Express) solid-state drive and large-capacity, high-speed memory, responsible for storing model parameters, intermediate data, configuration files for the reconfigurable computing acceleration module, and log data. An independent, dedicated data bus connects the storage module and each module for high-speed data transmission. All physical connections are made using soldering, slots, and dedicated high-speed cables, enabling data transmission and persistent storage, ensuring data read and write rates meet real-time computing requirements. The auxiliary computing module and storage module implement data pre-processing, post-processing, and high-speed data transmission, ensuring the system's interoperability in high-concurrency, high-volume computing scenarios.
[0045] Control signals and data are transmitted between modules using a dedicated communication protocol and DMA (Direct Memory Access) data transmission mechanism. All data interactions use a strict timing synchronization mechanism and verification algorithm to ensure that the system accurately transmits any control signaling or calculation data during continuous operation.
[0046] Alternatively, as Figure 3 As shown, after the reconfiguration decision module in the control and scheduling module calculates the optimal reconfiguration solution in real time according to a predetermined algorithm, it transmits a reconfiguration instruction (a command for the reconfigurable logic device to update the local circuit, including the hardware acceleration template corresponding to the subtask and configuration parameters (such as timing, data width, and on-chip storage allocation)) to the reconfigurable computing acceleration module via a high-speed configuration link, instructing the reconfigurable computing acceleration module to reconfigure the reconfiguration area corresponding to each subtask. After receiving the reconfiguration instruction, the reconfigurable computing acceleration module completes the local logic circuit update within milliseconds, obtaining the new target reconfiguration area corresponding to each subtask. The reconfigurable computing acceleration module's built-in partial reconfiguration control logic is responsible for applying the new bitstream and updating the corresponding logic, wiring, and storage resources.
[0047] Through the embodiments of the present application, a computing task is divided into multiple subtasks, and an intelligent matching algorithm is used to dynamically select the most suitable hardware acceleration template and corresponding reconstruction area for each subtask. This solves the problem that static configuration cannot adapt to dynamically changing computing needs while improving computing efficiency and reducing latency. A pre-compiled acceleration template library is used to pre-store hardware acceleration templates pre-optimized for different computing types, so that they can be quickly called when a task arrives, avoiding the delay of real-time compilation, improving the matching speed and accuracy of hardware resources, reducing latency and energy consumption, and accurately matching each subtask with the corresponding hardware acceleration template. The hardware acceleration template corresponding to each subtask is transmitted to the corresponding reconstruction area via a high-speed configuration link to perform a reconstruction operation on the reconstruction area. Then, the corresponding subtask is executed based on the newly reconstructed reconstruction area after reconstruction, significantly reducing system latency and energy consumption, improving computing performance and resource utilization, and allowing local updates of the selected reconstruction area during operation without restarting, reducing reconstruction latency, and realizing real-time adjustment and rapid updating of hardware resources. This solves the problem that related technologies cannot adjust hardware resource configuration in real time and accurately when facing dynamically changing computing tasks, resulting in increased computing latency and high energy consumption.
[0048] In an exemplary embodiment, the hardware acceleration templates stored in the pre-compiled acceleration template library include configuration instructions for tasks of different computing types.
[0049] The configuration description of the hardware acceleration template is an instruction set for the circuit design of the reconfigurable logic device, which is used to quickly configure the reconfigurable logic device to perform specific computing tasks. The configuration description describes in detail how to achieve efficient hardware acceleration in the reconfiguration area of the reconfigurable logic device, including the allocation and use of resources such as logic units, DSP, BRAM, and the wiring details of the circuit. In this way, when the system receives a task of the corresponding computing type, it can directly call the corresponding hardware acceleration template from the pre-compiled acceleration template library for local reconstruction without the need for time-consuming real-time compilation, thereby significantly improving the system's response speed and resource utilization efficiency.
[0050] In some embodiments, extracting a hardware acceleration template corresponding to a subtask among the plurality of subtasks from a precompiled acceleration template library includes:
[0051] A hardware acceleration template in the precompiled acceleration template library that matches the operation type of the subtask among the multiple subtasks is determined as the hardware acceleration template corresponding to the subtask among the multiple subtasks.
[0052] The operation type refers to the specific mathematical operation or processing flow within a large model computation task, such as matrix multiplication, convolution, and activation function calculation. The operation type defines the computational characteristics of the subtask and serves as the basis for selecting hardware acceleration templates from the precompiled acceleration template library. By identifying the operation type of each subtask, the most appropriate hardware circuit configuration can be precisely matched, accelerating and optimizing specific operations, thereby improving overall computational efficiency and reducing energy consumption and latency.
[0053] Optionally, the template matching module in the control scheduling module extracts a hardware acceleration template that matches the operation type of each subtask from a pre-compiled acceleration template library, and determines it as the hardware acceleration template corresponding to the subtask.
[0054] Through this embodiment, the operation type of the subtask is matched with the hardware acceleration template, which can ensure that the selected hardware acceleration template best meets the actual computing requirements of the subtask, avoiding waste of resources and unnecessary time delays.
[0055] In an exemplary embodiment, determining a target reconstruction region corresponding to a subtask among a plurality of subtasks from a plurality of reconstruction regions includes:
[0056] According to the computational requirement data of the subtasks in the plurality of subtasks and the current resource status of the plurality of reconstruction areas, matching computations are performed on the subtasks in the plurality of subtasks to determine target reconstruction areas corresponding to the subtasks in the plurality of subtasks.
[0057] Computational requirement data refers to the specific hardware computing resources and characteristics required for each subtask to execute, including but not limited to computing power (such as floating-point operations per second (FPoS)), memory bandwidth or capacity, task priority, expected runtime, and energy budget. Computational requirement data is parsed and generated by the control and scheduling module during the task decomposition phase. It guides the selection of hardware acceleration templates and the matching of reconstruction regions, ensuring that tasks meet performance requirements while efficiently utilizing hardware resources and reducing energy consumption.
[0058] The current resource status of a reconfiguration region refers to the actual available resources and operational status of the reconfiguration region at the current moment. This information is fed back to the control and scheduling module by the reconfigurable computing acceleration module's internal monitoring unit and status registers. It is used to dynamically determine subtask matching and resource scheduling, ensuring stable system operation, rational resource allocation, efficient task execution, and controllable energy consumption. The current resource status of a reconfiguration region typically includes whether the region is idle or executing a task, remaining available resources (such as logic units, DSPs, and BRAMs), whether the region allows partial reconfiguration, and current power consumption or temperature.
[0059] Optionally, Figure 5This is a flow chart of a hardware accelerated template matching process provided by an embodiment of the present application, such as Figure 5 As shown in the figure, the control scheduling module extracts the hardware acceleration template that matches each subtask from the pre-compiled acceleration template library and obtains the detailed parameters and configuration instructions for each subtask. The reconstruction decision module in the control scheduling module continuously monitors the current resource status of all reconstruction areas, including resource occupancy, computing power, and reconstruction delay estimation. The reconstruction decision module analyzes the computing demand data of each subtask, including the computing demand, memory demand, and delay sensitivity of each subtask, and performs the optimal matching calculation between the computing demand data of each subtask and the current resource status of each reconstruction area. The reconstruction area with the highest matching degree with the subtask is selected as the target reconstruction area corresponding to the subtask, and the matching result and reconstruction instruction are sent to the reconfigurable computing acceleration module.
[0060] Through this embodiment, the computing requirement data of the subtask is matched with the current resource status of the reconstruction area, ensuring that each subtask can be allocated the hardware resources that best suit its needs, avoiding excess or shortage of resources, thereby improving resource utilization and reducing computing delay and energy consumption; by considering the specific requirements of the subtask for computing resources and the current status of the reconstruction area, the energy consumption of each reconstruction operation can be more accurately predicted and controlled, while ensuring that the task performance is not affected. This data-driven matching strategy enables the system to automatically optimize resource allocation when processing high-load and variable computing tasks, achieving the best balance between energy consumption and performance.
[0061] In an exemplary embodiment, performing matching calculations on the subtasks in the plurality of subtasks based on the computational requirement data of the subtasks and the current resource states of the plurality of reconstruction areas, and determining target reconstruction areas corresponding to the subtasks in the plurality of subtasks, includes:
[0062] Based on the computational requirement data of the subtasks in the multiple subtasks, a task requirement vector of the subtasks in the multiple subtasks is generated; based on the current resource status of the multiple reconstruction areas, a plurality of regional resource vectors are generated; the multiple regional resource vectors correspond one-to-one to the multiple reconstruction areas; the distance between the task requirement vector of the subtasks in the multiple subtasks and the multiple regional resource vectors is calculated, and the reconstruction area corresponding to the minimum distance is determined as the target reconstruction area corresponding to the subtask in the multiple subtasks.
[0063] The task requirement vector corresponding to each subtask is a multidimensional vector composed of the specific attributes of the corresponding subtask. For example, each subtask's task requirement vector includes the computation type (e.g., matrix multiplication, convolution), computing power requirements (e.g., floating-point operations per second), memory requirements (bandwidth or capacity), latency sensitivity, and energy budget. Each subtask's task requirement vector comprehensively reflects the subtask's hardware resource requirements and guides the intelligent matching algorithm in selecting the most appropriate reconstruction region.
[0064] The regional resource vector corresponding to each reconfiguration region represents a multidimensional vector of the currently available resource status of each independent reconfiguration region within the reconfigurable computing acceleration module. For example, the regional resource vector for each reconfiguration region includes information such as the utilization rate of computing units (such as DSP and BRAM), remaining logic resources, current reconfiguration delay estimate, power consumption, and temperature. This provides real-time resource information to the control and scheduling module, allowing it to calculate the degree of match with the task demand vector and determine the reconfiguration strategy.
[0065] The distance between the task requirement vector corresponding to each subtask and the regional resource vector corresponding to each reconfiguration region is a measure of the difference between the task requirement vector and the regional resource vector. This distance reflects the degree of match between the task requirement and the current resource state of the reconfiguration region. A smaller distance indicates a more favorable resource state for meeting the task requirement, thereby determining the reconfiguration region to which the subtask should be assigned for optimal resource and task matching.
[0066] Optionally, the control and scheduling module analyzes the computational demand data for each subtask and converts it into a multi-dimensional task demand vector. The state detection unit of the reconfigurable computing acceleration module collects the current resource status of each reconstruction region in real time, generating a regional resource vector that corresponds to each reconstruction region. The control and scheduling module calculates the distance between each subtask's task demand vector and the regional resource vectors of all reconstruction regions. The control and scheduling module identifies the reconstruction region with the minimum distance and uses it as the target reconstruction region for the subtask.
[0067] Through this embodiment, the concepts of task demand vector and reconstruction area resource vector are introduced, covering multiple attributes, forming a comprehensive resource demand and supply mapping relationship, and laying the foundation for the efficient allocation of dynamic tasks; calculating the distance between the task demand vector of a subtask in multiple subtasks and the multiple area resource vectors, and determining the reconstruction area corresponding to the minimum distance as the target reconstruction area corresponding to the subtask in the multiple subtasks. This distance calculation method takes into account multiple dimensions and ensures the accuracy and efficiency of resource allocation.
[0068] In an exemplary embodiment, the computing requirement data of a subtask among the multiple subtasks includes an expected computing capability, an expected memory capacity, and an expected reconstruction delay upper limit of the subtask among the multiple subtasks.
[0069] The expected computing power of a subtask reflects its required computational speed, such as the number of floating-point operations per second. The expected memory capacity refers to the amount of storage space (in GB / s) required for the subtask to process data, ensuring fast data access and caching. The expected reconstruction latency limit defines the maximum amount of time a subtask can wait for reconstruction to complete before starting execution, ensuring real-time performance.
[0070] In some embodiments, generating a task requirement vector for a subtask in the plurality of subtasks based on the computational requirement data of the subtask in the plurality of subtasks includes:
[0071] A first task element is generated based on the expected computing capability of a subtask among the multiple subtasks; a second task element is generated based on the expected memory capacity of the subtask among the multiple subtasks; a third task element is generated based on the expected reconstruction delay upper limit of the subtask among the multiple subtasks; and a task requirement vector of the subtask among the multiple subtasks is generated based on the first task element, the second task element, and the third task element.
[0072] Among them, the first task element refers to the task attribute value generated based on the expected computing power of the subtask (such as the number of floating-point operations per second). It reflects the specific requirements of the subtask for processing speed and computing resources and is used to construct the task requirement vector.
[0073] The second task element refers to the task attribute value generated based on the expected memory capacity of the subtask (such as the number of GB required to store data). It reflects the subtask's demand for memory resources during execution and is an important component of the task requirement vector. It is used to match the reconstruction area with sufficient memory resources to ensure efficient data processing.
[0074] The third task element refers to the task attribute value generated by the expected reconstruction delay upper limit of the subtask (such as the maximum allowed waiting time). It ensures that the reconfigurable logic device performs necessary local reconstruction operations while meeting the real-time requirements of the task. It is one of the key parameters for constructing the task demand vector and is used to avoid additional delays caused by waiting for reconstruction.
[0075] Optionally, the control and scheduling module evaluates the computational requirements of the subtasks, extracts their expected computational capacity, and quantifies them as a first task element. It also analyzes the subtasks' memory usage, extracts their expected memory capacity, and quantifies them as a second task element. It also precalculates the maximum allowable waiting time for the subtasks (i.e., the upper bound on the expected reconstruction delay) and quantifies them as a third task element. The control and scheduling module combines the first, second, and third task elements to generate a complete task requirement vector, providing a precise parameter basis for subsequent resource matching.
[0076] For example, define a subtask The corresponding task requirement vector is the following formula (1):
[0077] (1)
[0078] in, Indicates a task The corresponding task requirement vector; Represents the first task element, i.e., task Expected computing power (floating-point operations per second); Represents the second task element, namely task Expected memory capacity (GB / s); Represents the third task element, namely task The expected upper limit of the reconstruction delay (in milliseconds).
[0079] Through this embodiment, the expected computing power of the subtask is quantified, and the specific demand of each subtask for computing resources can be accurately grasped, ensuring that sufficient hardware support can be given to computing-intensive jobs in the early stage of task scheduling, avoiding task delays caused by insufficient computing resources, and thus improving the overall computing efficiency and response speed of the system; quantifying the expected memory capacity of the subtask can make an accurate assessment of the memory resources required for the subtask, ensuring fast access and caching of data when processing large-scale models, reducing unnecessary data transfer delays, and further improving the task processing speed and system throughput: introducing the expected reconstruction delay upper limit of the subtask as part of the task demand vector, by estimating the task demand vector, The time that the task waits for the partial reconstruction of the reconfigurable logic device to be completed can be avoided in advance, and computing tasks that may not be able to respond in time due to the lengthy reconstruction cycle can be avoided in advance, ensuring the real-time nature of the task and the stability of the system, and reducing the additional system burden caused by frequent reconstruction; combining the above three key task elements to generate a task requirement vector, and expressing the comprehensive requirements of each subtask in the form of a vector, can accurately evaluate the compatibility of the subtask with the reconstruction area, thereby realizing effective resource allocation. It not only takes into account computing power and memory resources, but also pays special attention to reconstruction delay, ensuring the low-latency characteristics of task execution, while optimizing resource utilization, reducing energy consumption, and overcoming the performance bottleneck and high energy consumption problems during large-scale model deployment.
[0080] In an exemplary embodiment, the current resource status of a reconstruction area among the multiple reconstruction areas includes a current computing capability, a current memory capacity, and a current reconstruction delay estimation value of the reconstruction area among the multiple reconstruction areas.
[0081] Among them, the current computing power refers to the computing processing power that the reconstruction area can provide at a certain moment, including available DSP modules, logic units, BRAM units and other resources. It is used to evaluate the support level of the area for computationally intensive subtasks and ensure that the real-time computing resource availability is taken into account when allocating tasks.
[0082] The current memory capacity indicates the amount of storage resources currently available in the reconstruction area, including the remaining space of on-chip memory (such as BRAM) and cache. It is used to measure data processing and storage capabilities, ensuring that subtasks can quickly access the required memory resources during execution, avoiding data delays and task interruptions caused by insufficient memory.
[0083] The current reconstruction delay estimate reflects the estimated time required to perform partial logic updates in the reconstruction area under the current state. It is used to evaluate the impact of the reconstruction operation on the execution delay of subtasks, ensuring that the timeliness of reconstruction is fully considered during task scheduling, and avoiding task waiting and system efficiency reduction caused by excessive reconstruction delay.
[0084] In some embodiments, generating a plurality of region resource vectors based on current resource states of a plurality of reconstruction regions includes:
[0085] A reconstructed region among the multiple reconstructed regions is used as the current reconstructed region, and the following vector generation operations are performed to obtain multiple region resource vectors:
[0086] Based on the current computing power of the current reconstruction area, a first area element is generated; based on the current memory capacity of the current reconstruction area, a second area element is generated; based on the current reconstruction delay estimate of the current reconstruction area, a third area element is generated; based on the first area element, the second area element and the third area element, a regional resource vector corresponding to the current reconstruction area is generated.
[0087] The first region element represents the computing power status of the current reconstruction region. It is generated by quantifying the region's currently available computing resources, such as DSP units, BRAM modules, and logic units. The first region element reflects the current processing power of the reconstruction region and is used to match the computing requirements of the subtask to ensure efficient and timely task execution.
[0088] The second area element is based on the memory capacity status of the current reconstruction area. The second area element generated by quantifying the remaining BRAM capacity, on-chip storage resources and external memory bandwidth is used to evaluate whether the reconstruction area can meet the data storage and transmission requirements of the subtask, ensuring the consistency and reliability of data processing.
[0089] The third region element represents the estimated reconstruction delay for the current reconstruction region, generated by predicting the time required for local logic updates. This ensures that the maximum allowable waiting time for subtasks is not exceeded during dynamic resource adjustment, thereby avoiding task delays and system performance degradation.
[0090] The regional resource vector, composed of the first regional element (computing power), the second regional element (memory capacity), and the third regional element (reconstruction delay estimate), comprehensively describes the resource status and characteristics of the current reconstruction region. The regional resource vector is used for resource matching calculations within the system, ensuring that each subtask is assigned to the reconstruction region that best matches its needs. This achieves efficient resource utilization and rapid task response, reducing overall system energy consumption and latency.
[0091] Optionally, the control scheduling module takes the reconstruction area among the multiple reconstruction areas as the current reconstruction area, queries the DSP, BRAM and logic resource status of each reconstruction area, quantifies it into the current computing power index, and generates a first area element; obtains the current memory usage of the reconstruction area through the internal monitoring mechanism, and converts it into a second area element; uses the historical data of the reconstruction area and the current task queue status to predict the time required to perform partial reconstruction, that is, the current reconstruction delay estimate, to form a third area element; merges the first, second and third area elements, and uses the existing vector construction algorithm to generate a complete area resource vector, which represents the resource status of the current reconstruction area.
[0092] For example, for each reconstruction region , and its corresponding regional resource vector is defined as the following formula (2):
[0093] (2)
[0094] in, Represents the reconstruction area The corresponding regional resource vector; Represents the first region element, i.e. the reconstruction region The computing power currently available within the Represents the second region element, i.e. the reconstruction region Current memory resources; Represents the third region element, namely the reconstruction region The current reconstruction delay estimate of .
[0095] Through this embodiment, by real-time monitoring and quantifying the current computing power of the current reconstruction area, the first area element is generated, which can immediately reflect the computing processing potential of the area, so that the system can perform intelligent matching based on the most real computing resource data at the moment, rather than fixed preset values, when scheduling tasks, ensuring maximum support for computing-intensive tasks, reducing the waiting time for tasks in queues, and improving the overall computing efficiency and system response speed; converting the current memory capacity of the current reconstruction area into the second area element enables the system to accurately grasp the actual needs of data storage and transmission, solves the problem of unreasonable allocation of memory resources, ensures the fluidity and integrity of data during the processing process, and avoids tasks caused by memory bottlenecks. Processing delay, while improving the data processing speed and the overall throughput of the system; generating a third regional element based on the current reconstruction delay estimate can avoid assigning delay-sensitive tasks to areas that are being reconstructed or about to be reconstructed, thereby significantly reducing the additional waiting time of tasks and ensuring the real-time execution of tasks and the user experience quality; synthesizing the above three regional elements into a regional resource vector realizes comprehensive consideration and dynamic adjustment of resource status. This real-time resource monitoring and dynamic matching, which is refined to each reconstruction area, greatly improves the utilization rate of hardware resources, while ensuring the intelligence and efficiency of task scheduling, effectively responding to the variability of system load, reducing energy consumption, and realizing accurate allocation and optimized scheduling of computing resources.
[0096] In an exemplary embodiment, calculating the distance between the task requirement vector of a subtask among the plurality of subtasks and the plurality of regional resource vectors includes:
[0097] The Euclidean distance formula is used to calculate the distance between the task requirement vectors of multiple subtasks and the multiple regional resource vectors. The Euclidean distance formula represents the difference between corresponding elements in two vectors and the relationship between this difference, the normalization factor, and the indicator weight. The normalization factor is selected based on previous experimental data and system configuration to ensure that the values are calculated within the same order of magnitude.
[0098] Among them, the normalization factor is a set of numerical values used to eliminate the dimensional differences of each element in the task demand vector and the regional resource vector, ensuring that all indicators are compared on the same scale when calculating the Euclidean distance.
[0099] Indicator weighting assigns different weights to each element in the task requirement vector and the regional resource vector, reflecting the relative importance of each indicator to the matching result. This weighting takes into account the key roles of computing power, memory capacity, and reconstruction latency in large-scale model calculations, making distance calculations more realistic and optimizing resource allocation.
[0100] If the two point vectors are and , then the traditional Euclidean distance calculation is as shown in the following formula (3):
[0101] (3)
[0102] Traditional Euclidean distance calculations are suitable for comparing data with the same dimensions, simplifying the calculation process without requiring additional normalization steps and failing to consider the varying importance of different dimensions. Furthermore, Euclidean distance is a natural distance metric based on geometric intuition and linear algebra principles, assuming that all dimensions in a space contribute equally to the distance. Therefore, the traditional Euclidean distance formula does not include normalization factors or metric weighting. If the dimensions of a vector differ significantly (for example, one dimension is measured in centimeters and another in kilometers), the larger dimension can overly dominate the distance calculation, while subtle changes in the smaller dimension may be ignored, leading to unfair or inaccurate matching results. Furthermore, in real-world scenarios, different metrics contribute differently to overall similarity or matching. For example, in resource matching, computing power may be more important than memory capacity. Without weighting, the Euclidean distance formula fails to reflect this priority, potentially resulting in suboptimal matching decisions.
[0103] Therefore, in order to solve the above problems, this embodiment optimizes the traditional Euclidean distance calculation formula and adds a normalization factor and indicator weight to the traditional Euclidean distance calculation formula. The normalization factor ensures that the values of all dimensions are compared on the same scale, eliminates the impact of dimensional differences, and makes the distance calculation more fair and accurate. By setting weights for each dimension, the importance of different indicators can be distinguished according to actual conditions, ensuring that resource matching and task scheduling are more reasonable and reflecting the priority of actual business needs.
[0104] This embodiment calculates the normalized weighted distance between the task demand vector and multiple regional resource vectors, intelligently identifying the most compatible reconstruction region and enabling precise scheduling of computing resources. This approach not only considers the linear distance between task demand and resource status but also enhances the accuracy and practicality of distance calculation through weights and normalization factors, effectively addressing the problem of poor matching between resource scheduling strategies and actual computing needs.
[0105] In an exemplary embodiment, the task requirement vector of a subtask among multiple subtasks includes a first task element, a second task element, and a third task element; the regional resource vector of a reconstruction area among multiple reconstruction areas includes a first regional element, a second regional element, and a third regional element; the Euclidean distance calculation formula includes a first normalization factor, a second normalization factor, a third normalization factor, a first indicator weight, a second indicator weight, and a third indicator weight.
[0106] The first normalization factor refers to the constant used to normalize the computing power requirements of the subtask, ensuring the dimensional consistency of the difference between the first task element (computing power requirement) of the task requirement vector and the first regional element (computing power provision) of the regional resource vector, thereby making the consideration of computing power in task and resource matching more fair and accurate.
[0107] The second normalization factor refers to a constant used to normalize the subtask's memory bandwidth or capacity requirements. It ensures the normalization of the difference between the second task element (memory bandwidth or capacity requirement) and the second region element (memory bandwidth or capacity provision). This ensures that the representation of memory resources in distance calculations is on the same order of magnitude as computing power and reconstruction latency, enhancing the comprehensiveness of resource matching.
[0108] The third normalization factor refers to a constant used to normalize the subtask's upper limit requirement for reconstruction delay, ensuring that the difference between the third task element (reconstruction delay requirement) and the third region element (reconstruction delay estimate) is also standardized, so that the impact of reconstruction delay in task and resource matching can be reasonably reflected.
[0109] The first indicator weight is used to measure the relative importance of computing power in the matching decision between the task demand vector and the regional resource vector. Its value reflects the priority of computing power compared to other resources (such as memory and reconstruction delay) in a specific scenario. Through weighted processing, the first indicator weight ensures that computing power is appropriately considered in resource matching.
[0110] The second indicator weight refers to the weighted coefficient of memory bandwidth or capacity in the task and resource matching decision. Its value reflects the contribution of memory resources to task execution efficiency and stability.
[0111] The third indicator weight refers to the importance of reconstruction delay in matching task requirements with resources. By quantifying the relationship between reconstruction delay and task execution efficiency, the third indicator weight ensures that reconstruction delay requirements are reasonably considered in the resource matching algorithm. In particular, in scenarios that require a fast response, the weight of reconstruction delay will be increased to reduce the waiting time for task execution.
[0112] In some embodiments, a task requirement vector of a subtask among the multiple subtasks is used as a current task requirement vector, and a regional resource vector among the multiple regional resource vectors is used as the current regional resource vector. A distance calculation operation is performed to obtain the distance between the task requirement vector of the subtask among the multiple subtasks and the multiple regional resource vectors:
[0113] 1. Calculate a first difference between a first task element of a current task requirement vector and a first regional element of a current regional resource vector, a second difference between a second task element of a current task requirement vector and a second regional element of a current regional resource vector, and a third difference between a third task element of a current task requirement vector and a third regional element of a current regional resource vector.
[0114] 2. Determine a first square difference based on a first ratio between the first difference and the first normalization factor; determine a second square difference based on a second ratio between the second difference and the second normalization factor; and determine a third square difference based on a third ratio between the third difference and the third normalization factor.
[0115] 3. Use the first indicator weight to weight the first square difference to obtain a first weighted value; use the second indicator weight to weight the second square difference to obtain a second weighted value; use the third indicator weight to weight the third square difference to obtain a third weighted value.
[0116] 4. The square root of the sum of the first weighted value, the second weighted value, and the third weighted value is determined as the distance between the current task demand vector and the current regional resource vector.
[0117] It can be seen from the above embodiments that Represents the first task element, Represents the second task element, Represents the third task element, represents the first region element, Represents the second area element, Indicates the third region element. This embodiment defines the first normalization factor as , the second normalization factor is , the third normalization factor is , define the first indicator weight as , the second indicator weight is , the weight of the third indicator is , define the current task demand vector With the current region resource vector The distance between As shown in the following formula (4):
[0118] (4)
[0119] in: .
[0120] Completing the subtask After calculating the distance between all regional resource vectors, the control scheduling module selects the reconstruction region with the smallest distance among all available reconstruction regions as the best matching region (i.e., target reconstruction region) corresponding to each subtask. The corresponding mathematical expression is shown in the following formula (5):
[0121] (5)
[0122] in, Represents a subtask The number of the corresponding target reconstruction area; this decision process ensures that the selected area best matches the task requirements in terms of computing power, memory resources and reconstruction latency, achieving optimal resource allocation and overall system performance optimization.
[0123] This embodiment uses a first, second, and third normalization factor to normalize the differences between corresponding elements in two vectors. This eliminates dimensional differences between different metrics (such as computing power, memory resources, and reconstruction delay), ensures fair comparison of metrics when calculating distance, and addresses the mismatch problem caused by inconsistent dimensionality in traditional Euclidean distance calculations. The use of first, second, and third metric weights allows the relative importance of each metric in distance calculation to be adjusted based on specific scenarios and task requirements. This weighting mechanism enables the algorithm to more intelligently assess resource matching, prioritizing metrics that have a greater impact on task execution efficiency and system performance, thereby optimizing resource allocation and improving computational efficiency and response speed. A comprehensive evaluation of multiple resource attributes (computing power, memory resources, and reconstruction delay) through difference, normalization, and weighting comprehensively reflects the degree of match between task requirements and the regional resources of the reconfigurable logic device, preventing a single resource attribute from dominating task scheduling decisions and achieving multi-dimensional optimization of resource allocation.
[0124] In an exemplary embodiment, the normalization factor and indicator weight can be dynamically adjusted according to the system status and task requirements, so that the distance calculation method can flexibly adapt to the changing requirements in different scenarios, thereby achieving more accurate task scheduling and resource matching.
[0125] For example, the task requirement vector corresponding to each subtask and the multiple regional resource vectors corresponding to all reconstructed areas are input into a pre-trained neural network to obtain the prediction normalization factor and prediction index weight corresponding to each subtask; wherein, the task requirement vector corresponding to each subtask includes a first normalization factor, a second normalization factor, and a third normalization factor; the prediction index weight corresponding to each subtask includes a first index weight, a second index weight, and a third index weight; the prediction normalization factor and prediction index weight corresponding to each subtask are used to calculate the normalized weighted Euclidean distance between the task requirement vector and the regional resource vector corresponding to each subtask.
[0126] The neural network, based on an adaptive learning mechanism, automatically adjusts normalization factors and weight parameters based on historical operational data and patterns. The neural network can learn the resource consumption patterns of different types of tasks and, based on the current system state and task characteristics, predict the appropriate normalization factors and weights for the scenario, improving matching accuracy and system response speed.
[0127] In this embodiment, a neural network uses machine learning techniques, such as reinforcement learning, to learn from historical data and train a neural network capable of predicting resource requirements for different types of tasks. Specifically, multiple training samples are obtained, wherein each training sample includes operating status data (computing load, memory usage, energy consumption, reconstruction delay, etc.) and label data for each reconstruction region when performing different tasks. The label data of each training sample is used to annotate the historical normalization factor and historical indicator weight corresponding to the operating status data in each training sample. An untrained neural network is trained using multiple training samples to obtain a trained neural network. During the training process, the neural network outputs a prediction result corresponding to each training sample, wherein the prediction result corresponding to each training sample includes the prediction normalization factor and prediction indicator weight corresponding to each training sample. The model parameters of the neural network are updated based on the difference between the prediction result of each training sample and the label data until the iteration stopping condition is met, thereby obtaining a trained neural network.
[0128] Through this embodiment, the task requirement vector of each subtask and the resource vector of each region are used as input and sent to a pre-trained neural network model to predict the normalization factor and indicator weight of each subtask. By utilizing the powerful pattern recognition and learning capabilities of the neural network, the algorithm parameters can be automatically adjusted according to historical operation data and real-time system status to improve the accuracy and flexibility of task matching; the predicted normalization factor and predicted indicator weight can adaptively reflect the resource demand and system status in the current scenario, ensuring that the distance calculation method can accurately evaluate the matching degree between task demand and hardware resources, effectively solving the problem in related technologies that static parameter settings cannot adapt to dynamic changes in resource demand.
[0129] In an exemplary embodiment, before performing a reconstruction operation on a target reconstruction area corresponding to a subtask among the multiple subtasks according to a hardware acceleration template corresponding to the subtask among the multiple subtasks, the server scheduling method further includes:
[0130] Preliminary inspection is performed on target reconstruction areas corresponding to subtasks among multiple subtasks; when there is no real-time data transmission task in the target reconstruction areas corresponding to subtasks among multiple subtasks, the steps of performing reconstruction operations on the target reconstruction areas corresponding to subtasks among multiple subtasks according to the hardware acceleration templates corresponding to the subtasks among multiple subtasks.
[0131] In an exemplary embodiment, when a real-time data transmission task exists in a target reconstruction area corresponding to a subtask among multiple subtasks, the real-time data transmission task is migrated to another reconstruction area, or the real-time data transmission task is waited for completion.
[0132] Among them, after the reconfigurable computing acceleration module receives the reconstruction instruction sent by the control scheduling module, before the reconstruction process starts, the state detection unit solidified in the reconfigurable computing acceleration module pre-checks the area to be updated. Pre-check refers to a series of state verification operations performed by the internal state detection unit of the reconfigurable computing acceleration module on the designated reconstruction area before the hardware update of the reconstruction area. Its main purpose is to confirm that there is no real-time data transmission or computing task in progress in the target reconstruction area, to ensure that the reconstruction operation will not interrupt the ongoing data processing flow or computing task, and to avoid data loss and calculation errors. The pre-check mechanism includes but is not limited to checking the current task status, data transmission status and internal resource usage of the reconstruction area. Once it is confirmed that the area is in an idle state, the reconstruction operation can be safely performed and the new hardware acceleration template can be loaded, thereby realizing dynamic resource adjustment and efficient utilization of reconfigurable logic devices.
[0133] Optionally, Figure 6 This is a flowchart of a partial reconstruction and hardware loading process provided by an embodiment of the present application, such as Figure 6 As shown, after the reconfigurable computing acceleration module receives the reconstruction instruction sent by the control scheduling module, the state detection unit fixed in the reconfigurable computing acceleration module pre-checks the target reconstruction area indicated by the reconstruction instruction. If the target reconstruction area indicated by the reconstruction instruction does not have a real-time data transmission task, the hardware acceleration template corresponding to the target reconstruction area is transmitted to the target reconstruction area via a high-speed configuration link; the reconfigurable computing acceleration module completes the local logic circuit update within milliseconds to obtain a new target reconstruction area corresponding to each subtask. If the target reconstruction area indicated by the reconstruction instruction has a real-time data transmission task, the real-time data transmission task is migrated to another reconstruction area, or the real-time data transmission task is completed before the reconstruction is performed.
[0134] like Figure 6 As shown, after the update is completed, the state feedback unit immediately transmits the reconstruction success signal to the control scheduling module to ensure that the subsequent task scheduling depends on the latest hardware status. After the reconstruction operation is completed, the reconfigurable computing acceleration module executes the corresponding subtask according to the new target reconstruction area corresponding to each subtask. At the same time, the auxiliary computing module starts the data preprocessing process to format and cache the original input data (referring to the initial data required for the large model or subtask) according to the task requirements. High-speed data transmission is achieved between the reconfigurable computing acceleration module and the auxiliary computing module through DMA technology. Specifically, the auxiliary computing module preprocesses, formats, and caches the original data according to the task requirements; these processed data are transmitted to the target reconstruction area for calculation at high speed through DMA; after the calculation is completed, the reconfigurable computing acceleration module can return the intermediate results or final results to the auxiliary computing module or storage module through DMA or a high-speed interface for caching.
[0135] Through this embodiment, before performing a hardware update in the reconstruction area, a pre-check is first performed on the target reconstruction area to confirm that there is no real-time data transmission or computing task in the area, thereby solving the problems of data loss and operation interruption that may be caused during the dynamic reconstruction process, and ensuring the continuity of tasks and the integrity of data; when the pre-check finds that the target reconstruction area is executing a real-time data transmission task, a task migration or waiting strategy is adopted, which can intelligently migrate the current data transmission task to other idle reconstruction areas, or wait until the current task is completed before reconstructing, thereby solving the conflict between dynamic reconstruction and task execution in complex and changeable computing scenarios, and ensuring timely response of tasks and efficient use of hardware resources.
[0136] In an exemplary embodiment, the server scheduling method further includes:
[0137] The operating status data of the reconfigurable logic device is monitored in real time; when the operating status data indicates that an abnormal first reconstruction area exists, a spare hardware acceleration template is used to perform a reconstruction operation on the first reconstruction area; the spare hardware acceleration template is compatible with hardware features of multiple reconstruction areas.
[0138] Among them, the operating status data refers to various indicator data reflecting the current working status and performance of the reconstruction area on the reconfigurable logic device, including but not limited to computing load, energy consumption data, signal transmission status and reconstruction effect.
[0139] The first reconstruction area refers to the reconstruction area where the monitoring finds that the status deviates from the normal range, which may manifest as abnormal conditions such as overheating, computing performance degradation, data transmission errors, failures, or failure to meet real-time requirements.
[0140] The alternative hardware acceleration template refers to a set of pre-compiled hardware circuit configuration options. The alternative hardware acceleration template is compatible with the hardware characteristics of multiple reconstruction areas, that is, the alternative hardware acceleration template fully considers the hardware architecture characteristics of different reconstruction areas when designing, such as the number and layout of logic units, storage resources (BRAM, URAM) and digital signal processing units (DSP). This compatibility ensures that the alternative hardware acceleration template can effectively operate in reconstruction areas with a variety of hardware configurations, improving the robustness and scalability to cope with hardware diversity. The alternative hardware acceleration template covers multiple operation types and is enabled when the original template fails or an abnormality occurs in the reconstruction area. The alternative hardware acceleration template fully considers the versatility and flexibility of hardware resources, ensuring that even when problems occur in some reconstruction areas, it can still respond quickly and find suitable alternatives to ensure that task execution is not affected.
[0141] Optionally, Figure 7 This is a flow chart of a state monitoring and feedback adjustment process provided by an embodiment of the present application, such as Figure 7 As shown, the control scheduling module maintains real-time communication with each module throughout the task execution process, monitoring the computational load, energy consumption data, signal transmission status, and reconstruction effect of each module. When the operating status data indicates that there is an abnormal first reconstruction area, the control scheduling module retrieves the backup hardware acceleration template from the pre-compiled acceleration template library and uses the backup hardware acceleration template to perform reconstruction operations on the first reconstruction area. After the reconstruction is completed, the status monitoring unit built into the control scheduling module records the abnormal situation of the reconstruction area in real time and reports the reconstruction status to the control scheduling module to confirm that the first reconstruction area has returned to normal operating status and is capable of executing new tasks.
[0142] Through this embodiment, when an abnormal first reconstruction area is detected, the backup hardware acceleration template can be automatically selected and loaded to perform reconstruction operations on the first reconstruction area. The backup hardware acceleration template fully considers the hardware feature differences of all reconstruction areas when designing, ensuring the versatility and compatibility of the template. This means that one backup template can be applicable to reconstruction areas with multiple different hardware configurations. By quickly switching to the backup hardware acceleration template, the normal function of the first reconstruction area can be restored without affecting the overall operation, thereby enhancing the system's fault tolerance and the continuity of computing tasks, effectively overcoming the scheduling difficulties caused by the heterogeneity of hardware resources, and realizing efficient utilization of computing resources.
[0143] In an exemplary embodiment, the server scheduling method further includes:
[0144] When the running status data indicates that there is a second reconstruction area with a load exceeding a preset threshold, the subtasks in the second reconstruction area are migrated to other reconstruction areas.
[0145] The second reconstruction areas refer to those reconstruction areas where the current load level is too high.
[0146] Alternatively, as Figure 7 As shown, the control and scheduling module maintains real-time communication with each module throughout task execution, monitoring each module's computing load, energy consumption data, signal transmission status, and reconstruction effect. If the operating status data indicates the presence of a second reconstruction area with a load exceeding a preset threshold, the reconfigurable computing acceleration module migrates the subtasks in the second reconstruction area to other available reconstruction areas for execution.
[0147] Figure 8 FIG. 1 is a flow chart of a storage module storing task results provided in an embodiment of the present application, such as Figure 8 As shown in the figure, after the computation task is completed, the reconfigurable computing acceleration module and the auxiliary computing module transmit the final calculation results to the storage module via a high-speed interface. The storage module verifies the results and stores them in a non-volatile storage device, generating a task execution log. The control and scheduling module compiles task execution records, energy consumption indicators, and reconstruction records, and transmits them to the system monitoring platform for long-term system performance analysis and template library optimization.
[0148] Through this embodiment, when it is detected that the load of the second reconstruction area is too high, the subtasks in this area are migrated to other reconstruction areas with lower loads for execution, thereby solving the problem of excessive resource concentration caused by static task allocation in related technologies. By dynamically migrating subtasks, balanced distribution of computing resources is achieved, preventing system performance degradation and increased energy consumption caused by local overload.
[0149] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.
[0150] The embodiment of the present application also provides a server scheduling device, such as Figure 9 As shown, the server scheduling device includes:
[0151] The task decomposition module 902 is used to decompose the computing task sent by the target object into multiple subtasks.
[0152] The acceleration template matching module 904 is used to extract hardware acceleration templates corresponding to subtasks in the plurality of subtasks from the precompiled acceleration template library; the hardware acceleration templates stored in the precompiled acceleration template library refer to hardware circuit configurations precompiled for tasks of different operation types.
[0153] The reconfiguration region determining module 906 is configured to determine a target reconfiguration region corresponding to a subtask in the subtasks from among the multiple reconfiguration regions; the multiple reconfiguration regions refer to logic blocks divided on the reconfigurable logic device that allow independent logic circuit reconfiguration.
[0154] The task execution module 908 is used to perform a reconstruction operation on the target reconstruction area corresponding to the subtask in the multiple subtasks according to the hardware acceleration template corresponding to the subtask in the multiple subtasks, obtain a new target reconstruction area corresponding to the subtask in the multiple subtasks, and execute the corresponding subtask through the new target reconstruction area corresponding to the subtask in the multiple subtasks.
[0155] It should be noted that the task decomposition module 902 in this embodiment can be used to execute the above step S202, the accelerated template matching module 904 in this embodiment can be used to execute the above step S204, the reconstruction area determination module 906 in this embodiment can be used to execute the above step S206, and the task execution module 908 in this embodiment can be used to execute the above step S208.
[0156] In an exemplary embodiment, the hardware acceleration templates stored in the precompiled acceleration template library include configuration instructions for tasks of different operation types. The acceleration template matching module 904 is also used to determine the hardware acceleration template in the precompiled acceleration template library that matches the operation type of a subtask among multiple subtasks as the hardware acceleration template corresponding to the subtask among multiple subtasks.
[0157] In an exemplary embodiment, the reconstruction area determination module 906 is also used to perform matching calculations on subtasks in multiple subtasks based on the computing requirement data of the subtasks in the multiple subtasks and the current resource status of the multiple reconstruction areas, and determine the target reconstruction areas corresponding to the subtasks in the multiple subtasks.
[0158] In an exemplary embodiment, the reconstruction area determination module 906 is also used to generate a task requirement vector of a subtask among multiple subtasks based on the computational requirement data of the subtasks among the multiple subtasks; generate multiple area resource vectors based on the current resource status of the multiple reconstruction areas; the multiple area resource vectors correspond one-to-one to the multiple reconstruction areas; calculate the distance between the task requirement vector of the subtask among the multiple subtasks and the multiple area resource vectors, and determine the reconstruction area corresponding to the minimum distance as the target reconstruction area corresponding to the subtask among the multiple subtasks.
[0159] In an exemplary embodiment, the computing requirement data of a subtask among multiple subtasks includes the expected computing power, expected memory capacity and expected reconstruction delay upper limit of the subtask among the multiple subtasks. The reconstruction area determination module 906 is also used to generate a first task element based on the expected computing power of the subtask among the multiple subtasks; generate a second task element based on the expected memory capacity of the subtask among the multiple subtasks; generate a third task element based on the expected reconstruction delay upper limit of the subtask among the multiple subtasks; and generate a task requirement vector of the subtask among the multiple subtasks based on the first task element, the second task element and the third task element.
[0160] In an exemplary embodiment, the current resource status of a reconstruction area among multiple reconstruction areas includes the current computing power, current memory capacity, and current reconstruction delay estimation value of the reconstruction area among the multiple reconstruction areas. The reconstruction area determination module 906 is also used to take the reconstruction area among the multiple reconstruction areas as the current reconstruction area, and perform the following vector generation operations to obtain multiple area resource vectors: based on the current computing power of the current reconstruction area, generate a first area element; based on the current memory capacity of the current reconstruction area, generate a second area element; based on the current reconstruction delay estimation value of the current reconstruction area, generate a third area element; and generate an area resource vector corresponding to the current reconstruction area based on the first area element, the second area element, and the third area element.
[0161] In an exemplary embodiment, the reconstruction area determination module 906 is also used to calculate the distance between the task requirement vector of a subtask in multiple subtasks and the multiple regional resource vectors using the Euclidean distance calculation formula; the Euclidean distance calculation formula represents the difference between the corresponding elements in the two vectors, and the correlation relationship between the difference and the normalization factor and the indicator weight.
[0162] In an exemplary embodiment, the task requirement vector of a subtask among multiple subtasks includes a first task element, a second task element, and a third task element; the regional resource vector of a reconstructed area among multiple reconstructed areas includes a first regional element, a second regional element, and a third regional element; the Euclidean distance calculation formula includes a first normalization factor, a second normalization factor, a third normalization factor, a first indicator weight, a second indicator weight, and a third indicator weight; the reconstructed area determination module 906 is further used to use the task requirement vector of the subtask among the multiple subtasks as the current task requirement vector, and use the regional resource vector among the multiple regional resource vectors as the current regional resource vector, perform a distance calculation operation, and obtain the distance between the task requirement vector of the subtask among the multiple subtasks and the multiple regional resource vectors: calculate the first difference between the first task element of the current task requirement vector and the first regional element of the current regional resource vector , a second difference between the second task element of the current task requirement vector and the second regional element of the current regional resource vector, and a third difference between the third task element of the current task requirement vector and the third regional element of the current regional resource vector; determining a first square difference based on a first ratio between the first difference and the first normalization factor; determining a second square difference based on a second ratio between the second difference and the second normalization factor; determining a third square difference based on a third ratio between the third difference and the third normalization factor; weighting the first square difference using the first indicator weight to obtain a first weighted value; weighting the second square difference using the second indicator weight to obtain a second weighted value; weighting the third square difference using the third indicator weight to obtain a third weighted value; and determining the square root of the sum of the first weighted value, the second weighted value, and the third weighted value as the distance between the current task requirement vector and the current regional resource vector.
[0163] In an exemplary embodiment, before performing a reconstruction operation on a target reconstruction area corresponding to a subtask among multiple subtasks according to a hardware acceleration template corresponding to the subtask among multiple subtasks, the task execution module 908 is also used to pre-check the target reconstruction area corresponding to the subtask among multiple subtasks; when there is no real-time data transmission task in the target reconstruction area corresponding to the subtask among multiple subtasks, executing the step of performing a reconstruction operation on the target reconstruction area corresponding to the subtask among multiple subtasks according to the hardware acceleration template corresponding to the subtask among multiple subtasks.
[0164] In an exemplary embodiment, the task execution module 908 is also used to migrate the real-time data transmission task to other reconstruction areas, or wait for the real-time data transmission task to be completed when there is a real-time data transmission task in the target reconstruction area corresponding to the subtask among multiple subtasks.
[0165] In an exemplary embodiment, the task execution module 908 is also used to monitor the operating status data of the reconfigurable logic device in real time; when the operating status data indicates that there is an abnormal first reconstruction area, a spare hardware acceleration template is used to perform a reconstruction operation on the first reconstruction area; the spare hardware acceleration template is compatible with the hardware characteristics of multiple reconstruction areas.
[0166] In an exemplary embodiment, the task execution module 908 is further configured to migrate the subtasks on the second reconstruction area to other reconstruction areas when the operating status data indicates that there is a second reconstruction area with a load exceeding a preset threshold.
[0167] For the description of the features in the embodiment corresponding to the server scheduling device, please refer to the relevant description of the embodiment corresponding to the server scheduling method, which will not be repeated here.
[0168] An embodiment of the present application further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above server scheduling method embodiments.
[0169] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned server scheduling method embodiments when running.
[0170] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.
[0171] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned server scheduling method embodiments are implemented.
[0172] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned server scheduling method embodiments are implemented.
[0173] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0174] The above is a detailed introduction to a server scheduling method, device, storage medium and program product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.
Claims
1. A server scheduling method, characterized in that: include: Decompose the computation task sent by the target object into multiple subtasks; Extracting a hardware acceleration template corresponding to a subtask among the plurality of subtasks from a precompiled acceleration template library; the hardware acceleration template stored in the precompiled acceleration template library refers to hardware circuit configurations precompiled for tasks of different operation types; Determining a target reconfiguration area corresponding to a subtask in the plurality of subtasks from a plurality of reconfiguration areas; the plurality of reconfiguration areas refer to logic blocks divided on a reconfigurable logic device that allow independent reconfiguration of logic circuits; Preliminarily checking target reconstruction areas corresponding to subtasks among the plurality of subtasks; In the case where there is no real-time data transmission task in the target reconstruction area corresponding to the subtask among the multiple subtasks, a reconstruction operation is performed on the target reconstruction area corresponding to the subtask among the multiple subtasks according to the hardware acceleration template corresponding to the subtask among the multiple subtasks to obtain a new target reconstruction area corresponding to the subtask among the multiple subtasks, and the corresponding subtask is executed through the new target reconstruction area corresponding to the subtask among the multiple subtasks.
2. The server scheduling method according to claim 1, wherein: The hardware acceleration templates stored in the precompiled acceleration template library include configuration instructions for tasks of different computing types; The extracting, from the precompiled acceleration template library, a hardware acceleration template corresponding to a subtask among the plurality of subtasks comprises: A hardware acceleration template in the precompiled acceleration template library that matches the operation type of a subtask among the multiple subtasks is determined as the hardware acceleration template corresponding to the subtask among the multiple subtasks.
3. The server scheduling method according to claim 1, wherein: The determining, from the plurality of reconstruction regions, a target reconstruction region corresponding to a subtask among the plurality of subtasks includes: According to the computational requirement data of the subtasks among the multiple subtasks and the current resource status of the multiple reconstruction areas, matching computations are performed on the subtasks among the multiple subtasks to determine target reconstruction areas corresponding to the subtasks among the multiple subtasks.
4. The server scheduling method according to claim 3, wherein: The performing matching calculations on the subtasks in the plurality of subtasks according to the computational requirement data of the subtasks and the current resource states of the plurality of reconstruction areas to determine target reconstruction areas corresponding to the subtasks in the plurality of subtasks includes: generating a task requirement vector for a subtask in the plurality of subtasks based on the computational requirement data for the subtask in the plurality of subtasks; generating a plurality of regional resource vectors based on current resource states of the plurality of reconstruction regions, wherein the plurality of regional resource vectors correspond one-to-one to the plurality of reconstruction regions; The distances between the task requirement vectors of the subtasks among the multiple subtasks and the multiple regional resource vectors are calculated, and a reconstruction region corresponding to a minimum distance is determined as a target reconstruction region corresponding to the subtask among the multiple subtasks.
5. The server scheduling method according to claim 4, characterized in that: The computing requirement data of a subtask in the plurality of subtasks includes the expected computing capability, expected memory capacity, and expected reconstruction delay upper limit of the subtask in the plurality of subtasks; Generating a task requirement vector of a subtask among the plurality of subtasks based on the computational requirement data of the subtasks includes: generating a first task element based on expected computing capabilities of subtasks among the plurality of subtasks; generating a second task element based on an expected memory capacity of a subtask among the plurality of subtasks; generating a third task element based on an expected reconstruction delay upper bound of a subtask among the plurality of subtasks; A task requirement vector of a subtask among the plurality of subtasks is generated according to the first task element, the second task element, and the third task element.
6. The server scheduling method according to claim 4, characterized in that: The current resource status of the reconstruction area among the multiple reconstruction areas includes the current computing capability, the current memory capacity, and the current reconstruction delay estimation value of the reconstruction area among the multiple reconstruction areas; The generating of a plurality of regional resource vectors based on current resource states of the plurality of reconstruction regions comprises: A reconstructed region among the multiple reconstructed regions is used as a current reconstructed region, and the following vector generation operation is performed to obtain the multiple region resource vectors: generating a first region element based on a current computing capability of the current reconstruction region; generating a second region element based on a current memory capacity of the current reconstruction region; generating a third region element based on a current reconstruction delay estimate of the current reconstruction region; A regional resource vector corresponding to the current reconstruction area is generated according to the first regional element, the second regional element, and the third regional element.
7. The server scheduling method according to claim 4, characterized in that: The calculating the distance between the task requirement vector of the subtask in the plurality of subtasks and the plurality of regional resource vectors includes: The Euclidean distance calculation formula is used to calculate the distance between the task requirement vector of the subtask in the multiple subtasks and the multiple regional resource vectors; the Euclidean distance calculation formula represents the difference between corresponding elements in the two vectors, and the correlation relationship between the difference and the normalization factor and the indicator weight.
8. The server scheduling method according to claim 7, characterized in that: The task requirement vector of the subtask in the plurality of subtasks includes a first task element, a second task element, and a third task element; the regional resource vector of the reconstructed area in the plurality of reconstructed areas includes a first regional element, a second regional element, and a third regional element; the Euclidean distance calculation formula includes a first normalization factor, a second normalization factor, a third normalization factor, a first indicator weight, a second indicator weight, and a third indicator weight; The calculating of the distance between the task requirement vector of the subtask in the plurality of subtasks and the plurality of regional resource vectors by using the Euclidean distance calculation formula includes: The task requirement vector of the subtask in the multiple subtasks is used as the current task requirement vector, and the regional resource vector in the multiple regional resource vectors is used as the current regional resource vector, and a distance calculation operation is performed to obtain the distance between the task requirement vector of the subtask in the multiple subtasks and the multiple regional resource vectors: Calculating a first difference between a first task element of the current task requirement vector and a first regional element of the current regional resource vector, a second difference between a second task element of the current task requirement vector and a second regional element of the current regional resource vector, and a third difference between a third task element of the current task requirement vector and a third regional element of the current regional resource vector; determining a first square difference based on a first ratio between the first difference and the first normalization factor; determining a second square difference based on a second ratio between the second difference and the second normalization factor; and determining a third square difference based on a third ratio between the third difference and the third normalization factor; The first square difference is weighted using the first indicator weight to obtain a first weighted value; the second square difference is weighted using the second indicator weight to obtain a second weighted value; and the third square difference is weighted using the third indicator weight to obtain a third weighted value; The square root of the sum of the first weighted value, the second weighted value, and the third weighted value is determined as the distance between the current task demand vector and the current area resource vector.
9. The server scheduling method according to claim 1, wherein: The method further comprises: When a real-time data transmission task exists in the target reconstruction area corresponding to a subtask among the multiple subtasks, the real-time data transmission task is migrated to another reconstruction area, or the execution of the real-time data transmission task is waited for to be completed.
10. The server scheduling method according to any one of claims 1 to 9, characterized in that: The method further comprises: Monitor the operating status data of the reconfigurable logic device in real time; when the operating status data indicates that an abnormal first reconstruction area exists, use a spare hardware acceleration template to perform a reconstruction operation on the first reconstruction area; the spare hardware acceleration template is compatible with the hardware characteristics of the multiple reconstruction areas.
11. The server scheduling method according to claim 10, characterized in that: The method further comprises: When the running status data indicates that there is a second reconstruction area with a load exceeding a preset threshold, the subtask on the second reconstruction area is migrated to another reconstruction area.
12. A server scheduling device, characterized in that: include: The task decomposition module is used to decompose the computing task sent by the target object into multiple subtasks; an acceleration template matching module, configured to extract a hardware acceleration template corresponding to a subtask among the plurality of subtasks from a precompiled acceleration template library; the hardware acceleration templates stored in the precompiled acceleration template library are hardware circuit configurations precompiled for tasks of different operation types; a reconfiguration region determining module, configured to determine, from a plurality of reconfiguration regions, a target reconfiguration region corresponding to a subtask among the plurality of subtasks; the plurality of reconfiguration regions being logic blocks partitioned on a reconfigurable logic device that allow independent reconfiguration of logic circuits; A task execution module, configured to pre-check target reconstruction areas corresponding to subtasks among the plurality of subtasks; In the case that there is no real-time data transmission task in the target reconstruction area corresponding to the subtask among the multiple subtasks, a reconstruction operation is performed on the target reconstruction area corresponding to the subtask among the multiple subtasks according to the hardware acceleration template corresponding to the subtask among the multiple subtasks to obtain a new target reconstruction area corresponding to the subtask among the multiple subtasks, and the corresponding subtask is executed through the new target reconstruction area corresponding to the subtask among the multiple subtasks.
13. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the server scheduling method according to any one of claims 1 to 11 are implemented.
14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the server scheduling method according to any one of claims 1 to 11 are implemented.
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