Optimization solution method for nonlinear equation set in integrated circuit simulation
By checking and correcting the singularity of the Jacobian matrix in integrated circuit simulation, the problem of Newton's iteration interruption due to matrix singularity is solved, and the stability and robustness of the circuit simulation are improved.
Patent Information
- Application Number
- CN202510223366.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-05-30
AI Technical Summary
In integrated circuit simulation, Newton's iterative method causes matrix singularity due to failure to solve the linear system of equations, resulting in the simulation exception exit.
By checking whether the Jacobian matrix is a Laplace matrix, if so, add a preset value to make it reversible; if not, further check and add a small value to the main diagonal to make the matrix reversible.
Making the matrix forced reversible avoids simulation exception exit caused by failure to solve the system of linear equations, and improves the stability and robustness of the circuit simulation.
Smart Images
Figure CN120067500A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuit design, and particularly to an optimized solution method for non - linear equations in integrated circuit simulation. Background Art
[0002] In the field of integrated circuit computer - aided design (Integrated Circuit / Computer Aided Design), especially in the field of EDA circuit simulation technology, transient simulation is one of the most commonly used circuit simulation functions by circuit design engineers. It selects several sampling points within a time interval. At each sampling point, taking the circuit node voltages as unknowns, a non - linear equation set F(x k ) = 0 formed by the circuit is solved.
[0003] Newton iteration is the most commonly used and effective method for solving non - linear equation sets. In the process of its solution, it involves solving a linear equation set. The solution of the linear equation set is a correction amount used to correct the unknown x k , so that the new unknown x k+1 corresponding residual F(x k+1 ) is smaller. Among them, a necessary condition for successfully solving the linear equation set is that its coefficient matrix is an invertible matrix, that is, a non - singular matrix. However, the directly established circuit equations do not necessarily always meet this requirement. At this time, the Newton iteration will be interrupted due to the failure of solving the linear equation set, and the simulation will exit abnormally. Summary of the Invention
[0004] In order to solve the defects of the prior art, the purpose of the present invention is to provide an optimized solution method for non - linear equation sets in integrated circuit simulation, correct the matrix singularity to make the matrix invertible, and then smoothly find the correction amount of the unknowns in Newton iteration, avoiding the phenomenon that the circuit simulation exits abnormally due to the failure of solving the linear equation set.
[0005] To achieve the above - mentioned purpose, on the one hand, the present invention provides an optimized solution method for non - linear equation sets in integrated circuit simulation, including:
[0006] 1) Select an initial value of the unknowns, where the unknowns are the circuit node voltages at each sampling point;
[0007] 2) Calculate the residual according to the current value of the unknowns. If the residual is zero, take the current value of the unknowns as the solution of the non - linear circuit equation set, and the iteration terminates. Otherwise, calculate the Jacobian matrix of the circuit equation at the current value of the unknowns;
[0008] 3) Establish and solve a linear equation set according to the Jacobian matrix and the circuit equation;
[0009] 4) Add the current value of the unknown to the solution of the linear equation system to obtain the updated value of the unknown, and return to step 2) above to continue the iteration;
[0010] Step 3) further includes: checking whether the Jacobian matrix is a Laplacian matrix. If so, add a preset value to each of its main diagonal elements to obtain a singularity-corrected Jacobian matrix; use the corrected Jacobian matrix to replace the original Jacobian matrix and solve the linear equation system.
[0011] Further, the step of checking whether the Jacobian matrix is a Laplacian matrix further includes:
[0012] Establish two floating-point vectors, namely the first vector and the second vector, and the length of each vector is the dimension of the Jacobian matrix;
[0013] Store the main diagonal elements of the Jacobian matrix in the first vector;
[0014] Store the sum of each row element of the Jacobian matrix in the second vector;
[0015] If the elements of the first vector are equal and the elements of the second vector are all zero, it is determined that the Jacobian matrix is a Laplacian matrix; otherwise, it is not a Laplacian matrix.
[0016] Further, in step 3), if the Jacobian matrix is not a Laplacian matrix, further check the Jacobian matrix, including:
[0017] Establish a flag array, the length of the flag array is the number of rows + the number of columns of the Jacobian matrix, and initialize the flag array to the first flag, indicating that each row and each column of the matrix are all zero;
[0018] Check the Jacobian matrix row by row and column by column, and record the main diagonal positions;
[0019] For the non-zero elements in the Jacobian matrix, modify the corresponding row and column flags in the flag array to the second flag;
[0020] After all elements of the Jacobian matrix have been checked, if there is a row or column in the flag array whose flag is still the first flag, add a preset value to the main diagonal at the position corresponding to the first flag to make the Jacobian matrix invertible.
[0021] On the other hand, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor is used to execute the computer program stored in the memory to implement the steps of the optimization solution method for the non-linear equation system in the above-mentioned integrated circuit simulation.
[0022] On the other hand, the present invention also provides a computer-readable storage medium, in which a computer program is stored, and the computer program is loaded and executed by a processor to implement the steps of the optimization solution method for non-linear equations in the integrated circuit simulation as described above.
[0023] The optimization solution method for non-linear equations in the integrated circuit simulation provided by the present invention has the following beneficial effects compared with the prior art:
[0024] By correcting the singularity of the matrix, the matrix is forced to be invertible, so that a numerical solution can be obtained by the direct decomposition method, and the correction amount of the unknowns for Newton iteration can be found, avoiding the phenomenon that the circuit simulation exits abnormally due to the failure of solving the linear equations.
[0025] Other features and advantages of the present invention will be described in the following specification, and part of them will be obvious from the specification, or will be understood by implementing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The drawings are used to provide a further understanding of the present invention, and constitute a part of the specification, and together with the embodiments of the present invention, are used to explain the present invention, and do not constitute a limitation to the present invention. In the drawings:
[0027] Figure 1 is a flowchart of the optimization solution method for non-linear equations in the integrated circuit simulation according to an embodiment of the present invention;
[0028] Figure 2 is a flowchart of correcting the singularity of the Laplace matrix according to an embodiment of the present invention;
[0029] Figure 3 is a flowchart of correcting the singularity of the non-Laplace matrix according to an embodiment of the present invention;
[0030] Figure 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0031] The following describes the preferred embodiments of the present invention with reference to the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not used to limit the present invention.
[0032] The embodiments of the present invention will be described in more detail below with reference to the drawings. Although some embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided to more thoroughly and completely understand the present invention. It should be understood that the drawings and embodiments of the present invention are only for exemplary purposes and are not used to limit the protection scope of the present invention.
[0033] As used herein, the term "comprising" and its variations are open-ended, i.e., "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the following description.
[0034] It should be understood that the concepts such as "first" and "second" that may be mentioned in the present invention are only used to distinguish different data or units, and are not used to limit the order or interdependence of the functions performed by these data or units. These terms are only used to distinguish one feature from another. For example, without departing from the scope of the exemplary embodiments, the first feature may be referred to as the second feature, and similarly the second feature may be referred to as the first feature.
[0035] In an embodiment of the present invention, an optimized solution method for a system of non-linear equations in integrated circuit simulation is provided for solving a system of non-linear circuit equations, including the following steps:
[0036] 1) Select an initial value of the unknowns, where the unknowns are the circuit node voltages at each sampling point;
[0037] 2) Calculate the residual according to the current value of the unknowns. If the residual is zero, then take the current value of the unknowns as the solution of the system of non-linear equations and terminate the iteration. Otherwise, calculate the Jacobian matrix of the circuit equations at the current value of the unknowns;
[0038] 3) Establish and solve a system of linear equations based on the Jacobian matrix and the circuit equations;
[0039] 4) Add the solution of the system of linear equations to the current value of the unknowns to obtain an updated value of the unknowns, and return to step 2) to continue;
[0040] Wherein, step 3) further includes: checking whether the Jacobian matrix is a Laplacian matrix. If so, add a preset value to each main diagonal element of the Jacobian matrix to correct the Jacobian matrix to a non-singular matrix for replacing the original Jacobian matrix, and then solve the solution of the system of linear equations.
[0041] Figure 1 For the flowchart of the optimized solution method for a system of non-linear equations in integrated circuit simulation according to an embodiment of the present invention, the following will be combined with Figure 1 Make a further detailed description of the specific implementation manners of the present invention.
[0042] First, in step 101, select an initial value x of the unknowns 0 , and set the initial value of the iteration count to k = 0.
[0043] In an embodiment of the present invention, in transient circuit simulation, a number of sampling points are selected within a time interval. At each sampling point, taking the circuit node voltage as an unknown, a non-linear equation set F(x k ) = 0 formed by the circuit is solved.
[0044] In step 102, calculate the residual F(x k ).
[0045] In step 103, determine whether F(x k ) is zero; if F(x k ) = 0, take x k as the solution of the non-linear equation set F(x) = 0, and the iteration terminates; otherwise, enter step 103.
[0046] In step 104, calculate the Jacobi matrix A = F'(x k ) of F(x) at x. k ).
[0047] In step 105, solve the linear equation Ad = b, where b = -F(x k ).
[0048] In step 106, let x k+1 = x k + d, k = k + 1, and return to step 102.
[0049] In an embodiment of the present invention, step 103 further includes: checking whether the A matrix is a Laplacian matrix. If so, add a preset small value 10 -9 to all diagonal elements of the A matrix to make the A matrix invertible.
[0050] In an embodiment of the present invention, checking whether the A matrix is a Laplacian matrix, that is, a matrix generated only by a linear resistor-capacitor network. The characteristics of the Laplacian matrix are: the sum of its diagonal elements is the negative of the sum of its non-diagonal elements. The specific steps for checking whether the A matrix is a Laplacian matrix are:
[0051] Step0: Establish two floating-point vectors, namely the first vector and the second vector, and the length of each vector is the dimension of the A matrix;
[0052] Step1: Store the diagonal elements of the A matrix in the first vector;
[0053] Step2: Store the sum of each row element of the A matrix in the second vector;
[0054] Step 3: If all elements of the first vector are equal and all elements of the second vector are zero, then determine that matrix A is a Laplacian matrix; otherwise, matrix A is not a Laplacian matrix.
[0055] Figure 2 The flowchart for correcting the singularity of the Laplacian matrix according to an embodiment of the present invention is as follows. The process of correcting the singularity of the Laplacian matrix will be described in detail below in conjunction with Figure 2 the detailed description of the process of correcting the singularity of the Laplacian matrix.
[0056] First, in step 201, two floating-point vectors a and b are established. The length of each vector is the dimension of matrix A.
[0057] In step 202, the main diagonal elements of matrix A are stored in vector a; the sum of the elements in each row of matrix A is stored in vector b.
[0058] In step 203, it is judged whether all elements of vector a are equal and all elements of vector b are zero. If so, then determine that matrix A is a Laplacian matrix and proceed to step 204; otherwise, exit.
[0059] In step 204, a preset small value is added to all the main diagonal elements of matrix A to make matrix A invertible. The preset small value is less than 1e-9 (indicating 10 -9 ), and the closer it is to 0, the less it affects the calculation result.
[0060] The following is an example. The symmetric Laplacian matrix generated by a linear circuit is as follows:
[0061]
[0062] Since its matrix rank is less than the matrix dimension, it will cause the matrix to be singular. The matrix is checked to see if it is a Laplacian matrix according to the above correction method:
[0063] First, two floating-point vectors a = [0, 0] and b = [0, 0] are established. Then, the two diagonal elements of the matrix are stored in vector a, resulting in a = [1, 1], and the sum of the elements in each row of the matrix is stored in vector b, resulting in b = [0, 0]. Since the elements of vector a are all equal and the elements of vector b are all zero, it is determined that the matrix is a Laplacian matrix.
[0064] A small value of 10 -9 is added to all the main diagonal elements of the matrix to obtain the following invertible matrix:
[0065]
[0066] After adding the small value to all the main diagonal elements, the singularity of the Laplacian matrix is corrected, that is, it is forced to be invertible.
[0067] Further, if the A matrix is not a Laplacian matrix, further inspection and processing of the A matrix are required to correct the singularity of the non-Laplacian matrix, including the following steps:
[0068] Step0: Establish a flag array with a length equal to the number of rows + columns of the matrix, and initialize the flag array to the first flag (e.g., true), indicating that all rows and columns of the matrix are 0;
[0069] Step1: Inspect the A matrix row by row or column by column;
[0070] Step2: Record the positions of the main diagonal of the A matrix;
[0071] Step3: For non-zero elements in the A matrix, modify the corresponding row and column flags in the flag array to the second flag (e.g., false);
[0072] Step4: After all elements of the A matrix have been inspected, if there are still rows or columns in the flag array with the flag being true, add a preset small value to the main diagonal at the position corresponding to true to make the A matrix invertible.
[0073] Figure 3 The flowchart for correcting the singularity of the non-Laplacian matrix according to an embodiment of the present invention is as follows. As Figure 3 shown, first in step 301, obtain the dimension n of the non-Laplacian matrix, establish a flag array f with a length of 2n, and set all flags of f to true.
[0074] In step 302, check the k-th row (k = 1,..., n) of the non-Laplacian matrix. If there are non-zero elements in this row, then set f[k] = false.
[0075] In step 303, check the k-th column (k = 1,..., n) of the non-Laplacian matrix. If there are non-zero elements in this column, then set f[n + k] = false.
[0076] In step 304, determine whether there are elements in f with the flag being true. If so, enter step 305; otherwise, exit.
[0077] In step 305, add a preset small value to the main diagonal element at the position corresponding to true to obtain a forced invertible matrix.
[0078] The following is an example. For a 3×3 non-symmetric matrix and non-linear matrix:
[0079]
[0080] The black squares in the matrix can be zero elements or non-zero elements, which do not affect the decomposition result. First, create a flag array of length 6 to represent zero rows and zero columns (each element in a row is zero and each element in a column is zero), initialized to true. The first three elements of the array can represent rows, and the last three can represent columns. Then, according to the storage method, check all elements in sequence and record the main diagonal positions. If the current element is non-zero, set the corresponding row or column flag in the flag array to false. For this example, the first and second elements of the flag array are false, and the third element is true. The last three elements are false, indicating that the third row is a zero row. Then add a small value of 10 at the main diagonal position of the third row -9 , to obtain an invertible matrix:
[0081]
[0082] The above corrected matrix is an invertible matrix. Using it to replace the Jacobi matrix in the original Newton iteration can successfully solve the solution of the linear equation, so that the Newton iteration can continue to execute
[0083] In actual integrated circuit simulation, there are many factors that cause the circuit simulation to encounter a singular matrix. In circuit design, limit tests need to be performed, such as short circuits or open circuits formed under conditions such as temperature and pressure, resulting in a singular matrix. In many designs, there are current sources in series, which will directly form a matrix with a singular row. Or there are some complex voltage-controlled device designs that result in a singular row during the process of solving the matrix. Once a singular matrix is encountered, the process of Newton iteration will be interrupted, and the process of circuit simulation cannot continue, affecting the circuit designer's verification of the circuit performance indicators and even causing the circuit design to be unable to be completed
[0084] The positive aspect of the present invention is to change the singularity of the matrix in the above special cases, make the singular matrix forcibly invertible, and the linear equations can be solved normally, solving the problems of the failure of Newton iteration to find the correction amount of the unknowns and the interruption of iteration, improving the stability and robustness of the circuit simulator, and thus promoting the normal completion of circuit simulation
[0085] In an embodiment of the present invention, an electronic device is further provided Figure 4 For the structural schematic diagram of the electronic device according to the embodiment of the present invention, as Figure 4 shown, the electronic device of the present invention includes a processor 401 and a memory 402, wherein
[0086] The memory 402 stores a computer program, and when the computer program is read and executed by the processor 401, it executes the steps in the embodiment of the optimization solution method of the non-linear equations in the above-mentioned integrated circuit simulation
[0087] In an embodiment of the present invention, there is also provided a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in the embodiment of the optimization solution method for the non-linear equations in the integrated circuit simulation as described above when running.
[0088] In this embodiment, the above computer-readable storage medium may include but is not limited to: various media such as USB flash drives, read-only memories (ROM), random access memories (RAM), mobile hard disks, magnetic disks, or optical discs that can store computer programs.
[0089] Those of ordinary skill in the art can understand that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A method for optimizing and solving a nonlinear system of equations in integrated circuit simulation, characterized in that: include: 1) Selecting an initial value of an unknown number, where the unknown number is the circuit node voltage at each sampling point; 2) Calculate the residual according to the current value of the unknown number. If the residual is zero, the current value of the unknown number is used as the solution of the nonlinear circuit equation group and the iteration is terminated. Otherwise, the Jacobian matrix of the circuit equation under the current value of the unknown number is calculated; 3) Establish and solve a system of linear equations based on the Jacobian matrix and circuit equations; 4) adding the current value of the unknown number to the solution of the linear equation system to obtain the updated value of the unknown number, and returning to step 2) to continue iterating; The step 3) further includes: checking whether the Jacobian matrix is a Laplace matrix, and if so, adding preset values to all main diagonal elements thereof to obtain a Jacobian matrix after singularity correction; The modified Jacobian matrix is used to replace the original Jacobian matrix to solve the linear equations.
2. The optimization solution method for nonlinear equations in integrated circuit simulation according to claim 1, characterized in that: The step of checking whether the Jacobian matrix is a Laplace matrix further comprises: Create two floating-point vectors, namely the first vector and the second vector, and the length of each vector is the dimension of the Jacobian matrix; Storing the main diagonal elements of the Jacobian matrix in the first vector; storing the sum of each row of the Jacobian matrix in the second vector; If the elements of the first vector are equal, and the elements of the second vector are all zero, it is determined that the Jacobian matrix is a Laplacian matrix, otherwise it is not a Laplacian matrix.
3. The optimization solution method for nonlinear equations in integrated circuit simulation according to claim 1, characterized in that: In step 3), if the Jacobian matrix is not a Laplace matrix, the Jacobian matrix is further checked, including: Establish a flag array, the length of which is the number of rows + the number of columns of the Jacobian matrix, and initialize the flag array to the first flag, indicating that each row and column of the matrix is zero; Check the Jacobian matrix row by row and column by column and record the main diagonal position; Corresponding to the non-zero elements in the Jacobian matrix, modifying the corresponding row and column identifiers in the identifier array to the second identifier; After all elements of the Jacobian matrix are checked, if there is a row or column in the flag array whose identifier is still the first identifier, a preset value is added to the main diagonal of the position corresponding to the first identifier to make the Jacobian matrix reversible.
4. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: The processor is used to execute the computer program stored in the memory to implement the steps of the method for optimizing the solution of the nonlinear equation group in the integrated circuit simulation according to any one of claims 1 to 3.
5. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, which is loaded and executed by a processor to implement the steps of the method for optimizing the solution of a group of nonlinear equations in integrated circuit simulation according to any one of claims 1 to 3.