Automated non-canonical wafer screening using measured grain parameters and historically recorded grain parameters

Abstract

An automated non-canonical screening of semiconductor wafers takes into account positional dependencies of historically recorded measurement parameters. For each of a plurality of dies on a screened test wafer, die screening is performed, including measuring a parameter value at a location and comparing the parameter value with a historically recorded desired parameter value at the location. This comparison results in a deviation between a measured parameter value and a desired parameter value of the grain at the location. Then, the deviation parameter value of the detected wafer is calculated by using the deviation values of the plurality of crystal grains on the detected wafer. If the deviation parameter value of the detected wafer falls outside the deviation tolerance, the detected wafer is identified as a non-standard wafer.

Description

Background Art

[0001] Integrated circuits are typically manufactured by performing a series of processing steps on a semiconductor wafer. A wafer is a thin, flat, circular disc of semiconductor material (most commonly silicon). The wafer undergoes several processing steps to form various electronic circuits on its surface. Each integrated circuit is fabricated in a dedicated area of the semiconductor wafer in a grid pattern. Once the wafer is fully processed with the integrated circuits formed in each dedicated area of the grid pattern, the semiconductor wafer is cut along the grid pattern into component dice. Such dice are commonly referred to as "chips". Each die on the wafer typically has the same electronic circuit, and the wafer can contain anywhere from just a few dice to thousands of dice, depending on the size of the wafer and the size of each die.

[0002] After cutting, each die is typically tested to ensure functionality. The dice that fail the test are marked and discarded. Testing can occur before cutting (referred to as "wafer-level testing"), and some testing can occur after cutting (referred to as "chip-level testing"). In any case, the functional dice are encapsulated to protect them and provide connections to external devices or circuits (usually via pins or solder balls). Testing performed on the overall package is called "package-level testing". The functional packages can be mounted on a circuit board and used in various electronic devices.

[0003] Sometimes unexpected situations occur during the processing of the wafer, which will cause the wafer to be considered an outlier that deviates too far from the specification. Such wafers are commonly referred to as "non-specification wafers". For example, an unexpected environment may be encountered, or a processing machine may malfunction. Thus, non-specification screening is typically performed to identify non-specification wafers and then determine what adjustments or corrections can be made in the manufacturing process or environment to correct the manufacturing problem. In addition, non-specification wafers can be processed uniquely, such as by discarding the entire wafer or perhaps more conservatively selecting which dice to discard. For example, if a non-specification wafer is considered non-specification because the wafer has areas showing abnormal measurement results, then the dice within and near that area may be marked for discard.

[0004] The subject matter claimed herein is not limited to embodiments that solve any disadvantages or operate only in environments such as those described above. Instead, this background art merely provides an exemplary technical field in which some of the embodiments described herein may be practiced. Summary of the Invention

[0005] The present invention content is provided to introduce, in simplified form, a selection of concepts that will be further described in the following detailed description. The present invention content is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0006] The embodiments described herein relate to automated non - canonical screening of semiconductor wafers. In the normal processing of wafers, it can be expected that a given parameter varies in a particular way depending on the location on the wafer. For example, for one parameter, it can be perfectly normal to have lower measurements towards the center of the wafer and higher measurements towards the edge of the wafer. Thus, for a given parameter, it can be expected that the location - specific correlation of that parameter (commonly referred to as the "desired heatmap") has a particular pattern on the wafer. However, for another parameter (the "second parameter"), the normal location - specific correlation of the second parameter can be quite different from the normal location - specific correlation of the first parameter.

[0007] An experienced semiconductor test engineer may be able to judge whether the heatmap pattern of a particular parameter is different from the desired heatmap, thus indicating that the wafer is a non - canonical wafer. However, according to the principles described herein, a non - canonical wafer detection is automatically determined for a given parameter, regardless of the parameter - specific nature of what the desired heatmap might look like.

[0008] Specifically, for each of a plurality of die on the wafer under inspection being screened, die screening is performed. Die screening includes measuring a parameter of the die. That measured parameter value is compared with a desired parameter value. The desired parameter value depends on the historical record of the measured parameter values of the previous die at the same location on previously screened wafers. This comparison results in a deviation between the measured parameter value of the die at that location and the desired parameter value of the die at that location. This die screening is performed for a plurality of die on the wafer to compare with the historical record desired parameter values of the die at the corresponding locations. Note that the historical record is specific to the location of the die on the wafer, and thus will account for specific differences based on wafer location that are specific to that particular parameter.

[0009] Then, the deviation parameter value of the wafer under inspection is calculated using the deviation values of a plurality of die on the wafer under inspection. If the deviation parameter value of the wafer under inspection falls outside the deviation tolerance, the wafer under inspection is identified as a non - canonical wafer. This non - canonical screening is performed automatically. Thus, more non - canonical screening can be performed without manual intervention. Additionally, since no manual intervention is required, non - canonical wafers can be detected earlier. Then such identified non - canonical wafers can be further evaluated for earlier correction of the manufacturing process.

[0010] Additional features and advantages will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the teachings herein. The features and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims. The features of the invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention set forth hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] To describe the manner in which the above-recited and other advantages and features can be obtained, a more particular description of the subject matter briefly described above will be rendered by reference to specific embodiments which are illustrated in the appended drawings. It is to be understood that these drawings depict only typical embodiments and are not therefore to be considered limiting of its scope, and the embodiments will be described and explained with additional specificity and detail with reference to the drawings in which:

[0012] Figure 1 Nine examples of position-specific correlations on a wafer are illustrated;

[0013] Figure 2 A plan view of a semiconductor wafer is illustrated that includes sixteen die configured in a four-by-four grid, which is a simple example of a wafer under test that is to be automatically screened for non-normality detection;

[0014] Figure 3 A flowchart of a method for automatically performing non-normality screening on a semiconductor wafer in accordance with the principles described herein is illustrated;

[0015] Figure 4 A flowchart of a method for adjusting position-specific desired parameter values in accordance with the principles described herein is illustrated.

[0016] Figure 5 A flowchart of a method for automatically performing non-normality screening on a semiconductor wafer is illustrated and represents a Figure 3 specific example of the method;

[0017] Figure 6A A positional visual representation of example measured parameter values of a wafer under test is illustrated, where the central annular region and the offset regions each show higher measurement results;

[0018] Figure 6B A visual representation of Figure 6A is illustrated, but the values are reciprocals such that the central annular region and the offset regions each have lower values;

[0019] Figure 6CIllustrates a visual representation of a positional expected historical value of a parameter, showing that historical expectations are higher for measurements in the central annular region, but historical expectations are not higher for measurements in the offset region;

[0020] Figure 6D Illustrates Figure 6B data being multiplied by data from Figure 6C and a visual representation of the positional result; and

[0021] Figure 7 Illustrates a functional block diagram of a computing system that can be used to perform Figure 3 , Figure 4 or Figure 5 methods. DETAILED DESCRIPTION

[0022] The embodiments described herein relate to automated non - standard screening of semiconductor wafers. In the normal processing of a wafer, it can be expected that a given parameter varies in a specific way depending on the position on the wafer. For example, for one parameter, it can be perfectly normal to have lower measurements towards the center of the wafer and higher measurements towards the edge of the wafer. Thus, for a given parameter, it can be expected that the position - specific correlation of that parameter (commonly referred to as an "expected heatmap") has a specific pattern on the wafer. However, for another parameter ("the second parameter"), the normal position - specific correlation of the second parameter can be quite different from the normal position - specific correlation of the first parameter.

[0023] Figure 1 Illustrates nine examples 101 to 109 of the position - specific correlation of a measured parameter on a wafer. Here, the die in which the measured parameter value falls outside a specific tolerance is represented by a dark area, and the die in which the measured parameter value falls within the specific tolerance is represented by a light area. In this document, the term "die" is used to refer to the area on a semiconductor wafer that includes a circuit. Subsequently, each die is separated into individual dies through a cutting process. Note that each of the nine examples 101 to 109 shows a specific example pattern of the die that falls outside the tolerance. Some of these patterns can be quite normal for a given parameter, while some can be quite abnormal for a given parameter. Additionally, a pattern that can be considered normal for one parameter can be not normal at all for another parameter. For example, the circular pattern of example 108 can be normal for one parameter but not for another. Some patterns can be abnormal for any parameter. For example, pattern 106 indicates a mechanical scratch on the wafer.

[0024] Thus, non-normative wafer inspection typically involves experienced semiconductor test engineers (using their experience) manually evaluating whether the measured heatmap pattern for a particular parameter is different from what the engineer might expect, thus indicating that the wafer is non-normative. However, according to the principles described herein, non-normative wafer inspection is automatically determined for a given parameter, regardless of the parameter-specific nature of what the expected heatmap might look like.

[0025] Specifically, for each of a plurality of die on the wafer under inspection being screened, die screening is performed. Die screening includes measuring a parameter of the die. The measured parameter value from the die screening is compared to an expected parameter value. The expected parameter value depends on the historical record of the measured parameter values of the previous die at the same location on previously screened wafers. This comparison results in a deviation between the measured parameter value of the die at that location and the expected parameter value of the die at that location. This die screening is performed for a plurality of die of the wafer to compare with the historical record expected parameter values of the die at the corresponding locations. Note that the historical record is specific to the location of the die on the wafer and specific to a particular parameter, and thus will account for the specific differences based on wafer location for that parameter.

[0026] After performing die screening, the deviation parameter value of the wafer under inspection is calculated using the deviation values of the plurality of die on the wafer under inspection. If the deviation parameter value of the wafer under inspection falls outside the deviation tolerance, the wafer under inspection is identified as a non-normative wafer. This non-normative screening is performed automatically. Thus, more non-normative screening can be performed without manual intervention. In addition, since no manual intervention is required, non-normative wafers can be detected earlier. Then such identified non-normative wafers can be further evaluated for earlier correction of the manufacturing process.

[0027] Figure 2 A plan view of a semiconductor wafer 200 is illustrated. For simplicity, only sixteen die 201 to 216 are shown on the semiconductor wafer 200. However, there are typically many more (even hundreds or thousands) die on the semiconductor wafer 200, as in the case of the Figure 1 example. In the description of the subsequent figures, the example semiconductor wafer 200 of the Figure 2 will be frequently referred to as an example. The sixteen die 201 to 216 are positioned in a grid pattern, in this example a four-by-four grid pattern. In the nomenclature used herein, the position of each die is defined by its lateral position A, B, C, or D and its vertical position 1, 2, 3, or 4 in the grid pattern. As several examples to further clarify the nomenclature, die 202 is at position B1, die 205 is at position A2, die 211 is at position C3, and die 216 is at position D4.

[0028] Figure 3 FIG. illustrates a flow chart of a method 300 for automatically performing non - standard screening on a semiconductor wafer in accordance with the principles described herein. As an example, automatic non - standard screening can be performed on a Figure 2 semiconductor wafer 200. Any semiconductor wafer being screened will be referred to herein as an "inspected wafer". For example, if method 300 is used to automatically perform non - standard screening on a Figure 2 semiconductor wafer 200, then the semiconductor wafer 200 is an "inspected wafer".

[0029] The screening of the inspected wafer includes (for each of a plurality of die on the inspected wafer) performing die screening. Die screening is represented by block 310 in Figure 3 . Die screening can be performed for all or possibly only some of the die on the inspected wafer. For example, if the inspected wafer is a Figure 2 semiconductor wafer 200, then die screening can be performed for each of die 201 through 216. Optionally, die screening can be performed for each of only some of die 201 through 216. Thus, in some embodiments, die screening is performed only on sampled die on the inspected wafer. Such sampling can be particularly useful in cases where there are a large number of die on the inspected wafer and can result in an overall pattern of measured values.

[0030] Die screening 310 includes measuring a parameter of a die at a location to obtain a measured parameter value of the parameter (act 311). The parameter is a circuit on the die. As an example, assume the circuit includes a power transistor. In this case, the parameter can be the on - resistance of the power transistor or possibly the leakage current of the power transistor. Die screening 310 can be performed for each of a plurality of parameters of the die. However, for now, a single instance of die screening 310 will be described with respect to a particular die (also referred to herein as the "first die") and a particular parameter (also referred to herein as the "first parameter"). Referring to Figure 2 , if the inspected wafer is semiconductor wafer 200, the "first die" subjected to die screening can be die 201, but can also be any other die. However, for this example, assume the first die subjected to die screening 310 is the Figure 2 die 201 at location A1 in

[0031] As part of the die screening 310 of the first parameter of the first die, the measured parameter value of the first parameter is compared with the historical expected parameter value of the first parameter at the same location (action 312). For example, if the wafer under inspection is the semiconductor wafer 200 and the first die is the die 201 at the location A1, the measured first parameter is compared with the historical expected parameter value of the first parameter at the given location A1. Such an expected result can be truly location-dependent. For example, the expected parameter value at the location A1 can depend on the history of the measured parameter values at the same location A1 of the previously screened wafers. As a more specific example, the expected parameter value can be the median of the measured parameter values of the dies at the same location A1 of a newly predetermined number of previously screened wafers. In this case, the expected value can be continuously updated as additional wafers are automatically screened.

[0032] The comparison (of action 312) results in generating a deviation between the measured parameter value of the die and the expected parameter value of the die (action 313). As an example, the deviation can be expressed as a ratio between the measured parameter value and the expected parameter value.

[0033] Furthermore, die screening (action 310) for the first parameter can be performed for multiple dies of the wafer under inspection. For example, die screening 310 can be performed for the die 202 by comparing the measured value of the first parameter of the die 202 with the historical expected parameter value of the first parameter at the location A2 and generating the resulting deviation measurement of the die 202 and the first parameter. Similarly, die screening 310 can be performed for the die 203 at the location A3 to generate a deviation of the measurement result of the die 203 from the expected result at the location A3. Thus, die screening 310 can be performed for multiple dies on the wafer under inspection.

[0034] Then, using the deviation value of a specific die on the wafer under inspection for the first parameter, a deviation parameter value of the wafer under inspection for the first parameter is calculated for the first parameter (action 321). As an example, the deviation parameter value of the wafer under inspection for the first parameter can be the median of the deviation values of the dies on the wafer under inspection.

[0035] The comparison for Action 312 takes into account a location-specific expected value for the first parameter. Thus, the total deviation determined for the entire wafer depends on the degree to which the inspected wafer deviates from its expected heat map for this first parameter. If the deviation parameter value has a value that falls outside the deviation tolerance ("Yes" in decision block 330), the inspected wafer is identified as a non-conforming wafer (Action 331). This occurs if the heat map of the first parameter of the inspected wafer is significantly different from the expected heat map of this first parameter. Otherwise, ("No" in decision block 330), if this parameter is the last parameter to be evaluated to determine whether the inspected wafer is a non-conforming wafer ("Yes" in decision block 332), the wafer is determined not to be a non-conforming wafer (Action 333).

[0036] However, if there is one or more additional parameters to be evaluated to determine whether the inspected wafer is a non-conforming wafer ("No" in decision block 332), the process is repeated for the next parameter (as shown by arrow 340). This is because the method described works regardless of what the expected heat map is. Figure 3 Thus, Method 300 can also be repeated for other parameters for the inspected wafer. As an example, if the dies each include power transistors, Method 300 can be performed once for the on-resistance of the corresponding power transistors, once for a first leakage current, and once for another leakage current, and so on. During the evaluation of any parameter, if the deviation parameter value of the parameter of the wafer falls outside the deviation tolerance ("Yes" in decision block 330), the inspected wafer can be identified as a non-conforming wafer.

[0037] Then, the process can move to the next wafer, where Method 300 can be performed again for each of the multiple parameters of the next wafer. Thus, the principles described herein can proceed from one wafer to the next, automatically identifying which of the inspected wafers are non-conforming and which are not. Since most wafers are not non-conforming wafers, using the difference between the measured value and the location-specific expected result of that measured value (where the expected result is based on the median of historical measurement results at that location) is an accurate way to detect non-conforming wafers.

[0038] Figure 4FIG. illustrates a flow chart of a method 400 for adjusting a location-specific desired parameter value in accordance with the principles described herein. As an example, method 400 can be performed after each wafer screening of a wafer under inspection. Method 400 includes adjusting the location-specific correlation of the parameter at that location to include the measured parameter value at that location for each parameter and location (block 410) (act 411). For example, assume that the location-specific desired value of a parameter depends on one hundred newly screened wafers. The value of the oldest of the one hundred previously screened wafers can be discarded, and the measured value from the wafer under inspection can be used as the newly screened wafer. Thus, the desired location-specific correlation is updated to account for normal variations in the processing conditions.

[0039] Figure 5 FIG. illustrates a flow chart of a method 500 for automatically performing non-normative screening of a semiconductor wafer and represents a specific example of method 300 Figure 3 Method 500 includes generating a heat map of the measured values of the parameters (act 501). This can be done by measuring the value of the parameter for each die on the wafer under inspection. In other words, the heat map can be generated by performing act 311 of method 300 for each die on the wafer under inspection.

[0040] Figures 6A to 6D Each illustrates a positional visual representation of example data at the corresponding processing stage of the method in Figure 5 The presentation of the positional visual representation (or “heat map”) in is merely for the convenience of the reader in understanding the data for which the corresponding operation times in the method of Figures 6A to 6D are being tracked. The heat map need not be visualized to the user, since the detection of non-normative wafers is an automated process. It is only the computing system that will track the measured values for the corresponding locations on the wafer. Figure 5 The heat map need not be visualized to the user, since the detection of non-normative wafers is an automated process. It is only the computing system that will track the measured values for the corresponding locations on the wafer.

[0041] Figure 6AIllustrated is a positional visual representation 600A (or heat map 600A) of example measured parameter values of a wafer under inspection, where the measured values are represented at their respective positions on the wafer under inspection. In the visual representation, diagonally hatched lines to the right indicate regions where the values are higher than those in the non-hatched regions. Note that there are two regions showing high measurement results, including an annular region 611A near the center of the wafer and an offset region 612A offset from the center to the lower right. Assume that in this example, the annular region 611A is the position where the parameter being measured is historically expected to have a higher measurement result, while the offset region 612A is the region where the parameter is not historically expected to have a higher measurement result. Thus, the higher value in the annular region 611A may not indicate that the wafer under inspection is a non-conforming wafer. However, the higher value in the offset region 612A may indicate that the wafer under inspection is a non-conforming wafer. In this particular example, the annular region 611A is typical for the parameter being measured. However, since the principles described herein use historical measurement results to determine where the typical measured parameter can be expected to be lower or higher, the principles described herein are valid regardless of whether there is an annular region representing the historical expected value.

[0042] Refer to Figure 5 , after obtaining the measurement results, each measured value of the parameter is normalized (action 502). As an example, assume the measured value is X, and the normalized value can be the reciprocal of X (or in other words, 1 / X, read as "one over X"). A heat map 600B can be obtained. Figure 6B There is still an annular region 611B corresponding approximately to the annular region 611A of the heat map 600A, and an offset region 612B corresponding approximately to the offset region 612A of the heat map 600A. However, since the heat map 600B is a position-wise inverse of the heat map 600A, the regions 611B and 612B represent lower values indicated by diagonally hatched lines to the left.

[0043] Next, a stack plot is obtained (action 503). The stack plot is the position-dependent expected value of the parameter. Assume that the expected value at each position is represented by Xref. Refer to Figure 6C , the heat map 600C is an example of this stack plot. The stack plot can be the position-dependent expected value of the parameter for a given recent "n" wafers under inspection (where "n" is a number, approximately one hundred in the example). For example, the expected value at a certain position can be the median measured value of the recent n wafers.

[0044] As described above, for the parameter, a higher value is expected in an annular shape near the center of the wafer. Thus, the heat map 600C includes an annular shape 611C with a higher value. However, the heat map 600C does not include a high-value region corresponding to the offset region 612B of the heat map 600B or the offset region 612A of the heat map 600A. This is because higher measurements of the parameter in this offset region are anomalous in the history.

[0045] Next, a heat map of the deviation from the desired result is determined (action 504). This can be done by multiplying the values from the heat map 600B by the values from the heat map 600C (for each position) to obtain the heat map 600D. This can be represented by the equation Y = Xref * 1 / X, where Y is the value at each position in the heat map 600D. This operation results in any region with a deviation from the expected value being identified. If the wafer is not non-conforming, the heat map 600D will have relatively uniform values (within a specific tolerance) regardless of the position. However, since the offset region 612A is higher than the expected measurement value, the wafer is a non-conforming wafer. Thus, this deviation from the desired result is reflected in the offset region 612D that appears in the heat map 600D.

[0046] Next, the median of all the values Y from the heat map is calculated (action 505) and used to determine whether the parameter measurement result indicates that the wafer is a non-conforming wafer (decision box 506). If the median of Y deviates from the expected median of Y of the previous number of wafers by a specific tolerance, the wafer is considered a non-conforming wafer. For example, if the median of Y differs from the distribution of the median of Y of the prior n screened wafers by more or less than three sigma (three standard deviations) or approximately more or less than six sigma, the wafer can be regarded as a non-conforming wafer.

[0047] Thus, the principles described herein provide an effective mechanism to automatically and accurately perform non-conforming wafer detection, allowing for earlier non-conformance detection and identification without manual intervention.

[0048] The methods 300, 400, and 500 can be performed by a computing system, such as the computing system 700 described below with respect to Figure 7 described. As Figure 7As illustrated, in its most basic configuration, computing system 700 includes at least one hardware processing unit 702 and a memory 704. The processing unit 702 includes a general-purpose processor. Although not required, the processing unit 702 may also include a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or any other specialized circuit. In one embodiment, the memory 704 includes a physical system memory. This physical system memory may be volatile, non-volatile, or some combination of the two. In a second embodiment, the memory is a non-volatile mass storage, such as a physical storage medium. If the computing system is distributed, then the processing, memory, and / or storage capabilities may also be distributed.

[0049] The computing system 700 also has a number of structures thereon that are commonly referred to as “executable components”. For example, the memory 704 of the computing system 700 is illustrated as including an executable component 706. The term “executable component” is the name of a structure that is well understood by those of ordinary skill in the computing art to be a structure that can be software, hardware, or a combination thereof. For example, when implemented in software, those of ordinary skill in the art will understand that the structure of an executable component may include software objects, routines, methods, etc. that can be executed on a computing system. Such executable components exist in the heap of the computing system, in a computer-readable storage medium, or a combination thereof.

[0050] Those of ordinary skill in the art will recognize that the structure of an executable component exists on a computer-readable medium such that when interpreted by one or more processors of a computing system (e.g., by a processor thread), it causes the computing system to perform a function. Such a structure may be directly computer-readable by a processor (as is the case when the executable component is binary). Optionally, the structure may be configured to be interpretable and / or compiled (either in a single stage or in multiple stages) in order to generate such a binary that can be directly interpreted by the processor. When the term “executable component” is used, this understanding of the example structure of an executable component is well within the understanding of those of ordinary skill in the computing art.

[0051] The term "executable component" is also well understood by those of ordinary skill in the art to include structures such as hard-coded or hard-wired logic gates that are implemented specifically or almost exclusively in hardware, such as within a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or any other special purpose circuit. Thus, the term "executable component" is a term for a structure that is well understood by those of ordinary skill in the computing art, whether implemented in software, hardware, or a combination thereof. In this specification, terms such as "component", "agent", "manager", "service", "engine", "module", or "virtual machine" may also be used. As used in this specification and in this context, these terms (whether expressed with or without a modifying clause) are also intended to be synonymous with the term "executable component" and thus also have a structure that is well understood by those of ordinary skill in the computing art.

[0052] In the following description, embodiments are described with reference to acts performed via one or more computing systems. If such acts are implemented in software, one or more processors (of the associated computing system performing the acts) direct the operation of the computing system in response to having executed computer-executable instructions that form an executable component. For example, such computer-executable instructions may be embodied on one or more computer-readable media that form a computer program product. Examples of such operations involve the manipulation of data. If such acts are implemented specifically or almost exclusively in hardware, such as within an FPGA or ASIC, the computer-executable instructions may be hard-coded or hard-wired logic gates. The computer-executable instructions (and the data being manipulated) may be stored in the memory 704 of the computing system 700. The computing system 700 may also include a communication channel 708 that allows the computing system 700 to communicate with other computing systems via, for example, a network 710.

[0053] Although not all computing systems require a user interface, in some embodiments, the computing system 700 includes a user interface system 712 for interacting with a user. The user interface system 712 may include an output mechanism 712A and an input mechanism 712B. The principles described herein are not limited to a strict output mechanism 712A or input mechanism 712B as this will depend on the nature of the device. However, the output mechanism 712A may include, for example, speakers, displays, tactile outputs, virtual or augmented reality, holograms, etc. Examples of the input mechanism 712B may include, for example, microphones, touchscreens, virtual or augmented reality, holograms, cameras, keyboards, mice, or other pointer inputs, any type of sensors, etc.

[0054] The embodiments described herein may include or utilize a special purpose or general purpose computing system including computer hardware, such as one or more processors and system memory, as discussed in more detail below. The embodiments described herein also include physical and other computer-readable media for carrying or storing computer-executable instructions and / or data structures. Such computer-readable media can be any available media that can be accessed by a general purpose or special purpose computing system. A computer-readable medium storing computer-executable instructions is a physical storage medium. A computer-readable medium carrying computer-executable instructions is a transmission medium. Thus, by way of example and not limitation, embodiments of the present invention may include at least two distinctly different kinds of computer-readable media: storage media and transmission media.

[0055] Computer-readable storage media includes RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other physical and tangible storage medium that can be used to store the desired program code means in the form of computer-executable instructions or data structures and that can be accessed by a general purpose or special purpose computing system.

[0056] "Network" is defined as one or more data links that enable the transfer of electronic data between computing systems and / or modules and / or other electronic devices. When information is transmitted or provided to a computing system via a network or another communication connection (wired, wireless, or a combination of wired or wireless), the computing system appropriately views the connection as a transmission medium. Transmission media can include a network and / or data link that can be used to carry the desired program code means in the form of computer-executable instructions or data structures and that can be accessed by a general purpose or special purpose computing system. Combinations of the above should also be included within the scope of computer-readable media.

[0057] In addition, upon reaching various computing system components, program code means in the form of computer-executable instructions or data structures can automatically be transferred from transmission media to storage media (or vice versa). For example, computer-executable instructions or data structures received via a network or data link can be buffered in RAM within a network interface module (e.g., a "NIC") and then ultimately transferred to the computing system RAM and / or less volatile storage media at the computing system. Accordingly, it should be understood that storage media can be included in computing system components that also (or even primarily) utilize transmission media.

[0058] Computer-executable instructions include, for example, instructions and data that, when executed at a processor, cause a general-purpose computing system, a special-purpose computing system, or a special-purpose processing device to perform a particular function or group of functions. Optionally or additionally, the computer-executable instructions may configure the computing system to perform a particular function or group of functions. The computer-executable instructions may be, for example, binary numbers or even instructions that undergo some translation (such as compilation) before being directly executed by the processor, such as intermediate format instructions (such as assembly language), or even source code.

[0059] Although the subject matter has been described in language specific to structural features and / or methodological acts, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the features or acts described above, or the order of acts described above. Rather, the described features and acts are disclosed as example forms for implementing the claims.

[0060] Claims support section

[0061] Clause 1. A method for automatically performing non-standard screening on a semiconductor wafer, the method comprising: for each of a plurality of die on a wafer under inspection, measuring a parameter of the die to obtain a measured parameter value; and comparing the measured parameter value with a desired parameter value, the desired parameter value depending on a history of measured parameter values of previous die at the same location on previously screened wafers, the comparison resulting in a deviation between the measured parameter value of the die at the location and the desired parameter value of the die at the location; using the deviation value for each of the plurality of die on the wafer under inspection to calculate a deviation parameter value for the wafer under inspection; and identifying the wafer under inspection as a non-standard wafer if the deviation parameter value falls outside a deviation tolerance.

[0062] Clause 2. The method according to Clause 1, wherein for each of at least some of the plurality of die, the deviation includes a ratio between the measured parameter value and the desired parameter value.

[0063] Clause 3. The method according to Clause 1, wherein the desired parameter value is the median of the measured parameter values of the die at the same location on the previously screened wafers.

[0064] Clause 4. The method according to Clause 1, wherein the previously screened wafers are a newly predetermined number of previously screened wafers.

[0065] Clause 5. For each of the plurality of dies on the inspected wafer according to the method of Clause 1, the desired parameter value of the parameter at the corresponding position is adjusted for subsequent non-conforming wafer screening by adding the measured parameter value of the die to the history of the measured parameter values for the die at the corresponding position.

[0066] Clause 6. According to the method of Clause 5, the deviation tolerance is a first deviation tolerance, the inspected wafer is a first inspected wafer, and the method further includes the following for a second inspected wafer. The method further includes: for each of the plurality of dies on the second inspected wafer, measuring the parameter of the die to obtain a measured parameter value; and comparing the measured parameter value with the adjusted desired parameter value; calculating a deviation parameter value of the second inspected wafer using the deviation values of the plurality of dies on the second inspected wafer; and if the deviation parameter value of the second inspected wafer falls outside a second deviation tolerance, identifying the second inspected wafer as a non-conforming wafer.

[0067] Clause 7. According to the method of Clause 6, the first inspected wafer is identified as non-conforming because the deviation parameter value of the first inspected wafer falls outside the first deviation tolerance, and the second inspected wafer is not identified as non-conforming because the deviation parameter value of the second inspected wafer falls within the second deviation tolerance.

[0068] Clause 8. According to the method of Clause 6, the first deviation tolerance and the second deviation tolerance are the same.

[0069] Clause 9. According to the method of Clause 1, the calculation of the deviation parameter value of the inspected wafer is the median of the deviation values of the plurality of dies on the inspected wafer.

[0070] Clause 10. According to the method of Clause 1, the parameter is a first parameter, and the method further includes the following for each of the plurality of dies on the inspected wafer: measuring a second parameter of the die to obtain a measured second parameter value; and comparing the measured second parameter value with a desired second parameter value, where the desired second parameter value depends on the history of the measured second parameter values of the previous dies at the same position on previously screened wafers, and the comparison of the measured second parameter value with the desired second parameter value gives a second deviation between the measured second parameter value of the die and the desired second parameter value of the die.

[0071] Clause 11. According to the method of Clause 1, each of the plurality of dies contains a power transistor.

[0072] Clause 12. In the method according to Clause 11, the parameter is the on-resistance of the power transistor of the die.

[0073] Clause 13. In the method according to Clause 11, the parameter is the leakage current of the power transistor of the die.

[0074] Clause 14. In the method according to Clause 1, the plurality of dies on the inspected wafer includes fewer dies than all the dies on the inspected wafer.

[0075] Clause 15. A computer program product comprising one or more computer-readable media having computer-executable instructions thereon that, when executed by one or more processors of a computing system, configure the computing system to automatically perform non-conformance screening of a semiconductor wafer by performing operations including: for each of a plurality of dies on an inspected wafer, measuring a parameter of the die to obtain a measured parameter value; and comparing the measured parameter value with a desired parameter value that depends on a history of measured parameter values of previous dies at the same location as the die on previously screened wafers, the comparison yielding a deviation between the measured parameter value of the die at the location and the desired parameter value of the die at the location; using the deviation values for each of the plurality of dies on the inspected wafer to calculate a deviation parameter value for the inspected wafer; and if the deviation parameter value falls outside a deviation tolerance, identifying the inspected wafer as a non-conforming wafer.

[0076] Clause 16. In the computer program product according to Clause 15, the previously screened wafers are a newly predetermined number of previously screened wafers.

[0077] Clause 17. In the computer program product according to Clause 15, the inspected wafer is a first inspected wafer, and the method further includes the following for a second inspected wafer: for each of a plurality of dies on the second inspected wafer: adjusting the desired parameter value for the die at the corresponding location by adding the measured parameter value of the corresponding die of the first parameter value to the history of measured parameter values for the die at the corresponding location where the parameter of the die is measured to obtain a measured parameter value; and comparing the measured parameter value with the adjusted desired parameter value; using the deviation values for the plurality of dies on the second inspected wafer to calculate a deviation parameter value for the second inspected wafer; and if the deviation parameter value of the second inspected wafer falls outside a deviation tolerance, identifying the second inspected wafer as a non-conforming wafer.

[0078] Clause 18. The computer program product according to Clause 15, wherein the parameter is a first parameter, and the method further includes, for each of the plurality of die on the inspected wafer: measuring a second parameter of the die to obtain a measured second parameter value; and comparing the measured second parameter value with a desired second parameter value, the desired second parameter value depending on a history of measured second parameter values of previous die at the same location on previously screened wafers, the comparison of the measured second parameter value with the desired second parameter value resulting in a second deviation between the measured second parameter value of the die and the desired second parameter value of the die.

[0079] Clause 19. A computing system, comprising: one or more processors; one or more computer-readable media having computer-executable instructions thereon, the computer-executable instructions, when executed by the one or more processors of the computing system, configure the computing system to automatically perform non-normative screening of semiconductor wafers by performing operations including: for each of a plurality of die on an inspected wafer, measuring a parameter of the die to obtain a measured parameter value; and comparing the measured parameter value with a desired parameter value, the desired parameter value depending on a history of measured parameter values of previous die at the same location as the die on previously screened wafers, the comparison resulting in a deviation between the measured parameter value of the die at the location and the desired parameter value of the die at the location; using the deviation values for each of the plurality of die on the inspected wafer to calculate a deviation parameter value for the inspected wafer; and if the deviation parameter value falls outside a deviation tolerance, identifying the inspected wafer as a non-normative wafer.

[0080] The present disclosure may be embodied in other specific forms without departing from its essential characteristics. The described embodiments are to be considered in all respects only illustrative and not restrictive. All changes that come within the meaning and range of equivalency of the claims are embraced within their scope.

[0081] When introducing elements in the appended claims, the articles "a", "an", "the", and "said" are intended to mean that there is one or more of the elements. The terms "comprising", "including", and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements.

Claims

1. A method for automatically performing non-standard screening on semiconductor wafers, the method comprising: For each of the multiple dies on the inspected wafer, measuring a parameter of the grain to obtain a measured parameter value; as well as comparing the measured parameter value with an expected parameter value, the expected parameter value being dependent on a history of measured parameter values ​​of the parameter for a previous die at the same location as the die on a previously screened wafer, the comparison yielding a deviation between the measured parameter value for the die at the location and the expected parameter value for the die at the location; Calculating a deviation parameter value of the inspected wafer using the deviation value of each of the plurality of dies on the inspected wafer; as well as If the deviation parameter value falls outside the deviation tolerance, the inspected wafer is identified as a non-standard wafer. 2 . The method of claim 1 , wherein for each of at least some of the plurality of dies, the deviation comprises a ratio between the measured parameter value and the expected parameter value. 3 . The method of claim 1 , wherein the expected parameter value is a median of the measured parameter values ​​of the die at the same location of the previously screened wafer. 4 . The method of claim 1 , wherein the previously screened wafers are a newly predetermined number of previously screened wafers.

5. According to the method of claim 1, for each of the multiple grains on the inspected wafer, the expected parameter value of the parameter at the corresponding position is adjusted for subsequent non-standard wafer screening by adding the measured parameter value of the grain at the corresponding position to the historical record of the measured parameter value.

6. The method according to claim 5, wherein the deviation tolerance is a first deviation tolerance, the inspected wafer is a first inspected wafer, and the method further comprises the following items for a second inspected wafer, the method further comprises: For each of the plurality of dies on the second inspected wafer, measuring the parameter of the grain to obtain a measured parameter value; as well as comparing the measured parameter value to the adjusted expected parameter value; Calculating a deviation parameter value of the second inspected wafer using the deviation values ​​of the plurality of dies on the second inspected wafer; as well as If the deviation parameter value of the second inspected wafer falls outside a second deviation tolerance, the second inspected wafer is identified as a non-standard wafer.

7. According to the method of claim 6, the first inspected wafer is identified as non-standard because the deviation parameter value of the first inspected wafer falls outside the first deviation tolerance, and the second inspected wafer is not identified as non-standard because the deviation parameter value of the second inspected wafer falls within the second deviation tolerance.

8. The method of claim 6, wherein the first deviation tolerance and the second deviation tolerance are the same. 9 . The method of claim 1 , wherein the calculation of the deviation parameter value of the inspected wafer is a median of the deviation values ​​of the plurality of dies on the inspected wafer.

10. The method of claim 1, wherein the parameter is a first parameter, the method further comprising the following items for each of the plurality of dies on the inspected wafer: measuring a second parameter of the grain to obtain a determined second parameter value; and The measured second parameter value is compared with an expected second parameter value, wherein the expected second parameter value depends on a historical record of measured second parameter values ​​of the second parameter of a previous die at the same position on a previously screened wafer, and the comparison of the measured second parameter value with the expected second parameter value obtains a second deviation between the measured second parameter value of the die and the expected second parameter value of the die.

11. The method of claim 1, each of the plurality of dies comprising a power transistor. 12 . The method of claim 11 , the parameter being an on-resistance of the power transistor of the die. The method of claim 11 , the parameter being a leakage current of the power transistor of the die. 14 . The method of claim 1 , the plurality of dies on the inspected wafer comprising fewer than all dies on the inspected wafer.

15. A computer program product comprising one or more computer readable media having computer executable instructions thereon, which when executed by one or more processors of a computing system configure the computing system to automatically perform out-of-spec screening of semiconductor wafers by performing operations comprising: For each of the multiple dies on the inspected wafer, measuring a parameter of the grain to obtain a measured parameter value; and comparing the measured parameter value with an expected parameter value, the expected parameter value being dependent on a history of measured parameter values ​​of the parameter for a previous die at the same location as the die on a previously screened wafer, the comparison yielding a deviation between the measured parameter value for the die at the location and the expected parameter value for the die at the location; Calculating a deviation parameter value of the inspected wafer using the deviation value of each of the plurality of dies on the inspected wafer; as well as If the deviation parameter value falls outside the deviation tolerance, the inspected wafer is identified as a non-standard wafer.

16. The computer program product of claim 15, wherein the previously screened wafers are a recent predetermined number of previously screened wafers.

17. The computer program product of claim 15, wherein the inspected wafer is a first inspected wafer, the method further comprising the following for a second inspected wafer: For each of the plurality of dies on the second inspected wafer: adjusting the expected parameter value for the die at the corresponding position by adding the measured parameter value of the die corresponding to the first parameter value to the historical record of measured parameter values ​​for the die at the corresponding position; measuring a parameter of the grain to obtain a measured parameter value; as well as comparing the measured parameter value to the adjusted expected parameter value; Calculating a deviation parameter value of the second inspected wafer using the deviation values ​​of the plurality of dies on the second inspected wafer; as well as If the deviation parameter value of the second inspected wafer falls outside the deviation tolerance, the second inspected wafer is identified as a non-standard wafer.

18. The computer program product of claim 15, the parameter being a first parameter, the method further comprising the following for each of the plurality of dies on the inspected wafer: measuring a second parameter of the grain to obtain a determined second parameter value; and The measured second parameter value is compared with an expected second parameter value, wherein the expected second parameter value depends on a historical record of measured second parameter values ​​of the second parameter of a previous die at the same position on a previously screened wafer, and the comparison of the measured second parameter value with the expected second parameter value obtains a second deviation between the measured second parameter value of the die and the expected second parameter value of the die.

19. A computing system comprising: one or more processors; One or more computer-readable media having computer-executable instructions thereon that, when executed by one or more processors of a computing system, configure the computing system to automatically perform out-of-spec screening of semiconductor wafers by performing operations including: For each of the multiple dies on the inspected wafer, measuring a parameter of the grain to obtain a measured parameter value; and comparing the measured parameter value with an expected parameter value, the expected parameter value being dependent on a history of measured parameter values ​​of the parameter for a previous die at the same location as the die on a previously screened wafer, the comparison yielding a deviation between the measured parameter value for the die at the location and the expected parameter value for the die at the location; Calculating a deviation parameter value of the inspected wafer using the deviation value of each of the plurality of dies on the inspected wafer; as well as If the deviation parameter value falls outside the deviation tolerance, the inspected wafer is identified as a non-standard wafer.

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