Selective bottom-to-top fill

Through the cyclic deposition-etching process, selectively fill the gap characteristics in semiconductor devices from bottom to top, solving the problem of low gap filling efficiency in the prior art, achieving a more efficient filling effect and a lower resistivity.

CN120072744APending Publication Date: 2025-05-30ASM IP HLDG BV
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Patent Information

Application Number
CN202411726303.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-11-30
Filing Date
2024-11-28
Publication Date
2025-05-30

AI Technical Summary

Technical Problem

The prior art is difficult to effectively fill gap features on non-planar substrates in semiconductor device manufacturing, especially in high density and high aspect ratio features.

Method used

By adopting a cyclic deposition-etching process, selective bottom-up filling of gap characteristics is achieved by depositing a first material layer, etching to form a substrate, and depositing a second material layer on the substrate.

Benefits of technology

It improves the efficiency and effect of gap filling, can better adapt to the needs of high density and high aspect ratio characteristics, and reduces the effective resistivity.

✦ Generated by Eureka AI based on patent content.

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Abstract

Methods, systems, and apparatus are disclosed for filling a gap feature on a surface of a substrate, including providing a substrate having a surface including the gap feature in a reaction chamber, depositing a first layer of material into the gap feature using a first cyclic deposition process, the first material layer is etched using a cyclic etching process to form a substrate in the bottom of the gap feature, and the gap feature is partially filled with a second material layer using a second cyclic deposition process.
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Description

Technical Field

[0001] The present disclosure generally relates to methods for filling gap features on a substrate surface, and more particularly to methods for filling one or more gap features with a metal film using a selective bottom-up filling deposition process. The present disclosure also generally relates to semiconductor device structures including one or more gap features filled with a metal film. Background Art

[0002] Semiconductor manufacturing processes for forming semiconductor device structures (such as transistors, memory elements, and integrated circuits) are wide-ranging and can include deposition processes, etching processes, thermal annealing processes, lithography processes, and doping processes, among others.

[0003] A particular semiconductor manufacturing process commonly used is depositing a metal film into gap features to fill the gap features (which can include gaps, trenches, vias, etc.), and this process is generally referred to as "gap filling". The substrate used during semiconductor device manufacturing can include multiple gap features on a substrate having a non-planar surface. The gap features can include substantially vertical gap features between protrusions on the substrate surface or depressions formed in the substrate surface. The gap features can also include substantially horizontal gap features between two adjacent materials defining a horizontal gap feature. As the geometric dimensions of semiconductor device structures decrease and high aspect ratio features become more common in semiconductor device structures such as DRAM, flash memory, and logic, it becomes increasingly difficult to fill a large number of gap features with a metal having desired properties.

[0004] Deposition methods such as high density plasma (HDP), sub-atmospheric chemical vapor deposition (SACVD), and low pressure chemical vapor deposition (LPCVD) have been used for the gap filling process, but these processes generally cannot achieve the desired gap filling capabilities.

[0005] Accordingly, there is a need for methods and related semiconductor device structures for filling gap features on a non-planar substrate with a gap filling metal having improved properties. Summary of the Invention

[0006] The present invention content is provided to introduce some concepts in a simplified form. These concepts are further described in detail in the detailed description of the examples of the following disclosure. The present invention content is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0007] In one aspect, a method for filling a gap feature on a substrate surface includes providing a substrate having a surface and a gap feature in a reaction chamber, depositing a first material layer into the gap feature using a first cyclic deposition process, etching the first material layer using a cyclic etch process to form a substrate in the bottom of the gap feature, and partially filling the gap feature with a second material layer using a second cyclic deposition process.

[0008] The method may further include, wherein the substrate is a metal substrate, which includes a metal selected from: titanium nitride (TiN), molybdenum nitride (MoN), tungsten nitride (WN), vanadium nitride (VN), niobium nitride (NbN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), molybdenum (Mo), tungsten (W), tungsten without fluorine (FFW), ruthenium (Ru), cobalt (Co), copper (Cu), or a doped metal nitride.

[0009] The method may further include, wherein the first cyclic deposition process includes contacting the substrate with a first gas-phase precursor, contacting the substrate with a second gas-phase precursor, and purging the chamber.

[0010] The method may further include, wherein the cyclic etch process includes contacting the substrate with a first halide, and purging the chamber.

[0011] The method may further include, wherein the first gas-phase precursor includes at least one of the following: titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tribromide (TiBr3), hafnium tetrachloride (HfCl4), boron trichloride (BCl3), aluminum trichloride (AlCl3), silicon tetrachloride (SiCl4), disilicon hexachloride (Si2Cl6), trisilicon octachloride (Si3Cl8), dichlorosilane (SiH2Cl2), NiCl2(TMPDA), 2-methylcyclohex-2,5-diene-1,4-diyl)bis(trimethylsilane) (C13H26Si2), triethyl borate (B(OCH2CH3)3), gallium monochloride (GaCl), gallium trichloride (GaCl3), niobium pentachloride (NbCl5), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5), molybdenum(V) oxide trichloride (MoOCl3), molybdenum(VI) oxide tetrachloride (MoOCl4), molybdenum(IV) dioxide dichloride (MoO2Cl2), indium trichloride (InCl3), tantalum pentachloride (TaCl5), tungsten hexachloride (WCl6), vanadium trifluoride (VF3), vanadium trichloride (VCl3), vanadyl chloride (VOCl3), or zirconium tetrachloride (ZrCl4), or a combination thereof.

[0012] The method may further include, wherein the second gas-phase precursor includes at least one of the following: hydrogen gas (H2), molecular nitrogen (N2), ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, nitrogen-based plasmas, alkyl hydrazines, tert-butyl hydrazine (C4H9N2H3), methyl hydrazine (CH3NHNH2), dimethyl hydrazine ((CH3)2N2H2), atomic nitrogen (N), nitrogen ions, nitrogen radicals, or excited species of nitrogen.

[0013] The method may further include contacting the top of the substrate with an inhibitor.

[0014] The method may further include, wherein the inhibitor includes at least one of the following: allyltrimethylsilane (TMS-A), trimethylchlorosilane (TMS-Cl), N-(trimethylsilyl)imidazole (TMS-Im), octadecyltrichlorosilane (ODTCS), hexamethyldisilazane (HMDS), N-(trimethylsilyl)dimethylamine (TMSDMA), or trimethylchlorosilane, or a combination thereof.

[0015] The method may further include, further including contacting the exposed surface of the first material layer with an oxidant.

[0016] The method may further include, wherein the oxidant includes at least one of the following: water (H2O), hydrogen peroxide (H2O2), ozone (O3), oxygen (O2), O2 plasma, alcohol, alkyl alcohol, ethanol, methanol, butanol, isobutanol, isopropyl alcohol, or a combination thereof.

[0017] The method may further include, wherein the first halide includes molybdenum pentachloride (MoCl5), NF3, tungsten pentachloride (WCl5), chlorine (Cl2), niobium pentachloride (NbCl5), titanium tetrachloride (TiCl4), vanadium tetrachloride (VCl4), tantalum pentachloride (TaCl5), hafnium tetrachloride (HfCl4), niobium pentafluoride (NbF5), or tantalum pentafluoride (TaF5), or a combination thereof.

[0018] The method may further include, wherein the first halide includes MoCl5, NF3, NbCl5, or WCl5.

[0019] The method may further include, the temperature of the first halide container is between 100°C and 150°C.

[0020] The method may further include, wherein the second cyclic deposition process includes contacting the substrate with a second halide, contacting the substrate with a co-reactant, and purging the chamber.

[0021] The method may further include, wherein the second halide includes at least one of MoCl5, MoCl4, MoO2Cl2, or MoOCl4.

[0022] The method may further include, wherein the first halide and the second halide are the same.

[0023] The method may further include, wherein the surface cleaning step includes contacting the exposed surface within the gap feature with an etching gas. The method may further include, wherein the etching gas is a plasma of NF3.

[0024] The method may further include, wherein the co-reactant includes at least one of the following: H2, N2, ammonia (NH3), hydrazine (N2H4), silane (SiH4), disilane (Si2H6), trisilane (Si3H8), germane (GeH4), digermane (Ge2H6), borane (BH3), diborane (B2H6), 1-methyl-3,6-bis(trimethylsilyl)-1,4-cyclohexadiene (C13H26Si2) or a hydrogen-excited substance.

[0025] The method may further include, wherein the co-reactant includes H2. Other technical features will be apparent to those skilled in the art from the following drawings, description, and claims.

[0026] To summarize the present invention and the advantages achieved over the prior art, certain objects and advantages of the present invention have been described above. Of course, it should be understood that not all of these objects or advantages may be achieved in accordance with any particular example of the present invention. Thus, for example, those skilled in the art will recognize that the present invention may be implemented or carried out in a manner that achieves or optimizes one advantage or a group of advantages taught or suggested herein, without necessarily achieving other objects or advantages taught or suggested herein.

[0027] All such examples are within the scope of the present invention disclosed herein. From the following detailed description of certain examples with reference to the drawings, these and other examples will become apparent to those skilled in the art, and the present invention is not limited to any particular example disclosed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] While the specification concludes with claims that particularly point out and distinctly claim the examples that are regarded as the invention, the advantages of the examples of the present disclosure may be more readily determined from the description of certain examples of the present disclosure when read in conjunction with the drawings, wherein:

[0029] Figure 1 A schematic diagram of a reactor system according to an example of the present technology is shown.

[0030] Figure 2 A schematic diagram of a reactor system having a plurality of reaction chambers according to an example of the present technology is shown.

[0031] Figure 3Shows a simplified cross-sectional schematic diagram of a semiconductor structure formed during a cycle according to an example of the present technology.

[0032] Figure 4 Shows a simplified cross-sectional schematic diagram of a semiconductor structure formed during a cycle according to an example of the present technology.

[0033] Figure 5 Shows a simplified cross-sectional schematic diagram of a semiconductor structure formed during a cycle according to an example of the present technology.

[0034] Figure 6 Shows a processing method according to an example of the present technology.

[0035] Figure 7 Shows a processing method according to an example of the present technology.

[0036] Figure 8 Shows a processing method according to an example of the present technology.

[0037] Figure 9 Shows a processing method according to an example of the present technology.

[0038] Figure 10 Shows a processing method according to an example of the present technology.

[0039] Figure 11 Shows a processing method according to an example of the present technology. Detailed Description of Specific Embodiments

[0040] The detailed description of various examples herein refers to the accompanying drawings, which illustrate exemplary examples by way of illustration. Although these exemplary examples are described in sufficient detail to enable those skilled in the art to practice the present disclosure, it should be understood that other examples can be implemented without departing from the spirit and scope of the present disclosure, and logical, chemical, and / or mechanical changes can be made. Therefore, the detailed description herein is for illustrative purposes only and not for limitation. For example, the steps recited in any method or process description can be executed in any combination and / or order and are not limited to the presented combination and / or order. In addition, one or more steps from one of the disclosed methods or processes can be combined with one or more steps from another disclosed method or process in any suitable combination and / or order. Further, any function or step can be outsourced to one or more third parties or performed by a third party. In addition, any reference to the singular includes plural examples, and any reference to more than one component can include a singular example.

[0041] Although certain examples are disclosed below, those skilled in the art will understand that the present disclosure extends beyond the specifically disclosed examples and / or the use of the present disclosure and its obvious modifications and equivalents. Thus, it is intended that the scope of the present disclosure should not be limited by the specific examples described herein.

[0042] The illustrations presented herein are not meant to be actual views of any specific material, device, structure, or equipment, but merely representations for describing examples of the present disclosure.

[0043] As used herein, the term "substrate" may refer to any one or more underlying materials upon which a device, circuit, or film / layer can be used or formed.

[0044] As used herein, the term "atomic layer deposition" (ALD) may refer to a vapor deposition process in which deposition cycles, preferably multiple consecutive deposition cycles, are carried out in a processing chamber. Generally, during each cycle, a precursor is chemisorbed onto a deposition surface (e.g., a substrate surface or the surface of a previously deposited underlying layer, such as a material from a previous ALD cycle), forming a monolayer or sub-monolayer that is not readily reactive with additional precursor (i.e., a self-limiting reaction). Thereafter, if desired, a reactant (e.g., another precursor or a reactive gas) can subsequently be introduced into the processing chamber for converting the chemisorbed precursor into the desired material on the deposition surface. Generally, the reactant is capable of further reacting with the precursor. Additionally, a purge step can also be utilized during each cycle to remove excess precursor and / or excess reactant and / or reaction by-products from the processing chamber after the conversion of the chemisorbed precursor. Further, the term "atomic layer deposition" as used herein also means to include processes designated by related terms, e.g., "chemical vapor atomic layer deposition", "atomic layer epitaxy" (ALE), molecular beam epitaxy (MBE), gas-source MBE, or organometallic MBE, as well as chemical beam epitaxy when carried out with alternating pulses of precursor compositions, reactive gases, and purge gases (e.g., an inert carrier gas).

[0045] As used herein, the term "chemical vapor deposition" (CVD) may refer to any process in which a substrate is exposed to one or more volatile precursors that react and / or decompose on the substrate surface to produce a desired deposition.

[0046] As used herein, the term "cyclic deposition" may refer to the sequential introduction of one or more precursors and / or reactants into a reaction chamber to deposit a film on a substrate, and includes deposition techniques such as atomic layer deposition and cyclic chemical vapor deposition.

[0047] As used herein, the term "cyclic chemical vapor deposition" may refer to any process in which a substrate is sequentially exposed to one or more volatile precursors that react and / or decompose on the substrate to produce a desired deposition.

[0048] As used herein, the term "gap feature" may refer to an opening or cavity disposed between two surfaces of a substrate. The term "gap feature" may refer to an opening or cavity disposed between opposing inclined sidewalls of two protrusions extending vertically from a substrate surface, such as a gap, via hole, trench, etc., or opposing inclined sidewalls of a recess extending vertically into a substrate surface. Such a gap feature may be referred to as a "gap feature". The term "gap feature" may also refer to an opening or cavity disposed between two opposing substantially horizontal surfaces that define a horizontal opening or cavity; such a gap feature may be referred to as a "horizontal gap feature".

[0049] As used herein, the terms "layer", "film", and / or "thin film" may refer to any continuous or discontinuous structure and material deposited by the methods disclosed herein. For example, a "layer", "film", and / or "thin film" may include 2D materials, nanorods, nanotubes, or nanoparticles, or even partial or complete molecular layers or partial or complete atomic layers or atomic and / or molecular clusters. A "layer", "film", and / or "thin film" may include materials or layers having pinholes but still being at least partially continuous.

[0050] In the examples of the present disclosure, many example materials are given. It should be noted that the chemical formulas given for each example material should not be construed as limiting, and the non-limiting example materials given should not be limited by the example stoichiometry given.

[0051] The present disclosure includes methods for filling one or more gap features on a substrate surface, particularly methods for filling one or more gap features with a metal film using a cyclic deposition-etch process. Such films can be used in many applications, such as low-resistivity gap filling, substrate layers for 3D-NAND, DRAM word line features, DRAM buried word line features, or as interconnect materials in CMOS logic applications. The ability to deposit a metal film in a gap feature can allow for lower effective resistivity of interconnects in logic applications (i.e., CMOS structures) and word lines / bit lines in memory applications (such as 3D-NAND and DRAM structures).

[0052] Furthermore, in the present disclosure, any two numbers of a variable can constitute a viable range for that variable, and any indicated range may or may not include the endpoints. Additionally, any value of a variable indicated (whether or not it is denoted by "about") may refer to an exact value or an approximate value and includes equivalents, and may refer to an average value, median value, representative value, majority value, etc. Moreover, in the present disclosure, the terms "comprising", "consisting of", and "having" may, in some examples, independently refer to "generally or broadly comprising", "including", "substantially consisting of", or "consisting of". In the present disclosure, the meaning of any defined term does not necessarily exclude the ordinary and customary meaning in some examples.

[0053] Figure 1 It is a schematic diagram abstractly representing the exemplary reactor system 150. The reactor system 150 may include one or more reaction chambers 104, 105, and 107, each accommodating a susceptor 106 to hold a substrate 130 (including at least one feature 31) during processing, and a fluid distribution system 108 (such as a showerhead) to distribute one or more reactants onto the surface of the substrate 130. The reactor system 150 may include a direct plasma source 175 incorporated within any of the chambers 104, 105, or 107 and / or a remote plasma source 170 coupled to any of the chambers 104, 105, or 107. Multiple deposition and / or etching processes may be performed in a single reaction chamber 104, and / or various processes may be performed in separate reaction chambers 104, 105, and / or 107.

[0054] For simplicity, the reactant source and the carrier gas / purge gas source are shown coupled to a single reaction chamber 104. However, it should be understood that the reactant sources and the carrier gas / purge gas for separate processes may be coupled to the corresponding reaction chambers for those specific processes.

[0055] In one example, the reactant source containers 110, 112, 113, 140, 142, 144 and / or the carrier gas or purge gas source container 114 may be fluidly coupled to the reaction chamber 104 via respective pipelines 116, 118, 119, 141, 143, 145, and 120 and respective valves or controllers 122, 123, 125, 146, 147, 148, and 126. Reactant gases (such as a first gas-phase precursor 115, a second gas-phase precursor 117, an inhibitor 121, or an oxidant 131, a halide 132, a precursor 134 (in some embodiments, the precursor 134 may be a co-reactant), and / or an etchant 133) or other materials from the respective source containers may be applied to the substrate 130 in the reaction chamber 104. The carrier gas or purge gas 124 from the gas source container 114 may be an inert gas and may flow into and through the reaction chamber 104 to remove any excess reactants or other undesirable materials from the reaction chamber 104. The system 150 may further include a vacuum source 128 fluidly coupled to the reaction chamber 104, and the vacuum source 128 may be configured to evacuate reactants, purge gases, or other materials from the reaction chamber 104. The carrier gas or purge gas 124 may include argon, helium, neon, krypton, nitrogen, and / or xenon, etc., or a combination thereof.

[0056] In one example, the controller 152 can be configured to perform the various functions and / or steps described herein. The controller 152 can include one or more microprocessors, memory elements, and / or switching elements to perform the various functions. Although illustrated as a single unit, the controller 152 can alternatively include multiple devices. For example, the controller 152 can be used to control the gas flow (e.g., by monitoring the flow rate and controlling valves 122, 123, 125, 126, 146, 147, and / or 148), motors, the showerhead 108, the remote plasma source 170, heaters, cooling devices, and / or the vacuum source 128 to perform various processes (e.g., the processes 300, 400, 500, 600, 700, 800, 900, 1000, and / or 1100 shown in Figure 3 , 4 , 5, 6, 7, 8, 9, 10, and / or 11, respectively). Additionally, when the system includes two or more reaction chambers, as described in more detail below, two or more reaction chambers can be coupled to the same / shared controller.

[0057] In one example, the system 150 can perform a gap filling process to selectively deposit metal into the gap features or recesses 31 of a substrate. The process can include multiple sub-cycles, starting with depositing a thin metal nitride layer, then etching the metal nitride layer to the substrate in the lower portion of the gap feature, and finally depositing a metal layer on the metal nitride substrate.

[0058] In the first sub-cycle, depositing a metal nitride layer within the recess 31 of the substrate 130 can include pulsing a first gaseous precursor 115 from the reactant source container 110 to the reaction chamber 104 through the showerhead 108. A second gaseous precursor 117 can be pulsed to the reaction chamber 104 through the showerhead 108 either together with or separately from the first gaseous precursor 115 from the reactant source container 112. When the first gaseous precursor 115 and the second gaseous precursor 117 contact the substrate 130, a nitride can form on the substrate 130 within the recess 31. To inhibit the deposition of the metal nitride on the top and / or outside of the recess, an inhibitor 121 can also be pulsed from the reactant source container 113 into the chamber 104. The inhibitor 121 can flow into the chamber 104 separately from the first gaseous precursor 115 and / or the second gaseous precursor 117, or flow into the chamber 104 simultaneously with one or more of the first gaseous precursor 115 and / or the second gaseous precursor 117. In one example, the inhibitor 121 can flow into the chamber 104 after the second gaseous precursor 117 flows into the chamber 104. In another example, the inhibitor 121 can flow into the chamber 104 while the second gaseous precursor 117 flows into the chamber 104.

[0059] The inhibitor 121 can be selectively deposited preferentially at the opening of the recess 31 to prevent the formation of oxides to a greater extent at the opening of the recess 31 than within the recess 31. The reduced deposition at the opening of the recess 31 can reduce the formation of gaps or voids in the oxides deposited therein.

[0060] In one example, the metal nitride materials, such as the first gas-phase precursor 115 and the second gas-phase precursor 117, can be deposited in the same chamber as the inhibitor 121, or can be deposited in different chambers.

[0061] The metal nitride gap-fill layer can be formed by any of a variety of methods, including various deposition cycles, including pulsing the first gas-phase precursor 115, the inhibitor 121, and / or the second gas-phase precursor 117 into the chamber, and purging the chamber with a purge gas 124 between one or more pulses and / or between one or more deposition cycles. Such deposition cycles (or portions thereof) can be repeated until a desired thickness of nitride is deposited within the recess 31. The first gas-phase precursor 115, the inhibitor 121, and / or the second gas-phase precursor 117 can be pulsed into the chamber in various orders, and / or one or more can be pulsed simultaneously. For example, a deposition cycle for forming a metal nitride within the recess 31 can include pulsing the first gas-phase precursor 115 into the chamber 104, purging the chamber 104 with the purge gas 124, and then simultaneously pulsing the inhibitor 121 and the second gas-phase precursor 117 into the chamber 104, and purging the chamber 104 with the purge gas 124 at different intervals. In another example, a deposition cycle for forming an oxide within the recess 31 can include pulsing the inhibitor 121 into the chamber 104 to inhibit the deposition of the metal nitride on various regions outside or on top of the recess 31, then pulsing the first gas-phase precursor 115 into the chamber 104, purging the chamber 104 with the purge gas 124, then pulsing the inhibitor 121, then purging the chamber 104 with the purge gas 124, and finally simultaneously pulsing the second gas-phase precursor 117 into the chamber 104. The chamber 104 can be purged with the purge gas 124 at different intervals (e.g., between pulses or deposition cycles).

[0062] Another optional process can be to pulse an oxidant 131 from the reactant source 113 to oxidize the exposed surface of the deposited metal nitride (e.g., to enhance etching in the next sub-cycle).

[0063] The inhibitor 121 and the oxidant 131 are shown as optional reactants in dashed lines. For clarity, if the reactant source container 113 contains the inhibitor 121, then it will not contain the oxidant 131 as well, unless the inhibitor 121 and the oxidant 131 are the same substance. The inhibitor 121 and the oxidant 131 can be used in the same process because both are optional. In this case, each is contained in the corresponding reactant source container.

[0064] In one example, the chamber 104 can be purged with a purge gas 124 before, after, between, and / or between one or more sub-cycles, any one or more pulses of the first gas-phase precursor 115, the second gas-phase precursor 117, the inhibitor 121, and the oxidant 131. The deposition sub-cycle (or a portion thereof) can be repeated until a metal nitride layer of a desired thickness is deposited within the recess 31.

[0065] In the etch sub-cycle, the metal nitride can be etched to leave a metal nitride plug at the bottom of the recess 31 of the substrate 130. The etch sub-cycle can include pulsing a halide 132 from a reactant source container 140 into the reaction chamber 104 through the showerhead 108.

[0066] In some examples, the etched metal nitride plug can be exposed to an additional etch gas 133 (such as a low-power NF3 plasma) to remove unwanted residues.

[0067] In one example, the chamber 104 can be purged with a purge gas 124 before, after, between, and / or between one or more sub-cycles of the halide 132 and / or the etch gas 133. The etch sub-cycle (or a portion thereof) can be repeated until a metal nitride substrate (or plug) of a desired thickness is deposited within the recess 31.

[0068] In a second deposition sub-cycle, metal can be selectively deposited on the metal nitride substrate at the bottom of the recess 31 of the substrate 130. The second deposition sub-cycle can include pulsing a halide 132 from a reactant source container 140 into the reaction chamber 104 through the showerhead 108. The precursor 134 can be pulsed into the reaction chamber 104 through the showerhead 108 from the reactant source container 142 together with or independently of the halide 132. When the halide 132 and the precursor 134 contact the substrate 130, metal can be formed on the metal nitride substrate within the recess 31. In one example, the chamber 104 can be purged with a purge gas 124 before, after, between, and / or between one or more pulses of the halide 132 and / or the precursor 134 and / or between one or more second deposition sub-cycles. The second deposition sub-cycle (or a portion thereof) can be repeated until a desired thickness of metal is deposited within the recess 31.

[0069] In some examples, a reactor system (such as reactor system 150) can include multiple reaction chambers. For example, in Figure 2 the illustrated reactor system 200, the multiple reaction chambers 204 (each reaction chamber can be Figure 1Examples of any of reaction chambers 104, 105, and / or 107 (in ) may be disposed around and / or coupled to transfer chamber 280, which includes transfer tool 285 for transferring substrates between reaction chambers 204. Substrates may be transferred between load lock chamber 212 and reaction chamber 204 (e.g., via transfer chamber 280). For example, for different steps of a semiconductor manufacturing process, substrate 130 may be disposed in different chambers (e.g., the first deposition, inhibition, etching, oxidation, passivation, and / or second deposition steps may each be performed in the same or different chambers).

[0070] Figure 3 FIG. shows a simplified cross-sectional schematic view of a semiconductor structure formed during process 300, which may be a cyclic process for selectively depositing gap fill material including second layer 330 within gap features 304 of substrate 310. In one example, process 300 includes a first cyclic deposition sub-cycle of depositing first layer 320; an etch-back process of removing a portion of first layer 320; and a second cyclic deposition sub-cycle of depositing (second layer) second layer 330.

[0071] At operation 301, substrate 310 may be provided to a processing chamber (e.g., Figure 1 chamber 104 in ). In one example, substrate 310 may have one or more gap features 304 fabricated in top surface 312 of substrate 310.

[0072] In some examples, the substrate may be patterned to include high aspect ratio features, such as vertical gap features and / or horizontal gap features. In a particular example, the patterned substrate may include a non-planar surface that includes one or more gap features (or non-linear features). For example, the term "gap feature" as used herein may refer to: an opening or cavity disposed between opposing sidewalls of two protrusions extending upward from a substrate surface, or recessed opposing sidewalls extending into a substrate surface. Non-limiting examples of "gap features" may include, but are not limited to: trenches, vertical trenches, V-shaped trenches, tapered trenches, recessed trenches, openings, voids, and through-silicon via trenches. For example, a gap feature may include adjacent sidewalls that meet at a point on the feature substrate, or a gap feature may include opposing slanted sidewalls that plateau to a flat substrate surface.

[0073] In some examples of the present disclosure, the substrate may include one or more gap features, where the gap features may have an aspect ratio (height:width) that can be greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1 or even greater than 100:1, where "greater than" as used in this example refers to the greater distance in the height of the gap feature. In some examples of the present disclosure, the substrate may include one or more horizontal gap features, where the horizontal gap features may have an aspect ratio (height:width) that can be greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50 or even greater than 1:100, where "greater than" as used in this example refers to the greater distance in the width of the gap feature. In some examples, the substrate may include multiple gap features having the same and different aspect ratios.

[0074] In one example, the gap feature 304 further includes a bottom surface 318 where the sidewalls 314 meet, thereby forming a lowest region 319 at the base of the gap feature 304. In some examples, the gap feature 304 may include opposing sidewalls that are planarized to a flat substrate surface. In some examples, the gap feature 304 has sidewalls 314 and / or a bottom surface 318 formed of a dielectric material (such as an oxide that can be represented as 1kOx). In some examples, the sidewalls 314 and / or the bottom surface 318 may include a dielectric material, such as but not limited to a silicon-containing dielectric material and a metal oxide dielectric material. In some examples, the sidewalls 314 and / or the bottom surface 318 may include a silicon-containing dielectric material, such as but not limited to silicon (Si), silicon dioxide (SiO2), a lower oxide of silicon, silicon nitride (Si3N4), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon oxycarbonitride (SiOCN), silicon carbonitride (SiCN). In some examples, the substrate 310 or at least its sidewalls 314 and / or bottom surface 318 may include one or more dielectric surfaces comprising a metal oxide, such as but not limited to aluminum oxide (Al2O3), hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), hafnium silicate (HfSiOx), and lanthanum oxide (La2O3).

[0075] In operation 303, a first layer 320 material may be deposited onto the surface 312, sidewalls 314, and bottom surface 318 of the substrate 310 via a first cycle deposition process. In certain examples, the first layer 320 material may be deposited via a conformal fill process, where the thickness of the deposited material is substantially the same on all surfaces. In certain other examples, the first layer 320 material may be deposited via a non-conformal fill process, where the thickness of the deposited material is substantially different on all surfaces.

[0076] In some examples, the first layer 320 can be any of a variety of materials, such as metals (e.g., molybdenum (Mo), tungsten (W), tungsten without fluorine (FFW), ruthenium (Ru), cobalt (Co), copper (Cu), etc. or combinations thereof), metal nitrides (e.g., titanium nitride (TiN), molybdenum nitride (MoN), tungsten nitride (WN), vanadium nitride (VN), niobium nitride (NbN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), etc. or combinations thereof) and / or doped metal nitrides, including but not limited to nitrides doped with silicon (Si), aluminum (al), boron (B), cobalt (Co), and / or manganese (Mn), etc. or combinations thereof).

[0077] In operation 305, the first layer 320 can be etched back to form a substrate 322. The substrate 322 can also be referred to as a plug and / or a seed. The substrate 322 can include a surface 324.

[0078] In one example, the halide 132 can be used in operation 305 to etch the first layer 320. Such an etchant can be used to increase or maintain a desired selectivity and can have the additional benefit of removing metal oxides and / or clearing dielectric material residues from the substrate surface. Exemplary halide 132 materials include but are not limited to molybdenum pentachloride (MoCl5), tungsten chloride (WCl5), chlorine (Cl2), niobium chloride (NbCl5), titanium tetrachloride (TiCl4), vanadium tetrachloride (VCl4), tantalum pentachloride (TaCl5), hafnium tetrachloride (HfCl4), niobium fluoride (NbF5), tantalum chloride (TaCl5), or tantalum fluoride (TaF5), etc. or combinations thereof. In some examples, the halide 132 can be used as a precursor for material deposition during operation 307, which will be discussed in more detail below. The halide 132 can be exposed to a remote, indirect, or direct plasma (e.g., remote plasma source 170 or direct plasma source 175) before reaching the substrate surface.

[0079] In one example, the halide 132 can have the ability to etch the first layer 320, which includes a variety of materials, such as metals (e.g., molybdenum (Mo), tungsten without fluorine (FFW), tungsten (W), ruthenium (Ru), cobalt (Co), copper (Cu), etc. or combinations thereof), metal nitrides (e.g., titanium nitride (TiN), molybdenum nitride (MoN), tungsten nitride (WN), vanadium nitride (VN), niobium nitride (NbN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), etc. or combinations thereof) and / or doped metal nitrides, including but not limited to nitrides doped with silicon (Si), aluminum (Al), boron (B), cobalt (Co), and / or manganese (Mn), etc. or combinations thereof).

[0080] In some examples, the halide 132 etchant can have the ability to remove or etch various other materials, such as metals (e.g., W, Ti, Mo, Co, Ta, etc. or combinations thereof), oxides (e.g., Al2O3, HfO2, ZrO2, ZnO, TiO2, etc. or combinations thereof), and / or silicides (e.g., MoSi, TiSi, etc. or combinations thereof). In certain examples, the first layer 320 can include such materials.

[0081] The halide dose can be adjusted to a desired etch rate to achieve a gradient etch of the first layer 320, where the top (e.g., see the top 402 of the feature 304 shown in Figure 4 can be etched to a greater extent than the lower part (e.g., Figure 4 the lower part 404 of the feature 304 shown in).

[0082] In operation 307, the gap feature 304 can be completely or partially filled by a second cycle deposition process. The second cycle deposition process can be a selective "bottom-up" filling process, where the gap feature 304 is partially or completely filled with the second layer 330. The second layer 330 can include a metal (or other material) selectively deposited on the substrate 322.

[0083] In one example, process 300 can be a preferential deposition process and may require preferentially depositing the second layer 330 on the substrate 322 of the gap feature 304 on the surface 324, thereby filling the vertical gap feature 304 with a gap filling material by a bottom-up deposition process. The second layer 330 is preferentially deposited in the region of the gap feature 304 that is remote from the opening 326 and at the substrate region of the gap feature 304 that is remote from the opening 326. In one example, the second layer 330 is preferentially deposited within the substrate region as compared to the opening region of the vertical gap feature.

[0084] In certain examples, it is generally useful to remove the oxide on the substrate prior to the bottom-up filling operation 307 for depositing the second layer 330 on the first layer 320, and a surface cleaning step can be performed, e.g., using an H2-based plasma cleaning technique in a direct plasma or remote plasma source designed to remove oxides. In some examples, prior to the bottom-up filling operation 307, the surface 324 can be exposed to an additional etch gas 133 phase (e.g., a low-power NF3 plasma) to remove unwanted residues (e.g., chlorine).

[0085] Now turning to Figure 4, which shows a simplified cross-sectional schematic diagram of a semiconductor structure formed during process 400, which can be a cyclic process for selectively depositing a second layer 330 within the gap feature 304 of substrate 310. In one example, process 400 includes a deposition operation of depositing an inhibitor 121 in the top 402 of the gap feature 304; a first cyclic deposition sub-cycle of depositing the first layer 320; an etch-back process of removing a portion of the first layer 320; and a second cyclic deposition sub-cycle of depositing (the second layer) the second layer 330.

[0086] In operation 401, substrate 310 can be provided into a processing chamber (such as Figure 1 chamber 104 in). In one example, substrate 310 can have one or more gap features 304 fabricated in the top surface 312 of substrate 310. In one example, substrate 310 can be exposed to inhibitor 121 to inhibit the deposition of the first layer 320 on the top surface 312 and sidewalls 314 at the top 402 of substrate 310. In one example, the gap feature 304 further includes a bottom surface 318 where the sidewalls 314 meet, thereby forming a lowest region 319 at the base of the gap feature 304.

[0087] In one example, in operation 403, inhibitor 121 can be selected to preferentially deposit on the top surface 312 and sidewalls 314 at the top 402 of substrate 310, thereby preventing the formation of the first layer 320 on the sidewalls 314 at the top 402 to a greater extent than the lower portion 404 of the substrate within the gap feature 304. Reducing the deposition at the opening of the gap feature 304 can increase the yield by reducing the time for performing etch-back after depositing the first layer 320.

[0088] In operation 403, the first layer 320 material can be deposited onto the sidewalls 314 and bottom surface 318 of the gap feature 304 through a first cyclic deposition process within the gap feature 304. In certain examples, the first layer 320 material can be deposited through a non-conformal filling process, where the thickness of the deposited material is not the same on all surfaces. For example, the first layer 320 can be deposited with a greater thickness on the surfaces of the sidewalls 314 and bottom surface 318 in the lower portion 404 than on the surfaces within the top 402. Thus, the deposited film of the first layer 320 may not have a substantially uniform thickness on the surface of substrate 310. Instead, inhibitor 121 can be used to preferentially inhibit deposition in the top 402 of the gap feature 304, resulting in non-conformal deposition. Thus, inhibitor 121 can cause the first layer 320 to preferentially deposit in the lower portion 404 of the gap feature 340 at positions far from the opening 326. In some examples, the non-conformal deposition process can preferentially deposit a metal nitride film in the gap feature 304.

[0089] The inhibitor 121 can include any one of a variety of passivating substances, such as silanes, such as alkylaminosilanes. In some examples, the inhibitor 121 can include allyltrimethylsilane (TMS-A), trimethylchlorosilane (TMS-Cl), N-(trimethylsilyl)imidazole (TMS-Im), octadecyltrichlorosilane (ODTCS), hexamethyldisilazane (HMDS), N-(trimethylsilyl)dimethylamine (TMSDMA), or trimethylchlorosilane, etc. or a combination thereof.

[0090] In operation 405, the inhibitor 121 is removed, leaving the first layer 320 in the lower portion 404 of the gap feature 340. The inhibitor 121 can be removed from the surface 312 and / or sidewalls 314 by various methods known to those skilled in the art.

[0091] In some examples, the method for removing the inhibitor 121 includes exposing the substrate to an etchant, plasma, and / or cleaner or process. In some examples, removing the inhibitor 121 includes hydrogen plasma treatment. In some examples, cleaning or removing the inhibitor 121 includes baking the substrate 310 to a temperature of about 300°C to 400°C, or any suitable temperature.

[0092] In operation 407, the first layer 320 material can be etched back to form the substrate 322. The etching operation 407 can be the same or similar to that described with reference to Figure 3 operation 305.

[0093] In some examples, interface voids may form between the first layer 320 and the second layer 330, especially after downstream substrate processing including annealing. These voids may have a negative impact on the electrical performance of the device including the substrate 310, but also imply a non-negligible impurity level in the first layer 320 (such as a thin film). Impurities are undesirable because they can cause problems in subsequent process flows. To address this issue, an additional etching step can remove residues (such as Cl-related) that may tend to accumulate in the feature 304 and are difficult to remove. After depositing the second layer 330 (such as with Mo) on the surface 324 of the substrate 322, these residues may be trapped. Such residues may evaporate or sublime during a subsequent annealing step, creating voids in the film.

[0094] In one example, after thermal etch-back in operation 407, the etched first layer 320 can be exposed to an additional etch gas 133 (such as NF3) activated by a low-power plasma for a short period of time (such as one to several seconds). By adjusting the etch gas flow rate, the plasma power can be controlled, and the final etch rate can also be controlled. By optimizing the time of the etch gas plasma treatment, the formation of interface voids can be significantly reduced.

[0095] The etch gas may include a fluorine-containing gas, such as nitrogen trifluoride (NF3). The fluorine-containing gas may be activated in-situ and / or by remotely supplied RF power, and may remove impurities remaining on the first layer 320. The low-power plasma may be in the range of about 50 - 400 W, or any suitable power. Such an in-situ process reduces or eliminates the need for additional tools, simplifies the process flow, and can shorten the device production turnaround time, increase yield, and reduce costs.

[0096] In operation 409, the gap feature 304 may be completely or partially filled by a second cycle deposition process. The second cycle deposition process may be a selective "bottom-up" filling process, which is the same as or similar to the process described with reference to Figure 3 operation 307, where the gap feature 304 is partially or completely filled with the second layer 330.

[0097] Figure 5 A simplified cross-sectional schematic view of a semiconductor structure formed during process 500 is shown. Process 500 may be a cyclic process for selectively depositing a second layer 330 within the gap feature 304 of a substrate 310. In one example, process 500 includes a first cycle deposition sub-cycle of depositing a first layer 320; oxidation of at least the surface portion of the first layer 320; an etch-back process of removing a portion of the first layer 320; and a second cycle deposition sub-cycle of depositing a second layer (the second layer) 330.

[0098] In operation 501, the substrate 310 may be provided into a processing chamber (such as Figure 1 chamber 104 in). In one example, the substrate 310 may have one or more gap features 304 fabricated in the top surface 312 of the substrate 310. In one example, the gap feature 304 further includes a bottom surface 318, and sidewalls 314 meet at the bottom surface 318, thereby forming a lowest point 319 at the base of the gap feature 304.

[0099] In operation 503, a first layer 320 material may be deposited onto the sidewalls 314 and bottom surface 318 of the gap feature 304 by a first cycle deposition process within the gap feature 304. In certain examples, the first layer 320 material may be deposited by a conformal filling process, where the thickness of the deposited material is substantially the same on all surfaces. In other examples, the first layer 320 material may be deposited by a non-conformal filling process, where the thickness of the deposited material is not substantially the same on all surfaces, such as where an inhibitor 121 is applied (see, for example, Figure 4 operation 403 shown in). In one example, the first layer 320 may have an exposed surface 514.

[0100] At operation 505, the exposed surface 514 of the first layer 320 can be oxidized by an oxidant 131 on the contact surface 514. The oxidant 131 can include any one of a variety of oxidants, including water (H2O), hydrogen peroxide (H2O2), ozone (O3), oxygen (O2), O2 plasma, alcohol, alkyl alcohol, ethanol, methanol, butanol, isobutanol, isopropyl alcohol, etc. or a combination thereof. The oxidant 131 can be a pulsed gas-phase operating reactant introduced into chamber 104, or can be a plasma generated by a remote or direct plasma source. In one example, at operation 507, oxidizing the surface 514 can increase the etching rate.

[0101] At operation 507, the material of the first layer 320 can be etched back to form the substrate 322. The etching operation 407 can be the same as or similar to that described with reference to Figure 3 operation 305.

[0102] As previously discussed with reference to Figure 4 in some examples, due to the accumulation of impurities such as halides (e.g., Cl) and downstream annealing steps, an interface void may form between the first layer 320 and the second layer 330, which causes the trapped impurities to evaporate and / or sublime during subsequent annealing steps, creating voids in the film. To address this issue, after the thermal etch-back in operation 507, the etched first layer 320 can be exposed to a low-power plasma etch for a predetermined time (e.g., one second to several seconds).

[0103] At operation 509, the gap feature 304 can be completely or partially filled by a second cycle deposition process. The second cycle deposition process can be a selective "bottom-up" filling process that is the same as or similar to the process described with reference to Figure 3 operation 307, where the gap feature 304 is partially or completely filled with the second layer 330.

[0104] Figure 6 A cyclic deposition process 600 for filling one or more gap features 304 on a substrate 310 is shown in accordance with various examples of the present disclosure. Specifically, the process 600 can begin with process block 610, which includes: providing a substrate (e.g., Figure 3 the substrate 310 shown) including a gap feature (e.g., Figure 3 the gap feature 304 shown) to a reaction chamber (e.g., Figure 1 the chamber 104 shown) and heating the substrate to a desired deposition temperature.

[0105] In one example, the substrate 310 can include one or more materials and material surfaces, including but not limited to semiconductor materials, dielectric materials, and metal materials.

[0106] In some examples, the substrate may include semiconductor materials such as, but not limited to, silicon (Si), germanium (Ge), germanium tin (GeSn), silicon germanium (SiGe), silicon germanium tin (SiGeSn), silicon carbide (SiC), or III-V semiconductor materials.

[0107] In some examples, the substrate may include metallic materials such as, but not limited to, pure metals, metal nitrides, metal carbides, metal borides, and mixtures thereof.

[0108] In some examples, the substrate may include dielectric materials such as, but not limited to, silicon-containing dielectric materials and metal oxide dielectric materials. In some examples, the substrate may include one or more dielectric surfaces that include silicon-containing dielectric materials such as, but not limited to, silicon dioxide (SiO2), substoichiometric silicon oxides, silicon nitride (Si3N4), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon oxycarbonitride (SiOCN), and silicon carbonitride (SiCN). In some examples, the substrate may include one or more dielectric surfaces that include metal oxides such as, but not limited to, aluminum oxide (Al2O3), hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), hafnium silicate (HfSiOx), and lanthanum oxide (La2O3), among others, or combinations thereof.

[0109] The substrate 310 may be patterned. The patterned substrate may include a substrate that may contain semiconductor device structures formed in or on the surface of the substrate. For example, the patterned substrate may include partially fabricated semiconductor device structures such as transistors and / or memory elements. In some examples, the substrate may include a single-crystal surface and / or one or more subsurfaces that may include non-single-crystal surfaces such as polycrystalline surfaces and / or amorphous surfaces. The single-crystal surface may include, for example, one or more of silicon (Si), silicon germanium (SiGe), germanium tin (GeSn), or germanium (Ge). The polycrystalline or amorphous surface may include dielectric materials such as oxides, oxynitrides, oxycarbides, oxycarbonitrides, nitrides, or mixtures thereof.

[0110] Once the substrate is placed in a suitable reaction chamber, such as an atomic layer deposition reaction chamber or a chemical vapor deposition reaction chamber, the substrate may be heated to a desired deposition temperature. In some examples, the exemplary cyclic deposition process 600 ( Figure 6 ) may be performed at a constant deposition temperature, i.e., the substrate temperature. In alternative examples, the substrate may be heated to a first substrate temperature to contact the substrate with deposition precursors (such as metal precursors and nitrogen precursors), and the substrate may be heated to a second substrate temperature different from the first substrate temperature to contact the substrate with a halide etchant.

[0111] In some examples of the present disclosure, the substrate can be heated to a deposition temperature (i.e., substrate temperature) of less than 600 °C, or less than 550 °C, or less than 500 °C, or less than 450 °C, or less than 400 °C or less than 300 °C. In some examples, the substrate can be heated to a deposition temperature between 200 °C and 600 °C, or between 300 °C and 575 °C, or between 400 °C and 550 °C, or between 425 °C and 500 °C.

[0112] In addition, to achieve the desired deposition temperature, the exemplary cyclic deposition process 600 can also adjust the pressure in the reaction chamber. For example, in some examples of the present disclosure, the reaction chamber pressure can be adjusted to less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or less than 10 Torr, or less than 5 Torr, or less than 3 Torr, or even less than 1 Torr. In some examples, the reaction chamber pressure can be adjusted between 0.5 Torr and 300 Torr, or between 1 Torr and 10 Torr, or between 1 Torr and 5 Torr, or between 1 Torr and 3 Torr.

[0113] In one example, at process block 612, the first layer (e.g., Figure 3 the first layer 320 shown in Figure 3 ) can be deposited within the gap features (e.g.,

[0114] the gap features 304 shown in Figure 3 ) of the substrate. As described above, the first layer 320 can include any of a variety of materials that can be deposited into the gap features 304 by various deposition methods, and the claimed subject matter is not limited thereto. Process block 612 can include one or more deposition sub - cycles that can be repeated until the first layer 320 reaches a predetermined thickness. Figure 3 As described above, the etching can be performed by any of a variety of materials, e.g., those discussed above with respect to Figure 3 operation 305 in

[0115] In one example, at process block 614, the first layer (e.g., Figure 3 the first layer 320 shown in Figure 3within the gap feature 304 shown above. As described above, the second layer 330 may include any of a variety of materials that can be deposited into the gap feature 304 by various deposition methods, and the claimed subject matter is not limited thereto. Process block 616 may include one or more deposition sub - cycles that may be repeated until the second layer 330 reaches a predetermined thickness. At block 618, process 600 may end.

[0116] Figure 7 An example of a cyclic deposition process 700 for partially or fully filling one or more gap features on a substrate is shown in accordance with various examples of the present disclosure.

[0117] Process 700 may begin at process block 610, which includes a substrate (e.g., Figure 3 substrate 310 as shown) having a gap feature (e.g., Figure 3 gap feature 304 as shown) supported in a reaction chamber (e.g., Figure 1 chamber 104 as shown).

[0118] In one example, a first layer (e.g., Figure 3 first layer 320 as shown) may be deposited within the gap feature of the substrate (e.g., Figure 6 gap feature 304 as shown) by a cyclic deposition sub - cycle 612 ( Figure 3 expansion box 612 within).

[0119] In one example, the first layer 320 may be any of a variety of materials, such as metals (e.g., molybdenum (Mo), tungsten (W), fluorine - free W (FFW), ruthenium (Ru), cobalt (Co), copper (Cu), etc. or combinations thereof), metal nitrides (e.g., titanium nitride (TiN), molybdenum nitride (MoN), tungsten nitride (WN), vanadium nitride (VN), niobium nitride (NbN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), etc. or combinations thereof) and / or doped metal nitrides, including but not limited to nitrides doped with silicon (Si), aluminum (Al), boron (B), cobalt (Co) and / or manganese (Mn), etc. or combinations thereof.

[0120] In some examples of the present disclosure, the first layer 320 may include a metal ternary film, such as a ternary metal nitride film, a ternary metal oxide film, a ternary metal carbide film, a ternary metal silicide film, a ternary metal sulfide film, a ternary metal selenide film, a ternary metal phosphide film, a ternary metal boride film or mixtures and / or stacks thereof. In some examples, the ternary first layer may include: titanium aluminum nitride (TiAlN), titanium aluminum carbide (TiAlC), titanium niobium nitride (TiNbN) or titanium silicon nitride (TiSiN).

[0121] In one example, the cyclic deposition sub-cycle 612 can begin at process block 720, where the substrate can be contacted with a first gas-phase precursor (e.g., Figure 1 the first gas-phase precursor 115 shown), process block 730, where the substrate is contacted with a second gas-phase precursor (e.g., Figure 1 the second gas-phase precursor 117 shown), process block 740, where the reaction chamber can be purged (e.g., Figure 1 the purge gas 124 shown), and / or process block 750, where if the first layer has not reached a predetermined thickness, the sub-cycle can be repeated. Alternatively, if the first layer has reached the predetermined thickness, the cyclic deposition sub-cycle 612 can end, and process 700 can proceed to another processing stage (e.g., etch-back at block 614).

[0122] Specifically, at process block 720, the first gas-phase precursor can contact the substrate 310. The first gas-phase precursor can include a metal precursor and / or a metallic precursor. In some examples, the first gas-phase precursor can include a metal halide precursor, such as a metal chloride precursor, a metal iodide precursor, or a metal bromide precursor. In a particular example, the metal halide precursor can include: titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tribromide (TiBr3), hafnium tetrachloride (HfCl4), boron trichloride (BCl3), aluminum trichloride (AlCl3), silicon tetrachloride (SiCl4), disilicon hexachloride (Si2Cl6), (2-methylcyclohexa-2,5-diene-1,4-diyl)bis(trimethylsilane) (C13H26Si2), triethyl borate (B(OCH2CH3)3), trisilicon octachloride (Si3Cl8), dichlorosilane (SiH2Cl2), NiCl2(TMPDA), gallium monochloride (GaCl), gallium trichloride (GaCl3), niobium pentachloride (NbCl5), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5), molybdenum(V) oxide trichloride (MoOCl3), molybdenum(VI) oxide tetrachloride (MoOCl4), molybdenum(IV) dioxide dichloride (MoO2Cl2), indium trichloride (InCl3), tantalum pentachloride (TaCl5), tungsten hexachloride (WCl6), vanadium trifluoride (VF3), vanadium trichloride (VCl3), vanadyl chloride (VOCl3), and / or zirconium tetrachloride (ZrCl4), etc. or a combination thereof.

[0123] In some examples of the present disclosure, contacting the substrate with the metal precursor can include contacting the substrate with the metal precursor for a period of time between about 0.01 seconds and about 60 seconds, or between about 0.05 seconds and about 10 seconds, or between about 0.1 seconds and about 5.0 seconds, or even between 0.2 seconds and 1 second, or any suitable period of time.

[0124] The cyclic deposition sub-cycle 612 can continue by purging the reaction chamber at block 740. For example, by introducing an inert purge gas 124 (such as Ar) and evacuating the reaction chamber with a vacuum pump in fluid communication with the reaction chamber, excess metal precursor can be removed from the substrate surface. The purge process can include purge cycles where the period of purging the substrate surface is less than 5 seconds, or less than 3 seconds, or less than 2 seconds, or even less than 1 second, or any suitable amount of time. In some examples, the period of purging the substrate surface is between 0.1 second and 5 seconds.

[0125] The cyclic deposition sub-cycle 612 can continue to block 730 where the substrate is contacted with a second gas-phase precursor. In one example, the second gas-phase precursor can include a nitrogen precursor.

[0126] In some examples of the present disclosure, the nitrogen precursor can include: molecular nitrogen (N2), ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, or nitrogen-based plasmas. In some examples, the hydrazine derivatives can include alkyl hydrazines, including at least one of tert-butyl hydrazine (C4H9N2H3), methyl hydrazine (CH3NHNH2), or dimethyl hydrazine ((CH3)2N2H2). In some examples, the nitrogen-based plasma can be generated by applying RF power to a nitrogen-containing gas, and the nitrogen-based plasma can include atomic nitrogen (N), nitrogen ions, nitrogen radicals, and excited species of nitrogen. In some examples, the nitrogen-based plasma can also include additional reactants, such as by adding additional gases.

[0127] Optionally, before, during, and / or after operation at block 730, process 700 can include an operation of contacting the substrate 310 with a precursor 134 (such as H2) at block 731. Thus, the pulse sequence can include, for example, one or more pulses with a first gas-phase precursor (such as TiCl4) at block 720, followed by a purge (such as an Ar purge gas 124) at block 740, then the precursors 134 (such as H2) and the second gas-phase precursor 117 (such as NH3) can be pulsed simultaneously at blocks 730 and 731, followed by a separate pulse of the precursor 134 (such as H2), repeating the operation at block 731, and then again performing a purge (such as an Ar purge gas 124) at block 740.

[0128] In one example, the cyclic deposition sub-cycle 612 can continue from block 730 or 731 by purging the reaction chamber at block 740.

[0129] Optionally, the cyclic deposition sub-cycle 612 can proceed to block 732 where the substrate can be contacted with a dopant-containing precursor. At block 730, the dopant-containing precursor can be introduced into the chamber before, during, or after the substrate is contacted with the second gaseous precursor 117. By introducing the dopant-containing precursor, the cyclic deposition sub-cycle 612 can deposit a doped nitride layer into the interstitial features, the doped nitride layer including any one of a variety of dopants, including but not limited to Si, Al, B, Co, or Mn or combinations thereof.

[0130] In some examples, metal-organic precursors can be used to provide a carbon component and / or an additional metal component to the first layer, thereby depositing a ternary or quaternary first layer.

[0131] In some examples, silicon precursors can be used to provide a Si component, such as: silane (SiH4), disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H10), isopentasilane (Si5H12), or neopentasilane (Si5H12). In some examples, the silicon precursor can include a C1-C4 alkylsilane.

[0132] In some examples of the present disclosure, the first layer can include at least one of the following: a metal nitride film, a doped nitride film, a metal oxide film, a metal carbide film, a metal silicide film, a metal sulfide film, a metal selenide film, a metal phosphide film, a metal boride film, or a mixture and / or laminate thereof. In a specific example, the first layer can include at least one of the following: a transition metal oxide film, a transition metal nitride film, a transition metal silicide film, a transition metal phosphide film, a transition metal selenide film, a transition metal boride film, or a mixture and / or laminate thereof.

[0133] In some examples of the present disclosure, the first layer can include a titanium nitride film.

[0134] When the substrate is contacted with the second gaseous precursor, the cyclic deposition sub-cycle 612 of the exemplary cyclic deposition process 700 can proceed to a reaction chamber purge operation (e.g., pulsing a purge gas into the chamber) at block 740, as shown by the dashed line, and the purge operation 740 can optionally be performed at any time during the cyclic deposition sub-cycle 612 (e.g., before, after, and / or between the operations in at least blocks 720, 730, 731, and / or 732).

[0135] In block 750, if the desired (i.e., predetermined) thickness of the first layer is not achieved, the cyclic deposition sub-cycle 612 can be repeated any number of times (see arrow 605 returning to block 720) to increase the thickness of the first layer to the desired thickness. Arrow 605 can return to any one of blocks 720, 730, 731, and / or 732 of the cyclic deposition sub-cycle 612 to repeat the operations of the cyclic deposition sub-cycle 612. Additionally, the operations at blocks 720, 730, 731, 732, and / or 740 of the cyclic deposition sub-cycle 612 can be performed in any order, can be skipped, repeated, and / or separated by one or more purge operations at block 740, and the claimed subject matter is not limited thereto.

[0136] In some examples of the present disclosure, the first layer can be deposited to an average film thickness between 3 Å and 30 Å or any suitable thickness. In some examples, the first layer includes a titanium nitride film deposited to an average film thickness between 3 Å and 30 Å.

[0137] In some examples of the present disclosure, the first layer 320 can be physically continuous with an average film thickness greater than 10 Å. In some examples, the first layer 320 includes a physically continuous film with an average film thickness less than 10 Å.

[0138] When the desired thickness of the first layer is reached, process 700 can proceed to block 614, where the first layer (e.g., Figure 3 the first layer 320 as shown therein) can be etched back to the substrate (e.g., Figure 3 the substrate 322 as shown therein). Process block 614 can include one or more etching sub-cycles that can be repeated until the substrate 322 is etched to a predetermined thickness.

[0139] When the desired thickness of the etched first layer (substrate 322) is reached, process 700 can proceed to block 616, where the second layer (e.g., Figure 3 the second layer 330 as shown therein) can be deposited in the gap features of the substrate (e.g., Figure 3 the gap features 304 as shown therein). Process block 616 can include one or more deposition sub-cycles that can be repeated until the second layer 330 reaches a predetermined thickness. At block 618, process 700 can end.

[0140] In some examples, during processing, the temperature of the reaction chamber during the cyclic deposition sub-cycle 612 can be less than about 600 °C, less than about 550 °C, less than about 500 °C, less than about 450 °C, or less than about 400 °C or any suitable temperature. During operation 303, the pressure in the reaction chamber can be between 0.1 and 10 Torr, or between 1 and 5 Torr, or between 1 and 3 Torr, or any suitable pressure. In one example, during operation 303, the temperature of the reagent source container (e.g., reagent source containers 110 and / or 112) can be less than about 70 °C, less than about 60 °C, less than about 50 °C, less than about 40 °C, or less than about 35 °C or between about 30 - 40 °C, or any suitable temperature.

[0141] Figure 8 An example of a cyclic deposition process 800 for partially or fully filling one or more gap features on a substrate is shown in accordance with various examples of the present disclosure. Process 800 is similar to process 700 described in reference Figure 7 However, process 800 includes an optional treatment of the top of the gap feature with an inhibitor (e.g., inhibitor 121).

[0142] For example, process 800 can start with process block 610, which includes a substrate (e.g., Figure 4 substrate 310 as shown) supporting gap features (e.g., Figure 4 gap feature 304 as shown) in a reaction chamber (e.g., Figure 1 chamber 104 as shown). A first layer (e.g., Figure 4 first layer 320 as shown) can be deposited in the gap features (e.g., Figure 4 gap feature 304 as shown) of the substrate through the cyclic deposition sub-cycle 612.

[0143] In a particular example, the cyclic deposition sub-cycle 612 can include an optional operation at process block 870, including contacting the top of the substrate (e.g., Figure 4 top 402 as shown in Figure 1 ) with an inhibitor (e.g., inhibitor 121 as shown in Figure 4 ). As described above, the inhibitor can inhibit the deposition of the first layer 320 in the regions where the inhibitor is deposited, e.g., on the top (e.g., top surface 312 and sidewalls 314 as shown) of the substrate.

[0144] Inhibitor 121 can be used to preferentially inhibit the deposition of the first layer 320 at the top 402 of the gap feature 304, resulting in non-conformal deposition. Inhibitor 121 can cause the first layer 320 to preferentially deposit in the lower portion 404 of the gap feature 340 at positions away from the opening 326. In some examples, the non-conformal deposition process can preferentially deposit a metal nitride film in the gap feature 304.

[0145] The cyclic deposition sub-cycle 612 process can continue (as described above with respect to Figure 7 ), to block 720, where the substrate is contacted with a first gas-phase precursor (e.g., the first gas-phase precursor 115 as shown in Figure 1 ), process block 730, where the substrate is contacted with a second gas-phase precursor (e.g., the second gas-phase precursor 117 as shown in Figure 1 ), process block 740, where the reaction chamber can be purged (e.g., the purge gas 124 as shown in Figure 1 ), and / or process block 750 where if the first layer has not reached a predetermined thickness, the sub-cycle can be repeated. Alternatively, if the first layer has reached the predetermined thickness, the cyclic deposition sub-cycle 612 can end, and process 800 can proceed to another processing stage (e.g., etch-back at block 714).

[0146] In optional block 872, the inhibitor can be removed, leaving the first layer in the lower portion 404 of the gap feature 340. The inhibitor 121 can be removed from the surface 312 and / or sidewalls 314 by any of a variety of methods known to those skilled in the art.

[0147] When the desired thickness of the first layer is reached, process 800 can proceed to block 614, where the first layer (e.g., the first layer 320 as shown in Figure 3 ) can be etched back to the substrate (e.g., the substrate 322 as shown in Figure 3 ). Process block 614 can include one or more etch sub-cycles that can be repeated until the substrate 322 is etched to a predetermined thickness.

[0148] In block 750, if the desired (i.e., predetermined) thickness of the first layer is not reached, the cyclic deposition sub-cycle 612 can be repeated any number of times (see arrow 605 returning to block 720), to increase the thickness of the first layer to the desired thickness. Arrow 605 can return to any of blocks 870, 720, 730, 731, and / or 732 of the cyclic deposition sub-cycle 612, to repeat the operations of the cyclic deposition sub-cycle 612. Additionally, the operations at blocks 870, 872, 720, 730, 731, 732, and / or 740 of the cyclic deposition sub-cycle 612 can be performed in any order, can be skipped, repeated, and / or separated by one or more purge operations at block 740, and the claimed subject matter is not limited thereto.

[0149] When the desired thickness of the etched first layer (substrate 322) is reached, process 800 can proceed to block 616, where the second layer (e.g., the second layer 330 in Figure 3 ) can be deposited on the gap feature of the substrate (e.g., Figure 3in the gap feature 304 shown. Process block 616 can include one or more deposition sub-cycles that can be repeated until the second layer 330 reaches a predetermined thickness. At block 618, process 800 can end.

[0150] Figure 9 An example of a cyclic deposition process 900 for partially or fully filling one or more gap features on a substrate is shown in accordance with various examples of the present disclosure. Process 900 is similar to process 700 described in reference Figure 7 However, process 900 includes optional oxidation of the exposed surface of the first deposited layer.

[0151] For example, process 900 can start at process block 610, which includes a substrate (e.g., Figure 5 substrate 310 shown) with gap features (e.g., Figure 5 gap feature 304 shown) supported in a reaction chamber (e.g., Figure 1 chamber 104 shown). The first layer (e.g., Figure 5 first layer 320 shown) can be deposited within the gap features of the substrate (e.g., Figure 5 gap feature 304 shown) through cyclic deposition sub-cycle 612.

[0152] The cyclic deposition sub-cycle 612 process can proceed to block 720, where the substrate is contacted with a first gas-phase precursor (e.g., Figure 1 first gas-phase precursor 115 shown in ), process block 730, where the substrate is contacted with a second gas-phase precursor (e.g., Figure 1 second gas-phase precursor 117 shown in ), process block 740, where the reaction chamber can be purged (e.g., Figure 1 purge gas 124 shown in ), and / or process block 750, where if the first layer 320 has not reached the predetermined thickness, sub-cycle 612 can be repeated. If the first layer has reached the predetermined thickness, the cyclic deposition sub-cycle 612 can end, and process 900 can proceed to another processing stage (e.g., oxidation at block 980).

[0153] In a particular example, the cyclic deposition sub-cycle 612 can move to process block 980, including oxidizing the exposed surface of the first layer 320 (e.g., exposed surface 514 as shown in Figure 5 ). Oxidation of the exposed surface 514 can be performed through a variety of processes, including contacting the exposed surface 514 with an oxidizing species (e.g., Figure 1 oxidizer 131 shown). As described in reference Figure 5As described above, the oxidant may include water (H2O), hydrogen peroxide (H2O2), ozone (O3), oxygen (O2), O2 plasma, alcohol, alkyl alcohol, ethanol, methanol, butanol, isobutanol, isopropanol, etc. or a combination thereof. The oxidant 131 may be a gaseous operating reactant pulsed into chamber 104, or may be a plasma generated by a remote or direct plasma unit.

[0154] The operations at blocks 720, 730, 740, and / or 980 may be performed in any order, may be skipped, repeated, and / or separated by one or more purge operations at block 740, and the claimed subject matter is not limited thereto.

[0155] In one example, the oxidized surface 514 may improve the etch rate operation at block 614, where the first layer may be etched back to the substrate 322. Process block 614 may include one or more etch sub - cycles that may be repeated until the substrate 322 is etched to a predetermined thickness.

[0156] When the desired thickness of the first etched layer (substrate 322) is reached, process 900 may proceed to block 616, where a second layer may be deposited in the gap features (e.g., Figure 3 the gap feature 304 as shown) of the substrate. Process block 616 may include one or more deposition sub - cycles that may be repeated until the second layer 330 reaches a predetermined thickness. At block 618, process 900 may end.

[0157] Figure 10 An example of a cyclic deposition process 1000 for partially or fully filling one or more gap features on a substrate is shown in accordance with various examples of the present disclosure.

[0158] In one example, process 1000 may start at process block 610, where a substrate (e.g., Figure 3 substrate 310 as shown) including gap features (e.g., Figure 3 the gap feature 304 as shown) is supported in a reaction chamber (e.g., Figure 1 chamber 104 as shown). A first layer (e.g., Figure 3 the first layer 320 shown in ) may be deposited to a desired thickness in the gap features (e.g., Figure 7-9 the gap feature 304 as shown) of the substrate by the cyclic deposition sub - cycle represented at block 612 and at least with reference to Figure 3 described above.

[0159] In a particular example, process 1000 may proceed to the cyclic etch sub - cycle 614 ( Figure 6 the expanded block 614 in ), and the cyclic etch sub - cycle 614 may be repeated to etch back the first layer 320 to form a substrate (e.g., Figure 3the substrate 322 shown in). The substrate 322 may include a surface (e.g., Figure 3 the surface 324 shown). The cyclic etch sub-cycle 614 may be repeated until the substrate 322 is etched to a predetermined thickness. In one example, the cyclic etch sub-cycle 614 may include a thermal atomic layer etch step. In some examples, the etch may be performed on the various materials of the first layer 320 described herein, including metal nitride films such as TiN.

[0160] In one example, the cyclic etch sub-cycle 614 may begin at block 1024, where the substrate may be contacted with a halide (e.g., Figure 1 the halide 132 in). Such etchants may be used to increase or maintain the desired selectivity and have the additional benefit of removing metal oxides and / or cleaning dielectric material residues from the substrate surface. Exemplary etchants may include NF3, molybdenum pentachloride (MoCl5), and / or other metal halides such as tungsten chloride (WCl5), chlorine (Cl2), niobium chloride (NbCl5), titanium tetrachloride (TiCl4), vanadium tetrachloride (VCl4), tantalum pentachloride (TaCl5), hafnium tetrachloride (HfCl4), niobium fluoride (NbF5), tantalum chloride (TaCl5), or tantalum fluoride (TaF5), etc. or combinations thereof.

[0161] In one example, the concentration of the halide 132 may affect the etch activity. In one example, the temperature of the reactant vessel 140 may be maintained at about 100 °C to 150 °C to maintain a faster or desired etch rate. In one example, a higher temperature of the reactant vessel 140 provides a higher dose of the halide 132. In certain examples, the halide 132 may be exposed to a remote, indirect, or direct plasma before reaching the substrate surface.

[0162] In one example, the etchant may have the ability to etch the first layer 320, which includes various materials such as metals including, but not limited to, molybdenum (Mo), tungsten (W), ruthenium (Ru), cobalt (Co), copper (Cu), etc. or combinations thereof; metal nitrides including, but not limited to, titanium nitride (TiN), molybdenum nitride (MoN), tungsten nitride (WN), vanadium nitride (VN), niobium nitride (NbN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), etc. or combinations thereof; and / or doped metal nitrides including, but not limited to, nitrides doped with silicon (Si), aluminum (Al), boron (B), cobalt (Co), or manganese (Mn), etc. or combinations thereof.

[0163] In some examples, the etchant may have the ability to remove or etch various other materials, such as metals (e.g., W, Ti, Mo, Co, Ta, etc. or combinations thereof), oxides (e.g., Al2O3, HfO2, ZrO2, ZnO, TiO2, etc. or combinations thereof), and / or silicides (e.g., MoSi, TiSi, etc. or combinations thereof).

[0164] The cyclic deposition sub-cycle 614 can continue by purging the reaction chamber at block 1044. For example, the excess halide 132 can be removed from the substrate surface by introducing an inert purge gas and evacuating the reaction chamber with a vacuum pump in fluid communication with the reaction chamber. In another example, the purge operation of block 1044 can be performed at any point in the cyclic etch sub-cycle 614, such as before the cyclic etch sub-cycle 614 begins, and / or when the cyclic etch sub-cycle 614 is completed, after pulsing the halide reactant into the chamber at block 1024.

[0165] In some examples, during processing, during the cyclic etch sub-cycle 614, the temperature of the reaction chamber 104 can be less than about 600 °C, or less than about 550 °C, or less than about 500 °C, or less than about 450 °C, or less than about 400 °C, or any suitable temperature. During the cyclic etch sub-cycle 614, the pressure in the reaction chamber 104 can be between 0.1 and 50 Torr, or between 0.1 and 5 Torr, or between 0.1 and 10 Torr, or any suitable pressure. In one example, during the cyclic etch sub-cycle 614, the vessel temperature (e.g., the halide source vessel 140) can be less than about 150 °C, or less than about 140 °C, or less than about 130 °C, or less than about 120 °C, or less than about 110 °C, or between about 100 °C - 150 °C, or any suitable temperature. In one example, the temperature of the vessel (e.g., the halide source vessel 140) during the cyclic etch sub-cycle 614 can be higher than the temperature of the corresponding reactant source vessel during the cyclic deposition sub-cycle 612 and / or the cyclic deposition sub-cycle 612, thereby providing a faster etch rate.

[0166] At block 1050, if the desired (i.e., predetermined) thickness of the substrate 322 is not achieved, the cyclic deposition sub-cycle 614 can be repeated any number of times (see arrow 605 returning to block 1024) to etch back the thickness of the first layer to the desired thickness of the substrate 322.

[0167] At block 1050, it can be determined whether the substrate 322 has been etched to the desired thickness. If not, the cyclic deposition sub-cycle 614 can be repeated at step 1005. If the desired thickness of the substrate 322 has been achieved, the process 1000 can move to the operation at block 616, where metal (or other material) can be deposited on the substrate 322. Process block 616 can include one or more deposition sub-cycles, which can be repeated until the second layer (e.g.,Figure 3 The second layer shown (330) reaches a predetermined thickness. At block 618, process 1000 can end.

[0168] Figure 11 An example of a cyclic deposition process 1100 for partially or fully filling one or more gap features on a substrate is shown in accordance with various examples of the present disclosure.

[0169] In one example, process 1100 can begin at process block 610, which includes a substrate (e.g., Figure 3 substrate 310 shown) having gap features (e.g., Figure 3 gap feature 304 shown) supported in a reaction chamber (e.g., Figure 1 chamber 104 shown). A first layer (e.g., Figure 3 first layer 320 shown in ) can be deposited to a desired thickness within the gap features of the substrate (e.g., Figure 7-9 gap feature 304 shown) by the cyclic deposition sub - cycle represented in block 612 and at least with reference to Figure 3 the cyclic deposition sub - cycle described above.

[0170] In one example, process 1100 can proceed to a cyclic etch operation at block 614, which can be repeated to etch back the first layer 320 to form a base (e.g., Figure 3 base 322 shown in ). When the base 322 is etched to a desired thickness, process 1100 can move to the cyclic deposition sub - cycle 616 ( Figure 6 expanded block 616 in ) where metal (or other material) can be deposited on the base 322.

[0171] In one example, the cyclic deposition sub - cycle 616 is a selective bottom - up filling process for filling one or more gap features on the substrate surface. The cyclic deposition sub - cycle 616 can be repeated until a second layer (e.g., Figure 3 second layer 330 shown in ) is deposited on the base within the gap features of the substrate and reaches a predetermined thickness.

[0172] In one example, the process can begin with an optional surface cleaning step at block 1123, which can include performing a surface cleaning on a semiconductor device structure to remove metal oxides from the bottom surface of the gap feature or from a metal film / layer / element on the base. The surface cleaning can be performed before depositing the second layer within the gap feature, for example, using an H2 - based plasma cleaning technique in a direct plasma or remote plasma source designed to remove metal oxides.

[0173] Alternatively or additionally, in some examples, an etch step can be utilized to perform surface cleaning to remove residues (e.g., Cl-related) that may tend to accumulate in feature 304 and are difficult to remove. These residues may be trapped after depositing a second layer 330 (e.g., with Mo) on top of substrate 322. The etch step can include exposing the etched first layer 320 to a low-power NF3 133 plasma for a few seconds after a thermal etch-back in a cyclic etch sub-cycle 614. By adjusting the NF3 133 flow rate, the plasma power can be controlled, and the final etch rate can also be controlled. By optimizing the time of NF3 plasma treatment, the formation of interface voids can be significantly reduced.

[0174] Process 1100 can continue to block 1124, including providing a metal precursor into the reaction chamber during a pulse period. The metal precursor can be a halide (e.g., Figure 1 the halide 132 shown), and can take various forms, including but not limited to MoCl5, MoCl4, MoO2Cl2, and / or MoOCl4. At block 1144, a purge gas 124 can be pulsed into the reaction chamber to remove excess reactants.

[0175] Simultaneously or separately, at block 1134, a co-reactant can be pulsed into the chamber to contact the substrate. The reactant can take various forms, such as a reducing agent like H2 used in some embodiments.

[0176] At block 1134, the substrate can be contacted with a co-reactant (e.g., a precursor 134 that acts as the Figure 1 co-reactant shown). The co-reactant can be a reducing agent and can be pulsed into the chamber before, after, and / or simultaneously with the halide. In some embodiments, the ratio of the halide (e.g., MoCl5) to the co-reactant can be adjusted to achieve a specific deposition rate. For example, in a specific example, a MoCl5:H2 ratio of about 1*10E-5 to 1*10E-3 is desirable.

[0177] In one example, precursor 134 can include but not limited to: H2 and N2, ammonia (NH3), hydrazine (N2H4), alkyl hydrazine, alcohol, aldehyde, carboxylic acid, borane, and amine, silane (SiH4), disilane (Si2H6), trisilane (Si3H8), germane (GeH4), digermane (Ge2H6), borane (BH3), diborane (B2H6), 1-methyl-3,6-bis(trimethylsilyl)-1,4-cyclohexadiene (C13H26Si2), and hydrogen-excited substances.

[0178] At block 1150, it can be determined whether the second layer has reached a desired thickness (e.g., a predetermined thickness) after each cyclic deposition sub-cycle 616. If not, additional cycles can be performed at step 1105 to further increase the thickness of the growing second layer so as to fill the gap feature from bottom to top.

[0179] The operations at blocks 1123, 1124, and / or 1134 can be performed in any order, can be skipped, repeated, and / or separated by one or more purge operations at block 1144, and the claimed subject matter is not limited thereto. When the second layer reaches the predetermined or desired thickness, process 1100 can proceed to block 618, where process 1100 can end.

[0180] In some examples, during processing, the temperature of the reaction chamber 104 during the cyclic deposition sub-cycle 616 can be less than about 600 °C, or less than about 550 °C, or less than about 500 °C, or less than about 450 °C, or less than about 400 °C or between about 400 °C - 550 °C, or any suitable temperature. During the cyclic deposition sub-cycle 616, the pressure in the reaction chamber 104 can be between 0.1 and 100 Torr, or between 0.1 and 50 Torr, or between 0.1 and 25 Torr, or any suitable pressure. In one example, during the cyclic deposition sub-cycle 616, the temperature of the container (e.g., the reagent source container 140) can be less than about 110 °C, or less than about 100 °C, or less than about 90 °C, or less than about 80 °C, or between about 80 °C - 110 °C, or any suitable temperature.

[0181] It should be understood that any conceivable order of deposition, etching processes, purge cycles, and their repetitions are considered to be part of the present disclosure, including combinations of depositions, etching processes, purge cycles, and their repetitions disclosed with respect to different figures, and the claimed subject matter is not limited thereto.

[0182] Although exemplary examples of the present disclosure are set forth herein, it should be understood that the present disclosure is not limited thereto. Various modifications, variations, and enhancements can be made to the systems and methods set forth herein without departing from the spirit and scope of the present disclosure.

[0183] The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of various systems, components, and configurations, as well as other features, functions, actions, and / or properties disclosed herein, and any and all equivalents thereof.

Claims

1. A method for filling a gap feature on a substrate surface, comprising: providing a substrate having a surface including interstitial features in a reaction chamber; Depositing a first material layer into the gap feature using a first cyclic deposition process; etching the first material layer using a cyclic etching process to form a base in a bottom of the gap feature; as well as The gap feature is partially filled with a second material layer using a second cyclic deposition process.

2. The method according to claim 1, wherein: The substrate is a metal substrate, which includes a metal selected from the following: titanium nitride (TiN), molybdenum nitride (MoN), tungsten nitride (WN), vanadium nitride (VN), niobium nitride (NbN), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), molybdenum (Mo), tungsten (W), fluorine-free W (FFW), ruthenium (Ru), cobalt (Co), copper (Cu) or doped metal nitride.

3. The method according to claim 1, wherein: The first cycle deposition process comprises: contacting a substrate with a first vapor precursor; contacting the substrate with a second vapor precursor; and The chamber was purged.

4. The method according to claim 3, wherein: The first gas-phase precursor includes at least one of the following: titanium tetrachloride (TiCl4), titanium tetraiodide (TiI4), titanium tetrabromide (TiBr3), hafnium tetrachloride (HfCl4), boron trichloride (BCl3), aluminum trichloride (AlCl3), silicon tetrachloride (SiCl4), disilicon hexachloride (Si2Cl6), trisilicon octachloride (Si3Cl8), dichlorosilane (SiH2Cl2), NiCl2 (TMPDA), 2-methylcyclohexa-2,5-diene-1,4-diyl)bis(trimethylsilane) (C13H26Si2), triethyl borate (B(OCH2C H3)3), gallium monochloride (GaCl), gallium trichloride (GaCl3), niobium pentachloride (NbCl5), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5), molybdenum (V) trichloride oxide (MoOCl3), molybdenum (VI) tetrachloride oxide (MoOCl4), molybdenum (IV) dichloride dioxide (MoO2Cl2), indium trichloride (InCl3), tantalum pentachloride (TaCl5), tungsten hexachloride (WCl6), vanadium fluoride (VF3), vanadium chloride (VCl3), vanadium oxychloride (VOCl3) or zirconium tetrachloride (ZrCl4), or a combination thereof.

5. The method according to claim 3, wherein: The second gas-phase precursor includes at least one of the following: hydrogen (H2), molecular nitrogen (N2), ammonia (NH3), hydrazine (N2H4), hydrazine derivatives, nitrogen-based plasma, alkyl hydrazine, tert-butyl hydrazine (C4H9N2H3), methyl hydrazine (CH3NHNH2), dimethyl hydrazine ((CH3)2N2H2), atomic nitrogen (N), nitrogen ions, nitrogen radicals or excited nitrogen species. The method of claim 3 , further comprising contacting a top portion of the substrate with an inhibitor.

7. The method according to claim 6, wherein: The inhibitor includes at least one of the following: allyltrimethylsilane (TMS-A), trimethylchlorosilane (TMS-Cl), N-(trimethylsilyl)imidazole (TMS-Im), octadecyltrichlorosilane (ODTCS), hexamethyldisilazane (HMDS), N-(trimethylsilyl)dimethylamine (TMSDMA) or trimethylchlorosilane, or a combination thereof.

8. The method of claim 3, further comprising contacting the exposed surface of the first material layer with an oxidizing agent.

9. The method according to claim 8, wherein: The oxidant includes at least one of the following: water (H2O), hydrogen peroxide (H2O2), ozone (O3), oxygen (O2), O2 plasma, alcohol, alkyl alcohol, ethanol, methanol, butanol, isobutanol, isopropanol or a combination thereof.

10. The method according to claim 1, wherein: The cyclic etching process comprises: a. contacting the substrate with a first halide; and b. Purge the chamber.

11. The method according to claim 10, wherein: The first halide includes molybdenum pentachloride (MoCl5), NF3, tungsten chloride (WCl5), chlorine (Cl2), niobium chloride (NbCl5), titanium tetrachloride (TiCl4), vanadium tetrachloride (VCl4), tantalum pentachloride (TaCl5), hafnium tetrachloride (HfCl4), niobium fluoride (NbF5) or tantalum fluoride (TaF5), or a combination thereof.

12. The method according to claim 11, wherein: The first halide includes MoCl5, NF3, NbCl5 or WCl5.

13. The method according to claim 10, wherein: The temperature of the first halide container is between 100°C and 150°C.

14. The method according to claim 10, wherein: The second cycle deposition process comprises: contacting the substrate with a second halide; contacting the substrate with a co-reactant; and The chamber was purged.

15. The method according to claim 14, wherein: The second halide includes at least one of the following: MoCl5, MoCl4, MoO2Cl2 or MoOCl4.

16. The method according to claim 14, wherein: The first halide and the second halide are the same.

17. The method of claim 14, further comprising a surface cleaning step comprising contacting exposed surfaces within the gap features with an etching gas.

18. The method according to claim 17, wherein: The etching gas is a plasma of NF3.

19. The method according to claim 14, wherein: The co-reactant includes at least one of the following: H2, N2, ammonia (NH3), hydrazine (N2H4), silane (SiH4), disilane (Si2H6), trisilane (Si3H8), germane (GeH4), digermane (Ge2H6), borane (BH3), diborane (B2H6), 1-methyl-3,6-bis(trimethylsilyl)-1,4-cyclohexadiene (C13H26Si2) or a hydrogen excited species.

20. The method according to claim 14, wherein: The co-reactant includes H2.

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