Device and method for suppressing bus voltage harmonic waves of two-stage photovoltaic grid-connected inverter

Abstract

The invention discloses a device and method for suppressing bus voltage harmonic waves of a two-stage photovoltaic grid-connected inverter, and the device comprises a first capacitor, one end of the first capacitor is electrically connected with the drain electrode of a first switching tube, and the other end of the first capacitor is electrically connected with the source electrode of a second switching tube; the drain electrode of the second switch tube 2 is electrically connected with the source electrode of the first switch tube and electrically connected with one end of the inductor, the other end of the inductor is electrically connected with one end of the low-voltage side capacitor, and the other end of the low-voltage side capacitor is electrically connected with the source electrode of the second switch tube. According to the invention, the requirement on the capacitance value of the direct-current bus capacitor can be reduced while the harmonic suppression performance is ensured, so that remarkable cost benefits are shown in application occasions with higher power. In addition, in medium and small power application scenarios, the thin-film capacitor can be used to replace an electrolytic capacitor, so that the service life of the equipment is further prolonged.

Description

Technical Field

[0001] The present invention relates to the field of electricity, and particularly to a device and method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter. Background Art

[0002] Developing clean and renewable energy power generation technologies such as solar energy is crucial for alleviating energy shortages and addressing environmental protection challenges. However, the power generation of photovoltaic systems is strongly random, being restricted by various factors such as light intensity and temperature. As the core of a photovoltaic grid-connected system, a grid-connected inverter needs to track the maximum power point of the photovoltaic characteristic curve in real time and ensure the smooth grid connection of solar energy. To adapt to the operating voltages of different photovoltaic cells, two-stage structures are often adopted in grid-connected inverters. Although this increases the component configuration, it can decouple the AC part and the DC part, reducing the difficulty of controller design, and thus is widely recognized in the market.

[0003] During the grid connection process of the inverter, the double-frequency power frequency harmonics contained in the grid-connected instantaneous power will cause corresponding even harmonics in the DC bus voltage. Excessive even voltage harmonics will seriously affect the maximum power point tracking (MPPT) accuracy of the front-stage DC side, thereby reducing the actual utilization efficiency of solar energy. Moreover, the even harmonics of the DC bus voltage will also cause odd harmonics in the grid-connected current. If the harmonic amplitude is too large, it will affect the quality of the grid-connected electric energy, making it difficult to meet the grid connection standards. To address the latter problem, some scholars have tried to extract the harmonic components of the DC bus voltage and inject them into the modulation ratio to reduce the harmonics of the output current. However, this method increases the complexity of the modulation algorithm. Other scholars have adopted proportional-resonant control or repetitive control in the control strategy to suppress the harmonics of the grid-connected current. However, the application of these theories in actual digital control is difficult. For the front-stage side, the even harmonic components of the DC bus voltage can be extracted through a filtering algorithm, and the duty cycle can be compensated in real time to mitigate the impact of the DC bus voltage ripple on the MPPT tracking accuracy. Although the above methods can alleviate the impact caused by the double-frequency power frequency harmonics of the instantaneous power to a certain extent, they do not fundamentally suppress the generation of this harmonic.

[0004] According to the calculation formula of the DC bus capacitor, to obtain the same filtering effect, the larger the capacitance value required for harmonics with lower frequencies. However, high-voltage and large-capacitance electrolytic capacitors not only have a large volume and high cost, but also have a relatively limited lifespan. Therefore, simply increasing the capacitance value will not only reduce the power density of the inverter, increase the product cost, but also shorten the service life of the product. Summary of the Invention

[0005] To solve the above technical problems, the present invention proposes a device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter.

[0006] The object of the present invention is achieved through the following technical solutions:

[0007] A device for suppressing bus voltage harmonics of a two - stage photovoltaic grid - connected inverter, comprising a first capacitor C 1 , one end of the first capacitor C 1 is electrically connected to the drain of the first switching transistor P 1 , and the other end of the first capacitor C 1 is electrically connected to the source of the second switching transistor P 2 ; the drain of the second switching transistor P 2 is electrically connected to the source of the first switching transistor P 1 and is also electrically connected to one end of an inductor L, and the other end of the inductor L is electrically connected to one end of a low - voltage - side capacitor C 2 , and the other end of the low - voltage - side capacitor C 2 is electrically connected to the source of the second switching transistor P 2 .

[0008] For further improvement, the two - stage grid - connected inverter includes a boost boost - up circuit, and the boost boost - up circuit is respectively connected in parallel to an inverter bus capacitor C 0 and a single - phase inverter bridge, and the single - phase inverter bridge is electrically connected to the power grid through an LCL filter.

[0009] For further improvement, one end of the first capacitor C 1 is electrically connected to one end of a relay S 1 , the other end of the relay S 1 is electrically connected to one end of an inverter bus capacitor C 0 , and the other end of the inverter bus capacitor C 0 is electrically connected to the other end of the first capacitor C 1 .

[0010] For further improvement, the capacitance value of the inverter bus capacitor C 0 is 500 uF, the capacitance value of the first capacitor C 1 and the low - voltage - side capacitor C 2 is 600 uF, and the inductance value of the inductor L is 120 uH.

[0011] A method for suppressing bus voltage harmonics of a two - stage photovoltaic grid - connected inverter, using the above - mentioned device, includes the following steps:

[0012] Step 1: After pre - charging the first capacitor C 1 to satisfy |U bus -U in |≤2V, control the relay S 1 to close, where U bus is the voltage across the inverter bus capacitor C 0 , and U in is the voltage across the first capacitor C 1 .

[0013] Step 2: Close the second switch tube P 2 , low voltage side capacitor C 2 Voltage reference value U s_ref The reference value is initially set to 0V and then gradually increased to 240V. s_ref Subtract the low voltage side capacitor C 2 The voltage across the two ends is U s Get the error signal ΔU yc And as the input signal of the PI controller, the output signal of the PI controller is the first switch tube P 1 The duty cycle of the low voltage side capacitor C 2 After charging to 240V, the pre-charging process ends;

[0014] Get the inverter bus capacitance C during the pre-charging process 0 The average voltage across the two ends is U bus_avg ;

[0015] Step 3: Obtain the first capacitance C through sampling 1 The voltage U in , low voltage side capacitor C 2 The voltage U s and the input current I of the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter in；

[0016] Step 4: According to the sampling number T, get the low-voltage side capacitance C 2 The average value of the upper voltage Us is S_avg ;

[0017] Step 5: U S_avg Subtracting from 240V gives the error signal ΔU s , ΔU s As the input signal of the outer loop PI controller, the output signal of the outer loop PI controller is the first capacitor C 1 Voltage reference value U in_ref ;

[0018] Step 6: Connect the first capacitor C 1 The voltage U in Subtract the first capacitor C 1 Voltage reference value U in_ref Calculate the error signal ΔU in , ΔU in As the input signal of the inner loop PI controller, the output signal of the PI controller is the first capacitor C 1 The reference current I c_ref ;

[0019] Step 7: I in Subtract the reference current Ic_ref , obtain the controlled average current I m of the reference value I m_ref ;

[0020] Step Eight, according to I m_ref deduce the operating states of the first switching transistor P 1 and the second switching transistor P 2 :

[0021] When U in ≥U in_ref , the device for suppressing the bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in the buck mode. At this time, the duty cycles D 1 of the first switching transistor P 2 and the second switching transistor P S1 and D S2 satisfy:

[0022]

[0023] where L represents the inductance value of the inductor L, and f represents the grid frequency;

[0024] When U in <U in_ref , the device for suppressing the bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in the boost mode. At this time, the duty cycles D 1 of the first switching transistor P 2 and the second switching transistor P S1 and D S2 satisfy:

[0025]

[0026] Control the actions of the first switching transistor P 1 and the second switching transistor P 2 through PWM signals.

[0027] Further improvement,

[0028] where t represents the t-th sampling, and U bus (t) represents the voltage across the inverter bus capacitor C 0 at the t-th sampling.

[0029] Further improvement,

[0030] where U S (t) is the voltage across the low-voltage side capacitor C 2 at the t-th sampling.

[0031] Further improvement, the number of samplings T = 200.

[0032] The beneficial effects of the present invention are as follows:

[0033] 1. While ensuring the harmonic suppression performance, the present invention can reduce the requirement for the capacitance value of the DC bus capacitor, thereby showing significant cost-effectiveness in applications with higher power. In addition, in medium and low power application scenarios, the service life of the equipment can be further extended by using thin film capacitors instead of electrolytic capacitors.

[0034] 2. The device proposed in the present invention can adapt to the inverter bus voltage and has the characteristic of being pluggable.

[0035] 3. The control strategy proposed in the present invention is simple and is convenient for implementing digital control in engineering. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The present invention will be further described with reference to the accompanying drawings, but the content in the drawings does not constitute any limitation to the present invention.

[0037] Figure 1 FIG. is the topology diagram of the inverter system with a bus voltage harmonic suppression device provided by an embodiment of the present invention.

[0038] Figure 2 FIG. is the control block diagram of the bus voltage harmonic suppression device provided by an embodiment of the present invention.

[0039] Figure 3 FIG. is the bus voltage waveform diagram of the two-stage photovoltaic grid-connected inverter provided by an embodiment of the present invention.

[0040] Figure 4 FIG. is the output current waveform diagram of the two-stage photovoltaic grid-connected inverter provided by an embodiment of the present invention.

[0041] Figure 5 FIG. is the THD of the inverter bus voltage before the operation of the harmonic suppression device provided by an embodiment of the present invention.

[0042] Figure 6 FIG. is the THD of the inverter grid-connected current before the operation of the harmonic suppression device provided by an embodiment of the present invention.

[0043] Figure 7 FIG. is the THD of the inverter bus voltage after the operation of the harmonic suppression device provided by an embodiment of the present invention.

[0044] Figure 8 FIG. is the THD of the inverter grid-connected current after the operation of the harmonic suppression device provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0045] In order to make the purpose, technical solutions and advantages of the invention more clear and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0046] Embodiment 1

[0047] The system topology diagram of the two - stage photovoltaic grid - connected inverter and its bus voltage harmonic suppression device proposed by the present invention is as Figure 1 shown. The topology of the two - stage grid - connected inverter includes a photovoltaic array, a boost boost circuit containing MOS transistor Q 1 , a single - phase inverter bridge composed of IGBT transistors Q 2 - Q 5 , an LCL filter, and the grid part. The topology of the bus voltage harmonic suppression device consists of a bidirectional DCDC containing MOS transistors P 1 , P 2 . The bidirectional DCDC is connected in parallel to the inverter bus capacitor C 0 . The connection between the inverter and the bus voltage harmonic suppression device is controlled by relay S 1 . In this embodiment, the key parameters are set as follows: C 0 is 500 uF, C 1 is 50 uF, C 2 is 600 uF, the inductance L is 120 uH. When the two - stage photovoltaic grid - connected operation, the output power is set to 10 kW, the reference value U 2 of the capacitor C S_ref voltage is set to 240 V, and the inverter DC bus voltage is controlled at 360 V.

[0048] Before the operation control strategy, the capacitor C 1 needs to be pre - charged. Here, ε is taken as 2 V according to the debugging experience. When the voltage of the inverter bus capacitor C 0 and the voltage of the capacitor C 1 satisfy |U bus - U in | ≤ 2, control the relay S 1 to close.

[0049] After the controller S 1 closes, close the MOS transistor P 2 . The initial reference value of the reference value U 2 of the capacitor C s_ref voltage is set to 0 V and gradually increases to 240 V in subsequent time to prevent the instantaneous voltage overshoot of the capacitor C 2 . Subtract the voltage U 2 of the capacitor C s from the reference value to obtain the error signal ΔU yc and use it as the input signal of the PI controller. The output signal of the PI controller is the duty cycle of the MOS transistor P 1 . When the capacitor C 2 is charged to 240 V, the pre - charging process ends.

[0050] During the pre-charging process, according to the frequency f of the power grid g = 50 Hz, control the frequency f k = 20 kHz, and obtain the sampling number T = 200. Then the average value of the bus voltage is:

[0051]

[0052] Calculate the average value U of the inverter bus voltage according to the above formula bus_avg to be 360 V.

[0053] The present invention provides a device and method for suppressing the harmonic of the bus voltage of a two-stage photovoltaic grid-connected inverter. The control strategy is as Figure 2 shown. In this embodiment, the control strategy of the bus voltage harmonic suppression device includes the following steps:

[0054] S10. Through sampling, obtain the voltage U of the capacitor C of the harmonic suppression device 1 , the voltage U of the capacitor C in , and the input current I 2 , the voltage U of the capacitor C s , and the input current I in .

[0055] S20. According to the sampling number T = 200, obtain the average value U of the voltage Us on the low-voltage side capacitor C 2 as: S_avg :

[0056]

[0057] S30. Subtract the average value U of the capacitor C voltage obtained in step S20 2 from 240 V to obtain the error signal ΔU S_avg . Use it as the input signal of the outer-loop PI controller. The output signal of the PI controller is the reference value U of the capacitor C voltage s . 1 , the reference value U of the capacitor C voltage in_ref .

[0058] Specifically, according to the U obtained in the pre-charging process bus_avg , the initial value of the integrator in the PI controller is set to 360.

[0059] S40. Subtract the reference value U of the C voltage obtained in step S30 from the voltage U of the capacitor C 1 to calculate the error signal ΔU in . Use it as the input signal of the inner-loop P controller. The output signal of the P controller is the reference current I of the capacitor C 1 . in_ref , the reference current I of the capacitor C in . 1 , the reference current I of the capacitor C c_ref .

[0060] S50. Input the input current I of the harmonic suppression device obtained in step S10 in Subtract the capacitor C obtained in step S40 1 Reference current I c_ref , to obtain the controlled average current I m Reference value I of m_ref ;

[0061] S60: Derive the operating states of the switching transistors P m_ref and P 1 and P 2 of the harmonic suppression device during operation;

[0062] Specifically, when U in ≥U in_ref , the bidirectional DCDC operates in the buck mode. At this time, the duty cycles D 1 and P 2 and D S1 and D S2 satisfy:

[0063]

[0064] When U in <U in_ref , the bidirectional DCDC operates in the boost mode. At this time, the duty cycles D 1 and P 2 and P S1 and D S2 satisfy:

[0065]

[0066] Finally, generate a PWM signal to control the actions of the switching transistors P 1 and P 2 .

[0067] To verify the technical effectiveness of the present invention, a simulation test was conducted on the harmonic suppression device and its control strategy in a two - stage photovoltaic grid - connected system.

[0068] Figure 3 shows the waveform change of the bus voltage during the operation of the two - stage photovoltaic inverter. The time axis is in seconds, and the voltage axis is in volts. And Figure 4 presents the output current waveform during the operation of the inverter. The time axis is also in seconds, but the current axis is marked in amperes.

[0069] When the time reaches 0.6 seconds, the capacitors C 1 and C 2After the pre-charging process is completed, switch S1 is then closed. Figure 3 It can be observed that after 0.6 seconds, the harmonic content in the bus voltage waveform almost disappears. Figure 5 and Figure 6 Further analysis of the data shows that the total harmonic distortion (THD) of the bus voltage has dropped significantly from 11.38% to 1.07%. Figure 4 It is shown that after 0.6 seconds, the output current of the inverter gradually presents a standard sine waveform. Figure 7 and Figure 8 From the data, we can find that the THD of the output current is also greatly reduced from 18.84% to 0.84%.

[0070] If the harmonic suppression device is not connected during the operation of the photovoltaic grid-connected inverter, then in order to achieve the same grid-connected current THD level as when the harmonic suppression device is connected, C 0 The capacitance of the capacitor needs to be changed to 21000uF. This means that the device has achieved a huge increase in capacitance in this environment, specifically 18.26 times.

[0071] In summary, the present invention can effectively suppress the harmonics of the bus voltage of the two-stage photovoltaic grid-connected inverter and improve the waveform quality of the grid-connected current by using a bidirectional DCDC topology while reducing the complexity of the control algorithm and the capacitance of the filter capacitor.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the essence and scope of the technical solution of the present invention.

Claims

1. A device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter, characterized in that: It comprises a first capacitor (C1), one end of the first capacitor (C1) is electrically connected to the drain of the first switch tube (P1), and the other end of the first capacitor (C1) is electrically connected to the source of the second switch tube (P2); The drain of the second switch tube (P2) is electrically connected to the source of the first switch tube (P1) and to one end of the inductor (L); the other end of the inductor (L) is electrically connected to one end of the low-voltage side capacitor (C2); and the other end of the low-voltage side capacitor (C2) is electrically connected to the source of the second switch tube (P2).

2. The device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: The two-stage grid-connected inverter comprises a boost circuit, which is electrically connected in parallel to an inverter bus capacitor (C0) and a single-phase inverter bridge, and the single-phase inverter bridge is electrically connected to a power grid via an LCL filter.

3. The device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 2, characterized in that: One end of the first capacitor (C1) is electrically connected to one end of the relay (S1), the other end of the relay (S1) is electrically connected to one end of the inverter bus capacitor (C0), and the other end of the inverter bus capacitor (C0) is electrically connected to the other end of the first capacitor (C1).

4. The device for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 2, characterized in that: The capacitance of the inverter bus capacitor (C0) is 500uF, the capacitance of the low-voltage side capacitor (C2) of the first capacitor (C1) is 600uF, and the inductance of the inductor (L) is 120uH.

5. A method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter, characterized in that: The device according to any one of claims 2 to 4 comprises the following steps: Step 1: pre-charge the first capacitor (C1) to satisfy |U bus -U in |≤2V, the control relay S1 is closed, where U bus is the voltage across the inverter bus capacitor (C0), U in is the voltage across the first capacitor (C1); Step 2: Close the second switch tube (P2), the reference value of the voltage of the low-voltage side capacitor (C2) is U s_ref The reference value is initially set to 0V and then gradually increased to 240V. s_ref Subtract the voltage U across the low voltage capacitor (C2) s Get the error signal ΔU yc and serves as an input signal of a PI controller, the output signal of the PI controller being the duty cycle of the first switch tube (P1), and when the low-voltage side capacitor (C2) is charged to 240V, the pre-charging process ends; Get the average voltage U across the inverter bus capacitor (C0) during the pre-charging process bus_avg ; Step 3: Obtain the voltage U of the first capacitor (C1) by sampling in , the voltage U of the low voltage side capacitor (C2) s and the input current I of the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter in； Step 4: According to the sampling number T, the average value U of the voltage Us on the low-voltage side capacitor (C2) is obtained. S_avg ; Step 5: U S_avg Subtracting from 240V gives the error signal ΔU s , ΔU s As the input signal of the outer loop PI controller, the output signal of the outer loop PI controller is the reference value U of the voltage of the first capacitor (C1) in_ref ; Step 6: The voltage U of the first capacitor (C1) in Subtract the reference value U of the voltage of the first capacitor (C1) in_ref Calculate the error signal ΔU in , ΔU in As the input signal of the inner loop PI controller, the output signal of the PI controller is the reference current I of the first capacitor (C1) c_ref ; Step 7: I in Subtract the reference current I c_ref , and the controlled average current I is obtained m Reference value I m_ref ; Step 8: According to I m_ref The operating states of the first switch tube (P1) and the second switch tube (P2) are derived as follows: When U in ≥U in_ref When the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in the buck mode, the duty cycle D of the first switch tube (P1) and the second switch tube (P2) is S1 and D S2 satisfy: Where L represents the inductance (L), and f represents the grid frequency; When U in in_ref When the device for suppressing bus voltage harmonics of the two-stage photovoltaic grid-connected inverter operates in the boost mode, the duty cycle D of the first switch tube (P1) and the second switch tube (P2) is S1 and D S2 satisfy:​ The actions of the first switch tube (P1) and the second switch tube (P2) are controlled by a PWM signal.

6. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: Among them, t represents the tth sampling, U bus (t) represents the voltage across the inverter bus capacitor C0 at the tth sampling.

7. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: Among them, U S (t) is the voltage across the low-voltage side capacitor (C2) at the t-th sampling.

8. The method for suppressing bus voltage harmonics of a two-stage photovoltaic grid-connected inverter according to claim 1, characterized in that: The sampling number T=200.

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