Multi-voltage rail working time sequence control device and method

Abstract

The invention discloses a multi-voltage rail working time sequence control device and method, and the device comprises a first positive voltage unit which is used for converting an accessed input voltage into a first positive voltage; the negative voltage unit is used for converting the first positive voltage into a third power supply voltage and a fourth power supply voltage, and the third power supply voltage and the fourth power supply voltage are both negative voltages; the logic control unit is used for detecting whether the third power supply voltage and the fourth power supply voltage reach set voltage thresholds or not and outputting corresponding enable signals; and the switch unit is used for responding to the enable signal to control the output of the first positive voltage, when the enable signal is valid, the switch unit is switched on to output the first positive voltage as the first power supply voltage, and when the enable signal is invalid, the switch unit is switched off to turn off the output of the first positive voltage. According to the invention, the positive voltage is output only after the negative voltage reaches the set threshold value, and the negative voltage is switched off later than the positive voltage during power failure, so that the problem of working time sequence control of the multi-voltage rail is effectively solved.

Description

Technical Field

[0001] The present invention relates to the technical field of timing control, and particularly to a multi-voltage rail operating timing control device and method. Background Art

[0002] With the rapid development of communication technologies, TR (Transmit-Receive) components powered by multiple voltage rails are increasingly widely used in various communication systems. As the core components in communication systems, the stability and reliability of the performance of TR components are crucial for the operation of the entire system. To improve the performance of TR components, high-performance semiconductor devices such as GaAs (Gallium Arsenide) or GaN (Gallium Nitride) are currently widely used. While these devices provide high power and high efficiency, they also impose strict requirements on the power supply timing.

[0003] Specifically, during the power-on process of the TR component, a negative bias voltage of the gate needs to be provided first, and then a positive voltage of the drain is provided to ensure that the device can start safely and stably. However, the existing technical solutions are mainly designed for the power supply timing of single-channel TR components, and no effective timing control solutions have been proposed for TR components powered by multiple voltage rails. With the increase in the number of TR components and the diversification of voltage rails in communication systems, how to achieve precise timing control of multi-voltage rail TR components has become an urgent problem to be solved. Summary of the Invention

[0004] Aiming at the deficiencies of the above-mentioned prior art, the technical problem to be solved by the present invention is: to provide a multi-voltage rail operating timing control device and method that can effectively control the timing of TR components powered by multiple voltage rails.

[0005] To solve the above technical problem, a technical solution adopted by the present invention is: to provide a multi-voltage rail operating timing control device, including:

[0006] A first positive voltage unit, configured to access an input voltage and convert the input voltage into a first positive voltage and output it to the Vo_mid node;

[0007] A negative voltage unit, configured to convert the voltage of the Vo_mid node into a third power supply voltage and a fourth power supply voltage and output them, where both the third power supply voltage and the fourth power supply voltage are negative voltages;

[0008] A logic control unit, configured to respectively detect whether the third power supply voltage and the fourth power supply voltage output by the negative voltage unit reach a set voltage threshold and output corresponding enable signals. When both the third power supply voltage and the fourth power supply voltage reach the set voltage threshold, the output enable signal is valid; otherwise, the output enable signal is invalid; and

[0009] A switching unit, configured to control the output of a first positive voltage in response to the enabling signal. When the enabling signal is valid, the switching unit is turned on and outputs the first positive voltage as the first supply voltage. When the enabling signal is invalid, the switching unit is turned off to cut off the output of the first positive voltage.

[0010] Further, the switching unit is further configured to, after the first positive voltage unit stops generating the first positive voltage, reverse-output the residual first supply voltage in the load device connected to its output terminal to the Vo_mid node to supply power to the negative voltage unit until the residual first supply voltage in the load device is exhausted.

[0011] Further, the first positive voltage unit includes a first DC / DC converter U1. The first terminal of the first DC / DC converter U1 serves as the voltage input terminal of the first positive voltage unit for accessing an input voltage. The second terminal of the first DC / DC converter U1 serves as the voltage output terminal of the first positive voltage unit and is electrically connected to the Vo_mid node. The first terminal of the switching unit is electrically connected to the Vo_mid node. When the switching unit is turned on, the second terminal of the switching unit outputs the first supply voltage.

[0012] Further, the negative voltage unit includes a third DC / DC converter U3 and a fourth DC / DC converter U4. The first terminal of the third DC / DC converter U3 is electrically connected to the Vo_mid node. The second terminal of the third DC / DC converter U3 outputs a third supply voltage and the second terminal of the third DC / DC converter U3 is electrically connected to the second terminal of the logic control unit. The first terminal of the fourth DC / DC converter U4 is electrically connected to the Vo_mid node. The second terminal of the fourth DC / DC converter U4 outputs a fourth supply voltage and the second terminal of the fourth DC / DC converter U4 is electrically connected to the first terminal of the logic control unit.

[0013] Further, the logic control unit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first triode Q1, a second triode Q2, and a first capacitor C1; the first end of the second resistor R2 serves as the second end of the logic control unit and is electrically connected to the second end of the third DC / DC converter, the second end of the second resistor R2 is electrically connected to the first end of the first resistor R1, the second end of the first resistor R1 is electrically connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is electrically connected to the positive electrode of the first capacitor C1, and the negative electrode of the first capacitor C1 is grounded; the first end of the fourth resistor R4 serves as the first end of the logic control unit and is electrically connected to the second end of the fourth DC / DC converter, the second end of the fourth resistor R4 is electrically connected to the first end of the third resistor R3, and the second end of the third resistor R3 is electrically connected to the first end of the fifth resistor R5; the base of the first triode Q1 is electrically connected to the second end of the second resistor R2, the emitter of the first triode Q1 is grounded, the collector of the first triode Q1 is electrically connected to the positive electrode of the first capacitor C1, the base of the second triode Q2 is electrically connected to the second end of the fourth resistor R4, the emitter of the second triode Q2 is grounded, and the collector of the second triode Q2 is electrically connected to the collector of the first triode Q1; the positive electrode of the first capacitor C1 serves as the third end of the logic control unit and is electrically connected to the third end of the switch unit to output an enable signal;

[0014] When the third supply voltage does not reach the set first voltage threshold, the first triode Q1 conducts. When the fourth supply voltage does not reach the set second voltage threshold, the second triode Q2 conducts. When the first triode Q1 and / or the second triode Q2 conducts, the enable signal is at a low level. When both the first triode Q1 and the second triode Q2 are cut off, the enable signal rises from a low level to a high level.

[0015] Further, the switching unit includes a sixth resistor R6, a seventh resistor R7, a third triode Q3, a first MOS transistor Q4, and a second capacitor C2; the source of the first MOS transistor Q4 serves as the first end of the switching unit and is electrically connected to the Vo_mid node, the drain of the first MOS transistor Q4 serves as the second end of the switching unit to output a first supply voltage, the gate of the first MOS transistor Q4 is electrically connected to the first end of the seventh resistor R7, the second end of the seventh resistor R7 is electrically connected to the collector of the third triode Q3, the emitter of the third triode Q3 is grounded, the base of the third triode Q3 serves as the third end of the switching unit and is electrically connected to the positive electrode of the first capacitor C1. When the enable signal output from the positive electrode of the first capacitor C1 is at a high level, the enable signal is valid, the first MOS transistor Q4 is turned on. When the enable signal output from the positive electrode of the first capacitor C1 is at a low level, the enable signal is invalid, and the first MOS transistor Q4 is turned off; the first end of the sixth resistor R6 is electrically connected to the source of the first MOS transistor Q4, the second end of the sixth resistor R6 is electrically connected to the first end of the seventh resistor R7, the positive electrode of the second capacitor C2 is electrically connected between the first end of the sixth resistor R6 and the source of the first MOS transistor Q4, and the negative electrode of the second capacitor C2 is electrically connected to the second end of the sixth resistor R6.

[0016] Further, a second positive voltage unit is further included, and the second positive voltage unit is configured to convert the voltage of the Vo_mid node into a second supply voltage for output, and the second supply voltage is a positive voltage.

[0017] Further, the second positive voltage unit includes a second DC / DC converter U2. The first end of the second DC / DC converter U2 is electrically connected to the Vo_mid node, the second end of the second DC / DC converter U2 outputs a second supply voltage, and the third end of the second DC / DC converter U2 is electrically connected to the logic control unit to access an enable signal. When the enable signal is valid, the second DC / DC converter U2 operates to provide the second supply voltage for the subsequent circuit. When the enable signal is invalid, the second DC / DC converter U2 stops operating to cut off the second supply voltage provided for the subsequent circuit.

[0018] Further, a reverse power supply unit is further included. The reverse power supply unit includes a first diode D1. The positive electrode of the first diode D1 is electrically connected to the second end of the second DC / DC converter U2, and the negative electrode of the first diode D1 is electrically connected to the first end of the second DC / DC converter U2.

[0019] To solve the above technical problems, another technical solution adopted by the present invention is: to provide a multi-voltage rail working timing control method, including the following steps:

[0020] Connect to the input voltage, convert the input voltage into a first positive voltage, and output it to the Vo_mid node;

[0021] Convert the voltage of the Vo_mid node into a third power supply voltage and a fourth power supply voltage for output, where both the third power supply voltage and the fourth power supply voltage are negative voltages;

[0022] Detect whether the third power supply voltage and the fourth power supply voltage reach the set voltage thresholds respectively and output corresponding enable signals. When both the third power supply voltage and the fourth power supply voltage reach the set voltage thresholds, the output enable signal is valid; otherwise, the output enable signal is invalid;

[0023] Respond to the enable signal to control the output of the first positive voltage and / or the second positive voltage. When the enable signal is valid, output the first positive voltage as the first power supply voltage and / or output the second positive voltage as the second power supply voltage. When the enable signal is invalid, turn off the output of the first positive voltage and / or the second positive voltage.

[0024] The multi-voltage rail working timing control device and method of the present invention have at least the following beneficial effects: The present invention monitors the third power supply voltage and the fourth power supply voltage output by the negative voltage unit in real time through the logic control unit, and only allows the positive voltage to be output after ensuring that both reach the set voltage thresholds, effectively solving the problem of the power-on timing control of the multi-voltage rail, strictly following the requirement that the negative voltage is powered on before the positive voltage, and improving the stability and reliability of the circuit; The present invention is not only applicable to a single combination of positive voltage and negative voltage, but also can accurately control the working timing of multiple positive voltage rails by adding an additional second positive voltage unit and a reverse power supply unit, and can meet the requirements in different scenarios; The present invention slowly charges the gate voltage of the first MOS transistor Q4 through the switch unit, thereby controlling the time for it to operate in the linear region, realizing the slow turn-on of the switch circuit, effectively suppressing the instantaneous surge current during the turn-on process, protecting the components in the circuit, and enhancing the reliability and service life of the device; When powering off or the first positive voltage unit fails, the energy of the positive voltage at the load end is transferred to the input end of the negative voltage unit by using the body diode of the first MOS transistor Q4 and / or the externally anti-parallel first diode D1, ensuring the normal output of the negative voltage until the positive voltage energy is exhausted, ensuring that the negative voltage is turned off later than the positive voltage, and avoiding circuit failures or damages caused by improper timing. Description of the Drawings

[0025] The drawings described herein are used to provide a further understanding of the present application, form a part of the present application, and the illustrative embodiments and descriptions thereof of the present application are used to explain the present application, and do not constitute an improper limitation to the present application. In the drawings:

[0026] Figure 1 This is a structural diagram of an embodiment of the multi-voltage rail operating timing control device of the present invention.

[0027] Figure 2 is Figure 1 the circuit diagram of the logic control unit in

[0028] Figure 3 is Figure 1 the circuit diagram of the switch unit in

[0029] Figure 4 This is a flowchart of an embodiment of the multi-voltage rail operating timing control method of the present invention.

[0030] Figure 5 This is a flowchart of another embodiment of the multi-voltage rail operating timing control method of the present invention. Detailed Embodiments

[0031] The present invention will be further described below with reference to the accompanying drawings.

[0032] Please refer to Figure 1, the multi-voltage rail operating timing control device of the present invention includes a first positive voltage unit 100, a negative voltage unit 200, a logic control unit 300, and a switching unit 400. The first positive voltage unit 100 is configured to receive an input voltage Vin and convert the input voltage Vin into a first positive voltage and output it to the Vo_mid node. The negative voltage unit 200 is configured to convert the voltage of the Vo_mid node into a third supply voltage Vo3 and a fourth supply voltage Vo4 and output them. Both the third supply voltage Vo3 and the fourth supply voltage Vo4 are negative voltages. The logic control unit 300 is configured to respectively detect whether the third supply voltage Vo3 and the fourth supply voltage Vo4 output by the negative voltage unit 200 reach a set voltage threshold and output corresponding enable signals ON / OFF. When both the third supply voltage Vo3 and the fourth supply voltage Vo4 reach the set voltage threshold, the output enable signal ON / OFF is valid; otherwise, the output enable signal ON / OFF is invalid. The switching unit 400 is configured to respond to the enable signal ON / OFF to control the output of the first positive voltage. When the enable signal ON / OFF is valid, the switching unit 400 conducts, and outputs the first positive voltage as the first supply voltage Vo1. When the enable signal ON / OFF is invalid, the switching unit 400 disconnects, thereby turning off the output of the first positive voltage. When the input voltage Vin is turned off and / or the first positive voltage unit 100 has an abnormal fault resulting in the first positive voltage unit 100 stopping generating the first positive voltage, the switching unit 400 will also reverse-output the residual first supply voltage Vo1 in the load device connected to its output terminal to the Vo_mid node, thereby powering the negative voltage unit 200 until the residual first supply voltage Vo1 in the load device connected to the output terminal of the switching unit 400 is exhausted; thus, it is achieved that the negative voltage powers on before the positive voltage during power-on, and the negative voltage turns off after the positive voltage during power-off.

[0033] The voltage input terminal of the first positive voltage unit 100 receives the input voltage Vin. The voltage output terminal of the first positive voltage unit 100 and the first terminal of the switching unit 400 are both electrically connected to the Vo_mid node. The second terminal of the switching unit 400 outputs the first supply voltage Vo1. The Vo_mid node is also respectively electrically connected to the first input terminal and the second input terminal of the negative voltage unit 200. The first output terminal of the negative voltage unit 200 outputs the third supply voltage Vo3, and the second output terminal of the negative voltage unit 200 outputs the fourth supply voltage Vo4. The first output terminal of the negative voltage unit 200 is electrically connected to the second terminal of the logic control unit 300, and the second output terminal of the negative voltage unit 200 is electrically connected to the second terminal of the logic control unit 300. The third terminal of the logic control unit 300 is electrically connected to the third terminal of the switching unit 400 to output the enable signal ON / OFF.

[0034] The first positive voltage unit 100 includes a first DC / DC converter U1. The first terminal of the first DC / DC converter U1 serves as the voltage input terminal of the first positive voltage unit 100 to access the input voltage Vin, the second terminal of the first DC / DC converter U1 serves as the voltage output terminal of the first positive voltage unit 100 and is electrically connected to the Vo_mid node, and the first terminal of the switch unit 400 is also electrically connected to the Vo_mid node. When the switch unit 400 is turned on, the second terminal of the switch unit 400 outputs the first supply voltage Vo1. In this embodiment, the first DC / DC converter U1 is an isolated DC / DC converter, and the isolated DC / DC converter can achieve electrical isolation between the input side and the output side.

[0035] The negative voltage unit 200 includes a third DC / DC converter U3 and a fourth DC / DC converter U4. The first terminal of the third DC / DC converter U3 serves as the first input terminal of the negative voltage unit 200 and is electrically connected to the Vo_mid node, the second terminal of the third DC / DC converter U3 serves as the first output terminal of the negative voltage unit 200 to output the third supply voltage Vo3 and the second terminal of the third DC / DC converter U3 is electrically connected to the second terminal of the logic control unit 300; the first terminal of the fourth DC / DC converter U4 is electrically connected to the Vo_mid node, the second terminal of the fourth DC / DC converter U4 serves as the second output terminal of the negative voltage unit 200 to output the fourth supply voltage Vo4 and the second terminal of the fourth DC / DC converter U4 is electrically connected to the first terminal of the logic control unit 300. In this embodiment, both the third DC / DC converter U3 and the fourth DC / DC converter U4 are non-isolated converters.

[0036] Please refer to Figure 2, the logic control unit 300 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first triode Q1, a second triode Q2, and a first capacitor C1. The first end of the second resistor R2 serves as the second end of the logic control unit 300 and is electrically connected to the second end of the third DC / DC converter. The second end of the second resistor R2 is electrically connected to the first end of the first resistor R1. The second end of the first resistor R1 is electrically connected to the first end of the fifth resistor R5. The second end of the fifth resistor R5 is electrically connected to the positive electrode of the first capacitor C1. The negative electrode of the first capacitor C1 is grounded. The first end of the fourth resistor R4 serves as the first end of the logic control unit 300 and is electrically connected to the second end of the fourth DC / DC converter. The second end of the fourth resistor R4 is electrically connected to the first end of the third resistor R3. The second end of the third resistor R3 is electrically connected to the first end of the fifth resistor R5. The base of the first triode Q1 is electrically connected to the second end of the second resistor R2. The emitter of the first triode Q1 is grounded. The collector of the first triode Q1 is electrically connected to the positive electrode of the first capacitor C1. The base of the second triode Q2 is electrically connected to the second end of the fourth resistor R4. The emitter of the second triode Q2 is grounded. The collector of the second triode Q2 is electrically connected to the collector of the first triode Q1. The positive electrode of the first capacitor C1 serves as the third end of the logic control unit 300 and is electrically connected to the third end of the switch unit 400 to output an enable signal ON / OFF.

[0037] When the third supply voltage Vo3 does not reach the set first voltage threshold, the first triode Q1 conducts, and the collector voltage of the first triode Q1 is pulled down to 0V, and the enable signal ON / OFF outputs a low level. When the fourth supply voltage Vo4 does not reach the set second voltage threshold, the second triode Q2 conducts, and the collector voltage of the second triode Q2 is pulled down to 0V, and the enable signal ON / OFF outputs a low level. When the third supply voltage Vo3 reaches the set first voltage threshold and the fourth supply voltage Vo4 reaches the set second voltage threshold, both the first triode Q1 and the second triode Q2 are cut off, and Vcc charges the first capacitor C1 through the pull-up fifth resistor R5. The voltage of the enable signal ON / OFF starts to rise from 0V until it is charged to Vcc. By adjusting the parameter values of the fifth resistor R5 and the first capacitor C1, the rising speed of the voltage at the ON / OFF end of the enable signal can be changed, thereby controlling the power-on delay time between the negative voltage output and the positive voltage output. In this embodiment, the first voltage threshold and the second voltage threshold can be collectively referred to as the voltage threshold, and the first voltage threshold and the second voltage threshold can be the same or different, and are specifically set according to actual requirements.

[0038] Please refer to Figure 3, the switch unit 400 includes a sixth resistor R6, a seventh resistor R7, a third triode Q3, a first MOS transistor Q4, and a second capacitor C2. The source of the first MOS transistor Q4 serves as the first end of the switch unit 400 and is electrically connected to the Vo_mid node. The drain of the first MOS transistor Q4 serves as the second end of the switch unit 400 to output a first supply voltage Vo1. The gate of the first MOS transistor Q4 is electrically connected to the first end of the seventh resistor R7. The second end of the seventh resistor R7 is electrically connected to the collector of the third triode Q3. The emitter of the third triode Q3 is grounded. The base of the third triode Q3 serves as the third end of the switch unit 400 and is electrically connected to the positive electrode of the first capacitor C1 to access an enable signal ON / OFF. When the enable signal ON / OFF output from the positive electrode of the first capacitor C1 is at a high level, the enable signal ON / OFF is valid and the first MOS transistor Q4 conducts. When the enable signal ON / OFF output from the positive electrode of the first capacitor C1 is at a low level, the enable signal ON / OFF is invalid and the first MOS transistor Q4 is cut off. The first end of the sixth resistor R6 is electrically connected to the source of the first MOS transistor Q4, and the second end of the sixth resistor R6 is electrically connected to the first end of the seventh resistor R7. The positive electrode of the second capacitor C2 is electrically connected between the first end of the sixth resistor R6 and the source of the first MOS transistor Q4, and the negative electrode of the second capacitor C2 is electrically connected to the second end of the sixth resistor R6. In this embodiment, the first MOS transistor Q4 is a PMOS transistor. During power-down, the body diode of the first MOS transistor Q4 conducts reversely automatically to output the residual first supply voltage Vo1 in the load device reversely to supply power to the negative voltage unit 200, without being controlled by the enable signal.

[0039] When the enable signal ON / OFF output by the logic control unit 300 is at a low level, the base voltage of the third triode Q3 is low, the third triode Q3 is in a cut-off state, the collector of the third triode Q3 is floating, and the gate and source voltages of the first MOS transistor Q4 are the same, that is, V GS = 0V, and the first MOS transistor Q4 is in a cut-off state. When the enable signal ON / OFF output by the logic control unit 300 is at a high level, the third triode Q3 is in a conducting state, and the first positive voltage output by the first positive voltage unit 100 charges the second capacitor C2 through the voltage division of the sixth resistor R6 and the seventh resistor R7, and the source voltage of the first MOS transistor Q4 is higher than the gate voltage, and its gate-source voltage V GS is:

[0040]

[0041] Among them, V O_MID represents the first positive voltage. When V GSAfter reaching the turn-on threshold voltage, the first MOS transistor Q4 gradually conducts. Due to the effect of the second capacitor C2, V GS charges slowly, and the first MOS transistor Q4 operates in the linear region for a relatively long time, reducing the turn-on speed of the first MOS transistor Q4, thereby suppressing the instantaneous surge current during the turn-on process.

[0042] To control the working timing of multiple positive voltage rails, as a preferred embodiment, a second positive voltage unit 500 is further provided. The second positive voltage unit 500 is used to convert the voltage of the Vo_mid node into a second supply voltage Vo2 for output, and the second supply voltage Vo2 is a positive voltage. The second positive voltage unit 500 includes a second DC / DC converter U2. In this embodiment, the second DC / DC converter U2 is a non-isolated converter. The first end of the second DC / DC converter U2 is electrically connected to the second end of the first DC / DC converter U1, the second end of the second DC / DC converter U2 outputs the second supply voltage Vo2, and the third end of the second DC / DC converter U2 is electrically connected to the logic control unit 300 to access the enable signal ON / OFF. When the enable signal ON / OFF is valid, the second DC / DC converter U2 operates to provide the second supply voltage Vo2 for the backend circuit. When the enable signal ON / OFF is invalid, the second DC / DC converter U2 stops operating to cut off the second supply voltage Vo2 provided for the backend circuit.

[0043] To ensure that the negative voltage turns off later than the positive voltage during power-down, as a preferred embodiment, a reverse power supply unit 600 is further provided. The reverse power supply unit 600 is used to reverse-output the residual second supply voltage Vo2 in the load device connected to the output end of the second positive voltage unit 500 to the Vo_mid node to supply power to the negative voltage unit 200 after the first positive voltage unit 100 stops generating the first positive voltage until the residual second supply voltage Vo2 in the load device connected to the output end of the second positive voltage unit 500 is exhausted. The reverse power supply unit 600 includes a first diode D1. The positive electrode of the first diode D1 is electrically connected to the second end of the second DC / DC converter U2, and the negative electrode of the first diode D1 is electrically connected to the first end of the second DC / DC converter U2. In this embodiment, the first diode D1 is preferably a Schottky type diode with a low voltage drop, the reverse breakdown voltage must be greater than the first positive voltage, and it has the ability to pass through instantaneous large currents.

[0044] The present invention also discloses a method for controlling the working timing of multiple voltage rails. The method is implemented based on the multiple voltage rail working timing control device of the above embodiment, and includes a first positive voltage unit 100, a negative voltage unit 200, a logic control unit 300, and a switch unit 400 that are the same as or similar to those in the above embodiment. Please refer to Figure 4 , which is a flowchart of an embodiment of the method for controlling the working timing of multiple voltage rails of the present invention. This embodiment specifically includes the following steps:

[0045] S1. Convert the input voltage into a first positive voltage.

[0046] Specifically, connect the input voltage and convert the input voltage into a first positive voltage and output it to the Vo_mid node.

[0047] S2. Obtain a third power supply voltage Vo3 and a fourth power supply voltage Vo4 through conversion.

[0048] Specifically, convert the voltage of the Vo_mid node into a third power supply voltage Vo3 and a fourth power supply voltage Vo4 for output. Both the third power supply voltage Vo3 and the fourth power supply voltage Vo4 are negative voltages.

[0049] S3. Output an enable signal ON / OFF according to the third power supply voltage Vo3 and the fourth power supply voltage Vo4.

[0050] Specifically, respectively detect whether the third power supply voltage Vo3 and the fourth power supply voltage Vo4 reach a set voltage threshold and output a corresponding enable signal ON / OFF. When both the third power supply voltage Vo3 and the fourth power supply voltage Vo4 reach the set voltage threshold, the output enable signal ON / OFF is valid; otherwise, the output enable signal ON / OFF is invalid.

[0051] S4. Control the output of the first positive voltage and / or the second positive voltage in response to the enable signal ON / OFF.

[0052] Specifically, control the output of the first positive voltage and / or the second positive voltage in response to the enable signal ON / OFF. When the enable signal ON / OFF is valid, output the first positive voltage as the first power supply voltage Vo1 and / or output the second positive voltage as the second power supply voltage Vo2. When the enable signal ON / OFF is invalid, turn off the output of the first positive voltage and / or the second positive voltage.

[0053] As a preferred embodiment, please refer to Figure 5 , and further includes the following steps:

[0054] S5. Disconnect the input voltage and stop the output of the first power supply voltage Vo1 and / or the second power supply voltage Vo2.

[0055] Specifically, when the input voltage is disconnected, the first positive voltage unit 100 cannot access the input voltage, that is, it cannot convert the input voltage to obtain the first positive voltage, and thus cannot output the first positive voltage to obtain the first supply voltage Vo1. Similarly, when the second positive voltage unit 500 is provided, the second positive voltage unit 500 also cannot output the second supply voltage Vo2.

[0056] S6. The first supply voltage Vo1 and / or the second supply voltage Vo2 supply power to the negative voltage unit 200.

[0057] Specifically, the body diode of the first MOS transistor Q4 will conduct to reversely output the residual first supply voltage Vo1 in the load device to the Vo_mid node to supply power to the negative voltage unit 200 until the first supply voltage Vo1 is exhausted. When the second positive voltage unit 500 is provided, the reverse power supply unit 600 will reversely output the residual second supply voltage Vo2 in the load device connected to the output terminal of the second positive voltage unit 500 to the Vo_mid node to supply power to the negative voltage unit 200 until the second supply voltage Vo2 is exhausted.

[0058] In the present invention, the logic control unit 300 monitors the third supply voltage Vo3 and the fourth supply voltage Vo4 output by the negative voltage unit 200 in real time, and only allows the positive voltage to be output after ensuring that both reach the set voltage thresholds, effectively solving the problem of the power-on timing control of multiple voltage rails, strictly following the requirement that the negative voltage is powered on before the positive voltage, and improving the stability and reliability of the circuit; the present invention is not only applicable to a single combination of positive and negative voltages, but also can accurately control the working timing of multiple positive voltage rails by adding an additional second positive voltage unit 500 and a reverse power supply unit 600, and can meet the requirements in different scenarios; the present invention slowly charges the gate voltage of the first MOS transistor Q4 through the switch unit 400, thereby controlling the time when it operates in the linear region, realizing the slow turn-on of the switch circuit, effectively suppressing the instantaneous surge current during the turn-on process, protecting the components in the circuit, and enhancing the reliability and service life of the device; when powering off or when the first positive voltage unit 100 fails, the energy of the positive voltage at the load end is transferred to the input end of the negative voltage unit 200 by using the body diode of the first MOS transistor Q4 and / or the externally connected anti-parallel first diode D1, ensuring the normal output of the negative voltage until the positive voltage energy is exhausted, ensuring that the negative voltage is turned off later than the positive voltage, and avoiding circuit failures or damages caused by improper timing.

Claims

1. A multi-voltage rail operation timing control device, characterized in that: include: A first positive voltage unit, used for receiving an input voltage and converting the input voltage into a first positive voltage and outputting the first positive voltage to a Vo_mid node; A negative voltage unit, used for converting the voltage of the Vo_mid node into a third power supply voltage and a fourth power supply voltage for output, wherein the third power supply voltage and the fourth power supply voltage are both negative voltages; A logic control unit, used to respectively detect whether the third power supply voltage and the fourth power supply voltage output by the negative voltage unit reach a set voltage threshold and output a corresponding enable signal, when the third power supply voltage and the fourth power supply voltage both reach the set voltage threshold, the output enable signal is valid, otherwise, the output enable signal is invalid; as well as The switch unit is used to control the output of the first positive voltage in response to the enable signal. When the enable signal is valid, the switch unit is turned on and outputs the first positive voltage as the first supply voltage. When the enable signal is invalid, the switch unit is turned off to shut off the output of the first positive voltage.

2. The multi-voltage rail operation timing control device according to claim 1, characterized in that: The switch unit is also used to reversely output the remaining first supply voltage in the load device connected to its output end to the Vo_mid node to power the negative voltage unit after the first positive voltage unit stops generating the first positive voltage, until the remaining first supply voltage in the load device is exhausted.

3. The multi-voltage rail operation timing control device according to claim 2, characterized in that: The first positive voltage unit includes a first DC / DC converter U1, a first end of the first DC / DC converter U1 is used as a voltage input end of the first positive voltage unit for connecting an input voltage, a second end of the first DC / DC converter U1 is electrically connected to a Vo_mid node as a voltage output end of the first positive voltage unit, a first end of the switch unit is electrically connected to the Vo_mid node, and when the switch unit is turned on, a second end of the switch unit outputs a first supply voltage.

4. The multi-voltage rail operation timing control device according to claim 3, characterized in that: The negative voltage unit includes a third DC / DC converter U3 and a fourth DC / DC converter U4, wherein the first end of the third DC / DC converter U3 is electrically connected to the Vo_mid node, the second end of the third DC / DC converter U3 outputs a third power supply voltage and the second end of the third DC / DC converter U3 is electrically connected to the second end of the logic control unit; the first end of the fourth DC / DC converter U4 is electrically connected to the Vo_mid node, the second end of the fourth DC / DC converter U4 outputs a fourth power supply voltage and the second end of the fourth DC / DC converter U4 is electrically connected to the first end of the logic control unit.

5. The multi-voltage rail operation timing control device according to claim 4, characterized in that: The logic control unit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first transistor Q1, a second transistor Q2 and a first capacitor C1; the first end of the second resistor R2 is electrically connected to the second end of the third DC / DC converter as the second end of the logic control unit, the second end of the second resistor R2 is electrically connected to the first end of the first resistor R1, the second end of the first resistor R1 is electrically connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is electrically connected to the positive electrode of the first capacitor C1, and the negative electrode of the first capacitor C1 is grounded; the first end of the fourth resistor R4 is electrically connected to the second end of the fourth DC / DC converter as the first end of the logic control unit The first transistor Q1 is electrically connected to the second end of the second resistor R2, the emitter of the first transistor Q1 is grounded, the collector of the first transistor Q1 is electrically connected to the positive electrode of the first capacitor C1, the base of the second transistor Q2 is electrically connected to the second end of the fourth resistor R4, the emitter of the second transistor Q2 is grounded, and the collector of the second transistor Q2 is electrically connected to the collector of the first transistor Q1; the positive electrode of the first capacitor C1 is electrically connected to the third end of the switch unit as the third end of the logic control unit to output an enable signal; When the third supply voltage does not reach the set first voltage threshold, the first transistor Q1 is turned on; when the fourth supply voltage does not reach the set second voltage threshold, the second transistor Q2 is turned on; when the first transistor Q1 and / or the second transistor Q2 are turned on, the enable signal is at a low level; when the first transistor Q1 and the second transistor Q2 are both turned off, the enable signal rises from a low level to a high level.

6. The multi-voltage rail operation timing control device according to claim 5, characterized in that: The switch unit includes a sixth resistor R6, a seventh resistor R7, a third transistor Q3, a first MOSFET Q4 and a second capacitor C2; the source of the first MOSFET Q4 is electrically connected to the Vo_mid node as the first end of the switch unit, the drain of the first MOSFET Q4 is used as the second end of the switch unit to output the first supply voltage, the gate of the first MOSFET Q4 is electrically connected to the first end of the seventh resistor R7, the second end of the seventh resistor R7 is electrically connected to the collector of the third transistor Q3, the emitter of the third transistor Q3 is grounded, and the base of the third transistor Q3 is used as the third end of the switch unit to output the first power supply voltage. The positive electrode of the second capacitor C2 is electrically connected to the positive electrode of the first capacitor C1, when the enable signal output by the positive electrode of the first capacitor C1 is at a high level, the enable signal is valid, and the first MOS tube Q4 is turned on; when the enable signal output by the positive electrode of the first capacitor C1 is at a low level, the enable signal is invalid, and the first MOS tube Q4 is turned off; the first end of the sixth resistor R6 is electrically connected to the source of the first MOS tube Q4, the second end of the sixth resistor R6 is electrically connected to the first end of the seventh resistor R7, the positive electrode of the second capacitor C2 is electrically connected between the first end of the sixth resistor R6 and the source of the first MOS tube Q4, and the negative electrode of the second capacitor C2 is electrically connected to the second end of the sixth resistor R6.

7. The multi-voltage rail operation timing control device according to claim 3, characterized in that: The device further includes a second positive voltage unit, which is used to convert the voltage of the Vo_mid node into a second power supply voltage output, and the second power supply voltage is a positive voltage.

8. The multi-voltage rail operation timing control device according to claim 7, characterized in that: The second positive voltage unit includes a second DC / DC converter U2, a first end of the second DC / DC converter U2 is electrically connected to the Vo_mid node, a second end of the second DC / DC converter U2 outputs a second power supply voltage, and a third end of the second DC / DC converter U2 is electrically connected to the logic control unit to access an enable signal. When the enable signal is valid, the second DC / DC converter U2 works to provide a second power supply voltage for the back-end circuit, and when the enable signal is invalid, the second DC / DC converter U2 stops working to shut off the second power supply voltage provided to the back-end circuit.

9. The multi-voltage rail operation timing control device according to claim 8, characterized in that: It also includes a reverse power supply unit, which includes a first diode D1, whose anode is electrically connected to the second end of the second DC / DC converter U2, and whose cathode is electrically connected to the first end of the second DC / DC converter U2.

10. A method for controlling the timing of operation of multiple voltage rails, characterized in that: The following steps are involved: Accessing an input voltage and converting the input voltage into a first positive voltage and outputting the first positive voltage to a Vo_mid node; Converting the voltage of the Vo_mid node into a third power supply voltage and a fourth power supply voltage for output, wherein the third power supply voltage and the fourth power supply voltage are both negative voltages; Respectively detect whether the third power supply voltage and the fourth power supply voltage reach the set voltage threshold and output corresponding enable signals, when the third power supply voltage and the fourth power supply voltage both reach the set voltage threshold, the output enable signal is valid, otherwise, the output enable signal is invalid; In response to the enable signal, the output of the first positive voltage and / or the second positive voltage is controlled. When the enable signal is valid, the first positive voltage is output as the first supply voltage and / or the second positive voltage is output as the second supply voltage. When the enable signal is invalid, the output of the first positive voltage and / or the second positive voltage is turned off.

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