Doherty amplifier circuit

Abstract

The invention provides a Doherty amplifier circuit capable of realizing broadband. A Doherty amplifier circuit is provided with: a distribution node (N1) that distributes an input signal that is input into a first signal and a second signal; a main amplifier (10) which amplifies the first signal and outputs the amplified first signal as a third signal; a first peak amplifier (12) which amplifies the second signal and outputs the amplified second signal as a fourth signal; a combining node (N2) that combines the third signal and the fourth signal and outputs the combined signal as an output signal to an output terminal; and a notch filter (21) connected between the distribution node and the first peak amplifier and suppressing a signal of a center frequency of an operating band.

Description

Technical Field

[0001] The present invention relates to a Doherty amplifier circuit. Background Art

[0002] There is known an N-way (N ≥ 3) Doherty amplifier circuit that uses a main amplifier and two or more peak amplifiers (for example, Patent Document 1 and Patent Document 2).

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Specification of U.S. Patent No. 8,022,760

[0006] Patent Document 2: Specification of U.S. Patent No. 10,601,375

[0007] However, in a Doherty amplifier circuit, an impedance transformer is used in a combiner. In addition, a phase adjuster is provided to adjust the phase variation caused by the impedance transformer. Therefore, narrowbanding is caused. Summary of the Invention

[0008] An object of the present disclosure is to achieve broadbanding.

[0009] One embodiment of the present disclosure is a Doherty amplifier circuit including: a distribution node that distributes an input signal input thereto into a first signal and a second signal; a main amplifier that amplifies the first signal and outputs the amplified first signal as a third signal; a first peak amplifier that amplifies the second signal and outputs the amplified second signal as a fourth signal; a combining node that combines the third signal and the fourth signal and outputs the combined signal as an output signal to an output terminal; and a notch filter that is connected between the distribution node and the first peak amplifier and suppresses a signal having a center frequency of an operating frequency band.

[0010] Advantageous Effects of the Invention

[0011] According to the present disclosure, broadbanding can be achieved. Brief Description of the Drawings

[0012] Figure 1 is a block diagram of the Doherty amplifier circuit of Embodiment 1.

[0013] Figure 2 is a diagram showing an example of the notch filter of Embodiment 1.

[0014] Figure 3It is a schematic diagram showing the probability with respect to the output power Pout of Example 1, the output power Pout of each amplifier with respect to the input power Pin, the gain of each amplifier with respect to the input power Pin, and the overall gain with respect to the input power Pin.

[0015] Figure 4 It is a graph showing the power with respect to frequency of Comparative Example 1.

[0016] Figure 5 It is a graph showing the power with respect to frequency of Example 1.

[0017] Explanation of reference numerals:

[0018] 10: Main amplifier;

[0019] 12, 14: Peak amplifiers;

[0020] 16: Divider;

[0021] 18: Combiner;

[0022] 20: Phase adjuster;

[0023] 21: Notch filter;

[0024] 23: Impedance transformer;

[0025] 24: Impedance transformer;

[0026] 30, 31, 32, 33, 34, 35: Matching circuits;

[0027] 36, 37, 38, 39: Bias circuits;

[0028] 100: Doherty amplifier circuit;

[0029] N1: Distribution node;

[0030] N2: Combining node;

[0031] S1 (first signal), S2 (second signal), S3 (fifth signal), S4 (third signal), S5 (fourth signal), S6 (sixth signal): Signals;

[0032] Sin: Input signal;

[0033] Sout: Output signal;

[0034] Tin: Input terminal;

[0035] Tout: Output terminal. Detailed implementation manners

[0036] [Description of the embodiments of the present disclosure]

[0037] First, the content of the embodiments of the present disclosure will be described by way of example.

[0038] (1) One embodiment of the present disclosure is a Doherty amplifier circuit, comprising: a distribution node that distributes an input signal into a first signal and a second signal; a main amplifier that amplifies the first signal and outputs the amplified first signal as a third signal; a first peak amplifier that amplifies the second signal and outputs the amplified second signal as a fourth signal; a combining node that combines the third signal and the fourth signal and outputs the combined signal as an output signal to an output terminal; and a notch filter connected between the distribution node and the first peak amplifier that suppresses a signal at the center frequency of the operating frequency band. Thereby, broadband can be achieved.

[0039] (2) In the above (1), it may also be that the Doherty amplifier circuit comprises: a second peak amplifier that amplifies a fifth signal and outputs the amplified fifth signal as a sixth signal, the distribution node distributes the input signal into the first signal, the second signal, and the fifth signal, the combining node combines the third signal, the fourth signal, and the sixth signal and outputs the combined signal as the output signal to the output terminal, and the input power of the input signal for turning on the first peak amplifier is less than the input power of the input signal for turning on the second peak amplifier. Thereby, broadband can be achieved.

[0040] (3) In the above (1) or (2), it may also be that when the input power of the input signal is the power for the main amplifier and the first peak amplifier to operate, the power of the third signal at the center frequency at the combining node is greater than the power of the third signal at the frequencies at both ends of the operating frequency band at the combining node, and the power of the fourth signal at the center frequency at the combining node is less than the power of the fourth signal at the frequencies at both ends of the operating frequency band at the combining node. Thereby, broadband can be achieved.

[0041] (4) In the above (3), it may also be that when the input power of the input signal is the power for the main amplifier and the first peak amplifier to operate, the absolute value of the difference between the output power of the output signal at the center frequency and the output power at the frequencies at both ends of the operating frequency band is less than the absolute value of the difference between the power of the third signal at the center frequency at the combining node and the power of the third signal at the frequencies at both ends of the operating frequency band at the combining node. Thereby, broadband can be achieved.

[0042] (5) In the above (4), it can also be that when the input power of the input signal is the power for the main amplifier and the first peak amplifier to operate, the absolute value of the difference between the output power of the output signal at the center frequency and the output power of the output signals at the frequencies at both ends of the operating frequency band is less than the absolute value of the difference between the power of the fourth signal at the center frequency at the combining node and the power of the fourth signal at the frequencies at both ends of the operating frequency band. Thus, broadbandization can be achieved.

[0043] (6) In any one of the above (1) to (5), it can also be that a notch filter that suppresses the signal at the center frequency is not connected between the distribution node and the main amplifier. Thus, miniaturization can be achieved.

[0044] (7) In the above (2), it can also be that a notch filter that suppresses the signal at the center frequency is not connected between the distribution node and the second peak amplifier. Thus, miniaturization can be achieved.

[0045] (8) In any one of the above (1) to (7), it can also be that a 1 / 4 wavelength line is connected in series on the path from the distribution node via the main amplifier to the combining node. Thus, miniaturization can be achieved.

[0046] [Details of the Embodiment of the Present Disclosure]

[0047] Hereinafter, with reference to the drawings, a specific example of the Doherty amplifier circuit according to the embodiment of the present disclosure will be described. It should be noted that the present disclosure is not limited to these examples, but is shown by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0048] [Example 1]

[0049] As the Doherty amplifier circuit, a high-output high-frequency amplifier circuit for a mobile communication base station will be described as an example. In this case, the frequency of the high-frequency signal is, for example, 0.5 GHz or more and 10 GHz or less. Figure 1 It is a block diagram of the Doherty amplifier circuit of Example 1.

[0050] As shown in Figure 1As shown, in Doherty amplifier circuit 100, a main amplifier 10, a peak amplifier 12 (first peak amplifier), and a peak amplifier 14 (second peak amplifier) are connected in parallel between a distribution node N1 of a distributor 16 and a combining node N2 of a combiner 18. Paths 25 to 27 are paths from the distribution node N1 to the combining node N2 through the main amplifier 10, the peak amplifier 12, and the peak amplifier 14, respectively. Thus, the Doherty amplifier circuit 100 is a three-way amplifier circuit. The Doherty amplifier circuit may also be an N-way Doherty amplifier circuit having one or more than three peak amplifiers.

[0051] A high-frequency signal is input as an input signal Sin to an input terminal Tin. The distributor 16 distributes the input signal Sin input to the input terminal Tin into a signal S1 (first signal), a signal S2 (second signal), and a signal S3 (fifth signal). The distributor 16 is, for example, a Wilkinson-type distributor. The distributor 16 has a distribution node N1 for distributing the signal S1, the signal S2, and the signal S3.

[0052] Path 25 includes a phase adjuster 20, a matching circuit 30, a bias circuit 36, the main amplifier 10, a bias circuit 39, and a matching circuit 33. Path 26 includes a notch filter 21, a matching circuit 31, a bias circuit 37, the peak amplifier 12, a matching circuit 34, and an impedance converter 23. Path 27 includes a matching circuit 32, a bias circuit 38, the peak amplifier 14, a matching circuit 35, and an impedance converter 24.

[0053] The matching circuits 30 to 32 match the impedances when looking at the matching circuits 30 to 32 from the distributor 16 with the impedances when looking at the main amplifier 10, the peak amplifier 12, and the peak amplifier 14 from the matching circuits 30 to 32, respectively. The bias circuits 36 to 38 supply gate bias voltages VG1 to VG3 to the gates G of the main amplifier 10, the peak amplifier 12, and the peak amplifier 14, respectively.

[0054] The phase adjuster 20 adjusts the phase of the signal S1 so that the signal S5 and the signal S6 that vary according to the impedance converter 23 and the impedance converter 24 are in phase with the signal S4. The notch filter 21 is a filter that suppresses a signal at the center frequency of the operating frequency band.

[0055] The main amplifier 10, the peak amplifier 12, and the peak amplifier 14 amplify the signal S1, the signal S2, and the signal S3 respectively, and output the amplified signal S4 (the third signal), the signal S5 (the fourth signal), and the signal S6 (the sixth signal) respectively. The bias circuit 39 supplies the drain bias voltage VD to the drains D of the main amplifier 10, the peak amplifier 12, and the peak amplifier 14. The matching circuits 33 to 35 match the impedances when looking from the main amplifier 10, the peak amplifier 12, and the peak amplifier 14 to the matching circuits 33 to 35 respectively with the impedances when looking from the matching circuits 33 to 35 to the synthesizer 18 respectively.

[0056] The synthesizer 18 includes a synthesis node N2, an impedance transformer 23, and an impedance transformer 24. The first end of the impedance transformer 23 is electrically connected to the peak amplifier 12 via the matching circuit 34, and the second end of the impedance transformer 23 is electrically connected to the synthesis node N2. The first end of the impedance transformer 24 is electrically connected to the peak amplifier 14 via the matching circuit 35, and the second end of the impedance transformer 24 is electrically connected to the synthesis node N2. The synthesis node N2 synthesizes the signals S4 to S6, and outputs the synthesized signal as the output signal Sout to the output terminal Tout.

[0057] The impedance transformer 23 and the impedance transformer 24 transform the impedance on the real axis of the Smith chart when looking from the matching circuit 34 and the matching circuit 35 to the impedance transformer 23 and the impedance transformer 24 into: the impedance at different positions on the real axis of the Smith chart when looking from the impedance transformer 23 and the impedance transformer 24 to the synthesis node N2. In addition, when the peak amplifier 12 is not operating, the impedance transformer 23 sets the impedance when looking from the synthesis node N2 to the peak amplifier 12 to infinity. When the peak amplifier 14 is not operating, the impedance transformer 24 sets the impedance when looking from the synthesis node N2 to the peak amplifier 14 to infinity.

[0058] The phase adjuster 20, the impedance transformer 23, and the impedance transformer 24 are transmission lines such as microstrip lines or coplanar lines, and are 1 / 4 wavelength lines at the center frequency of the operating frequency band. The electrical length of the 1 / 4 wavelength line does not have to be strictly 1 / 4 wavelength. The 1 / 4 wavelength line only needs to have an electrical length that functions as the impedance transformer 23 and the impedance transformer 24. For example, the electrical length of the 1 / 4 wavelength line can be 3 / 16 wavelength or more and 5 / 16 wavelength or less, or can be 7 / 32 wavelength or more and 9 / 32 wavelength or less. The impedance on the real axis in the Smith chart does not have to be strictly on the real axis (the reactance component is 0). The absolute value of the reactance component of the impedance can be 0.2 times or less of the resistance component, or can be 0.1 times or less.

[0059] The main amplifier 10, the peak amplifier 12, and the peak amplifier 14 each include transistors Q1 to Q3. The transistors Q1 to Q3 are, for example, FETs (Field Effect Transistors), for example, GaN HEMTs (Gallium Nitride High Electron Mobility Transistors) or LDMOSs (Laterally Diffused Metal Oxide Semiconductors). The sources S of the transistors Q1 to Q3 are grounded, signals S1 to S3 are respectively input to the gates G, and signals S4 to S6 are respectively output from the drains D.

[0060] Figure 2 FIG. is an example of the notch filter according to Embodiment 1. As Figure 2 shown, the notch filter 21 includes a series resonance circuit 28, and the series resonance circuit 28 is shunt-connected to the node N3 of the path 26. The series resonance circuit 28 includes a capacitor C1, an inductor L1, and a resistor R1 connected in series between the node N3 and a reference potential such as a ground potential. By setting the resonance frequency of the series resonance circuit 28 as the center frequency f0, the signal of the center frequency f0 transmitted through the path 26 is suppressed. The notch filter 21 may also be an LC parallel resonance circuit or an LCR parallel resonance circuit connected in series to the path 26. The circuit configuration of the notch filter 21 can be appropriately designed.

[0061] Figure 3 FIG. is a schematic diagram showing the probability with respect to the output power Pout, the output power Pout of each amplifier with respect to the input power Pin, the gain of each amplifier with respect to the input power Pin, and the overall gain with respect to the input power Pin according to Embodiment 1.

[0062] The probability is the probability of the modulated wave signal of the high-frequency signal for mobile communication amplified by the Doherty amplifier circuit 100. That is, it is the probability that the Doherty amplifier circuit 100 outputs a certain output power Pout. Each Pout is the output power Pout of the main amplifier 10, the peak amplifier 12, and the peak amplifier 14. Each gain is the power gain of the main amplifier 10, the peak amplifier 12, and the peak amplifier 14 respectively. The overall gain is the power gain of the output power Pout of the output signal Sout with respect to the input power Pin of the input signal Sin. It should be noted that Pin and Pout are expressed in dB. The gain of the main amplifier 10 below the power P1 of each gain is greater than the gain of the peak amplifier 12 above the power P1 and below the power P2. That is, the slope of Pout of the main amplifier 10 below the power P1 with respect to the input power Pin is greater than the slope of Pout of the peak amplifier 12 above the power P1 and below the power P2 with respect to the input power Pin. However, Figure 3 For the schematic diagram, the slope of Pout of the main amplifier 10 below the power P1 with respect to the input power Pin is shown as less than the slope of Pout of the peak amplifier 12 above the power P1 and below the power P2 with respect to the input power Pin.

[0063] As Figure 3 shown, when the output power Pout is the power P0, the probability of the modulated wave is the highest. That is, in the case of outputting the signal of the modulated wave, the time when the output power Pout is the power P0 is the longest. The main amplifier 10 is an A-class or AB-class amplifier, and the peak amplifiers 12 and 14 are C-class amplifiers. The input power Pin for turning on the peak amplifier 12 is greater than the input power Pin for turning on the main amplifier 10, and the input power Pin for turning on the peak amplifier 14 is greater than the input power Pin for turning on the peak amplifier 12. In order to work like this, it can be achieved by making the gate bias voltage VG2 of the transistor Q2 greater than the gate bias voltage VG1 of the transistor Q1 in the negative direction, and making the gate bias voltage VG3 of the transistor Q3 greater than the gate bias voltage VG2 of the transistor Q2 in the negative direction.

[0064] The input power of the input signal Sin for turning on the main amplifier 10 is less than the input power for turning on the peak amplifier 12. The input power of the input signal Sin for turning on the peak amplifier 12 is less than the input power for turning on the peak amplifier 14. As the input power Pin of the input signal Sin becomes larger and the input power Pin exceeds the power P0 until the power P1, the main amplifier 10 works, but the peak amplifiers 12 and 14 do not work. When the input power Pin is below the power P1, if the input power Pin becomes larger, the output power Pout of the main amplifier 10 will increase linearly. Therefore, when the input power Pin is below the power P0, each gain and the overall gain are approximately fixed.

[0065] When the input power Pin is above power P1 and below power P2, the main amplifier 10 and the peak amplifier 12 operate, but the peak amplifier 14 does not operate. In this range, the main amplifier 10 saturates. Therefore, the gain of the main amplifier 10 decreases. The overall gain also decreases accordingly. The peak amplifier 12 operates in class C. Therefore, the gain of the peak amplifier 12 between power P1 and power P2 is lower than the gain of the main amplifier 10 below power P1. In addition, the saturation power of the peak amplifier 12 is less than the saturation power of the main amplifier 10.

[0066] When the input power Pin is above power P2 and below P3, the main amplifier 10, the peak amplifier 12, and the peak amplifier 14 all operate. In this range, in addition to the main amplifier 10, the peak amplifier 12 also saturates. Therefore, the gain of the peak amplifier 12 decreases. The overall gain also decreases accordingly. The operating point of the peak amplifier 14 is greater than that of the peak amplifier 12 in the negative direction. Therefore, the gain of the peak amplifier 14 between power P2 and power P3 is lower than the gain of the peak amplifier 12 between power P1 and power P2. In addition, the saturation power of the peak amplifier 14 is less than the saturation power of the peak amplifier 12.

[0067] When the input power Pin is above power P3, in addition to the main amplifier 10 and the peak amplifier 12, the peak amplifier 14 also saturates. Therefore, the gain of the peak amplifier 14 decreases. The overall gain also decreases accordingly.

[0068] The product of the probability and the overall gain corresponds to the gain of the modulated wave. To increase the gain of the modulated wave, the overall gain at the output power Pout with a high probability needs to be increased.

[0069] [Comparative Example 1]

[0070] In Comparative Example 1, the notch filter 21 is not provided. Other configurations are the same as those in Embodiment 1. Figure 4 It is a diagram showing the power with respect to frequency in Comparative Example 1. In Figure 4 , it corresponds to when the input power Pin is power P2. The power P4 represents the power of the signal S4 at the synthesis node N2. The power P5 represents the power of the signal S5 at the synthesis node N2. The output power Pout represents the power of the output signal Sout. The center frequency f0 represents the center frequency of the operating band. The frequency f1 and the frequency f2 respectively represent the low-frequency end and the high-frequency end of the operating band.

[0071] The powers P4 at the center frequency f0, the frequency f1, and the frequency f2 are the powers P40, P41, and P42, respectively. The difference between the power P40 and the power P41 is ΔP41, and the difference between the power P40 and the power P42 is ΔP42. The powers P5 at the center frequency f0, the frequency f1, and the frequency f2 are the powers P50, P51, and P52, respectively. The difference between the power P50 and the power P51 is ΔP51, and the difference between the power P50 and the power P52 is ΔP52. The output powers Pout at the center frequency f0, the frequency f1, and the frequency f2 are the powers Pout0, Pout1, and Pout2, respectively. The difference between the power Pout0 and the power Pout1 is ΔPout1, and the difference between the power Pout0 and the power Pout2 is ΔPout2.

[0072] A phase adjuster 20 is provided in the path 25, and an impedance transformer 23 is provided in the path 26. A 1 / 4 wavelength line is used as the phase adjuster 20 and the impedance transformer 23. Therefore, the powers P4 and P5 are narrowband. Thus, even if the powers P40 and P50 become large at the center frequency f0, at the frequencies f1 and f2, P41, P51, P42, and P52 become small. Thus, ΔP41, ΔP42, ΔP51, and ΔP52 become large.

[0073] The output power Pout is the power synthesized from the powers P4 and P5. Therefore, ΔPout1 is greater than ΔP41 and ΔP51, and ΔPout2 is greater than ΔP42 and ΔP52. Thus, when the input power Pin is the power P2, the gain near the frequencies f1 and f2 decreases and the frequency band becomes narrow.

[0074] [Description of Embodiment]

[0075] Figure 5 It is a diagram showing the power with respect to the frequency in Embodiment 1. As Figure 5 shown, in Embodiment 1, a notch filter 21 is provided in the path 26. Therefore, in the power P5, the power P50 at the center frequency f0 is less than the powers P51 and P52 at the frequencies f1 and f2.

[0076] In the output power Pout, the mountain-shaped spectrum with respect to the frequency of the power P4 is compensated by the valley-shaped spectrum with respect to the frequency of the power P5. Thus, ΔPout1 and ΔPout2 are less than Figure 4 ΔPout1 and ΔPout2 of Comparative Example 1. Thus, when the input power Pin is the power P2, broadbanding can be achieved. When the input power Pin is the power P3, broadbanding can also be achieved.

[0077] According to Embodiment 1, a notch filter 21 that suppresses a signal having a center frequency in the suppression operating band is connected between a distribution node N1 and a peak amplifier 12. Thereby, broadbanding can be achieved at the input power at which the peak amplifier 12 operates.

[0078] When the input power Pin of the input signal Sin is the power at which the main amplifier 10 and the peak amplifier 12 operate (for example, when the input power Pin is power P2 or power P3), in the signal S4 at the combining node N2, the power P40 of the center frequency f0 is greater than each of the powers P41 and P42 at both ends of the operating band. In the signal S5 at the combining node N2, the power P50 of the center frequency f0 is less than each of the powers P51 and P52 at both ends of the operating band. Thereby, the mountain-shaped spectrum of the signal S4 can be eliminated using the valley-shaped spectrum of the signal S5. Thereby, broadbanding can be achieved.

[0079] The power P40 may be 0.5 dB or more greater than the powers P41 and P42, or may be 1 dB or more greater. The power P50 may be 0.5 dB or more less than the powers P51 and P52, or may be 1 dB or more less.

[0080] At powers P2 and P3, the absolute values of the differences ΔPout1 and ΔPout2 between the power Pout0 of the center frequency f0 of the output power Pout and the powers Pout1 and Pout2 of the frequencies f1 and f2 are respectively less than the absolute values of the differences ΔP41 and ΔP42 between the power P40 and the powers P41 and P42. Thereby, the mountain-shaped spectrum of the signal S4 can be eliminated using the valley-shaped spectrum of the signal S5. Thereby, broadbanding can be achieved.

[0081] The absolute values of ΔPout1 and ΔPout2 may be set to 0.8 times or less, or may be set to 0.5 times or less, of the absolute values of ΔP41 and ΔP42.

[0082] At powers P2 and P3, the absolute values of ΔPout1 and ΔPout2 are respectively less than the absolute values of the differences ΔP51 and ΔP52 between the power P50 and the powers P51 and P52. Thereby, the mountain-shaped spectrum of the signal S4 can be eliminated using the valley-shaped spectrum of the signal S5. Thereby, broadbanding can be achieved.

[0083] The absolute values of ΔPout1 and ΔPout2 may be set to 0.8 times or less, or may be set to 0.5 times or less, of the absolute values of ΔP51 and ΔP52.

[0084] A notch filter that suppresses a signal having the center frequency f0 is not connected between the distribution node N1 and the main amplifier 10. When a notch filter is provided in the path 25, Figure 3The insertion loss of the main amplifier 10, which most affects the gain of the modulation wave, increases. Therefore, a notch filter 21 is provided in path 26. Thereby, a decrease in the gain of the modulation wave can be suppressed, and broadbandization can be achieved.

[0085] A notch filter that suppresses a signal having a center frequency f0 may also be provided between the distribution node N1 and the peak amplifier 14. However, as Figure 3 shown, the operation of the peak amplifier 14 hardly affects the gain of the modulation wave. Therefore, miniaturization can be achieved by not providing a notch filter in path 27.

[0086] A phase adjuster 20 (quarter-wavelength line) is connected in series on path 25 from the distribution node N1 via the main amplifier 10 to the combining node N2. Thereby, the output power Pout becomes narrowband. Thereby, broadbandization can be achieved by providing the notch filter 21 in path 26.

[0087] The three-way Doherty amplifier circuit has been described as an example, but it may also be a two-way Doherty amplifier circuit that does not include the peak amplifier 14 and the impedance converter. In addition, it may also be an N-way Doherty amplifier circuit where N is 4 or more. In this case, only N - 1 peak amplifiers need to be provided.

[0088] The embodiments disclosed herein should be considered as illustrative in all respects and not restrictive. The scope of the present disclosure is shown not by the above description but by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

Claims

1. A Doherty amplifier circuit, comprising: An allocation node allocates an input signal to be input into a first signal and a second signal; a main amplifier, amplifying the first signal and outputting the amplified first signal as a third signal; a first peak amplifier, amplifying the second signal, and outputting the amplified second signal as a fourth signal; a synthesis node, synthesizing the third signal and the fourth signal, and outputting the synthesized signal as an output signal to an output terminal; as well as The notch filter is connected between the distribution node and the first peak amplifier and suppresses the signal of the center frequency of the working frequency band.

2. The Doherty amplifier circuit according to claim 1, comprising: The second peak amplifier amplifies the fifth signal and outputs the amplified fifth signal as a sixth signal. The distribution node distributes the input signal into the first signal, the second signal, and the fifth signal, The synthesis node synthesizes the third signal, the fourth signal, and the sixth signal, and outputs the synthesized signal as the output signal to the output terminal. An input power of the input signal for turning on the first peak amplifier is less than an input power for turning on the second peak amplifier.

3. The Doherty amplifier circuit according to claim 1 or 2, wherein: When the input power of the input signal is the power for the main amplifier and the first peak amplifier to operate, The power of the third signal at the center frequency at the synthesis node is greater than the power of the third signal at frequencies at both ends of the working frequency band at the synthesis node, The power of the fourth signal at the center frequency at the synthesis node is smaller than the power of the fourth signal at frequencies at both ends of the working frequency band at the synthesis node.

4. The Doherty amplifier circuit according to claim 3, wherein: When the input power of the input signal is the power for the main amplifier and the first peak amplifier to operate, The absolute value of the difference between the output power of the output signal at the center frequency and the output power of the frequencies at both ends of the working frequency band is smaller than the absolute value of the difference between the power of the third signal at the center frequency at the synthesis node and the power of the third signal at both ends of the working frequency band at the synthesis node.

5. The Doherty amplifier circuit according to claim 4, wherein: When the input power of the input signal is the power for the main amplifier and the first peak amplifier to operate, The absolute value of the difference between the output power of the output signal at the center frequency and the output power of the frequencies at both ends of the working frequency band is smaller than the absolute value of the difference between the power of the fourth signal at the center frequency at the synthesis node and the power of the fourth signal at both ends of the working frequency band.

6. The Doherty amplifier circuit according to claim 1 or 2, wherein: A notch filter for suppressing the signal of the center frequency is not connected between the distribution node and the main amplifier.

7. The Doherty amplifier circuit according to claim 2, wherein: A notch filter for suppressing the signal of the center frequency is not connected between the distribution node and the second peak amplifier.

8. The Doherty amplifier circuit according to claim 1 or 2, wherein: A 1 / 4 wavelength line is connected in series on a path from the distribution node to the combining node via the main amplifier.

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