Broadband low-noise dual-core dual-mode numerical control oscillator

Abstract

The invention relates to a broadband low-noise dual-core dual-mode numerically-controlled oscillator, which comprises an 8-shaped inductance coil, an odd-even mode change-over switch, a first numerically-controlled oscillation unit and a second numerically-controlled oscillation unit, the first numerical control oscillation unit and the second numerical control oscillation unit are respectively connected to two ends of the 8-shaped inductance coil to form a dual-core structure; the odd-even mode change-over switch adjusts the inductance of the 8-shaped inductance coil by changing the odd-even mode of the 8-shaped inductance coil so as to change the frequency range of a resonance signal generated by the numerical control oscillator; and the first numerical control oscillation unit or the second numerical control oscillation unit responds to different digital control signals, and adjusts the capacitance in the first numerical control oscillation unit or the second numerical control oscillation unit by utilizing a plurality of regulation and control modules with different frequency modulation precision, so as to change the frequency range of the resonance signal generated by the numerical control oscillator. The device has the advantages of simple structure, small occupied area, large tuning range and high tuning precision.

Description

Technical Field

[0001] The present invention belongs to the field of radio frequency integrated circuits, and particularly relates to a broadband low-noise dual-core dual-mode numerically controlled oscillator. Background Art

[0002] With the progress of analog processes, compared with traditional charge pump phase-locked loops, digital phase-locked loops have achieved higher integration and programmability. In the design of digital phase-locked loops, a numerically controlled oscillator (DCO) is the core circuit of clock generation technology, and its performance directly restricts the frequency accuracy of the clock output.

[0003] As the CMOS process enters the deep sub-micron stage, the design requirements for numerically controlled oscillators are continuously evolving towards monolithic integration. At deep sub-micron, the linear frequency modulation range of the varactor in traditional numerically controlled oscillators significantly decreases, exacerbating the non-linearity of oscillator frequency modulation; due to the reduction of voltage margin, there are greater limitations on the tuning range of the oscillator; finally, in a fully numerically controlled system with higher integration, digital signals cannot directly control the output frequency of the numerically controlled oscillator. Therefore, there is an urgent need to provide a numerically controlled oscillator with a large frequency modulation range, high frequency modulation linearity, and small occupied area to meet the requirements of different communication standards. Summary of the Invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a broadband low-noise dual-core dual-mode numerically controlled oscillator. The technical problems to be solved by the present invention are achieved through the following technical solutions:

[0005] The present invention provides a broadband low-noise dual-core dual-mode numerically controlled oscillator, including: an 8-shaped inductance coil, an odd-even mode switching switch, a first numerically controlled oscillation unit, and a second numerically controlled oscillation unit; the first numerically controlled oscillation unit and the second numerically controlled oscillation unit are respectively connected to both ends of the 8-shaped inductance coil to form a dual-core structure; the odd-even mode switching switch adjusts the inductance of the 8-shaped inductance coil by changing the odd-even mode of the 8-shaped inductance coil to change the frequency range of the resonant signal generated by the numerically controlled oscillator; the first numerically controlled oscillation unit or the second numerically controlled oscillation unit, in response to different digital control signals, uses multiple regulation modules with different frequency modulation precisions to adjust the capacitance in the first numerically controlled oscillation unit or the second numerically controlled oscillation unit, thereby changing the frequency range of the resonant signal generated by the numerically controlled oscillator.

[0006] Compared with the prior art, the beneficial effects of the present invention:

[0007] In view of the problem that the existing numerically controlled oscillator has a small tuning range and low precision due to the limitation of the integrated area, the present invention provides a broadband low-noise dual-core dual-mode numerically controlled oscillator. This numerically controlled oscillator uses an odd-even mode switching switch to change the working mode of the figure-eight inductance coil, adjust the inductance of the figure-eight inductance coil, and in the first numerically controlled oscillation unit and the second numerically controlled oscillation unit, in response to different digital control signals, uses multiple regulation modules with different frequency modulation precisions to adjust the capacitance in the first numerically controlled oscillation unit or the second numerically controlled oscillation unit, thereby changing the frequency range of the resonant signal generated by the numerically controlled oscillator. Based on the numerically controlled oscillator provided by the present invention, the quality factor of the inductance can be improved, and at the same time, a frequency modulation range of 3.8 GHz to 6.3 GHz can be achieved. It has the advantages of simple structure, small occupied area, large tuning range and high tuning precision, and is suitable for all-digital phase-locked loop systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 FIG. is a structural block diagram of a broadband low-noise dual-core dual-mode numerically controlled oscillator provided by an embodiment of the present invention;

[0009] Figure 2 FIG. is a specific structural block diagram of a broadband low-noise dual-core dual-mode numerically controlled oscillator provided by an embodiment of the present invention;

[0010] Figure 3 FIG. is a comparative example diagram of the phase noise of a broadband low-noise dual-core dual-mode numerically controlled oscillator before and after adding a tail inductor and a tail capacitor provided by an embodiment of the present invention;

[0011] Figure 4 FIG. is a schematic circuit connection diagram of the regulation module D1 provided by an embodiment of the present invention;

[0012] Figure 5 FIG. is a schematic circuit connection diagram of the regulation module D2 provided by an embodiment of the present invention;

[0013] Figure 6 FIG. is a schematic diagram of the C-V characteristic curve of a P-type I-MOS variable capacitance transistor provided by an embodiment of the present invention;

[0014] Figure 7 FIG. is a conversion example diagram of converting a binary code into a thermometer code provided by an embodiment of the present invention;

[0015] Figure 8 FIG. is a schematic diagram of the equivalent structure and working principle of a figure-eight inductance coil provided by an embodiment of the present invention;

[0016] Figure 9 FIG. is an impedance simulation diagram of a broadband low-noise dual-core dual-mode numerically controlled oscillator in odd and even modes provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] The present invention will be further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0018] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality" means two or more unless otherwise specifically defined.

[0019] In the description of this specification, the description with reference to terms such as "an embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0020] Although the present invention has been described herein in connection with various embodiments, however, in the process of implementing the claimed invention, those skilled in the art can understand and realize other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "one" does not exclude a plurality. A single processor or other unit may implement several functions recited in the claims. Certain measures are recited in mutually different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0021] Now, with reference to the accompanying drawings, the broadband low-noise dual-core dual-mode numerically controlled oscillator provided by the present invention will be described in detail.

[0022] Figure 1 is a structural block diagram of the broadband low-noise dual-core dual-mode numerically controlled oscillator provided by an embodiment of the present invention. As Figure 1As shown in the figure, the numerically controlled oscillator includes: an 8-shaped inductance coil, an odd-even mode switching switch, a first numerically controlled oscillation unit, and a second numerically controlled oscillation unit; the first numerically controlled oscillation unit and the second numerically controlled oscillation unit are respectively connected to both ends of the 8-shaped inductance coil to form a dual-core structure; the odd-even mode switching switch adjusts the inductance of the 8-shaped inductance coil by changing the odd-even mode of the 8-shaped inductance coil, so as to change the frequency range of the resonant signal generated by the numerically controlled oscillator; the first numerically controlled oscillation unit or the second numerically controlled oscillation unit, in response to different digital control signals, uses multiple regulation modules with different frequency modulation precisions to adjust the capacitance in the first numerically controlled oscillation unit or the second numerically controlled oscillation unit, thereby changing the frequency range of the resonant signal generated by the numerically controlled oscillator.

[0023] Figure 2 It is the specific structural block diagram of the wide-band low-noise dual-core dual-mode numerically controlled oscillator provided by the embodiment of the present invention. As Figure 2 shown in the figure, the first numerically controlled oscillation unit and the second numerically controlled oscillation unit are symmetrically arranged at both ends of the 8-shaped inductance coil, and the structures of the first numerically controlled oscillation unit and the second numerically controlled oscillation unit are exactly the same. The digital control signals include: a first digital control signal and a second digital control signal; the first numerically controlled oscillation unit includes: regulation modules D1, D2, and D3 connected in parallel, and a first negative resistance circuit; two output terminals of the regulation module D1 are respectively connected to two output terminals of the 8-shaped inductance coil, so that part of the inductance in the 8-shaped inductance coil and the capacitance in the regulation module D1 form the resonant cavity of the first numerically controlled oscillation unit; the regulation module D2 is arranged between the regulation module D1 and the regulation module D3, and the first negative resistance circuit is arranged on one side of the regulation module D3; the regulation module D1 accesses the first digital control signal, and the regulation modules D2 and D3 both access the second digital control signal.

[0024] Here, the second numerically controlled oscillation unit includes: regulation modules D4, D5, and D6 connected in parallel, and a second negative resistance circuit; two output terminals of the regulation module D4 are respectively connected to two output terminals of the 8-shaped inductance coil, so that part of the inductance in the 8-shaped inductance coil and the capacitance in the regulation module D4 form the resonant cavity of the second numerically controlled oscillation unit; the regulation module D5 is arranged between the regulation module D4 and the regulation module D6, and the second negative resistance circuit is arranged on one side of the regulation module D6; the regulation module D4 accesses the first digital control signal, and the regulation modules D5 and D6 both access the second digital control signal; the structure of the regulation module D4 is the same as that of the regulation module D1, the structure of the regulation module D5 is the same as that of the regulation module D2, the structure of the regulation module D6 is the same as that of the regulation module D3, and the structure of the second negative resistance circuit is the same as that of the first negative resistance circuit.

[0025] Here, the first negative resistance circuit includes: transistor M N1 、transistor MN2 , an inductor L 6 and a capacitor C1; the drain of the transistor M N1 and the gate of the transistor M N2 are both connected to the first output terminal of the regulation module D3, and the gate of the transistor M N1 and the gate of the transistor M N2 are both connected to the second output terminal of the regulation module D3, and the source of the transistor M N1 and the source of the transistor M N2 are both connected to the first end of the inductor L 6 , the second end of the inductor L 6 is grounded, and the inductor L 6 is in parallel with the capacitor C1. The second negative resistance circuit includes: the transistor M N3 , the transistor M N4 , the inductor L 7 and the capacitor C2; the drain of the transistor M N3 and the gate of the transistor M N4 are both connected to the first output terminal of the regulation module D6, and the gate of the transistor M N3 and the gate of the transistor M N4 are both connected to the second output terminal of the regulation module D6, and the source of the transistor M N3 and the source of the transistor M N4 are both connected to the first end of the inductor L 7 , the second end of the inductor L 7 is grounded, and the inductor L 7 is in parallel with the capacitor C2.

[0026] It should be noted that the inductor L 6 is the first figure-eight inductor, the inductor L 7 is the second figure-eight inductor, and the transistors M N1 ~M N4 can prevent the attenuation of the signals output by the first numerically controlled oscillator unit and the second numerically controlled oscillator unit. By connecting the inductor L 6 , the inductor L 7 , the capacitor C1 and the capacitor C2 to the sources of the cross-coupled NMOS pair (transistors M N1 ~M N4 ), and, the inductor L 6 and the capacitor C1 are at the first numerically controlled oscillator unit, and the inductor L 7 and the capacitor C2 are at the second numerically controlled oscillator unit to form an oscillation at twice the frequency, which can further increase the impedance at the second harmonic of the oscillation frequency and reduce the phase noise.

[0027] Figure 3 is a comparison example diagram of the phase noise of the broadband low-noise dual-core dual-mode numerically controlled oscillator before and after adding the tail inductor and the tail capacitor provided by the embodiment of the present invention. AsFigure 3 As shown, when generating a resonant signal with an oscillation frequency of 6.3 GHz, without adding a tail inductor (i.e., inductor L 6 and inductor L 7 ) and tail capacitors (capacitor C1 and capacitor C2), the phase noise at a 1 MHz frequency offset can reach -123.3 dBc / Hz. After adding the tail inductor, the phase noise at a 1 MHz frequency offset is -126.5 dBc / Hz, and the overall phase noise is optimized by 3.2 dB. Finally, the overall power consumption is 4.3 mW, and the FOM value is 195.2 dBc / Hz.

[0028] Figure 4 is a schematic circuit connection diagram of the regulation module D1 provided by an embodiment of the present invention. As Figure 4 shown, the first digital control signal includes a first signal (N k ' in the figure) and a second signal (N k ) with opposite phases; the regulation module D1 includes: transistors M N5 , transistors M N6 , transistors M N7 , transistors M N8 , transistors M N9 , MOM capacitors Cc1 and Cc2; the drain of transistor M N5 and the drain of transistor M N6 are connected to the power supply VDD, the source of transistor M N5 is connected to the first end of MOM capacitor Cc1, the source of transistor M N9 , and the drain of transistor M N7 , the source of transistor M N6 is connected to the first end of MOM capacitor Cc2, the drain of transistor M N9 , and the drain of transistor M N8 , the source of transistor M N7 and the source of transistor M N8 are grounded, the gates of transistor M N7 , the gates of transistor M N8 , and the gates of transistor M N9 are all connected to the first signal, the gates of transistor M N5 and the gates of transistor M N6 are all connected to the second signal, the second end of MOM capacitor Cc1 is used as the first output end of the regulation module D1, and the second end of MOM capacitor Cc2 is used as the second output end of the regulation module D1.

[0029] Here, the MOM capacitor, whose full name is "Metal-Oxide-Metal switch capacitor", is a capacitor that utilizes the capacitance between the edges of the same-layer metal and is usually implemented using a finger structure. This structure is realized through a multi-layer wiring layout and has a relatively large capacitance value and good symmetry.

[0030] Here, when the first signal N k ′ is at a high level and the second signal N k is at a low level, the MOM capacitors Cc1 and Cc2 reach their maximum values, the transistors MN7 and MN8 are turned on, and the transistors MN5 and MN6 are turned off. The DC levels at points M and N are pulled to ground, ensuring the smooth conduction of the switch MN9. When the first signal N k ′ is at a low level and the second signal N k is at a high level, the MOM capacitors Cc1 and Cc2 reach their minimum values, MN5 and MN6 are turned on, MN7 and MN8 are turned off, the DC levels at points M and N are pulled to VDD, MN9 is turned off and in the depletion region, reducing the switch parasitic capacitance.

[0031] Figure 5 is a schematic diagram of the circuit connection of the regulation module D2 provided by an embodiment of the present invention. As Figure 5 shown, the second digital control signal includes a third signal (Ctrl_fcw′ in the figure) and a fourth signal (Ctrl_fcw in the figure) with opposite phases; the regulation module D2 includes: transistors M N10 、transistors M P1 、transistors M P2 and transistors M P3 ; the source of the transistor M P1 is connected to the power supply V tune_high , the source of the transistor M N10 is connected to the power supply V tune_low , the gates of the transistor M P1 and the transistor M N10 are connected to the third signal, the sources of the transistor M P2 and the transistor M P3 are connected to the fourth signal, the drains of the transistor M P1 and the transistor M N10 are connected to the sources of the transistor M P2 and the transistor M P3 , the source and drain of the transistor M P2 are short-circuited, the source and drain of the transistor M P3 are short-circuited, the gate of the transistor M P2 is used as the first output terminal of the regulation module D2, and the gate of the transistor M P3The gate serves as the second output terminal of the regulation module D2.

[0032] Here, the transistors (or varactor diodes) in the regulation module D2 and the regulation module D3 both use P-type I-MOS variable capacitance transistors. Figure 6 It is a schematic diagram of the C-V characteristic curve of the P-type I-MOS variable capacitance transistor provided by the embodiment of the present invention. As Figure 6 shown, by connecting the substrate of the inverted transistor to the power supply voltage, the inverted transistor will not enter the accumulation region within a large range of gate voltage changes, so that the capacitance-voltage curve of the transistor when it works in the depletion region becomes very flat, avoiding the problem that the noise of the circuit is coupled to the digital control line of the varactor diode when the oscillator works, resulting in a change in the oscillation frequency of the LC circuit and the deterioration of the noise of the output signal.

[0033] It should be understood that the control signals accessed by the regulation modules in the first numerically controlled oscillation unit and the second numerically controlled oscillation unit are different. Exemplarily, the first digital control signal is a binary coded signal, and the second digital control signal is a thermometer coded signal. Specifically, the thermometer coded signal is obtained by converting the binary code into a thermometer code by using an 8*8 matrix form of MOS capacitor arrays. As Figure 7 shown, the high significant bits in the binary code generate the next row information and the row selection information, and the low significant bits generate the column selection information. By using multiple logic circuits in the 8*8 matrix form of MOS capacitor arrays, the second digital control signal is generated. It should be understood that in the embodiment of the present invention, other methods can also be used to convert the binary code into a thermometer code.

[0034] Here, the regulation modules D1 and D4 access the binary coded signal, and the regulation modules D2, D3, D5, and D6 access the thermometer coded signal.

[0035] It should be noted that the thermometer coded signals accessed by the regulation modules D2 and D3 in the first numerically controlled oscillation unit are generated by different control units. Correspondingly, the thermometer coded signals accessed by the regulation modules D5 and D6 in the second numerically controlled oscillation unit are also generated by different control units.

[0036] It should be noted that different encodings correspond to different frequency modulation precisions, so that the circuit connection relationships in the regulation modules D2 and D3 are the same, but the varactor diode sizes in the regulation module D2 are different from those in the regulation module D3. Also, the circuit connection relationships in the regulation modules D5 and D6 are the same, but the varactor diode sizes in the regulation module D5 are different from those in the regulation module D6.

[0037] In a possible implementation, the frequency modulation precision corresponding to the regulation modules D1 and D4 is less than that corresponding to the regulation modules D2 and D5, and the frequency modulation precision corresponding to the regulation modules D2 and D5 is less than that corresponding to the regulation modules D3 and D6. That is, the regulation modules D1 and D4 can perform coarse signal adjustment, the regulation modules D2 and D5 can perform medium signal adjustment, and the regulation modules D3 and D6 can perform fine signal adjustment.

[0038] For clear illustration, Table 1 lists the frequency modulation precision corresponding to the regulation modules D1 to the frequency modulation module 6. The coarse adjustment in Table 1 refers to the frequency modulation precision corresponding to the regulation modules D1 and D4, the medium adjustment refers to the frequency modulation precision corresponding to the regulation modules D2 and D5, and the fine adjustment refers to the frequency modulation precision corresponding to the regulation modules D3 and D6.

[0039] Table 1

[0040] Capacitor array Weight Capacitor step size Coarse tuning 16bit unit 49.3fF Medium tuning 64bit unit 1.54F Fine tuning 64bit unit 48aF

[0041] In addition, for a clear understanding of the even and odd modes of the figure-eight inductor coil, Figure 8 is a schematic diagram of the equivalent structure and working principle of the figure-eight inductor coil provided by the embodiment of the present invention. Specifically, Figure 8 in (1) is a schematic diagram of the structure of the figure-eight inductor coil on the chip layout, Figure 8 in (2) is an equivalent schematic diagram of the figure-eight inductor coil, Figure 8 in (3) is a further simplified schematic diagram of the figure-eight inductor coil, Figure 8 in (4) is an equivalent schematic diagram of the figure-eight inductor coil in the even mode, Figure 8 in (5) is an equivalent schematic diagram of the figure-eight inductor coil in the odd mode.

[0042] As Figure 8 shown in (1), the ninth metal layer (M9) is stacked on the eighth metal layer (M8), and the top metal layer (AP) is stacked on the ninth metal layer (M9). The power line CT is arranged on the AP layer, and the figure-eight inductor coil is arranged on the M9 layer. Here, in order to improve the space utilization rate, two small figure-eight inductors (inductor L 6 and inductor L 7), the distances from the two small figure-eight inductors to the figure-eight inductor coil are equal, which can make the mutual inductance coefficient between the external coil and the internal coil basically zero, and the influence of the internal coil on the external coil is approximately zero. That is, the figure-eight inductor coil and the two small figure-eight inductors do not affect each other. Here, the two small figure-eight inductors are the inductor in the first numerically controlled oscillation unit and the inductor in the second numerically controlled oscillation unit respectively. Since there cannot be overlap on the M9 layer, the overlapping parts of the two small figure-eight inductors and the CT line are placed on the M8 layer. It should be noted that the odd-even mode switching switch does not act on the two small figure-eight inductors. The function of the two small figure-eight inductors is to improve the overall performance of the first numerically controlled oscillation unit or the second numerically controlled oscillation unit and reduce the phase noise.

[0043] As Figure 8 shown in (2) of [], the figure-eight inductor coil can be equivalent to multiple inductors. Specifically, the figure-eight inductor coil includes: inductor L1, inductor L2, inductor L3, inductor L4, and inductor L5; inductor L1, inductor L2, inductor L4, and the capacitor in the first numerically controlled oscillation unit form the resonant cavity of the first numerically controlled oscillation unit; inductor L1, inductor L3, inductor L5, and the capacitor in the second numerically controlled oscillation unit form the resonant cavity of the second numerically controlled oscillation unit; the first end of inductor L2 is connected to the first output end of the first numerically controlled oscillation unit, the second end is connected to the first end of inductor L1 and the first end of inductor L3, and the second end of inductor L3 is connected to the first output end of the second numerically controlled oscillation unit; the first end of inductor L4 is connected to the second output end of the first numerically controlled oscillation unit, the second end is connected to the second end of inductor L1 and the first end of inductor L5, and the second end of inductor L5 is connected to the second output end of the second numerically controlled oscillation unit.

[0044] Here, the coupling coefficient between inductor L2 and inductor L3 is km, and the coupling coefficient between inductor L4 and inductor L5 is km.

[0045] As Figure 8 shown in (3) of [], the figure-eight inductor coil can be further simplified to include: two inductors with an inductance value of L and a mutual inductance of M, and the odd-even mode switching switches k1~k4 arranged on the two inductors. It should be noted that the simplified diagram does not include the two small figure-eight inductors (inductor L 6 and inductor L 7 ) in the above text.

[0046] As Figure 8 shown in (4) of [], in the even mode, switch k1 and switch k2 are closed, k3 and k4 are open, the phases at P1 and P3 are the same, and the signal normally flows through the D1-D2 part in the figure-eight inductor coil. Due to mutual inductance, the magnetic fluxes enhance each other, and the overall equivalent inductance value of the figure-eight inductor coil increases.

[0047] AsFigure 8 As shown in (5) in [reference], in the odd mode, switches k1 and k2 in the figure-eight inductor coil are disconnected, k3 and k4 are closed, the phases at P1 and P3 are opposite, the signals at D1 - D2 cancel each other out, the middle coil is equivalent to being ignored, and the magnetic fluxes in the figure-eight inductor coil cancel each other out, reducing the equivalent inductance value of the figure-eight inductor coil.

[0048] The above is the description of the structure and working principle of the broadband low-noise dual-core dual-mode numerically controlled oscillator provided by the embodiments of the present invention. To verify the performance of the broadband low-noise dual-core dual-mode numerically controlled oscillator provided by the embodiments of the present invention, a circuit chip containing Figure 2 the broadband low-noise dual-core dual-mode numerically controlled oscillator in [reference] is fabricated and soldered on the test fixture PCB for testing. Figure 9 It is the impedance simulation diagram of the broadband low-noise dual-core dual-mode numerically controlled oscillator provided by the embodiments of the present invention in odd and even modes. Figure 9 (1) in [reference] is the impedance simulation schematic of the broadband low-noise dual-core dual-mode numerically controlled oscillator in odd and even modes, Figure 9 (2) in [reference] is the impedance simulation diagram of the tail inductor in the dual-core dual-mode numerically controlled oscillator at the common-mode resonance frequency of 12 GHz. Based on Figure 9 (1) and (2) in [reference], it can be seen that the impedance peaks in the two modes are located at 4 GHz and 6.3 GHz respectively. At the same time, the tail inductors (i.e., inductor L 6 and inductor L 7 ) and the tail capacitors (capacitors C1 and C2) oscillate at twice the oscillation frequency and exhibit high impedance at the frequency of the second harmonic.

[0049] Aiming at the problems that the existing numerically controlled oscillators have a small tuning range and low accuracy due to the limitation of the integrated area, the present invention provides a broadband low-noise dual-core dual-mode numerically controlled oscillator. This numerically controlled oscillator uses an odd-even mode switching switch to change the working mode of the figure-eight inductor coil, adjust the inductance of the figure-eight inductor coil, and in the first numerically controlled oscillation unit and the second numerically controlled oscillation unit, in response to different digital control signals, uses multiple regulation modules with different frequency modulation accuracies to adjust the capacitors in the first numerically controlled oscillation unit or the second numerically controlled oscillation unit, thereby changing the frequency range of the resonant signal generated by the numerically controlled oscillator. Based on the numerically controlled oscillator provided by the present invention, the quality factor of the inductor can be improved, and at the same time, a frequency modulation range of 3.8 GHz to 6.3 GHz can be achieved. It has the advantages of simple structure, small occupied area, large tuning range and high tuning accuracy, and is suitable for all-digital phase-locked loop systems.

[0050] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A wideband low-noise dual-core dual-mode digitally controlled oscillator, characterized in that: include: An 8-shaped inductor coil, an odd-even mode switching switch, a first digitally controlled oscillating unit and a second digitally controlled oscillating unit; The first digitally controlled oscillating unit and the second digitally controlled oscillating unit are respectively connected to two ends of the figure-8 inductor coil to form a dual-core structure; The odd-even mode switching switch adjusts the inductance of the figure-8 inductor coil by changing the odd-even mode of the figure-8 inductor coil, so as to change the frequency range of the resonant signal generated by the digital controlled oscillator; The first digitally controlled oscillation unit or the second digitally controlled oscillation unit, in response to different digital control signals, utilizes multiple control modules with different frequency modulation precisions to adjust the capacitance in the first digitally controlled oscillation unit or the second digitally controlled oscillation unit, thereby changing the frequency range of the resonant signal generated by the digitally controlled oscillator.

2. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 1, characterized in that: The 8-shaped inductor coil includes: an inductor L1, an inductor L2, an inductor L3, an inductor L4 and an inductor L5; The inductor L1, the inductor L2, the inductor L4 and the capacitor in the first digitally controlled oscillation unit constitute the resonant cavity of the first digitally controlled oscillation unit; the inductor L1, the inductor L3, the inductor L5 and the capacitor in the second digitally controlled oscillation unit constitute the resonant cavity of the second digitally controlled oscillation unit; The first end of the inductor L2 is connected to the first output end of the first digitally controlled oscillation unit, the second end of the inductor L2 is connected to the first end of the inductor L1 and the first end of the inductor L3, and the second end of the inductor L3 is connected to the first output end of the second digitally controlled oscillation unit; The first end of the inductor L4 is connected to the second output end of the first digitally controlled oscillation unit, the second end is connected to the second end of the inductor L1 and the first end of the inductor L5, and the second end of the inductor L5 is connected to the second output end of the second digitally controlled oscillation unit.

3. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 1, characterized in that: The digital control signal includes: a first digital control signal and a second digital control signal; the first digital control oscillation unit includes: a control module D1, a control module D2, a control module D3, and a first negative resistance circuit connected in parallel; The two output ends of the control module D1 are respectively connected to the two output ends of the 8-shaped inductor coil, so that part of the inductance in the 8-shaped inductor coil and the capacitor in the control module D1 constitute the resonant cavity of the first digital control oscillation unit; The regulating module D2 is arranged between the regulating module D1 and the regulating module D3, and the first negative resistance circuit is arranged on one side of the regulating module D3; The regulating module D1 receives the first digital control signal, and the regulating module D2 and the regulating module D3 receive the second digital control signal.

4. The wideband low-noise dual-core dual-mode digitally controlled oscillator according to claim 3, characterized in that: The first negative resistance circuit comprises: a transistor M N1 , transistor M N2 , inductor L6 and capacitor C1; The transistor M N1 The drain of the transistor M N2 The gates of the transistors M are connected to the first output terminal of the control module D3. N1 The gate of the transistor M N2 The drain of each transistor M is connected to the second output terminal of the control module D3. N1 The source of the transistor M N2 The source electrodes are connected to the first end of the inductor L6, the second end of the inductor L6 is grounded, and the inductor L6 and the capacitor C1 are connected in parallel.

5. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 3, characterized in that: The first digital control signal includes a first signal and a second signal with opposite phases; the control module D1 includes: a transistor M N5 , transistor M N6 , transistor M N7 , transistor M N8 , transistor M N9 , MOM capacitor Cc1 and MOM capacitor Cc2; The transistor M N5 The drain of the transistor M N6 The drain of the transistor M is connected to the power supply VDD. N5 The source of the MOM capacitor Cc1 and the first end of the transistor M N9 The source of the transistor M N7 The drain of the transistor M N6 The source of the MOM capacitor Cc2 and the first end of the transistor M N9 The drain of the transistor M N8 The drain of the transistor M N7 The source of the transistor M N8 The source of the transistor M is grounded. N7 The gate of the transistor M N8 The gate of the transistor M N9 The gates of the transistors M are connected to the first signal. N5 The gate of the transistor M N6 The gates of the MOM capacitors Cc1 and Cc2 are connected to the second signal, the second end of the MOM capacitor Cc1 serves as the first output end of the control module D1, and the second end of the MOM capacitor Cc2 serves as the second output end of the control module D1.

6. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 3, characterized in that: The second digital control signal includes a third signal and a fourth signal with opposite phases; the control module D2 includes: a transistor M N10 , transistor M P1 , transistor M P2 and transistor M P3 ; The transistor M P1 The source is connected to the power supply V tune_high , the transistor M N10 The source is connected to the power supply V tune_low , the transistor M P1 The gate and transistor M N10 The gate of the transistor M is connected to the third signal. P2 The source of the transistor M P3 The source of the transistor M is connected to the fourth signal. P1 The drain of transistor M N10 The drain of the transistor M P2 The source of transistor M P3 The source of the transistor M P2 The source and drain of the transistor M are shorted. P3 The source and drain of the transistor M are shorted. P2 The gate of the transistor M is used as the first output terminal of the control module D2. P3 The gate of is used as the second output end of the regulation module D2.

7. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 3, characterized in that: The second digital control signal also includes a fifth signal and a sixth signal with opposite phases; The control module D3 includes: a transistor M N11 , transistor M P4 , transistor M P5 and transistor M P6 ; The transistor M P4 The source is connected to the power supply V tune_high , the transistor M N11 The source is connected to the power supply V tune_low , the transistor M P4 The gate and transistor M N11 The gate of the transistor M is connected to the fifth signal. P5 The source of the transistor M P6 The source of the transistor M is connected to the sixth signal. P4 The drain of transistor M N11 The drain of the transistor M P5 The source of transistor M P6 The source of the transistor M P5 The source and drain of the transistor M are shorted. P6 The source and drain of the transistor M are shorted. P5 The gate of the transistor M is used as the first output terminal of the control module D3. P6 The gate of is used as the second output end of the regulation module D3.

8. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 3, characterized in that: The first digital control signal is a binary coded signal, and the second digital control signal is a thermometer coded signal.

9. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 3, characterized in that: The digital control signal includes: a first digital control signal and a second digital control signal; the second digital control oscillation unit includes: a control module D4, a control module D5, a control module D6, and a second negative resistance circuit connected in parallel; The two output ends of the control module D4 are respectively connected to the two output ends of the 8-shaped inductor coil, so that part of the inductance in the 8-shaped inductor coil and the capacitor in the control module D4 constitute the resonant cavity of the second digital control oscillation unit; the control module D5 is arranged between the control module D4 and the control module D6, and the second negative resistance circuit is arranged on one side of the control module D6; The regulating module D4 is connected to the first digital control signal, and the regulating module D5 and the regulating module D6 are both connected to the second digital control signal; The structure of the control module D4 is the same as that of the control module D1, the structure of the control module D5 is the same as that of the control module D2, the structure of the control module D6 is the same as that of the control module D3, and the structure of the second negative resistance circuit is the same as that of the first negative resistance circuit.

10. The wideband low noise dual-core dual-mode digitally controlled oscillator according to claim 1, characterized in that: The odd-even mode switching switch includes: an even mode switch k1, an odd mode switch k2, an odd mode switch k3 and an even mode switch k4; the even mode switch k1 and the even mode switch k4 are synchronously turned on or off, and the odd mode switch k2 and the odd mode switch k3 are synchronously turned on or off; The first end of the even mode switch k1 and the first end of the odd mode switch k2 are both connected to the second output end of the first digitally controlled oscillator unit, the second end of the even mode switch k1 is connected to the second output end of the second digitally controlled oscillator unit, and the second end of the odd mode switch k2 and the second output end of the even mode switch k4 are both connected to the first output end of the second digitally controlled oscillator unit; The first end of the odd mode switch k3 and the first output end of the even mode switch k4 are both connected to the first output end of the first digitally controlled oscillator unit, and the second end of the odd mode switch k3 is connected to the second output end of the second digitally controlled oscillator unit.

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