Circuit board assembly and manufacturing method thereof

Abstract

A manufacturing method of a circuit board assembly comprises the steps that an inner side substrate is provided, the inner side substrate comprises an inner side insulating layer and an electronic element embedded in the inner side insulating layer, pins of the electronic element are exposed out of the inner side insulating layer, and the inner side insulating layer has the thickness direction; a first anisotropic conductive layer is arranged on one side of the inner insulating layer, the first anisotropic conductive layer is electrically conducted in the thickness direction, and the first anisotropic conductive layer is partially connected with a pin of the electronic component. Arranging a first uniform line layer on the first anisotropic conductive layer, wherein the first uniform line layer is connected with the first anisotropic conductive layer; a first circuit board is arranged on the first uniform circuit layer and comprises a first insulating layer, a first circuit layer and a first conduction body, the first insulating layer is arranged between the first circuit layer and the first uniform circuit layer, the first conduction body is embedded in the first insulating layer, one end of the first conduction body is connected with the first uniform circuit layer, and the other end of the first conduction body is connected with the second uniform circuit layer; the other end is connected with the first circuit layer. In addition, the invention also provides a circuit board assembly.

Description

Technical Field

[0001] This application relates to the field of circuit boards, and particularly to a circuit board assembly and a manufacturing method thereof. Background Art

[0002] In the field of electronics manufacturing, especially in the manufacturing of high-density circuit boards, the Embedded Component Technology (ECT) is crucial. This technology integrates micro-components (such as capacitors and resistors) inside the circuit board, saving space, shortening the circuit length, and improving the circuit performance.

[0003] The main steps of the embedded component technology include: embedding electronic components into the inner substrate, covering the outer substrate to encapsulate the electronic components, drilling holes, and achieving electrical connection between the pins of the electronic components and the outer substrate through electroplated vias. However, with the trend of miniaturization and increasing functions of electronic devices, this technology faces the following challenges: the pin size of micro-sized electronic components decreases, which poses higher requirements for the accuracy and alignment of laser drilling, increasing the risk of laser deviation. This may not only lead to open circuits or short circuits in the circuit, affecting performance and reliability, but also increase the manufacturing complexity and cost, and reduce the yield rate. Summary of the Invention

[0004] In view of this, this application proposes a manufacturing method of a circuit board assembly to solve the above problems.

[0005] In addition, this application also provides a circuit board assembly.

[0006] A manufacturing method of a circuit board assembly includes the steps of: providing an inner substrate, the inner substrate including an inner insulating layer and electronic components embedded in the inner insulating layer, pins of the electronic components being exposed on the inner insulating layer, the inner insulating layer having a thickness direction. A first anisotropic conductive layer is disposed on one side of the inner insulating layer, the first anisotropic conductive layer being electrically conductive along the thickness direction, and along the thickness direction, the first anisotropic conductive layer is partially connected to the pins of the electronic components. A first isotropic wiring layer is disposed on the first anisotropic conductive layer, and along the thickness direction, the first isotropic wiring layer is connected to the first anisotropic conductive layer. A first circuit board is disposed on the first isotropic wiring layer, the first circuit board including a first insulating layer, a first wiring layer, and a first conductor, the first insulating layer being disposed between the first wiring layer and the first isotropic wiring layer, the first conductor being embedded in the first insulating layer, one end of the first conductor being connected to the first isotropic wiring layer, and the other end being connected to the first wiring layer.

[0007] In some possible embodiments, the step of "disposing a first isotropic circuit layer on the first anisotropic conductive layer" includes: disposing a first isotropic conductive layer on the first anisotropic conductive layer. Etching the first isotropic conductive layer to form the first isotropic circuit layer.

[0008] In some possible embodiments, the step of "disposing a first circuit board on the first isotropic circuit layer" includes: disposing a first outer substrate on the first isotropic circuit layer, the first outer substrate including the first insulating layer and the first copper foil layer, the first insulating layer being disposed between the first copper foil layer and the first isotropic circuit layer. Disposing a first slot on the first outer substrate, with a part of the first isotropic circuit layer being exposed in the first slot. Disposing a first conductor in the first slot, one end of the first conductor being connected to the first isotropic circuit layer, and etching the first copper foil layer to form the first circuit layer, the other end of the first conductor being connected to the first circuit layer.

[0009] In some possible embodiments, the pins of the electronic component are exposed on opposite sides of the inner insulating layer, and the manufacturing method further includes the steps of: disposing a second anisotropic conductive layer on the other side of the inner insulating layer, the second anisotropic conductive layer being electrically conductive along the thickness direction, and the second anisotropic conductive layer being connected to the pins of the electronic component along the thickness direction. Disposing a second isotropic circuit layer on the second anisotropic conductive layer, and along the thickness direction, a part of the second isotropic circuit layer being connected to the second anisotropic conductive layer. Disposing a second circuit board on the second isotropic circuit layer, the second circuit board including a second insulating layer, a second circuit layer, and a second conductor, the second insulating layer being disposed between the second circuit layer and the second isotropic circuit layer, the second conductor being embedded in the second insulating layer, one end of the second conductor being connected to the second isotropic circuit layer, and the other end being connected to the second circuit layer.

[0010] In some possible embodiments, the step of "disposing a second isotropic circuit layer on the second anisotropic conductive layer" includes: disposing a second isotropic conductive layer on the second anisotropic conductive layer. Etching the second isotropic conductive layer to form the second isotropic circuit layer.

[0011] In some possible embodiments, the step of "arranging a second circuit board on the second directional circuit layer" includes: arranging a second outer substrate on the second directional circuit layer, the second outer substrate including the second insulating layer and the second copper foil layer, the second insulating layer being arranged between the second copper foil layer and the second directional circuit layer. Arranging a second slot on the second outer substrate, a portion of the second directional circuit layer being exposed in the second slot. Arranging the second conductive body in the second slot, one end of the second conductive body being connected to the second directional circuit layer, and etching the second copper foil layer to form the second circuit layer, the other end of the second conductive body being connected to the second circuit layer.

[0012] In some possible embodiments, the inner substrate further includes a filling body, the inner insulating layer is provided with an opening, the electronic component is provided in the opening, and the filling body is provided in the gap between the electronic component and the opening, and the manufacturing method of the inner substrate includes the steps of: providing the inner insulating layer. Disposing a peelable layer on one side of the inner insulating layer. Disposing a bearing layer on the side of the peelable layer away from the inner insulating layer, the bearing layer covering the opening. Disposing the electronic component in the opening. Disposing a filling layer on the other side of the inner insulating layer, partially filling the gap between the electronic component and the opening to form the filling body, and removing the filling layer, the peelable layer and the bearing layer to obtain the inner substrate.

[0013] A circuit board assembly comprises an inner substrate, a first anisotropic conductive layer, a first uniform circuit layer and a first circuit board. The inner substrate comprises an inner insulating layer and an electronic component embedded in the inner insulating layer, the pins of the electronic component are exposed in the inner insulating layer, and the inner insulating layer has a thickness direction. The first anisotropic conductive layer is arranged on one side of the inner insulating layer, the first anisotropic conductive layer is electrically conductive along the thickness direction, and the first anisotropic conductive layer is connected to the pins of the electronic component along the thickness direction. The first uniform circuit layer is arranged on the first anisotropic conductive layer, along the thickness direction, the first uniform circuit layer is electrically conductive in any direction, and the first uniform circuit layer is connected to the first anisotropic conductive layer. The first circuit board is arranged on the first uniform circuit layer, the first circuit board comprises a first insulating layer, a first circuit layer and a first conductive body, the first insulating layer is arranged between the first circuit layer and the first anisotropic conductive layer, the first conductive body is embedded in the first insulating layer, one end of the first conductive body is connected to the first uniform circuit layer, and the other end is connected to the first circuit layer.

[0014] In some possible embodiments, it further includes: a second anisotropic conductive layer, a second isotropic circuit layer, and a second circuit board. The second anisotropic conductive layer is on the other side of the inner insulating layer. The second anisotropic conductive layer is electrically conductive along the thickness direction and electrically insulated along the direction perpendicular to the thickness direction. The second anisotropic conductive layer is connected to the pins of the electronic component along the thickness direction. The second isotropic circuit layer is disposed on the second anisotropic conductive layer. Along the thickness direction, the second isotropic circuit layer is electrically conductive in any direction, and the second isotropic circuit layer is connected to the second anisotropic conductive layer. The second circuit board is disposed on the second isotropic circuit layer. The second circuit board includes a second insulating layer, a second circuit layer, and a second conductor. The second insulating layer is disposed between the second circuit layer and the second anisotropic conductive layer. The second conductor is embedded in the second insulating layer. One end of the second conductor is connected to the second isotropic circuit layer, and the other end is connected to the second circuit layer.

[0015] In some possible embodiments, both the first anisotropic conductive layer and the second anisotropic conductive layer are anisotropic conductive films, and both the first isotropic circuit layer and the second isotropic circuit layer are made of metal.

[0016] Compared with the prior art, the manufacturing method of the circuit board assembly provided by this application sets a first anisotropic conductive layer on the pins of the electronic component, and then sets a first isotropic circuit layer on the first anisotropic conductive layer. This first isotropic circuit layer can serve as the "pin with enlarged area" of the electronic component. Due to the selective conductivity of the first anisotropic conductive layer, the first anisotropic conductive layer can "enlarge" the connection area of the pins along the thickness direction respectively, thereby reducing the problem of offset in subsequent build-up drilling. It not only does not increase additional manufacturing costs and complexity, but also can improve the manufacturing yield of the circuit board assembly, reduce the scrap rate, and maintain or improve the overall performance and reliability of the product. Description of the Drawings

[0017] Figure 1 is a cross-sectional schematic view of the inner insulating layer provided by an embodiment of this application.

[0018] Figure 2 is Figure 1 a cross-sectional schematic view of the first intermediate obtained by setting a peelable layer on one side of the inner insulating layer shown.

[0019] Figure 3 is Figure 2 a cross-sectional schematic view of the first intermediate shown after opening holes.

[0020] Figure 4 is Figure 3 a cross-sectional schematic view of the peelable layer shown after setting a carrier layer.

[0021] Figure 5 is Figure 4 A cross-sectional schematic diagram after an electronic component is disposed in the opening shown in the figure.

[0022] Figure 6 is Figure 5 A cross-sectional schematic diagram after a filling layer is disposed on the other side of the inner insulating layer shown in the figure.

[0023] Figure 7 is to remove Figure 6 A cross-sectional schematic diagram of a second intermediate obtained after removing the peelable layer and the carrier layer shown in the figure.

[0024] Figure 8 is to remove Figure 7 A cross-sectional schematic diagram of an inner substrate obtained after removing the filling layer of the second intermediate shown in the figure.

[0025] Figure 9 is Figure 8 A cross-sectional schematic diagram after a first anisotropic conductive layer is disposed on the inner substrate shown in the figure.

[0026] Figure 10 is Figure 9 A cross-sectional schematic diagram after a first isotropic conductive layer is disposed on the first anisotropic conductive layer shown in the figure.

[0027] Figure 11 is to etch Figure 10 A cross-sectional schematic diagram of a third intermediate obtained by etching the first isotropic conductive layer shown in the figure.

[0028] Figure 12 is to extrude Figure 11 A cross-sectional schematic diagram when the third intermediate shown in the figure is extruded.

[0029] Figure 13 is Figure 12 A cross-sectional schematic diagram after a first outer substrate is disposed on the third intermediate shown in the figure.

[0030] Figure 14 is Figure 13 A cross-sectional schematic diagram after a first conductor is disposed on the first outer substrate shown in the figure.

[0031] Figure 15 A cross-sectional schematic diagram of a circuit board assembly provided in an embodiment of the present application.

[0032] Main component symbol description

[0033] Inner substrate 10

[0034] Inner insulating layer 11

[0035] Electronic component 12

[0036] Body part 121

[0037] Pin 122

[0038] First pin 122a

[0039] Second pin 122b

[0040] Peelable layer 13

[0041] First intermediate 14

[0042] Opening 15

[0043] Carrier layer 16

[0044] Receiving space 161

[0045] First upper side lead-out end 171

[0046] First lower side lead-out end 172

[0047] First connecting part 173

[0048] Second upper side lead-out end 181

[0049] Second lower side lead-out end 182

[0050] Second connecting part 183

[0051] Filling layer 20

[0052] Filling body 21

[0053] Second intermediate 22

[0054] First anisotropic conductive layer 23

[0055] Second anisotropic conductive layer 24

[0056] First isotropic wiring layer 30

[0057] First connection pad 301

[0058] First isotropic conductive layer 31

[0059] Second isotropic conductive layer 32

[0060] Second isotropic wiring layer 33

[0061] Second connection pad 331

[0062] Third intermediate 35

[0063] First circuit board 40

[0064] First insulating layer 401

[0065] First wiring layer 402

[0066] The first conductor 403

[0067] The first copper foil layer 404

[0068] The first slotted groove 405

[0069] The first outer substrate 41

[0070] The second outer substrate 42

[0071] The second insulating layer 421

[0072] The second conductor 422

[0073] The second circuit layer 423

[0074] The second circuit board 424

[0075] The second slotted groove 425

[0076] The second copper foil layer 426

[0077] The first cross-sectional width W1

[0078] The second cross-sectional width W2

[0079] The gap S

[0080] The thickness direction A

[0081] The following specific embodiments will further illustrate the present application in conjunction with the above-mentioned drawings. Specific embodiments

[0082] In order to make the above objects, features, and advantages of the present application more obvious and understandable, the following detailed description will be given to the specific embodiments of the present application in conjunction with the drawings.

[0083] In the following description, many specific details are set forth in order to fully understand the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar applications without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0084] Secondly, the present application will be described in detail with reference to the schematic diagrams. When describing the embodiments of the present application in detail, for the convenience of explanation, the cross-sectional views showing the device structure will be enlarged locally not in accordance with the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present application herein. In addition, in actual production, three-dimensional spatial dimensions including length, width, and depth should be included.

[0085] The following will be described in detail through embodiments.

[0086] Please refer toFigures 1 to 15 , An embodiment of the present application provides a manufacturing method for a circuit board assembly 100. This manufacturing method can be used to manufacture a circuit board with embedded electronic components (such as capacitors and resistors). The manufacturing method includes the steps:

[0087] S1: Please refer to Figures 1 to 8 , provide an inner substrate 10, the inner substrate 10 includes an inner insulating layer 11 and electronic components 12 embedded in the inner insulating layer 11. The electronic component 12 includes a body portion 121 and a plurality of pins 122 connecting the body portion 121. A plurality of the pins 122 are exposed on the outer surface of the inner insulating layer 11.

[0088] In this embodiment, the specific manufacturing method of the inner substrate 10 includes the steps:

[0089] S11: Please refer to Figure 1 , provide one of the inner insulating layers 11, the inner insulating layer 11 has a thickness direction A. The material of the inner insulating layer 11 includes but is not limited to at least one of polyimide (PI), liquid crystal polymer (LCP), phenolic epoxy resin (EP), polytetrafluoroethylene (PTFE), polyetheretherketone (PEEK), polyphenylene oxide (PPO), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN).

[0090] S12: Please refer to Figure 2 , provide a peelable layer 13 on one side of the inner insulating layer 11 to obtain a first intermediate 14. Wherein, the material of the peelable layer 13 is PET, and the peelable layer 13 can provide adhesion.

[0091] S13: Please refer to Figure 3 , provide an opening 15 through the first intermediate 14, and the opening 15 penetrates the inner insulating layer 11 and the peelable layer 13. Specifically, the opening 15 has a first cross-sectional width W1, and the opening 15 is formed by laser drilling.

[0092] S14: Please refer to Figure 4, a carrier layer 16 is provided on the peelable layer 13, and the carrier layer 16 covers one end of the opening 15, thereby forming a receiving space 161. Among them, the material of the carrier layer 16 includes glass, metal, FR-4 glass fiber, etc.

[0093] S15: Please refer to Figure 5 , the electronic component 12 is disposed in the receiving space 161. The electronic component 12 has a second cross-sectional width W2, and the first cross-sectional width W1 is greater than the second cross-sectional width W2. Thus, a gap S is formed between the outer side surface of the electronic component 12 and the inner side wall of the opening 15.

[0094] In this embodiment, please refer to Figure 5 , the electronic component 12 includes a first lead 122a and a second lead 122b. The first lead 122a and the second lead 122b are relatively spaced apart. The first lead 122a and the second lead 122b are both substantially "U" shaped, and the body portion 121 is substantially square. The first lead 122a includes a first upper side lead-out end 171, a first lower side lead-out end 172, and a first connecting portion 173. The first upper side lead-out end 171 and the first lower side lead-out end 172 are relatively spaced apart along a direction perpendicular to the thickness direction A, and the first connecting portion 173 is connected between the first upper side lead-out end 171 and the first lower side lead-out end 172, thereby surrounding and forming a first receiving groove 174. One end of the body portion 121 is received in the first receiving groove 174 and is electrically connected to the first connecting portion 173. Similarly, the second lead 122b includes a second upper side lead-out end 181, a second lower side lead-out end 182, and a second connecting portion 183. The second upper side lead-out end 181 and the second lower side lead-out end 182 are relatively spaced apart along a direction perpendicular to the thickness direction A, and the second connecting portion 183 is connected between the second upper side lead-out end 181 and the second lower side lead-out end 182, thereby surrounding and forming a second receiving groove 184. One end of the body portion 121 is received in the second receiving groove 184 and is electrically connected to the second connecting portion 183. That is, the first lower side lead-out end 172 and the second lower side lead-out end 182 are located on one side of the body portion 121, and the first lower side lead-out end 172 and the second lower side lead-out end 182 are connected to the carrier layer 16. The first upper side lead-out end 171 and the second upper side lead-out end 181 are located on the opposite side of the body portion 121, and the first upper side lead-out end 171 and the second upper side lead-out end 181 protrude from the side of the inner insulating layer 11 facing away from the carrier layer 16. Specifically, the electronic component 12 is a multi-layer ceramic capacitor.

[0095] S16: Please refer to Figure 6 , a filling layer 20 is disposed on the inner insulating layer 11, and the filling layer 20 covers the first upper lead-out end 171 and the second upper lead-out end 181. Part of the filling layer 20 is filled into the gap S to form a filling body 21, and the filling body 21 and part of the filling layer 20 encapsulate the electronic component 12. Wherein, the filling layer 20 is disposed on the inner insulating layer 11 by a pressing method, and the carrier layer 16 can provide necessary support and protection for the electronic component 12 during the pressing process.

[0096] In this embodiment, the filling layer 20 and the filling body 21 are Ajinomoto Build-up Film (ABF). Wherein, the Ajinomoto Build-up Film is an insulating material developed by Ajinomoto Co., Ltd. and is used for building layers in printed circuit boards (PCBs) and integrated circuit packages. The Ajinomoto Build-up Film can achieve finer line widths and pitches than traditional circuit board materials and is suitable for High Density Interconnect (HDI) technology. That is, the filling layer 20 can encapsulate the first upper lead-out end 171 and the second upper lead-out end 181 with smaller intervals.

[0097] S17: Please refer to Figure 7 , the peelable layer 13 is removed, so that the peelable layer 13, the carrier layer 16 and the inner insulating layer 11 are separated, and the lower surface of the inner insulating layer 11 is exposed to obtain a second intermediate 22.

[0098] S18: Please refer to Figure 8 , the filling layer 20 and part of the filling body 21 are removed, so that the upper surface of the inner insulating layer 11 is exposed, and the upper and lower surfaces of the filling body 21 are flush with the upper and lower surfaces of the inner insulating layer 11 respectively to obtain the inner substrate 10. Wherein, the filling layer 20 is removed by plasma etching, so that the first upper lead-out end 171 and the second upper lead-out end 181 are exposed on one side of the filling body 21. The first lower lead-out end 172 and the second lower lead-out end 182 are exposed on the other side of the filling body 21. In this way, the first upper lead-out end 171, the second upper lead-out end 181, the first lower lead-out end 172 and the second lower lead-out end 182 can not only be cleaned, but also form a microporous structure to improve the adhesion of the surface.

[0099] S2: Please refer to Figure 9, a first anisotropic conductive layer 23 is disposed on one side of the inner insulating layer 11. The first anisotropic conductive layer 23 is an anisotropic conductive film (ACF). The anisotropic conductive film contains tiny conductive particles that are dispersed in a non-conductive adhesive matrix. When the adhesive is compressed, the conductive particles come into contact in the vertical direction to form a conductive path, while remaining insulated in the horizontal direction. That is, the first anisotropic conductive layer 23 has selectivity in the conductive direction. At the same time, the anisotropic conductive film also has an adhesive ability, enabling the first anisotropic conductive layer 23 to firmly connect to the first upper lead-out end 171 and the second upper lead-out end 181. Specifically, the first anisotropic conductive layer 23 is electrically conductive along the thickness direction A and electrically insulated along a direction perpendicular to the thickness direction A. At least a part of the first anisotropic conductive layer 23 connects the first upper lead-out end 171 and the second upper lead-out end 181 of the electronic component 12 along the thickness direction A.

[0100] In this embodiment, relying on the selectivity of the first anisotropic conductive layer 23 in the conductive direction, along the thickness direction A, the first upper lead-out end 171 and the second upper lead-out end 181 are respectively electrically conductive with the first anisotropic conductive layer 23. Along a direction perpendicular to the thickness direction A, the first upper lead-out end 171 and the second upper lead-out end 181 are respectively electrically insulated from the first anisotropic conductive layer 23.

[0101] In this embodiment, step S2 further includes the steps of:

[0102] S21: Please refer to Figure 9 , a second anisotropic conductive layer 24 is disposed on the other side of the inner insulating layer 11. Similar to the first anisotropic conductive layer 23, the first anisotropic conductive layer 23 is an anisotropic conductive film. The second anisotropic conductive layer 24 is electrically conductive along the thickness direction A and electrically insulated along a direction perpendicular to the thickness direction A. At least a part of the second anisotropic conductive layer 24 connects the first lower lead-out end 172 and the second lower lead-out end 182 of the electronic component 12 along the thickness direction A. That is, along the thickness direction A, the first lower lead-out end 172 and the second lower lead-out end 182 are respectively electrically conductive with the second anisotropic conductive layer 24. Along a direction perpendicular to the thickness direction A, the first lower lead-out end 172 and the second lower lead-out end 182 are respectively electrically insulated from the second anisotropic conductive layer 24.

[0103] In this embodiment, step S2 and step S21 are performed simultaneously, and the first anisotropic conductive layer 23 and the second anisotropic conductive layer 24 are simultaneously pressed on opposite sides of the electronic component 12. It can be understood that in other embodiments of the present application, the first anisotropic conductive layer 23 and the second anisotropic conductive layer 24 can also be arranged on opposite sides of the electronic component 12 in steps, or the first anisotropic conductive layer 23 or the second anisotropic conductive layer 24 is arranged on only one side of the electronic component 12.

[0104] S3: See Figures 10 to 11 , a first uniform circuit layer 30 is arranged on the first anisotropic conductive layer 23. Along the thickness direction A, part of the first uniform circuit layer 30 is connected to the first anisotropic conductive layer 23, and another part of the first uniform circuit layer 30 is staggered with the first anisotropic conductive layer 23 to obtain a third intermediate 35. That is, the first uniform circuit layer 30 is equivalent to the pin 122 of the electronic component 12, which is conducive to increasing the area of ​​electrical connection and reducing the connection problem of short circuit or open circuit caused by drilling deviation.

[0105] In this embodiment, step S3 specifically includes:

[0106] S31: See Figure 10 A first unidirectional conductive layer 31 is provided on the first anisotropic conductive layer 23, and the first unidirectional conductive layer 31 covers the first anisotropic conductive layer 23 and one side of the inner insulating layer 11. The first unidirectional conductive layer 31 is a metal layer, and the metal layer has no difference in conductivity in the thickness direction A, perpendicular to the thickness direction, or in any other direction, that is, there is no selectivity in the conductive direction of the first unidirectional conductive layer 31. The first unidirectional conductive layer 31 is a metal layer formed by sputtering or chemical vapor deposition technology.

[0107] In this embodiment, step S31 further includes:

[0108] S311: See Figure 10 A second unidirectional conductive layer 32 is provided on the second anisotropic conductive layer 24, and the second unidirectional conductive layer 32 covers the second anisotropic conductive layer 24 and the other side of the inner insulating layer 11. The second unidirectional conductive layer 32 is a metal layer, which is the same as the first unidirectional conductive layer 31, and there is no selectivity in the conductive direction of the second unidirectional conductive layer 32. The second unidirectional conductive layer 32 is a metal layer formed by sputtering or chemical vapor deposition technology.

[0109] S32: See Figure 11, the first directional conductive layer 31 is etched to form the first directional wiring layer 30, and the second directional conductive layer 32 is etched to form the second directional wiring layer 33. Specifically, the first directional wiring layer 30 and the second directional wiring layer 33 are both formed by dry film, exposure, development and etching.

[0110] The first isotropic wiring layer 30 includes two first connection pads 301 spaced apart from each other. One of the first connection pads 301 is at least partially connected to the first upper lead-out terminal 171 along the thickness direction A. The other first connection pad 301 is at least partially connected to the second upper lead-out terminal 181 along the thickness direction A. Thus, the first pin 122a and the second pin 122b are respectively connected to the two first connection pads 301 through the first anisotropic conductive layer 23. By designing the two first connection pads 301 with larger areas, it is equivalent to enlarging the pin area that can be used to connect the embedded electronic component 12, which is beneficial to reduce the connection problem caused by drilling deviation.

[0111] The second isotropic wiring layer 33 includes two second connection pads 331 spaced apart from each other. One of the second connection pads 331 is at least partially connected to the first lower lead-out end 172 along the thickness direction A. The other first connection pad 301 is at least partially connected to the second lower lead-out end 182 along the thickness direction A. In this way, the first pin 122a and the second pin 122b are respectively connected to the two first connection pads 301 through the second anisotropic conductive layer 24. By designing the two second connection pads 331 with larger areas, it is equivalent to enlarging the pin area that can be used to connect the embedded electronic component 12, which is conducive to reducing the connection problem caused by drilling deviation.

[0112] S4: See Figure 12 , extruding and baking the third intermediate body 35, so that the first anisotropic conductive layer 23 and the second anisotropic conductive layer 24 are solidified, and the surfaces of the two first connection pads 301 and the two second connection pads 331 are flat. Specifically, by clamping the pressure steel plates 36 on the two opposite outer sides of the third intermediate body 35, and then heating the pressure steel plates 36, the first anisotropic conductive layer 23 and the second anisotropic conductive layer 24 are solidified, and the surfaces of the two first connection pads 301 and the two second connection pads 331 are flat. It can be understood that in other embodiments of the present application, the first anisotropic conductive layer 23 and the second anisotropic conductive layer 24 are pressed and electrically conductive along the thickness direction A.

[0113] S5: See Figures 13 to 15, a first circuit board 40 is disposed on the first homogeneous circuit layer 30 to obtain the circuit board assembly 100. The first circuit board 40 includes a first insulating layer 401, a first circuit layer 402, and a first conductor 403. The first insulating layer 401 is disposed between the first circuit layer 402 and the first homogeneous circuit layer 30. The first conductor 403 is embedded in the first insulating layer 401. One end of the first conductor 403 is connected to the first homogeneous circuit layer 30, and the other end is connected to the first circuit layer 402.

[0114] In this embodiment, step S5 specifically includes:

[0115] S51: Please refer to Figure 13 , a first outer substrate 41 is laminated on the first homogeneous circuit layer 30. The first outer substrate 41 includes the first insulating layer 401 and a first copper foil layer 404. The first insulating layer 401 is located between the first copper foil layer 404 and the first homogeneous circuit layer 30. Part of the first insulating layer 401 fills the wire grooves of the first homogeneous circuit layer 30.

[0116] In this embodiment, step S51 further includes:

[0117] S511: Please refer to Figure 13 , a second outer substrate 42 is laminated on the second homogeneous circuit layer 33. The second outer substrate 42 includes a second insulating layer 421 and a second copper foil layer 426. The second insulating layer 421 is located between the second copper foil layer 426 and the second homogeneous circuit layer 33. Part of the second insulating layer 421 fills the wire grooves of the second homogeneous circuit layer 33.

[0118] S52: Please refer to Figure 14 , two first slots 405 are formed in the first outer substrate 41. The first slots 405 penetrate through the first copper foil layer 404 and part of the first insulating layer 401. The first slots 405 are disposed corresponding to the first connection pads 301, and part of the first connection pads 301 are exposed at the bottoms of the first slots 405; electroplating is performed on the first slots 405 to form the first conductors 403, and the first conductors 403 are electrically connected between the first connection pads 301 and the first copper foil layer 404. Among them, by disposing the first connection pads 301 between the first copper foil layer 404 and the first anisotropic conductive layer 23, the depth of the first slots 405 is reduced, thereby reducing the aspect ratio of the first slots 405, which is beneficial to improving the precision of manufacturing the first slots 405.

[0119] In this embodiment, step S52 further includes:

[0120] S521: Please refer toFigure 14 Two second slits 425 are provided on the second outer substrate 42, and the second slits 425 penetrate through the second copper foil layer 426 and part of the second insulating layer 421. The second slits 425 are correspondingly arranged with respect to the second connection pads 331, and part of the second connection pads 331 are exposed at the bottom of the second slits 425; electroplating is performed on the second slits 425 to form the second conduction bodies 422, and the second conduction bodies 422 are electrically connected between the second connection pads 331 and the second copper foil layer 426. Wherein, by arranging the second connection pads 331 between the second copper foil layer 426 and the second anisotropic conductive layer 24, the depth of the second slits 425 is reduced, thereby reducing the aspect ratio of the second slits 425, which is beneficial to improving the precision of manufacturing the second slits 425.

[0121] S53: Please refer to Figure 15 Etch the first copper foil layer 404 to form the first circuit layer 402, and etch the second copper foil layer 426 to form the second circuit layer 423. Wherein, the first circuit layer 402 is connected to the first connection pad 301 through the first conduction body 403. The second circuit layer 423 is connected to the second connection pad 331 through the second conduction body 422. The second circuit layer 423, the second conduction bodies 422 and the second insulating layer 421 constitute the second circuit board 424.

[0122] Compared with the prior art, the manufacturing method of the circuit board assembly 100 provided by the present application sets anisotropic conductive layers (the first anisotropic conductive layer 23, the second anisotropic conductive layer 24) on the pins 122 of the electronic component 12, and then sets isotropic circuit layers (the first isotropic circuit layer 30, the second isotropic circuit layer 33) on the anisotropic conductive layers. The isotropic circuit layer can be used as the "pin with enlarged area" of the electronic component 12. Depending on the selective conductivity of the anisotropic conductive layer, the anisotropic conductive layer can respectively "enlarge" the connection area of the pins 122 in the thickness direction, thereby reducing the offset problem of subsequent build-up drilling. It not only does not increase the additional manufacturing cost and complexity, but also can improve the manufacturing yield of the circuit board assembly 100, reduce the scrap rate, and maintain or improve the overall performance and reliability of the product.

[0123] An embodiment of the present application further provides a circuit board assembly 100, including: an inner substrate 10, a first anisotropic conductive layer 23, a first isotropic circuit layer 30, and a first circuit board 40.

[0124] The inner substrate 10 includes an inner insulating layer 11 and an electronic component 12 embedded in the inner insulating layer 11. The pins 122 of the electronic component 12 are exposed on the inner insulating layer 11, and the inner insulating layer 11 has a thickness direction A.

[0125] The first anisotropic conductive layer 23 is disposed on one side of the inner insulating layer 11. The first anisotropic conductive layer 23 is electrically conductive along the thickness direction A and electrically insulated along a direction perpendicular to the thickness direction A. A part of the first anisotropic conductive layer 23 is connected to the lead 122 of the electronic component 12 along the thickness direction A.

[0126] The first isotropic circuit layer 30 is disposed on the first anisotropic conductive layer 23. Along the thickness direction A, the first isotropic circuit layer 30 is electrically conductive in any direction. A part of the first isotropic circuit layer 30 is connected to the first anisotropic conductive layer 23, and another part of the first isotropic circuit layer 30 is arranged offset from the first anisotropic conductive layer 23.

[0127] The first circuit board 40 is disposed on the first isotropic circuit layer 30. The first circuit board 40 includes a first insulating layer 401, a first circuit layer 402, and a first conductor 403. The first insulating layer 401 is disposed between the first circuit layer 402 and the first anisotropic conductive layer 23. The first conductor 403 is embedded in the first insulating layer 401. One end of the first conductor 403 is connected to at least another part of the first isotropic circuit layer 30 that is arranged offset from the first anisotropic conductive layer 23, and the other end is connected to the first circuit layer 402.

[0128] In this embodiment, the circuit board assembly 100 further includes: a second anisotropic conductive layer 24, a second isotropic circuit layer 33, and a second circuit board 424.

[0129] The second anisotropic conductive layer 24 is on the other side of the inner insulating layer 11. The second anisotropic conductive layer 24 is electrically conductive along the thickness direction A and electrically insulated along a direction perpendicular to the thickness direction A. A part of the second anisotropic conductive layer 24 is connected to the lead 122 of the electronic component 12 along the thickness direction A, and another part of the second anisotropic conductive layer 24 is arranged offset from the lead 122 of the electronic component 12 along the thickness direction A.

[0130] The second isotropic circuit layer 33 is disposed on the second anisotropic conductive layer 24. Along the thickness direction A, the second isotropic circuit layer 33 is electrically conductive in any direction. A part of the second isotropic circuit layer 33 is connected to the second anisotropic conductive layer 24, and another part of the second isotropic circuit layer 33 is arranged offset from the second anisotropic conductive layer 24.

[0131] The second circuit board 424 is disposed on the second isotropic circuit layer 33. The second circuit board 424 includes a second insulating layer 421, a second circuit layer 423, and a second conductor 422. The second insulating layer 421 is disposed between the second circuit layer 423 and the second anisotropic conductive layer 24. The second conductor 422 is embedded in the second insulating layer 421. One end of the second conductor 422 is connected to at least another part of the second isotropic circuit layer 33 that is offset from the second anisotropic conductive layer 24, and the other end is connected to the second circuit layer 423.

[0132] The above are only the embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A manufacturing method of a circuit board assembly, characterized in that, it includes the steps of: providing an inner substrate, the inner substrate includes an inner insulating layer and electronic components embedded in the inner insulating layer, pins of the electronic components are exposed from the inner insulating layer, and the inner insulating layer has a thickness direction; providing a first anisotropic conductive layer on one side of the inner insulating layer, the first anisotropic conductive layer is electrically conductive along the thickness direction, and along the thickness direction, the first anisotropic conductive layer is partially connected to the pins of the electronic components; providing a first isotropic circuit layer on the first anisotropic conductive layer, along the thickness direction, the first isotropic circuit layer is connected to the first anisotropic conductive layer; providing a first circuit board on the first isotropic circuit layer, the first circuit board includes a first insulating layer, a first circuit layer, and a first conductor, the first insulating layer is disposed between the first circuit layer and the first isotropic circuit layer, the first conductor is embedded in the first insulating layer, one end of the first conductor is connected to the first isotropic circuit layer, and the other end is connected to the first circuit layer.

2. The manufacturing method according to claim 1, characterized in that, the step of "providing a first isotropic circuit layer on the first anisotropic conductive layer" includes: providing a first isotropic conductive layer on the first anisotropic conductive layer; etching the first isotropic conductive layer to form the first isotropic circuit layer.

3. The manufacturing method according to claim 2, characterized in that, the step of "providing a first circuit board on the first isotropic circuit layer" includes: providing a first outer substrate on the first isotropic circuit layer, the first outer substrate includes the first insulating layer and a first copper foil layer, the first insulating layer is disposed between the first copper foil layer and the first isotropic circuit layer; providing a first slot on the first outer substrate, and part of the first isotropic circuit layer is exposed from the first slot; providing the first conductor in the first slot, one end of the first conductor is connected to the first isotropic circuit layer, and etching the first copper foil layer to form the first circuit layer, and the other end of the first conductor is connected to the first circuit layer.

4. The manufacturing method according to claim 1, characterized in that, the pins of the electronic components are exposed from opposite sides of the inner insulating layer, and the manufacturing method further includes the steps of: providing a second anisotropic conductive layer on the other side of the inner insulating layer, the second anisotropic conductive layer is electrically conductive along the thickness direction, and the second anisotropic conductive layer is connected to the pins of the electronic components along the thickness direction; providing a second isotropic circuit layer on the second anisotropic conductive layer, along the thickness direction, part of the second isotropic circuit layer is connected to the second anisotropic conductive layer; providing a second circuit board on the second isotropic circuit layer, the second circuit board includes a second insulating layer, a second circuit layer, and a second conductor, the second insulating layer is disposed between the second circuit layer and the second isotropic circuit layer, the second conductor is embedded in the second insulating layer, one end of the second conductor is connected to the second isotropic circuit layer, and the other end is connected to the second circuit layer.

5. The manufacturing method according to claim 4, characterized in that the step of "disposing a second homogeneous circuit layer on the second anisotropic conductive layer" includes: disposing a second homogeneous conductive layer on the second anisotropic conductive layer; etching the second homogeneous conductive layer to form the second homogeneous circuit layer.

6. The manufacturing method according to claim 5, characterized in that the step of "disposing a second circuit board on the second homogeneous circuit layer" includes: disposing a second outer substrate on the second homogeneous circuit layer, the second outer substrate including a second insulating layer and a second copper foil layer, the second insulating layer being disposed between the second copper foil layer and the second homogeneous circuit layer; forming a second slot on the second outer substrate, with a part of the second homogeneous circuit layer exposed in the second slot; disposing a second conductor in the second slot, one end of the second conductor being connected to the second homogeneous circuit layer, and etching the second copper foil layer to form the second circuit layer, the other end of the second conductor being connected to the second circuit layer.

7. The manufacturing method according to claim 1, characterized in that the inner substrate further includes a filling body, the inner insulating layer is provided with an opening, the electronic component is disposed in the opening, the filling body is disposed in the gap between the electronic component and the opening, and the manufacturing method of the inner substrate includes the steps of: providing the inner insulating layer; disposing a peelable layer on one side of the inner insulating layer; disposing a carrier layer on the side of the peelable layer away from the inner insulating layer, the carrier layer covering the opening; disposing the electronic component in the opening; disposing a filling layer on the other side of the inner insulating layer, with a part of the filling layer filling into the gap between the electronic component and the opening to form the filling body, and removing the filling layer, the peelable layer and the carrier layer to obtain the inner substrate.

8. A circuit board assembly, characterized in that it includes: an inner substrate, the inner substrate including an inner insulating layer and an electronic component embedded in the inner insulating layer, pins of the electronic component being exposed on the inner insulating layer, the inner insulating layer having a thickness direction; a first anisotropic conductive layer, the first anisotropic conductive layer being disposed on one side of the inner insulating layer, the first anisotropic conductive layer being electrically conductive along the thickness direction, the first anisotropic conductive layer being connected to the pins of the electronic component along the thickness direction; a first homogeneous circuit layer, the first homogeneous circuit layer being disposed on the first anisotropic conductive layer, along the thickness direction, the first homogeneous circuit layer being electrically conductive in any direction, the first homogeneous circuit layer being connected to the first anisotropic conductive layer, and a first circuit board, the first circuit board being disposed on the first homogeneous circuit layer, the first circuit board including a first insulating layer, a first circuit layer and a first conductor, the first insulating layer being disposed between the first circuit layer and the first anisotropic conductive layer, the first conductor being embedded in the first insulating layer, one end of the first conductor being connected to the first homogeneous circuit layer, and the other end being connected to the first circuit layer.

9. The circuit board assembly according to claim 8, characterized in that, further comprising: a second anisotropic conductive layer on the other side of the inner insulating layer, the second anisotropic conductive layer being electrically conductive along the thickness direction and electrically insulating along a direction perpendicular to the thickness direction, and the second anisotropic conductive layer connecting the pins of the electronic component along the thickness direction; a second isotropic circuit layer disposed on the second anisotropic conductive layer, the second isotropic circuit layer being electrically conductive in any direction along the thickness direction, and the second isotropic circuit layer connecting the second anisotropic conductive layer; a second circuit board disposed on the second isotropic circuit layer, the second circuit board including a second insulating layer, a second circuit layer, and a second conductor, the second insulating layer being disposed between the second circuit layer and the second anisotropic conductive layer, the second conductor being embedded in the second insulating layer, one end of the second conductor connecting the second isotropic circuit layer and the other end connecting the second circuit layer.

10. The circuit board assembly according to claim 9, characterized in that, both the first anisotropic conductive layer and the second anisotropic conductive layer are anisotropic conductive films, and both the first isotropic circuit layer and the second isotropic circuit layer are made of metal.

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