Light-emitting diode chip, chip set thereof and display module

Abstract

The invention provides a light-emitting diode chip, a chip set thereof and a display module, and relates to the technical field of semiconductors, the light-emitting diode chip comprises an N-type electrode, a P-type electrode and a light-emitting layer arranged between the N-type electrode and the P-type electrode, and the light-emitting layer is electrically connected with the N-type electrode and the P-type electrode; the light-emitting layer comprises N light-emitting materials, the light-emitting wavelengths of the N light-emitting materials are unequal, M sub-pixels are formed, in the M sub-pixels, the light-emitting wavelengths of at least part of the sub-pixels are unequal, M and N are positive integers larger than or equal to 3, and M is larger than or equal to N; and when the P-type electrode and the N-type electrode are electrified, the light-emitting mechanism of the N light-emitting materials is at least electroluminescent. According to the invention, the sizes of the light-emitting diode chips and the full-color chip set can be flexibly adjusted, and the transfer number and transfer difficulty in mass transfer are reduced, so that the problems of process, yield and cost represented by mass transfer in ultra-high-density pixel display products can be solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technologies, and in particular, to a light-emitting diode chip, a chipset thereof, and a display module. Background Art

[0002] In semiconductor lighting technologies, a light-emitting diode (LED), as a light-emitting device that converts electrical energy into light energy, has advantages such as energy conservation, environmental protection, long service life, and high luminous efficiency, and is widely used in many fields such as indication, display, decoration, and lighting.

[0003] When an LED is applied to the display field, ultra-high density display products mainly based on micro light-emitting diodes (micro LEDs) usually form a pixel unit with three independent single chips, that is, a pixel unit is composed of three single-core monochromatic single sub-pixels. The number of chips in the micro LED is extremely large and the chip size is small. In the manufacturing process of the micro LED, a mass transfer process needs to be used.

[0004] However, the above-mentioned manufacturing process of the micro LED has problems such as high process difficulty, low yield, and high cost. Summary of the Invention

[0005] The present application provides a light-emitting diode chip, a chipset thereof, and a display module, which can flexibly adjust the sizes of the light-emitting diode chip and the full-color chipset, reduce the transfer quantity and transfer difficulty in mass transfer, and thus can overcome problems such as processes, yield, and cost represented by mass transfer in ultra-high density pixel display products.

[0006] In a first aspect, the present application provides a light-emitting diode chip, including an N-type electrode, a P-type electrode, and a light-emitting layer disposed between the N-type electrode and the P-type electrode, and the light-emitting layer is electrically connected to the N-type electrode and the P-type electrode respectively;

[0007] The light-emitting layer includes N light-emitting materials, the emission wavelengths of the N light-emitting materials are not equal, and M sub-pixels are formed. Among the M sub-pixels, at least some of the sub-pixels have different emission wavelengths. Both M and N are positive integers greater than or equal to 3, and M is greater than or equal to N;

[0008] When the P-type electrode and the N-type electrode are energized, the light-emitting mechanisms of the N light-emitting materials are at least electroluminescence.

[0009] In a second aspect, the present application provides a light-emitting diode chipset, including a plurality of the above-mentioned light-emitting diode chips, and the plurality of light-emitting diode chips are arranged in an array.

[0010] In a third aspect, the present application provides a display module, including a driving backplane and the above-mentioned light-emitting diode chip group. The light-emitting diode chip group is disposed on the driving backplane and electrically connected to the driving backplane.

[0011] In the light-emitting diode chip, its chip group, and the display module provided by the present application, by placing the light-emitting layer between the N-type electrode and the P-type electrode and electrically conducting with both, electrons provided by the N-type electrode and holes provided by the P-type electrode are combined in the light-emitting layer to excite the light-emitting material in the light-emitting layer to emit light. The light-emitting layer includes N light-emitting materials, and the emission wavelengths of the N light-emitting materials are different, and M sub-pixels are formed. Among the M sub-pixels, at least some of the sub-pixels have different emission wavelengths. Both M and N are positive integers greater than or equal to 3, and M is greater than or equal to N. The present application adopts an arrangement method of single-core multi-color and multi-sub-pixels, that is, multiple sub-pixels are used to form a pixel sub-group, and a full-color pixel unit is formed by arranging the pixel sub-groups. In the present application, some or all of the sub-pixels in a single chip can form a complete full-color pixel unit, and the use of this chip is more convenient. Some of the sub-pixels in multiple chips can also be assembled into a complete full-color pixel unit, and the splicing method of this chip is relatively flexible, which can meet diverse display requirements. When the P-type electrode and the N-type electrode are energized, the light-emitting mechanism of the N light-emitting materials is at least electroluminescence. The present application can flexibly adjust the size of the light-emitting diode chip and the full-color chip group, reduce the difficulty of transfer operations in the mass transfer process, and can reduce the number of mass transfers, thereby overcoming problems such as process, yield, and cost represented by mass transfer in ultra-high density pixel display products.

[0012] The structure of the present application and its other invention purposes and beneficial effects will become more obvious and understandable through the description of the preferred embodiments in conjunction with the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0014] Figure 1 It is a top view of the first light-emitting diode chip provided by the embodiment of the present application;

[0015] Figure 2 It is a cross-sectional view of the first light-emitting diode chip provided by the embodiment of the present application;

[0016] Figure 3 It is a top view of the second light-emitting diode chip provided by the embodiment of the present application;

[0017] Figure 4 It is a cross-sectional view of the second light-emitting diode chip provided by the embodiment of the present application;

[0018] Figure 5 It is a top view of the third light-emitting diode chip provided by the embodiment of the present application;

[0019] Figure 6 It is a cross-sectional view of the third light-emitting diode chip provided by the embodiment of the present application;

[0020] Figure 7 It is a cross-sectional view of the fourth light-emitting diode chip provided by the embodiment of the present application;

[0021] Figure 8 It is a cross-sectional view of the fifth light-emitting diode chip provided by the embodiment of the present application;

[0022] Figure 9 It is a cross-sectional view of the sixth light-emitting diode chip provided by the embodiment of the present application;

[0023] Figure 10 It is a cross-sectional view of the seventh light-emitting diode chip provided by the embodiment of the present application;

[0024] Figure 11 It is a cross-sectional view of the eighth light-emitting diode chip provided by the embodiment of the present application;

[0025] Figure 12 It is a cross-sectional view of the ninth light-emitting diode chip provided by the embodiment of the present application;

[0026] Figure 13 It is a cross-sectional view of the tenth light-emitting diode chip provided by the embodiment of the present application;

[0027] Figure 14 It is a cross-sectional view of the eleventh light-emitting diode chip provided by the embodiment of the present application;

[0028] Figure 15 It is a cross-sectional view of the twelfth light-emitting diode chip provided by the embodiment of the present application;

[0029] Figure 16 It is a cross-sectional view of the thirteenth light-emitting diode chip provided by the embodiment of the present application;

[0030] Figure 17 It is a cross-sectional view of the fourteenth light-emitting diode chip provided by the embodiment of the present application;

[0031] Figure 18 It is a cross-sectional view of the fifteenth light-emitting diode chip provided by the embodiment of the present application;

[0032] Figure 19Cross-sectional view of the sixteenth light-emitting diode chip provided by the embodiment of the present application;

[0033] Figure 20 Cross-sectional view of the seventeenth light-emitting diode chip provided by the embodiment of the present application;

[0034] Figure 21 Cross-sectional view of the eighteenth light-emitting diode chip provided by the embodiment of the present application;

[0035] Figure 22 Cross-sectional view of the eighteenth light-emitting diode chip provided by the embodiment of the present application;

[0036] Figure 23 Cross-sectional view of the nineteenth light-emitting diode chip provided by the embodiment of the present application;

[0037] Figure 24 Cross-sectional view of the twentieth light-emitting diode chip provided by the embodiment of the present application;

[0038] Figure 25 Cross-sectional view of the twenty-first light-emitting diode chip provided by the embodiment of the present application;

[0039] Figure 26 Cross-sectional view of the twenty-second light-emitting diode chip provided by the embodiment of the present application;

[0040] Figure 27 Cross-sectional view of the twenty-third light-emitting diode chip provided by the embodiment of the present application;

[0041] Figure 28 Cross-sectional view of the twenty-fourth light-emitting diode chip provided by the embodiment of the present application;

[0042] Figure 29 Cross-sectional view of the twenty-fifth light-emitting diode chip provided by the embodiment of the present application;

[0043] Figure 30 Cross-sectional view of the twenty-sixth light-emitting diode chip provided by the embodiment of the present application;

[0044] Figure 31 Cross-sectional view of the twenty-seventh light-emitting diode chip provided by the embodiment of the present application;

[0045] Figure 32 Cross-sectional view of the twenty-eighth light-emitting diode chip provided by the embodiment of the present application;

[0046] Figure 33 Cross-sectional view of the twenty-ninth light-emitting diode chip provided by the embodiment of the present application;

[0047] Figure 34Cross-sectional view of the 30th light-emitting diode chip provided by the embodiment of the present application;

[0048] Figure 35 Cross-sectional view of the 31st light-emitting diode chip provided by the embodiment of the present application;

[0049] Figure 36 Cross-sectional view of the 32nd light-emitting diode chip provided by the embodiment of the present application;

[0050] Figure 37 Cross-sectional view of the 33rd light-emitting diode chip provided by the embodiment of the present application;

[0051] Figure 38 Cross-sectional view of the 34th light-emitting diode chip provided by the embodiment of the present application;

[0052] Figure 39 Cross-sectional view of the 35th light-emitting diode chip provided by the embodiment of the present application;

[0053] Figure 40 Cross-sectional view of the 36th light-emitting diode chip provided by the embodiment of the present application;

[0054] Figure 41 Cross-sectional view of the 37th light-emitting diode chip provided by the embodiment of the present application;

[0055] Figure 42 Schematic structural diagram of a structure in which a partial number of quantum pixels of a light-emitting diode chip provided by the embodiment of the present application share an N-type electrode;

[0056] Figure 43 Schematic structural diagram of a structure in which a partial number of quantum pixels of a light-emitting diode chip provided by the embodiment of the present application share a P-type electrode;

[0057] Figure 44 Top view of the first light-emitting diode chip provided by the embodiment of the present application;

[0058] Figure 45 Top view of the second light-emitting diode chip provided by the embodiment of the present application;

[0059] Figure 46 Top view of the third light-emitting diode chip provided by the embodiment of the present application;

[0060] Figure 47 Top view of the fourth light-emitting diode chip provided by the embodiment of the present application;

[0061] Figure 48 Top view of the fifth light-emitting diode chip provided by the embodiment of the present application;

[0062] Figure 49Top view of the sixth light-emitting diode chip provided by the embodiments of the present application;

[0063] Figure 50 Top view of the seventh light-emitting diode chip provided by the embodiments of the present application;

[0064] Figure 51 Top view of the eighth light-emitting diode chip provided by the embodiments of the present application;

[0065] Figure 52 Top view of the ninth light-emitting diode chip provided by the embodiments of the present application;

[0066] Figure 53 Top view of the tenth light-emitting diode chip provided by the embodiments of the present application;

[0067] Figure 54 Top view of the eleventh light-emitting diode chip provided by the embodiments of the present application;

[0068] Figure 55 Top view of the twelfth light-emitting diode chip provided by the embodiments of the present application;

[0069] Figure 56 Top view of the thirteenth light-emitting diode chip provided by the embodiments of the present application;

[0070] Figure 57 Top view of the fourteenth light-emitting diode chip provided by the embodiments of the present application;

[0071] Figure 58 Schematic diagram of the first integrated structure of the light-emitting diode chip provided by the embodiments of the present application;

[0072] Figure 59 Schematic diagram of the second integrated structure of the light-emitting diode chip provided by the embodiments of the present application;

[0073] Figure 60 Schematic diagram of the third integrated structure of the light-emitting diode chip provided by the embodiments of the present application;

[0074] Figure 61 Schematic diagram of the fourth integrated structure of the light-emitting diode chip provided by the embodiments of the present application;

[0075] Figure 62 Flow chart of the first manufacturing method of the light-emitting diode chip provided by the embodiments of the present application;

[0076] Figure 63 Flow chart of the second manufacturing method of the light-emitting diode chip provided by the embodiments of the present application;

[0077] Figure 64Schematic flowchart of the third method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0078] Figure 65 Schematic flowchart of the fourth method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0079] Figure 66 Schematic flowchart of the fifth method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0080] Figure 67 Schematic flowchart of the sixth method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0081] Figure 68 Schematic flowchart of the seventh method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0082] Figure 69 Schematic flowchart of the eighth method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0083] Figure 70 Schematic flowchart of the ninth method for manufacturing a light-emitting diode chip provided by an embodiment of the present application;

[0084] Figure 71 Dimension diagram of a light-emitting diode chip group provided by an embodiment of the present application;

[0085] Figure 72 Top view of the first light-emitting diode chip group provided by an embodiment of the present application;

[0086] Figure 73 Top view of the second light-emitting diode chip group provided by an embodiment of the present application;

[0087] Figure 74 Top view of the third light-emitting diode chip group provided by an embodiment of the present application;

[0088] Figure 75 Top view of the fourth light-emitting diode chip group provided by an embodiment of the present application;

[0089] Figure 76 Top view of the fifth light-emitting diode chip group provided by an embodiment of the present application;

[0090] Figure 77 Top view of the sixth light-emitting diode chip group provided by an embodiment of the present application;

[0091] Figure 78 Top view of the seventh light-emitting diode chip group provided by an embodiment of the present application;

[0092] Figure 79 The top view of the eighth light-emitting diode chip set provided by the embodiment of the present application;

[0093] Figure 80 The top view of the ninth light-emitting diode chip set provided by the embodiment of the present application;

[0094] Figure 81 The top view of the tenth light-emitting diode chip set provided by the embodiment of the present application;

[0095] Figure 82 The top view of the eleventh light-emitting diode chip set provided by the embodiment of the present application;

[0096] Figure 83 The top view of the twelfth light-emitting diode chip set provided by the embodiment of the present application;

[0097] Figure 84 The first structural schematic diagram of the display module provided by the embodiment of the present application;

[0098] Figure 85 The second structural schematic diagram of the display module provided by the embodiment of the present application.

[0099] Explanation of reference numerals:

[0100] 100, substrate; 101, buffer layer; 102, N-type electrode; 103, N-type semiconductor layer; 104, P-type electrode; 105, P-type semiconductor layer; 106, current spreading layer; 107, reflective layer; 108, first insulating layer; 109, second insulating layer; 110, bonding substrate; 111, bonding layer; 112, color conversion layer; 113, light-emitting layer; 113-1, first light-emitting material; 113-2-second light-emitting material; 113-3-third light-emitting material; 113-n-1-(n-1)th light-emitting material; 113-n- nth light-emitting material; 114, isolation structure; 114a-isolation material; 115, hole blocking layer; 116, light-blocking layer; 117a, first light-filtering layer; 117b, second light-filtering layer; 117c, third light-filtering layer; 118, protective layer; 200, driving backplane; 201, driving substrate; 202, driving unit. Detailed implementation manners

[0101] In LED display products, three single-core monochrome single-sub-pixel chips are usually used to form a pixel unit. The size of a single chip in ultra-high-density display products represented by micro LED is relatively small, and the number of chips that make up the display product is relatively large. In the manufacturing process of display products, micro LED chips need to be grown on wafers, and then transferred to a specific substrate through mass transfer technology to complete the binding assembly. In the mass transfer process, due to the small size and large number of chips, the transfer operation is difficult, the number of operations is numerous, and the operation alignment requirements on the substrate are high. As a result, the manufacturing process of micro LED display products is difficult, the yield is low, the production cycle is long, and the cost is high.

[0102] In related technologies, in LED display products, several chips are packaged together through the MIP (Micro LED in Package) packaging process to form an integrated chipset that can emit multiple wavelengths. The traditional MIP packaging process is suitable for LED display products with pixel sizes greater than 0.3 mm. Due to the limitations of existing mass transfer technology capabilities, the MIP packaging process requires that the single-core monochrome single-sub-pixel chip used must be larger, that is, the sub-pixel size is larger. A single chipset is usually an RGB pixel unit, and there are a large number of chips and chipsets used on the application side.

[0103] The light-emitting diode chip and its chipset and display module provided by the present application are arranged between the N-type electrode and the P-type electrode, and are electrically conductive with the two, so that the electrons provided by the N-type electrode and the holes provided by the P-type electrode are combined in the light-emitting layer and excite the light-emitting material in the light-emitting layer to emit light. The light-emitting layer includes N light-emitting materials, the light-emitting wavelengths of the N light-emitting materials are different, and M sub-pixels are formed. Among the M sub-pixels, the light-emitting wavelengths of at least some of the sub-pixels are different, M and N are positive integers greater than or equal to 3, and M is greater than or equal to N. The present application adopts a single-core dual-color multi-sub-pixel arrangement, that is, a plurality of sub-pixels are used to form a pixel sub-group, and an RGB full-color pixel unit is formed by the arrangement of the pixel sub-group, thereby forming an RGB full-color chipset. In the present application, some or all of the sub-pixels in a single chip can form a complete full-color pixel unit, and the use of the chip is more convenient. Some of the sub-pixels in multiple chips can also be assembled into a complete full-color pixel unit. The splicing method of the chip is more flexible and can meet diverse display needs.

[0104] When the P-type electrode and the N-type electrode are powered on, the light-emitting mechanism of the N light-emitting materials is at least electroluminescence. The present application can flexibly adjust the sizes of the light-emitting diode chips and the chip set, reduce the difficulty of the transfer operation in the mass transfer process technology, and can reduce the number of mass transfers, thereby overcoming problems such as the process, yield, and cost represented by mass transfer in ultra-high density pixel display products.

[0105] Compared with the integrated chip set that emits multiple wavelengths formed by integrating several chips in the related art, the related art needs to overcome the process difficulties of integrating multiple chips. Therefore, the process difficulty is relatively large, the yield is relatively low, and the cost is relatively high. The present application directly obtains multi-color multi-sub-pixels in a single light-emitting diode chip, the process is simpler, the technical difficulty is smaller, and the cost is lower.

[0106] Furthermore, by using the light-emitting diode chip or the light-emitting diode chip set with a single core and multi-color multi-sub-pixels of the present application, under the condition of the same light-emitting area and the same pixel density (Pixels Per Inch, abbreviated as PPI), it is possible to flexibly adjust the size of the light-emitting diode chip while ensuring that the sub-pixel size is relatively small, and at the same time, the number of light-emitting diode chips is greatly reduced, thereby being able to overcome problems such as relatively large preparation process difficulty, relatively low product yield, and relatively high preparation cost, which helps to promote the mass production of mini LED and micro LED as soon as possible.

[0107] The single-core multi-color multi-sub-pixel chip in the present application includes n full-color pixel units, where n is a positive integer greater than or equal to 1. The single-core multi-color multi-sub-pixel chip can be directly combined with the backplane, and a single chip can achieve the effect of n MIP packages. When the light-emitting diode chips with a single core and multi-color multi-sub-pixels of the present application are used to form a full-color integrated chip set (taking the combination of three 3*n chips to form a chip set as an example), n*3 pixel units can be obtained. When combined with the backplane, the chip set used is 1 / 3n of the traditional MIP package, which greatly reduces the preparation time, reduces the process and raw material costs, and at the same time greatly improves the yield. Furthermore, the pixel size applicable to the full-color integrated package of the present application can be flexibly adjusted and can be much smaller than the pixel size applicable to the traditional MIP process.

[0108] To make the objectives, technical solutions, and advantages of this application clearer, the following will describe in more detail the technical solutions in the embodiments of this application with reference to the accompanying drawings in the preferred embodiments of this application. In the drawings, the same or similar reference numerals represent the same or similar components or components with the same or similar functions from beginning to end. The described embodiments are some, but not all, of the embodiments of this application. The embodiments described below by referring to the drawings are exemplary and are intended to explain this application and should not be construed as a limitation to this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts fall within the scope of protection of this application. The following will explain in detail the embodiments of this application with reference to the accompanying drawings.

[0109] In this application, some terms can be understood as the following meaning explanations:

[0110] Sub pixel (abbreviated as SP): A single blue light pixel, or a single green light pixel, or a single red light pixel is called a sub pixel. In this patent, a sub pixel can also be a single arbitrary wavelength.

[0111] Pixel subgroup (abbreviated as PSG): A combination formed by multiple sub pixels.

[0112] Pixel unit (abbreviated as PU): A unit including three primary colors of blue light sub pixels, green light sub pixels, and red light sub pixels, or including other three or more different colors of sub pixels that can form white light.

[0113] Single-core single-color single-sub pixel chip: A single light-emitting diode chip can only emit light of 1 wavelength and only contains one sub pixel, such as 1 blue light sub pixel, or 1 green light sub pixel, or 1 red light sub pixel.

[0114] Single-core single-color multi-sub pixel chip: A single chip can only emit light of 1 wavelength, but contains two or more sub pixels, such as 2 red light sub pixels, 3 red light sub pixels, or more red light sub pixels.

[0115] Single-core multi-color multi-sub pixel chip: A single chip can emit multiple different wavelengths of light and contains three or more sub pixels, such as 1 red light sub pixel + 1 green light sub pixel + 1 blue light sub pixel, 1 red light sub pixel + 2 green light sub pixels + 3 blue light sub pixels, multiple blue light sub pixels + multiple red light sub pixels + multiple blue light sub pixels.

[0116] Light-emitting diode chip (abbreviated as C): A solid-state semiconductor device with a light-emitting layer between a P-type electrode and an N-type electrode. It is abbreviated as "chip" in the following text.

[0117] Light-emitting diode chip group (Chip group, abbreviated as CG): Composed of two or more single-core multi-(single)-color multi-subpixel chips, including one or more pixel units.

[0118] Microdisplay module (Display mini block, abbreviated as DMB): A display device formed by electrically connecting a light-emitting diode chip group and a driving backplane.

[0119] In a first aspect, an embodiment of the present application provides a light-emitting diode chip. Referring to Figures 1 to 40 As shown, the light-emitting diode chip includes an N-type electrode, a P-type electrode, and a light-emitting layer disposed between the N-type electrode and the P-type electrode; the light-emitting layer is electrically conductive with the N-type electrode and the P-type electrode respectively. The light-emitting layer includes N light-emitting materials, and the emission wavelengths of the N light-emitting materials are not equal, and M subpixels are formed. Among the M subpixels, at least some of the subpixels have different emission wavelengths. Both M and N are positive integers greater than or equal to 3, and M is greater than or equal to N. When the P-type electrode and the N-type electrode are energized, the emission mechanism of the N light-emitting materials is at least electroluminescence.

[0120] It should be noted that in the energized state, an electric field is formed between the N-type electrode and the P-type electrode, and the light-emitting layer is disposed between the N-type electrode and the P-type electrode, which can be understood as the light-emitting layer being located in this electric field. In the thickness direction of the chip, all or part of the thickness of the light-emitting layer is located between the N-type electrode and the P-type electrode. The light-emitting layer is electrically conductive with the N-type electrode and the P-type electrode respectively, which means that the light-emitting layer is electrically conductive with the N-type electrode through the N-type semiconductor layer and electrically conductive with the P-type electrode through the P-type semiconductor layer.

[0121] The light-emitting layer includes N light-emitting materials, and N is a positive integer greater than or equal to 3. In the subsequent text, multiple light-emitting materials and N light-emitting materials have the same meaning. Exemplarily, on the basis of satisfying that the N light-emitting materials are not equal, the N light-emitting materials may include a first light-emitting material that emits blue light, a second light-emitting material that emits green light, a third light-emitting material that emits red light, an (n - 1)th light-emitting material that emits purple light, and an nth light-emitting material that emits light of a color other than the above-mentioned light wavelengths. In other embodiments, the emission wavelengths of the above light-emitting materials can also be adjusted, and the present application does not limit this. Among them, n is a positive integer greater than or equal to 1 and less than or equal to N.

[0122] Multiple light-emitting materials form M subpixels, and M is also a positive integer greater than or equal to 3, and M is greater than or equal to N. Referring to Figure 1, the chip includes a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3... an m-th sub-pixel SPm, where m is a positive integer greater than or equal to 1 and less than or equal to M. Exemplarily, the first light-emitting material corresponds to the first sub-pixel SP1, and the first sub-pixel SP1 is a blue photon sub-pixel. The second light-emitting material corresponds to the second sub-pixel SP2, and the second sub-pixel SP2 is a green photon sub-pixel. The third light-emitting material corresponds to the third sub-pixel SP3, and the third sub-pixel SP3 is a red photon sub-pixel. The M sub-pixels can be arranged side by side. The side-by-side arrangement can refer to an arrangement along a direction perpendicular to the thickness of the chip and can be located at the same thickness position of the chip; or it can refer to being on the same layer of the chip with a dislocation in the thickness direction of the chip.

[0123] Taking a single-core three-color three-sub-pixel as an example, the chip can include a first sub-pixel, a second sub-pixel, and a third sub-pixel with different emission colors. The first sub-pixel, the second sub-pixel, and the third sub-pixel are any three of various color photon sub-pixels such as red photon sub-pixels, green photon sub-pixels, blue photon sub-pixels, purple photon sub-pixels, and ultraviolet photon sub-pixels.

[0124] M being greater than or equal to N means that at least one light-emitting material corresponds to at least one sub-pixel. M can be equal to N, that is, one light-emitting material corresponds to form one sub-pixel; M can also be greater than N, that is, one light-emitting material can form 2 or more sub-pixels with equal emission wavelengths. For example, M is equal to 4 and N is equal to 3. The chip is a single-core three-color four-sub-pixel. These 3 light-emitting materials can be a first light-emitting material that emits blue light, a second light-emitting material that emits green light, and a third light-emitting material that emits red light respectively. These 4 sub-pixels can be blue photon sub-pixels, blue photon sub-pixels, green photon sub-pixels, red photon sub-pixels, or blue photon sub-pixels, green photon sub-pixels, green photon sub-pixels, red photon sub-pixels, or blue photon sub-pixels, green photon sub-pixels, red photon sub-pixels, red photon sub-pixels.

[0125] In this application, by forming a light-emitting diode chip with multiple sub-pixels having unequal emission wavelengths, that is, adopting an arrangement of single-core multi-color multi-sub-pixels, compared with the related art of using a single sub-pixel to form a chip, this application can flexibly adjust the size of the light-emitting diode chip, reduce the transfer difficulty and alignment difficulty in the mass transfer operation. And it can effectively reduce the number of light-emitting diode chips required for a display product with the same emission area and the same pixel density, thereby reducing the complexity of the mass transfer operation and reducing the manufacturing cost. In this way, the yield of products with ultra-high density pixel display can also be improved.

[0126] In the chip of the present application, when the P-type electrode and the N-type electrode are energized, the light-emitting mechanism of the N light-emitting materials is electro-luminescence (EL for short). During the operation of the chip, after the N-type electrode is energized, electrons can be provided, and after the P-type electrode is energized, holes can be provided. The holes and electrons can migrate to the positions corresponding to the respective light-emitting materials, and after the holes and electrons recombine, light of the wavelength corresponding to the light-emitting material can be emitted.

[0127] Referring to Figures 7 to 10 、 Figure 14 、 Figures 20 to 23 、 Figures 27 to 40 As shown, the chip of the present application further includes a reflective layer, and the reflective layer is located on the backlight side of the light-emitting diode chip. The reflective layer of the present application is arranged on the backlight side, which can ensure that the light is emitted from the light-emitting side. The reflective layer is located on the side of the N-type electrode facing away from the P-type electrode, and the side of the P-type electrode facing away from the N-type electrode forms the light-emitting side of the light-emitting diode chip, or the reflective layer is located on the side of the P-type electrode facing away from the N-type electrode, and the side of the N-type electrode facing away from the P-type electrode forms the light-emitting side of the light-emitting diode chip. The reflective layer can be a metal layer or a Bragg reflective layer.

[0128] In the chip of the present application, the driving methods of multiple sub-pixels of the chip can be independent driving and synchronous driving.

[0129] Referring to Figure 1 and Figure 2 As shown, the first sub-pixel, the second sub-pixel, the third sub-pixel... the mth sub-pixel share the N-type electrode and the P-type electrode. When the N-type electrode and the P-type electrode are energized, each sub-pixel can emit light synchronously, and the driving mode is synchronous driving.

[0130] Referring to Figure 3 and Figure 4 As shown, the P-type electrode includes M sub-P-type electrodes that are separated from each other. The sides of the M sub-pixels close to the N-type electrode are electrically connected to the N-type electrode, and the sides of the M sub-pixels close to the P-type electrode are electrically connected to the M sub-P-type electrodes in a one-to-one correspondence.

[0131] It should be noted that Figure 3 and Figure 4 As shown, the P-type electrode includes the first sub-P-type electrode, the second sub-P-type electrode, the third sub-P-type electrode... the mth sub-P-type electrode, which are electrically connected to the first sub-pixel, the second sub-pixel, the third sub-pixel... the mth sub-pixel respectively in a one-to-one correspondence. Each sub-P-type electrode can be independently controlled for the energized state, so that the corresponding sub-pixels can emit light separately, and the driving mode is independent driving.

[0132] Referring to Figure 5 and Figure 6As shown, the N-type electrode includes M sub-N-type electrodes that are discrete from each other. One side of the M sub-pixels close to the P-type electrode is electrically connected to the P-type electrode, and one side of the M sub-pixels close to the N-type electrode is electrically connected to the M sub-N-type electrodes in one-to-one correspondence.

[0133] It should be noted that Figure 5 and Figure 6 show that the N-type electrode includes a first sub-N-type electrode, a second sub-N-type electrode, a third sub-N-type electrode... an mth sub-N-type electrode, which are electrically connected to the first sub-pixel, the second sub-pixel, the third sub-pixel... the mth sub-pixel in one-to-one correspondence respectively. Each sub-N-type electrode can independently control the energized state, so the corresponding sub-pixels can emit light separately, and the driving mode is independent driving.

[0134] Referring to Figures 4 to 6 、 Figures 8 to 14 、 Figures 16 to 19 、 Figures 21 to 23 、 Figure 25 、 Figure 26 、 Figures 28 to 30 、 Figures 33 to 37 、 Figure 39 and Figure 40 As shown, the chip of the present application further includes an isolation structure, and the isolation structure is located between any two adjacent sub-pixels. In the present application, the isolation structure may only include a channel (Channel, abbreviated as CN), that is, the channel may not be filled with an isolation material. The channel can spatially isolate the structures to be isolated. Combining Figure 11 and Figure 12 As shown, the channel CN is filled with an electrically insulating isolation material (referring to Figure 13 and 14 As shown), such as silicon nitride or silicon oxide, etc.

[0135] In some embodiments, the electrically insulating isolation material may also have a light-shielding effect, such as a black organic material, etc. In this way, the mixing of light between adjacent sub-pixels can be reduced or avoided, and the light-emitting effect of the light-emitting diode chip can be improved. In other embodiments, the isolation structure may still be an ion implantation layer, a structure with an electrical isolation effect and a light-blocking effect formed by an ion implantation process. In the following embodiments, the isolation structure is the same as this, and will not be described in detail later.

[0136] Exemplarily, referring to Figure 11 As shown, when the P-type electrode includes M sub-P-type electrodes that are discrete from each other, the isolation structure may also be located between adjacent sub-P-type electrodes. Referring to Figure 12 When the N-type electrode includes M sub-N-type electrodes that are discrete from each other, the isolation structure may also be located between adjacent sub-N-type electrodes.

[0137] Exemplarily, referring to Figure 14As shown, when multiple reflective layers are respectively located on the side of multiple discrete sub-N-type electrodes facing away from the P-type electrode one by one, the isolation structure can also be located between adjacent reflective layers.

[0138] Referring to Figures 1 - 14 As shown, in some possible embodiments, in the chip of the present application, N light-emitting materials are arranged side by side between the N-type electrode and the P-type electrode. Each light-emitting material is electrically connected to the N-type electrode and electrically connected to the P-type electrode; multiple side-by-side arranged light-emitting materials respectively correspond to multiple sub-pixels.

[0139] Among them, the multiple light-emitting materials are respectively the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material. All the light-emitting materials are arranged side by side, and along the thickness direction of the chip, there is no stacked part of all the light-emitting materials. The first light-emitting material correspondingly forms the first sub-pixel, the second light-emitting material correspondingly forms the second sub-pixel, the third light-emitting material correspondingly forms the third sub-pixel... the nth light-emitting material correspondingly forms the mth sub-pixel. In some possible examples, the same light-emitting material can correspondingly form multiple sub-pixels. For example, the first light-emitting material can form two sub-pixels with equal emission wavelengths.

[0140] When the above chip works, holes and electrons can combine in the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material to realize the electroluminescence of the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material. Among them, the above multiple light-emitting materials are all electroluminescent, that is, the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material are all electroluminescent.

[0141] Referring to Figure 1 and 2 As shown, the driving method of multiple sub-pixels of the chip is synchronous driving. Referring to Figure 3 and 4 As shown, the P-type electrode includes a first sub-P-type electrode, a second sub-P-type electrode, a third sub-P-type electrode... an mth sub-P-type electrode, and the driving method of multiple sub-pixels of the chip is independent driving. Referring to Figure 5 and 6 As shown, the N-type electrode includes a first sub-N-type electrode, a second sub-N-type electrode, a third sub-N-type electrode... an mth sub-N-type electrode, and the driving method of multiple sub-pixels of the chip is independent driving.

[0142] In the chip of this embodiment, an isolation structure can be provided between each sub-pixel, and the isolation structure can be between adjacent light-emitting materials. When the P-type electrode of the chip includes a plurality of discrete P-type electrodes, the isolation structure can be located between the sub-P-type electrodes corresponding to each sub-pixel. When the N-type electrode of the chip includes a plurality of discrete N-type electrodes, the isolation structure can be located between the sub-N-type electrodes corresponding to each sub-pixel. The isolation structure can also be located between the reflective layers corresponding to each sub-pixel.

[0143] In the above chip, a reflective layer can also be included. As Figure 10 shown, the reflective layer can be located on the side of the P-type electrode facing away from the N-type electrode, such that the side of the N-type electrode facing away from the P-type electrode forms the light-emitting side. Or, as Figures 7 to 9 shown, the reflective layer can be located on the side of the N-type electrode facing away from the P-type electrode, such that the side of the N-type electrode facing away from the P-type electrode forms the light-emitting side.

[0144] In some other possible embodiments, referring to Figures 15 to 41 , in the chip of the present application, along the thickness direction of the light-emitting diode chip, at least one of the N light-emitting materials is stacked with the remaining light-emitting materials. Among the several stacked light-emitting materials, at least one light-emitting material is located on the side of the remaining light-emitting materials close to the N-type electrode. At least one light-emitting material is located on the side of the remaining light-emitting materials close to the N-type electrode. In this way, at least part of the light-emitting materials are stacked, enriching the structural form of the chip, and the side of the light-emitting material facing the N-type electrode is electrically connected to the N-type electrode, such that the electrons provided by the N-type electrode can migrate to this light-emitting material and then migrate to the remaining light-emitting materials through this light-emitting material.

[0145] As a possible implementation manner of the present application, referring to Figures 15 to 23 , the light-emitting material closest to the N-type electrode includes a first region and a second region arranged in parallel. The side of the first region and the second region close to the N-type electrode is electrically connected to the N-type electrode. The side of the first region facing the P-type electrode corresponds to the remaining light-emitting materials arranged in parallel; the sides of the second region and the remaining light-emitting materials facing the P-type electrode are both electrically connected to the P-type electrode, and the second region and the remaining light-emitting materials respectively correspond to a plurality of sub-pixels.

[0146] It can be understood that the luminescent material closest to the N-type electrode can be the nth luminescent material, and the remaining luminescent materials can be the first luminescent material, the second luminescent material, the third luminescent material... the (n - 1)th luminescent material. The first region and the second region of the nth luminescent material are arranged side by side along the thickness direction of the chip. On the side of the first region of the nth luminescent material facing the P-type electrode, the remaining luminescent materials are arranged in parallel, and the second region of the nth luminescent material is exposed outside the remaining luminescent materials. The side of the nth luminescent material facing the N-type electrode is electrically connected to the N-type electrode, and a partial region of the side of the nth luminescent material facing the P-type electrode is electrically connected to the P-type electrode. All regions of the sides of the first luminescent material to the (n - 1)th luminescent material facing the P-type electrode are electrically connected to the P-type electrode.

[0147] The second region of the luminescent material closest to the N-type electrode and the remaining luminescent materials respectively correspond to multiple sub-pixels. For example, the first luminescent material corresponds to the first sub-pixel, the second luminescent material corresponds to the second sub-pixel, and the second region of the nth luminescent material corresponds to the mth sub-pixel. The same luminescent material can correspond to form multiple sub-pixels. For example: the first luminescent material corresponds to two sub-pixels with equal emission wavelengths.

[0148] Refer to Figures 20 to 23 As shown, in the above chip, a reflective layer can also be included. As Figures 20 to 22 shown, the reflective layer can be located on the side of the N-type electrode facing away from the P-type electrode, so that the side of the P-type electrode facing away from the N-type electrode forms the light-emitting side. Or, as Figure 23 shown, the reflective layer can be located on the side of the P-type electrode facing away from the N-type electrode, so that the side of the N-type electrode facing away from the P-type electrode forms the light-emitting side.

[0149] Refer to Figure 19 and Figure 20 shown, the above chip can also include a filter layer, and the filter layer is disposed on the light-emitting side. The filter layer can include the first filter layer CF1, the second filter layer CF2, the third filter layer CF3... the (n - 1)th filter layer CFn - 1. The first filter layer CF1 corresponds to the first sub-pixel of the first luminescent material, the second filter layer CF2 corresponds to the second sub-pixel of the second luminescent material, the third filter layer CF3 corresponds to the third sub-pixel formed by the third luminescent material... the (n - 1)th filter layer CFn - 1 corresponds to the (m - 1)th sub-pixel formed by the (n - 1)th luminescent material.

[0150] It should be noted that when the chip includes a filter layer, the emission wavelengths of the multiple light-emitting materials are not limited in the thickness direction of the chip. The holes provided by the P-type electrode can migrate to each light-emitting material, that is, the holes provided by the P-type electrode can migrate to the light-emitting material closest to the N-type electrode. In some possible implementation manners, the thicknesses of the multiple light-emitting materials are relatively thin, such that the sum of the thicknesses of the multiple light-emitting materials is less than the hole diffusion length. The stacked portions of the light-emitting materials can generate multiple wavelengths of light, and the corresponding filter layer is used for filtering, such that each sub-pixel emits light of only one wavelength. For example, the stacked portion of the first light-emitting material and the nth light-emitting material can generate light of the first wavelength and the nth wavelength, and the first sub-pixel emits light of the first wavelength through the first filter layer CF1.

[0151] It can be understood that when the light-emitting material in the stacked structure emits light, the light will exit from each surface of the light-emitting material layer, thereby exciting the light-emitting material with a larger wavelength to emit photoluminescence. Therefore, except for the light-emitting material with the smallest wavelength, the other light-emitting materials have two light-emitting mechanisms: electroluminescence and photoluminescence.

[0152] As Figure 20 and Figure 21 shown, the sides of two adjacent filter layers among the multiple filter layers can be in contact with each other or isolated from each other. The filter layer can be a color filter, or can also be a Bragg reflector (or, distributed Bragg reflector, abbreviated as DBR). Both the color filter and the Bragg reflector can perform wavelength filtering on the passing light, thereby emitting light with different wavelengths. The Bragg reflector can be formed by alternately stacking two materials such as aluminum nitride and gallium nitride, or titanium oxide and silicon oxide, or silicon oxide and silicon nitride. Optionally, the thickness of the Bragg reflector is 2 - 6 micrometers. In other embodiments, this thickness value can be adjusted as needed, and the present application does not limit it.

[0153] In the above chip, referring to Figures 17 to 20 、 Figures 21 to 23 , an isolation structure can be provided between each sub-pixel. The isolation structure can be located between the first region and the second region, and between the remaining light-emitting materials arranged side by side. When the P-type electrode of the chip includes multiple discrete P-type electrodes, the isolation structure can be located between the sub-P-type electrodes corresponding to each sub-pixel. When the N-type electrode of the chip includes multiple discrete N-type electrodes, the isolation structure can be located between the sub-N-type electrodes corresponding to each sub-pixel. The isolation structure can also be located between the filter layers corresponding to each sub-pixel, and between the reflector layers.

[0154] On the basis that an isolation structure can be provided between sub-pixels, in some possible examples, among several stacked light-emitting materials, the light-emitting wavelength of the light-emitting material closer to the P-type electrode is greater than that of the light-emitting material farther from the P-type electrode. In this way, the light-emitting wavelength of the light-emitting material closer to the P-type electrode is larger, and the light-emitting wavelength of the light-emitting material farther from the P-type electrode is smaller. The light emitted by the light-emitting material closer to the P-type electrode will not excite the light-emitting material with a smaller light-emitting wavelength and closer to the N-type electrode side to emit light.

[0155] Among them, among the N light-emitting materials, the light-emitting material with the smallest light-emitting wavelength is stacked on the side closer to the N-type electrode of the remaining light-emitting materials. For example, the light-emitting wavelength of the nth light-emitting material is less than that of the first light-emitting material to the (n - 1)th light-emitting material, that is, the nth light-emitting material includes a first region and a second region. The light-emitting wavelengths of the first light-emitting material to the (n - 1)th light-emitting material are independent of their arrangement order, that is, the light-emitting wavelengths of the first light-emitting material to the (n - 1)th light-emitting material can be arbitrary.

[0156] In the above possible examples, it is necessary to ensure that in the stacked region, holes only diffuse into the light-emitting material layer closest to the P-type electrode. For example, in the stacked region, the thickness of the light-emitting material closest to the P-type electrode is greater than the hole diffusion length, that is, the light-emitting mechanism of each light-emitting material is electroluminescence. Refer to Figure 16 and Figure 17 、 Figures 21 to 23 As shown, the thicknesses of the first light-emitting material to the (n - 1)th light-emitting material are all greater than the hole diffusion length. In this way, when the chip is working, the holes provided by the P-type electrode can migrate to the second region of the light-emitting material with the smallest light-emitting wavelength (for example, the second region of the nth light-emitting material) to make the second region of the light-emitting material with the smallest light-emitting wavelength emit light by electroluminescence. And the holes provided by the P-type electrode can migrate to the remaining light-emitting materials, but cannot migrate to the first region of the light-emitting material with the smallest light-emitting wavelength (for example, the first region of the nth light-emitting material) to make the remaining light-emitting materials emit light, and the first region of the light-emitting material with the smallest light-emitting wavelength will not emit light by electroluminescence. At the same time, the first region of the light-emitting material with the smallest light-emitting wavelength will not emit light by photoluminescence either. Thus, it is ensured that only a single wavelength can be emitted from a single stacked region of the chip, and multiple different stacked regions can generate multiple different wavelengths of light, so that multiple wavelengths are available in a single chip.

[0157] Another example is to increase a hole blocking layer in the stacked region, referring to Figure 18As shown, it further includes a hole blocking layer, and the hole blocking layer is disposed at least between the light-emitting material closest to the P-type electrode and the light-emitting material stacked adjacent to the light-emitting material closest to the P-type electrode. The total thickness of the hole blocking layer and the light-emitting material closest to the P-type electrode is greater than the hole diffusion length. In this way, when the chip is operating, the electrons provided by the N-type electrode can migrate into each light-emitting material, and the holes provided by the P-type electrode can only migrate to the light-emitting material closest to the P-type electrode, so that the holes and electrons are combined in the light-emitting material closest to the P-type electrode, ensuring that the light-emitting material can achieve electroluminescence. And the holes will not migrate into the light-emitting material with a smaller emission wavelength of the P-type electrode, nor can they excite the light-emitting material with a smaller emission wavelength of the light-emitting material far from the P-type electrode to emit light, thereby ensuring that only a single wavelength can be emitted from a single stacked area of the chip, and multiple different stacked areas can generate multiple different wavelengths of light, so that multiple wavelengths are present in a single chip.

[0158] For example, as Figure 18 shown, the first light-emitting material, the second light-emitting material... the (n - 1)th light-emitting material are arranged side by side, and the first light-emitting material, the second light-emitting material... the (n - 1)th light-emitting material are all closest to the P-type electrode. The hole blocking layer can be disposed between the first light-emitting material and the nth light-emitting material, between the second light-emitting material and the nth light-emitting material, between the third light-emitting material and the nth light-emitting material... between the (n - 1)th light-emitting material and the nth light-emitting material.

[0159] The driving method of multiple sub-pixels of the chip can be synchronous driving or independent driving. Refer to Figure 15 、 Figure 19 and Figure 20 , the P-type electrode is in an integrated form, and the N-type electrode is also in an integrated form. The driving method of multiple sub-pixels of the chip is independent driving. Refer to Figure 16 、 Figure 18 、 Figure 21 and Figure 23 shown, the P-type electrode includes a first sub-P-type electrode, a second sub-P-type electrode, a third sub-P-type electrode... an mth sub-P-type electrode. The driving method of multiple sub-pixels of the chip is independent driving. Refer to Figure 17 and Figure 22 shown, the N-type electrode includes a first sub-N-type electrode, a second sub-N-type electrode, a third sub-N-type electrode... an mth sub-N-type electrode. The driving method of multiple sub-pixels of the chip is independent driving.

[0160] As another possible implementation manner of the present application, refer to Figures 24 to 41As shown, the remaining light-emitting materials are stacked along the thickness direction of the light-emitting diode chip, and the side of the light-emitting material closest to the N-type electrode is electrically connected to the N-type electrode. That is, along the thickness direction of the chip, multiple light-emitting materials are stacked, and the electrons provided by the N-type electrode can migrate from the side of the light-emitting material facing the N-type electrode into the light-emitting material and then migrate from this light-emitting material to other light-emitting materials. Along the direction from the P-type electrode to the N-type electrode, the multiple light-emitting materials are, in sequence, the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material.

[0161] In some examples, referring to Figures 24 to 31 As shown, among two adjacent light-emitting materials, the light-emitting material closer to the N-type electrode includes a first region and a second region arranged in parallel, and the side of the first region facing the P-type electrode corresponds to the other light-emitting material; the sides of the second regions of the multiple light-emitting materials facing the P-type electrode are all electrically connected to the P-type electrode, and the second regions of the multiple light-emitting materials respectively correspond to multiple sub-pixels.

[0162] The above light-emitting materials form a stepped shape. For example, the nth light-emitting material includes a first region and a second region. The (n - 1)th light-emitting material is arranged on the side of the first region of the nth light-emitting material away from the N-type electrode, and the second region of the (n - 1)th light-emitting material is electrically connected to the P-type electrode. The (n - 1)th light-emitting material includes a first region and a second region. The (n - 2)th light-emitting material is arranged on the side of the first region of the (n - 1)th light-emitting material away from the N-type electrode, and the second region of the (n - 2)th light-emitting material is electrically connected to the P-type electrode, and so on. Among them, the light-emitting material closest to the P-type electrode only includes the second region and does not have a first region, that is, the first light-emitting material only includes the second region, and the second region of the first light-emitting material is the entire region of the first light-emitting material, and the remaining light-emitting materials may include a first region and a second region.

[0163] The first light-emitting material corresponds to the first sub-pixel, the second region of the second light-emitting material corresponds to the second sub-pixel... the second region of the nth light-emitting material corresponds to the mth sub-pixel. The side of the nth light-emitting material facing the N-type electrode is electrically connected to the N-type electrode. Part of the side of the nth light-emitting material to the (n - 1)th light-emitting material facing the P-type electrode is electrically connected to the P-type electrode, and the entire side of the first light-emitting material facing the P-type electrode is electrically connected to the P-type electrode.

[0164] Referring to Figures 29 to 31 , in the above chip, a reflective layer may further be included. As Figures 27 to 30 shown, the reflective layer may be located on the side of the N-type electrode facing away from the P-type electrode, such that the side of the P-type electrode facing away from the N-type electrode forms an out-light side. As Figure 31 shown, the reflective layer may also be located on the side of the P-type electrode facing away from the N-type electrode, such that the side of the N-type electrode facing away from the P-type electrode forms an out-light side.

[0165] The above-mentioned chip may further include a light filtering layer, which is disposed in the stacked area and on the light-emitting side. The light filtering layer may include a first light filtering layer CF1, a second light filtering layer CF2, a third light filtering layer CF3... an nth light filtering layer CFn. The first light filtering layer CF1 corresponds to the first sub-pixel of the first light-emitting material, the second light filtering layer CF2 corresponds to the second sub-pixel of the second light-emitting material, the third light filtering layer CF3 corresponds to the third sub-pixel formed by the third light-emitting material... the (n-1)th light filtering layer CFn-1 corresponds to the mth sub-pixel formed by the (n-1)th light-emitting material.

[0166] It should be noted that with reference to Figure 24 、 Figure 28 and Figure 32 as shown, when the chip includes a light filtering layer, along the thickness direction of the chip, the emission wavelengths of multiple light-emitting materials are not limited. The holes provided by the P-type electrode can migrate to each light-emitting material, that is, the holes provided by the P-type electrode can migrate to the light-emitting material closest to the N-type electrode. In some possible implementation manners, the thicknesses of multiple light-emitting materials are relatively thin, such that the sum of the thicknesses of multiple light-emitting materials is less than the hole diffusion length. The stacked portions of each light-emitting material can generate multiple wavelengths, and the corresponding light filtering layer is used for light filtering, so that each sub-pixel emits light of only one wavelength. For example, the stacked portion of the first light-emitting material and the nth light-emitting material can generate light of the first wavelength and the nth wavelength, and the first sub-pixel emits light of the first wavelength through the first light filtering layer CF1.

[0167] It can be understood that when the light-emitting material in the stacked structure emits light, the light will be emitted from each surface of the light-emitting material layer, thereby exciting the light-emitting material with a larger wavelength to emit photoluminescence. Except for the light-emitting material with the smallest emission wavelength, the other light-emitting materials have two emission mechanisms: electroluminescence and photoluminescence.

[0168] As Figure 28 and Figure 30 shown, the sides of two adjacent light filtering layers among multiple light filtering layers can be in contact with each other or isolated from each other. The light filtering layer can be a color filter, or can also be a Bragg reflection layer (or, distributed Bragg reflector, abbreviated as DBR). Both the color filter and the Bragg reflection layer can filter the wavelength of the passing light, so as to emit light with different wavelengths. The Bragg reflection layer can be alternately stacked with two materials of aluminum nitride and gallium nitride, or alternately stacked with two materials of titanium oxide and silicon oxide, or alternately stacked with two materials of silicon oxide and silicon nitride. Optionally, the thickness of the Bragg reflection layer is 2-6 microns. In other embodiments, this thickness value can be adjusted as needed, and the present application does not limit it.

[0169] In the above-mentioned chip, refer to Figures 25 to 27, Figures 29 to 31 , an isolation structure may be provided between the respective sub-pixels. The isolation structure may be between the first region and the second region of each light-emitting material and extend into the light-emitting material closest to the N-type electrode. Refer to Figure 31 , when the P-type electrode of the chip includes a plurality of discrete P-type electrodes, the isolation structure may be located between the sub-P-type electrodes corresponding to the respective sub-pixels. Refer to Figure 27 and Figure 30 , when the N-type electrode of the chip includes a plurality of discrete N-type electrodes, the isolation structure may be located between the sub-N-type electrodes corresponding to the respective sub-pixels. The isolation structure may also be located between the filter layers corresponding to the respective sub-pixels and between the reflective layers.

[0170] On the basis that an isolation structure may be provided between the respective sub-pixels, in some possible examples, refer to Figure 25 , Figure 27 and Figure 29 , among several stacked light-emitting materials, the light-emitting wavelength of the light-emitting material closer to the P-type electrode is greater than that of the light-emitting material farther from the P-type electrode. In this way, the light-emitting wavelength of the light-emitting material closer to the P-type electrode is larger, the light-emitting wavelength of the light-emitting material farther from the P-type electrode is smaller, and the light emitted by the light-emitting material closer to the P-type electrode does not excite the light-emitting material with a smaller light-emitting wavelength and closer to the N-type electrode side to emit light.

[0171] Among them, in the N light-emitting materials, the light-emitting material layer with the smallest light-emitting wavelength is stacked on the side closer to the N-type electrode of the remaining light-emitting materials. Along the direction from the N-type electrode to the P-type electrode, the light-emitting wavelengths of the respective light-emitting materials gradually increase. In this chip, along the direction from the N-type electrode to the P-type electrode, the wavelengths of the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material gradually increase and are arranged in sequence.

[0172] In the above possible examples, it is necessary to ensure that in the stacked region, holes only diffuse into the light-emitting material layer closest to the P-type electrode. For example, in the stacked region, the thickness of the light-emitting material closest to the P-type electrode is greater than the hole diffusion length, that is, the thicknesses of the first light-emitting material to the (n-1)th light-emitting material are all greater than the hole diffusion length. In this way, when the chip is working, in the light-emitting material layer stacking region, the holes provided by the P-type electrode can migrate into the light-emitting material close to the P-type electrode, so that the light-emitting material close to the P-type electrode can emit light by electroluminescence, and will not migrate into the light-emitting material on the side far from the P-type electrode, nor will it excite its luminescence, thus ensuring that only a single wavelength can be emitted from a single stacked region of the chip, and multiple different stacked regions can generate multiple different wavelengths of light, so that multiple wavelengths are present in a single chip. That is, the holes provided by the P-type electrode can migrate into the second region of each light-emitting material, and will not migrate into the first region of each light-emitting material, so that the second region of each light-emitting material can emit light by electroluminescence, and the first region of each light-emitting material will not emit light by electroluminescence, and will not be excited by the light emitted by the second region of each light-emitting material, that is, the first region of each light-emitting material will not emit light by photoluminescence either, so that only the second region of each light-emitting material emits light.

[0173] Another example is to add a hole blocking layer. Referring to Figure 26 As shown, in the above chip, a hole blocking layer is further included. The hole blocking layer is disposed at least between the light-emitting material closest to the P-type electrode and the light-emitting material stacked adjacent to the light-emitting material layer closest to the P-type electrode. The total thickness of the hole blocking layer and the light-emitting material layer closest to the P-type electrode is greater than the hole diffusion length. In this way, when the chip is working, the electrons provided by the N-type electrode can migrate into each light-emitting material, and the holes provided by the P-type electrode can only migrate into the light-emitting material closest to the P-type electrode, so that the holes and electrons combine in the light-emitting material closest to the P-type electrode, ensuring that the light-emitting material can achieve electroluminescence. And the holes will not migrate into the light-emitting material with a smaller emission wavelength of the P-type electrode, and at the same time, they cannot excite the light-emitting material with a smaller emission wavelength of the light-emitting material far from the P-type electrode to emit light, thus ensuring that only a single wavelength can be emitted from a single stacked region of the chip, and multiple different stacked regions can generate multiple different wavelengths of light, so that multiple wavelengths are present in a single chip.

[0174] Furthermore, the hole blocking layer can be disposed between any two adjacent light-emitting materials in the stacked several light-emitting materials, that is, a hole blocking layer can be disposed between each light-emitting material in the stacked arrangement. The first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material are all stacked, and the hole blocking layer (not shown in the figure) is disposed between the first region of the first light-emitting material and the second light-emitting material, between the first region of the second light-emitting material and the third light-emitting material, and between the first region of the (n-1)th light-emitting material and the nth light-emitting material.

[0175] The driving modes of multiple sub-pixels of the chip can be synchronous driving or independent driving. Refer to Figure 24 and Figure 28 , as shown, the P-type electrode is in an integrated form, and the N-type electrode is also in an integrated form. The driving mode of multiple sub-pixels of the chip is independent driving. Refer to Figure 25 , Figure 26 , Figure 29 and Figure 31 , as shown, the P-type electrode includes a first sub-P-type electrode, a second sub-P-type electrode, a third sub-P-type electrode... an m-th sub-P-type electrode. The driving mode of multiple sub-pixels of the chip is independent driving. Refer to Figure 27 and Figure 30 , as shown, the N-type electrode includes a first sub-N-type electrode, a second sub-N-type electrode, a third sub-N-type electrode... an m-th sub-N-type electrode. The driving mode of multiple sub-pixels of the chip is independent driving.

[0176] Refer to Figures 32 to 41 , as shown, in some other examples, the side of the light-emitting material farthest from the N-type electrode facing the P-type electrode is electrically connected to the P-type electrode. Different regions arranged along the direction intersecting the thickness of the light-emitting diode chip respectively correspond to different sub-pixels. That is, N light-emitting materials are stacked along the thickness direction of the light-emitting diode chip, and the side of the light-emitting material closest to the N-type electrode facing the N-type electrode is electrically connected to the N-type electrode. The electrons provided by the N-type electrode are injected into the light-emitting material from this side and migrate to other light-emitting materials. The side of the light-emitting material closest to the P-type electrode facing the P-type electrode is electrically connected to the P-type electrode. The holes provided by the P-type electrode are injected into the light-emitting material from this side and migrate to other light-emitting materials. That is, the holes provided by the P-type electrode can migrate to the light-emitting material closest to the N-type electrode, so that there are electrons and holes recombined to generate light in each light-emitting material, that is, each light-emitting material can emit light by electro-luminescence.

[0177] Among them, along the direction from the P-type electrode to the N-type electrode, the multiple light-emitting materials are respectively a first light-emitting material, a second light-emitting material, a third light-emitting material... an n-th light-emitting material. Along the thickness direction of the chip, the first light-emitting material, the second light-emitting material, the third light-emitting material... the n-th light-emitting material are stacked in sequence. The sum of the thicknesses of the first light-emitting material, the second light-emitting material, the third light-emitting material... the n-th light-emitting material is less than the hole diffusion length, so that the holes provided by the P-type electrode can migrate to the first light-emitting material, the second light-emitting material, the third light-emitting material... the n-th light-emitting material, and the first light-emitting material, the second light-emitting material, the third light-emitting material... the n-th light-emitting material can all emit light by electro-luminescence. The first light-emitting material can emit light of a first wavelength, the second light-emitting material can emit light of a second wavelength, the third light-emitting material can emit light of a third wavelength... the n-th light-emitting material can emit light of an n-th wavelength. In this way, light of the first wavelength, the second wavelength... the n-th wavelength exits from the light-emitting surface of the chip.

[0178] It should be noted that the holes provided by the P-type electrode can migrate to each light-emitting material, that is, the holes provided by the P-type electrode can migrate to the light-emitting material closest to the N-type electrode. In some possible implementation manners, the thicknesses of multiple light-emitting materials are relatively thin, such that the sum of the thicknesses of the multiple light-emitting materials is less than the hole diffusion length. The magnitude relationship between the emission wavelengths of the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material is not limited, and the positions of the first light-emitting material, the second light-emitting material, the third light-emitting material... the nth light-emitting material can be interchanged, that is, the emission wavelength of each light-emitting material has nothing to do with its distance from the P-type electrode.

[0179] It can be understood that when the light-emitting material in the stacked structure emits light, the light will exit from each surface of the light-emitting material layer, thereby exciting the light-emitting material with a larger wavelength to emit photoluminescence. Except for the light-emitting material with the smallest emission wavelength, the remaining light-emitting materials have two emission mechanisms: electroluminescence and photoluminescence.

[0180] Refer to Figures 39 to 41 , in the stacking of multiple light-emitting materials, several light-emitting materials form a light-emitting material group, and the light-emitting layer includes multiple light-emitting material groups; along the N-type electrode to the P-type electrode, the multiple light-emitting material groups are arranged in sequence. Among them, the number of light-emitting material groups can be 2 groups, 3 groups or more groups. In different groups, the arrangement manner and number of light-emitting materials can be the same or different.

[0181] Refer to Figures 32 to 41 As shown, in the above-mentioned chip, a reflective layer and a filter layer can also be included. The reflective layer can be located on the side of the N-type electrode facing away from the P-type electrode, such that the side of the N-type electrode facing away from the P-type electrode forms an outgoing light side, and the filter layer is correspondingly arranged on this outgoing light side. The filter layer can include a first filter layer CF1, a second filter layer CF2, a third filter layer CF3... an nth filter layer CFn. The first filter layer CF1 corresponds to the first sub-pixel of the first light-emitting material, the second filter layer CF2 corresponds to the second sub-pixel of the second light-emitting material, the third filter layer CF3 corresponds to the third sub-pixel formed by the third light-emitting material... the nth filter layer CFn corresponds to the mth sub-pixel formed by the nth light-emitting material.

[0182] It should be noted that as Figure 31 and Figure 32As shown, the sides of two adjacent filter layers among multiple filter layers can be in contact with each other or isolated from each other. The filter layer can be a color filter, or can also be a Bragg reflector (or, Distributed Bragg Reflector, abbreviated as DBR). Both the color filter and the Bragg reflector can filter the wavelength of the passing light, so as to emit light with different wavelengths. The Bragg reflector can be alternately stacked with two materials of aluminum nitride and gallium nitride, or alternately stacked with two materials of titanium oxide and silicon oxide, or alternately stacked with two materials of silicon oxide and silicon nitride. Optionally, the thickness of the Bragg reflector is 2 - 6 micrometers. In other embodiments, this thickness value can be adjusted as needed, and the present application does not limit it.

[0183] Continue to refer to Figure 32 and Figure 39 As shown, the driving method of multiple sub-pixels of the chip is synchronous driving. Refer to Figure 33 、 Figure 35 、 Figure 37 and Figure 40 As shown, the P-type electrode includes a first sub P-type electrode, a second sub P-type electrode, a third sub P-type electrode... an m-th sub P-type electrode, and the driving method of multiple sub-pixels of the chip is independent driving. Refer to Figure 32 、 Figure 34 、 Figure 36 and Figure 38 and Figure 41 As shown, the N-type electrode includes a first sub N-type electrode, a second sub N-type electrode, a third sub N-type electrode... an m-th sub N-type electrode, and the driving method of multiple sub-pixels of the chip is independent driving.

[0184] In the above-mentioned chip, refer to Figures 33 to 38 、 Figure 40 and Figure 41 As shown, an isolation structure can be arranged between each sub-pixel, and the isolation structure can be located between different regions of each light-emitting material of each light-emitting material group. As Figure 33 and Figure 40 As shown, when the P-type electrode of the chip includes multiple discrete P-type electrodes, the isolation structure can be located between the sub P-type electrodes corresponding to each sub-pixel. As Figure 34 and Figure 41 As shown, when the N-type electrode of the chip includes multiple discrete N-type electrodes, the isolation structure can be located between the sub N-type electrodes corresponding to each sub-pixel. The isolation structure can also be located between the filter layers corresponding to each sub-pixel, and between the reflective layers.

[0185] The chips of the above embodiments may further include an N-type semiconductor layer and a P-type semiconductor layer. The N-type semiconductor and the P-type semiconductor are respectively located on opposite sides of the light-emitting layer in the thickness direction. The N-type electrode is electrically connected to the light-emitting layer through the N-type semiconductor, and the P-type electrode is electrically connected to the light-emitting layer through the P-type semiconductor;

[0186] When the N-type electrode includes M discrete sub-N-type electrodes, the isolation structure is located between adjacent sub-N-type electrodes, and the isolation structure can extend into the P-type semiconductor layer. Exemplarily, referring to Figure 36 and Figure 38 as shown, the isolation structure extends into the P-type semiconductor.

[0187] When the P-type electrode includes M discrete sub-P-type electrodes, the isolation structure is located between adjacent sub-P-type electrodes, and the isolation structure can extend into the N-type semiconductor layer. Exemplarily, referring to Figure 35 and Figure 37 as shown, the isolation structure extends into the N-type semiconductor.

[0188] The above setting of the isolation structure can not only reduce the process difficulty but also improve the isolation effect of the isolation structure on each sub-pixel. It should be noted that the solution in which the isolation structure extends into the P-type semiconductor or the N-type semiconductor can also be applied to the chip structures of the above other embodiments.

[0189] In the embodiments of the above chip, in the independent driving mode, each sub-pixel corresponds to each separate sub-N-type electrode or sub-P-type electrode. In some other embodiments, in the independently driven chip, a partial number of sub-pixels can also share discrete sub-N-type electrodes or sub-P-type electrodes. Specifically:

[0190] As a first implementable embodiment, the N-type electrode includes m discrete sub-N-type electrodes, and the P-type electrode includes M discrete sub-P-type electrodes; one side of the M sub-pixels close to the P-type electrode is electrically connected to each sub-P-type electrode in a one-to-one correspondence, and one side of the M sub-pixels close to the N-type electrode is electrically connected to the m sub-N-type electrodes; m is less than M, and a partial number of sub-pixels share one sub-N-type electrode.

[0191] Referring to Figure 45 as shown, sub-pixel G and sub-pixel B share one sub-N-type electrode N1. Sub-pixel G is electrically connected to sub-P-type electrode P11, and sub-pixel B is electrically connected to sub-P-type electrode P21. The two sub-pixels R share another sub-N-type electrode N2, and the two sub-pixels R are respectively electrically connected to sub-P-type electrode P22 and sub-P-type electrode P12. In this way, the light emission uniformity of the sub-pixels sharing one sub-N-type electrode is higher.

[0192] As a second implementable embodiment, the P-type electrode includes m discrete sub-P-type electrodes, and the N-type electrode includes M discrete sub-N-type electrodes; one side of the M sub-pixels close to the N-type electrode is electrically connected to each sub-N-type electrode in a one-to-one correspondence, and one side of the M sub-pixels close to the P-type electrode is electrically connected to the m sub-P-type electrodes; m is less than M, and a partial number of sub-pixels share one sub-P-type electrode.

[0193] Referring to Figure 43 As shown, sub-pixel G and sub-pixel B share one sub-P-type electrode P1, sub-pixel G is electrically connected to sub-N-type electrode N11, sub-pixel B is electrically connected to sub-N-type electrode N21, and two sub-pixels R share another sub-P-type electrode P2, and the two sub-pixels R are respectively electrically connected to sub-N-type electrode P22 and sub-N-type electrode P12. In this way, the light emission uniformity of the sub-pixels sharing one sub-P-type electrode is higher.

[0194] Referring to Figures 44 to 57 As shown, in some embodiments of the chip of the present application, the M sub-pixels form a pixel sub-group. For example, referring to Figure 44 As shown, sub-pixel B, sub-pixel G, and sub-pixel R together form a chip. Referring to Figure 30 and Figure 31 As shown, the arrangement order of sub-pixel B, sub-pixel G, and sub-pixel R can be changed. Figures 44 to 46 The number of sub-pixels shown in a chip can be 3. Referring to Figure 47 As shown, the number of sub-pixels in a chip can also be 4, or referring to Figure 48 and Figure 49 As shown, the number of sub-pixels in a chip can be 5. In other embodiments, the number of sub-pixels in the chip can be more (for example, as shown in Figure 44 where the chip includes 8 sub-pixels), and the arrangement manner of each sub-pixel can be flexibly adjusted.

[0195] In some other embodiments, the M sub-pixels form multiple pixel sub-groups, and in the thickness direction intersecting the light-emitting diode chip, the multiple pixel sub-groups are arranged in an array. For example, referring to Figures 51 to 56 As shown, sub-pixel B, sub-pixel G, and sub-pixel R can form a pixel sub-group, and the chip includes multiple pixel sub-groups arranged in an array. The arrangement manners of sub-pixel B, sub-pixel G, and sub-pixel R in different pixel sub-groups can be the same or different. For example, referring to Figure 54 As shown, a pixel sub-group can include four sub-pixels. For example, referring to Figure 55 and Figure 56 As shown, a pixel sub-group can include 5 sub-pixels.

[0196] As an implementable embodiment, among the multiple sub-pixels of the above-mentioned pixel subgroup, the emission wavelengths of the multiple sub-pixels are not equal to each other, or, the multiple sub-pixels include at least two sub-pixels with equal emission wavelengths.

[0197] For example, referring to Figures 44 to 46 as shown, the sub-pixels of a pixel subgroup are sub-pixel B, sub-pixel G, and sub-pixel R respectively. Referring to Figure 48 as shown, sub-pixel G1 and sub-pixel G2 can represent sub-pixels with different emission wavelengths. Or, referring to Figure 47 as shown, the sub-pixels of a pixel subgroup can include sub-pixel B, sub-pixel G, and two sub-pixels R. Referring to Figure 49 as shown, the sub-pixels of a pixel subgroup can include sub-pixel B, sub-pixel G, and three sub-pixels R.

[0198] In the chip of the present application, M sub-pixels form multiple pixel units, and the multiple pixel units are arranged in an array along the thickness direction intersecting the light-emitting diode chip;

[0199] One pixel unit includes Y sub-pixels, and the Y sub-pixels include X colors; X is a positive integer greater than or equal to 3, and Y is a positive integer greater than or equal to X.

[0200] It should be noted that, referring to Figures 44 to 46 as shown, a chip includes three sub-pixels, the three sub-pixels form a pixel unit, and the three sub-pixels are 3 colors respectively. In this embodiment, both X and Y are 3. On this basis, referring to Figures 35 - 37 as shown, one pixel unit includes 3*n sub-pixels, and among these sub-pixels, there are 3 colors. In this embodiment, X is 3 and Y is 3*n.

[0201] Referring to Figure 47 as shown, a chip includes four sub-pixels, the four sub-pixels form a pixel unit, and the four sub-pixels include 3 colors. In this embodiment, X is 3 and Y is 4. On this basis, referring to Figure 54 as shown, one pixel unit includes 4*n sub-pixels, and among these sub-pixels, there are 3 colors. In this embodiment, X is 3 and Y is 4*n.

[0202] Referring to Figure 48 as shown, a chip includes five sub-pixels, the five sub-pixels form a pixel unit, and the five sub-pixels include 4 colors (taking the example that the emission wavelengths of sub-pixel G1 and sub-pixel G2 are different), in this embodiment, X is 4 and Y is 5. On this basis, referring to Figure 55 as shown, one pixel unit includes 5*n sub-pixels, and among these sub-pixels, there are 4 colors. In this embodiment, X is 4 and Y is 5*n.

[0203] Referring to Figure 49 as shown, a chip includes five sub-pixels. The five sub-pixels form a pixel unit. The five sub-pixels include three colors. In this embodiment, X is 3 and Y is 5. On this basis, referring to Figure 56 as shown, a pixel unit includes 5*n sub-pixels. Among these sub-pixels, three colors are included. In this embodiment, X is 3 and Y is 5*n.

[0204] In the above embodiment, when Y is greater than X, in a pixel unit, at least some of the sub-pixels have equal emission wavelengths.

[0205] According to the above method, pixel units with different structures can be designed in the chip to achieve a diversified chip structure, adjust the light mixing effect of the chip, and thus realize a chip with a flexible structure and a rich light output effect.

[0206] As an implementable embodiment, in the chip of the embodiments of the present application, all sub-pixels in the same pixel unit are only for the use of the pixel unit to which they belong. Referring to Figures 44 to 46 as shown, three sub-pixels in the same chip can form a pixel unit, and all sub-pixels are only for the use of this pixel unit. Referring to Figure 49 as shown, the chip includes 2 sub-pixels R, 1 sub-pixel B, and 1 sub-pixel G. 1 sub-pixel R, 1 sub-pixel B, and 1 sub-pixel G can form a complete pixel unit and are only for the use of this pixel unit. In this way, a complete full-color pixel unit can be formed in the chip, ensuring more convenient use of the chip.

[0207] It should be noted that in two adjacent pixel units, for example, the first pixel unit and the second pixel unit. When the sub-pixels in the first pixel unit have insufficient emission brightness, some or all of the sub-pixels in the adjacent second pixel unit can be borrowed flexibly to complete the emission of the second pixel unit. That is, the sub-pixels borrowed in the first pixel unit can be not used for the emission of the first pixel unit but for the emission of the second pixel unit. In this way, the structural flexibility and light output effect of the chip can be improved. Among them, the first pixel unit can also borrow the emission of the second pixel unit for other reasons, and the present application does not limit this.

[0208] As another implementable embodiment, in the chip of the embodiments of the present application, two sub-pixels are shared by adjacent pixel units, and the total number of all sub-pixels of a single chip is a*(2X - 2), where a is a positive integer greater than or equal to 1. Referring to Figure 50As shown, the sub-pixel R and sub-pixel B in the same chip are shared by pixel unit PU1 and pixel unit PU2. The number of sub-pixels in this chip is 8, where X is 4 and a is 2 in this chip. Here, a is the number of combinations formed by sub-pixels. For example, in the illustrated chip, sub-pixel B, sub-pixel G, sub-pixel R, and sub-pixel G together form a combination, and there are two combinations in this chip, so the value of a is 2.

[0209] In the same chip, some sub-pixels are shared to form different pixel units, which can ensure the flexibility of the chip structure and meet diverse display requirements.

[0210] In some embodiments, the size of the light-emitting diode chip is greater than or equal to 50 microns. The size of the pixel subgroup of this chip can also be greater than or equal to 50 microns. For example, it can be 50 - 100 microns, or 100 - 150 microns, or greater than 150 microns. Of course, in some embodiments, the size of this light-emitting diode chip can also be less than 50 microns. The light-emitting diode chip can be selected with different sizes according to different usage scenarios.

[0211] In some embodiments, the shape of the light-emitting diode chip is any one of a rectangle, a square, a circle, an ellipse, a triangle, a rhombus, a parallelogram, and a polygon with more than four sides; among them, the shapes of different sub-pixels can be the same or different. That is, the shapes of the first sub-pixel B and the second sub-pixel G can both be Figure 43 the rectangle shown in

[0212] When multiple light-emitting diode chips form a light-emitting diode chip group, the shapes of different light-emitting diode chips can be the same or different.

[0213] In some embodiments, the size range of the sub-pixel is 0.001 - 200 microns. When the size of the sub-pixel is 0.001 microns - 0.1 microns, the size of this sub-pixel is at the nanoscale and is a nano LED (nano light-emitting diode). During the preparation of nano LED, the arrangement method of single-core multi-color multi-sub-pixels in this application can be referred to, which helps to increase the size of a single chip of nano LED containing multiple sub-pixels, so that the size of a single chip is close to or falls within the size range of LED chips that can be operated by the current mass transfer process, thereby reducing the operation difficulty in the preparation process of nano LED and improving its operability.

[0214] In some other embodiments, taking a light-emitting diode chip with 2*2 combined sub-pixels applied to a large TV as an example, the size of a single sub-pixel can be 50 microns, and the pitch between two adjacent sub-pixels can be 10 microns. The length and width of the light-emitting diode chip are both 110 microns, and its size can be counted as 110*110 microns. A light-emitting diode chip with such a size can use the packaging process of mini LED.

[0215] The sizes of the light-emitting diode chip and the sub-pixels will vary according to the usage scenario of the light-emitting diode chip. Below, exemplary descriptions are made for the sizes of the light-emitting diode chip and the sub-pixels in different usage scenarios.

[0216] When the light-emitting diode chip is applied to display products such as home TVs and desktop computers, at a pixel density of 50 - 150, the size (pitch) of the pixel unit composed of several sub-pixels in multiple light-emitting diode chips can be 150 - 700 microns, the size (sub-pitch) of the sub-pixels in the light-emitting diode chip can be less than 250 microns, and the size of the light-emitting diode chip can be greater than 100 microns.

[0217] When the light-emitting diode chip is applied to display products such as laptops and tablets, at a pixel density of 150 - 250, the size of the sub-pixels can be less than 70 microns, the size of the pixel unit is 100 - 200 microns, and the size of the light-emitting diode chip can be greater than 60 microns.

[0218] When the light-emitting diode chip is applied to display products such as mobile phones and smartwatches, at a pixel density greater than 300, the size of the sub-pixels can be less than 30 microns, the size of the pixel unit is less than 100 microns, and the size of the light-emitting diode chip can be greater than 50 microns.

[0219] Based on this, the light-emitting diode chip provided in the embodiments of the present application adopts an arrangement mode of single-core multi-color and multi-sub-pixels. The size range of the sub-pixels and the light-emitting diode chip is relatively large, which can be applicable to different usage scenarios and increases the applicability of the light-emitting diode chip.

[0220] In some embodiments, the shape of the sub-pixel is any one of a rectangle, a square, a circle, an ellipse, a triangle, a rhombus, a parallelogram, and a polygon with more than four sides.

[0221] In some embodiments, the sizes of different sub-pixels are equal or unequal. The size of a sub-pixel affects its light-emitting area. That is, the light-emitting areas of different sub-pixels can be equal or unequal. The sizes of different sub-pixels can be adjusted according to the brightness attenuation of the sub-pixels. For example, if the brightness attenuation rate of a certain sub-pixel is relatively large, the size of this sub-pixel can be appropriately increased to ensure uniform light output requirements. The sizes of different sub-pixels can also be adjusted according to whether there is sharing between different pixel units (Pixel unit, abbreviated as PU). For example, referring to Figure 50 as shown, sub-pixel (B) and sub-pixel (R) are shared by two pixel units respectively during the formation of pixel units PU1 and PU2, sub-pixel (G) is not shared and belongs entirely to pixel unit PU1. Therefore, the sizes of sub-pixel (B) and sub-pixel (R) are larger than the size of sub-pixel (G). In this way, the luminous brightness of the shared sub-pixels in each pixel unit can be ensured.

[0222] It should be noted that the above "size" can be understood as the extension length of a sub-pixel in a certain extension direction. For example, it can be the length or width of a rectangular sub-pixel, or the major axis length or minor axis length of an elliptical sub-pixel, or the diameter of a circular sub-pixel, etc.

[0223] Referring to Figure 58 as shown, the chip provided by the embodiment of the present application further includes a buffer layer, an N-type semiconductor layer, a P-type semiconductor layer, a current spreading layer, a reflective layer, and a first insulating layer. The buffer layer and the N-type semiconductor layer are stacked, the light-emitting layer is disposed on the side of the N-type semiconductor layer away from the buffer layer, and the P-type semiconductor layer is disposed on the side of the light-emitting layer away from the buffer layer. The current spreading layer is in contact with the side of the P-type semiconductor layer away from the buffer layer, the N-type electrode is in contact with the N-type semiconductor layer, and the P-type electrode is in contact with the P-type semiconductor layer and the current spreading layer. The first insulating layer is disposed on the side of the current spreading layer away from the buffer layer.

[0224] The light-emitting layer includes a first light-emitting material, a second light-emitting material, and a third light-emitting material disposed between the P-type electrode and the N-type electrode.

[0225] Optionally, referring to Figure 59 as shown, the reflective layer can be disposed on the side of the light-emitting layer away from the buffer layer. In this way, the light-emitting direction of the light-emitting diode chip is towards the direction away from the buffer layer, that is, the downward arrow in the figure. The structure of this chip is a thin-film flip-chip structure.

[0226] Optionally, referring to Figure 58 as shown, the reflective layer is disposed on the side of the first insulating layer away from the buffer layer, and a second insulating layer is further disposed on the side of the reflective layer away from the buffer layer. The second insulating layer can protect the reflective layer.

[0227] Among them, the material of the buffer layer can be one or more of gallium nitride, aluminum gallium nitride, and indium gallium aluminum nitride, and the thickness of the buffer layer can be 10 - 40 nanometers. The material of the N-type semiconductor layer can be N-type doped gallium nitride, and the material of the P-type semiconductor layer can be P-type doped gallium nitride. The material of the current spreading layer can be a transparent conductive material (indium tin oxide, ITO) or silver, etc., and its function is to improve the distribution ability of the P-type electrode and make holes as evenly distributed as possible in the region where the P-type semiconductor layer is located. The material of the first insulating layer can be silicon oxide, silicon nitride.

[0228] Referring Figure 58 As shown, the light-emitting diode chip provided by the embodiment of the present application further includes a substrate, and the substrate is disposed on the side of the buffer layer away from the light-emitting layer. The material of the substrate can be one or more composites of sapphire, gallium nitride, aluminum nitride, silicon, and silicon carbide. The structure of the chip is a flip-chip structure.

[0229] Referring Figure 60 As shown, the chip provided by the embodiment of the present application may further include a bonding substrate, a bonding layer, an N-type semiconductor layer, a P-type semiconductor layer, and a reflective layer.

[0230] The bonding substrate and the bonding layer are sequentially disposed on the P-type electrode, the P-type semiconductor layer is disposed on the side of the bonding layer away from the bonding substrate and is in contact with the bonding layer; the light-emitting layer is disposed on the side of the P-type semiconductor layer away from the bonding substrate, the N-type semiconductor layer is disposed on the side of the light-emitting layer away from the bonding substrate, and the N-type electrode contacts the side of the N-type semiconductor layer away from the bonding substrate; the reflective layer is disposed on the side of the P-type semiconductor layer close to the bonding substrate. The light-emitting layer includes a first light-emitting material, a second light-emitting material, and a third light-emitting material that are sequentially stacked along the P-type electrode to the N-type electrode. A first insulating layer is disposed on the top of the N-type semiconductor layer. Figure 60 The light-emitting direction is the upward direction indicated by the arrow in the figure, forming a light-emitting diode chip with a vertical front-mounted structure.

[0231] Combined Figure 61 As shown, the chip provided by the embodiment of the present application further includes a light-blocking layer, and the light-blocking layer is located on the light-emitting side of the light-emitting diode chip and between two adjacent sub-pixels. The light-blocking layer can be located between the first filter layer and the second filter layer, or between the second filter layer and the third filter layer. The light-blocking layer can be a black resin material and has the function of absorbing light and blocking light. The light-blocking layer located between two adjacent sub-pixels can avoid the problem of light mixing between the two sub-pixels and ensure the light-emitting effect of the light-emitting diode chip.

[0232] In a second aspect, the embodiment of the present application provides a method for manufacturing a light-emitting diode chip, and this manufacturing method can be used to manufacture the above-mentioned light-emitting diode chip. Taking a single-core three-color multi-sub-pixel chip as an example for illustration.

[0233] As a method for preparing a light-emitting diode chip, refer to Figure 62 as shown, the preparation method includes:

[0234] Provide a substrate 100 ( Figure 62 (a)); sequentially form a buffer layer 101, an N-type semiconductor layer 103, and a third light-emitting material 113-3 on the substrate 100 by an epitaxial growth process ( Figure 62 (b)); remove part of the third light-emitting material 113-3 by photolithography and etching processes ( Figure 62 (c)); form a protective layer 118 covering the remaining third light-emitting material 113-3 and the exposed N-type semiconductor layer 103 by a film-forming process ( Figure 62 (d)); remove part of the protective layer 118 by photolithography and etching processes to expose the N-type semiconductor layer 103 beside the remaining third light-emitting material 113-3 ( Figure 62 (e)); form a second light-emitting material 113-2 on the exposed N-type semiconductor layer 103 and the remaining protective layer by an epitaxial growth process ( Figure 48 (f)); remove the protective layer 118 and the second light-emitting material 113-2 thereon ( Figure 48 (g)); form a new protective layer 118 covering the third light-emitting material 113-3, the second light-emitting material 113-2, and the N-type semiconductor layer 103 by an epitaxial growth process ( Figure 48 (h)); remove the protective layer 118 on the N-type semiconductor layer 103 by photolithography and etching processes ( Figure 48 (i)); form a first light-emitting material 113-1 covering the remaining protective layer 118 and the N-type semiconductor layer 103 by an epitaxial growth process ( Figure 48 (j)); remove the protective layer 118 and the first light-emitting material 113-1 thereon ( Figure 48 (k)); form a P-type semiconductor layer 105 covering the third light-emitting material 113-3, the second light-emitting material 113-2, and the first light-emitting material 113-1 by an epitaxial growth process ( Figure 48 (l)). Then obtain a chip through a chip process.

[0235] On the basis of the above, refer to Figure 63 as shown, the preparation method includes forming an isolation structure ( Figure 63 (f)).

[0236] As a method for preparing a light-emitting diode chip, refer to Figure 64 and Figure 65 as shown, the preparation method includes:

[0237] Provide a substrate 100, and sequentially form a buffer layer 101, an N-type semiconductor layer 103, and a third light-emitting material 113-3 on the substrate 100 by an epitaxial growth processFigure 64 (a)); Form a second light-emitting material 113-2 on a partial surface of the third light-emitting material 113-3 through a selective epitaxial growth process Figure 64 (b)); Form a first light-emitting material 113-1 beside the second light-emitting material 113-2 through a selective epitaxial growth process. The first light-emitting material 113-1 is in contact with the third light-emitting material 113-3 Figure 64 (c)); Form a P-type semiconductor layer 105 covering the third light-emitting material 113-3, the second light-emitting material 113-2, and the first light-emitting material 113-1 through an epitaxial growth process Figure 64 (d)). Then obtain a chip through a chip process.

[0238] Or include: Provide a substrate 100, and sequentially form a buffer layer 101, an N-type semiconductor layer 103, and a third light-emitting material 113-3 on the substrate 100 through an epitaxial growth process Figure 65 (a)); Form a second light-emitting material 113-2 on a partial surface of the third light-emitting material 113-3 through a selective epitaxial growth process Figure 65 (b)); Form a first light-emitting material 113-1 beside the second light-emitting material 113-2 through a selective epitaxial growth process. The first light-emitting material 113-1 is spaced apart from the third light-emitting material 113-3 Figure 65 (c)); Form a P-type semiconductor layer 105 covering the third light-emitting material 113-3, the second light-emitting material 113-2, and the first light-emitting material 113-1 through an epitaxial growth process Figure 65 (d)). Then obtain a chip through a chip process.

[0239] On the above basis, referring to Figure 66 as shown, the preparation method includes forming an isolation structure Figure 66 (e).

[0240] As a preparation method of a light-emitting diode chip, referring to Figure 85 as shown, the preparation method includes:

[0241] Provide a substrate 100, and sequentially form a buffer layer 101, an N-type semiconductor layer 103, and a third light-emitting material 113-3 on the substrate 100 through an epitaxial growth process Figure 85 (a)); Form a second light-emitting material 113-2 on a partial surface of the third light-emitting material 113-3 through a selective epitaxial growth process Figure 85 (b)); Form a second light-emitting material 113-2 on a partial surface of the third light-emitting material 113-3 through a selective epitaxial growth process Figure 85(c)); Form a P-type semiconductor layer 105 covering the third light-emitting material 113-3, the second light-emitting material 113-2, and the first light-emitting material 113-1 through an epitaxial growth process ( Figure 85 (d)). Then obtain a chip through a chip process.

[0242] On the basis of the above, referring to ​ as shown, the preparation method includes forming an isolation structure ( ​ (f)).

[0243] As a preparation method of a light-emitting diode chip, referring to ​ as shown, the preparation method includes:

[0244] Provide a substrate 100 ( ​ (a)); Sequentially form a buffer layer 101, an N-type semiconductor layer 103, a third light-emitting material 113-3, a second light-emitting material 113-2, a first light-emitting material 113-1, and a P-type semiconductor layer on the substrate 100 through an epitaxial growth process ( ​ (b)); Form a step and a channel (an isolation structure without filling an isolation material) ( ​ (c)); Form a patterned current spreading layer 106 ( ​ (d)); Form a patterned first insulating layer 108 covering the current spreading layer 106, and a part of the first insulating layer 108 is located at the step ( ​ (e)); Form a patterned reflective layer 107 covering the first insulating layer 108 ( ​ (f)); Form a patterned second insulating layer 109 covering the reflective layer 107 ( ​ (g)); Form an N-type electrode 102 and a P-type electrode 104 ( ​ (h)); Form a first filter layer 117a, a second filter layer 117b, and a third filter layer 117c on the side of the substrate 100 facing away from the reflective layer 107 ( ​ (i)).

[0245] As a preparation method of a light-emitting diode chip, continue to refer to ​ as shown, the preparation method includes:

[0246] Provide a substrate 100 ( ​ (a)); Sequentially form a buffer layer 101, an N-type semiconductor layer 103, a third light-emitting material 113-3, a second light-emitting material 113-2, a first light-emitting material 113-1, and a P-type semiconductor layer on the substrate 100 through an epitaxial growth process ( ​ (b)); Form a step and a plurality of spaced channels (an isolation structure without filling an isolation material) ( ​ (c)); Form a patterned current spreading layer 106 (​ (d)); Form a patterned first insulating layer 108 covering the current spreading layer 106, with a part of the first insulating layer 108 located at the step. ​ (e)); Form a patterned reflective layer 107 covering the first insulating layer 108. ​ (f)); Form a patterned second insulating layer 109 covering the reflective layer 107. ​ (g)); Form an N-type electrode 102 and a P-type electrode 104. ​ (h)); Form a first light filtering layer 117a, a second light filtering layer 117b, and a third light filtering layer 117c on the side of the substrate 100 facing away from the reflective layer 107. ​ (i).

[0247] Combined ​ As shown, the chip provided by the embodiment of the present application further includes a color conversion layer 112, which is disposed on the light-emitting side of some light-emitting diode chips and is correspondingly disposed with at least a part of the regions of the sub-pixels.

[0248] It should be noted that the orthographic projection of the color conversion layer 112 on the plane where the corresponding sub-pixel is located may cover all regions of a single sub-pixel or only cover a part of the regions of a single sub-pixel. The material of the color conversion layer 112 may be a quantum dot material, a phosphor material, etc. Using the color conversion layer 112 can adjust the light-emitting wavelength of the light-emitting diode chip and enrich the types of its light-emitting wavelengths.

[0249] Referring to Figure 61 As shown, taking the chip with a flip-chip structure as an example, the light-emitting wavelengths of the first light filtering layer 117a, the second light filtering layer 117b, and the third light filtering layer 117c corresponding to each sub-pixel are different. The color conversion layer 112 is located on the light-emitting layer of the first light filtering layer 117a and is opposite to a part of the first light filtering layer 117a. In this way, a part of the light emitted by the first light filtering layer 117a can be converted into light with other light-emitting wavelengths except for the light-transmitting wavelengths of the first light filtering layer 117a, the second light filtering layer 117b, and the third light filtering layer 117c. Therefore, the chip can emit light with multiple light-emitting wavelengths.

[0250] In a third aspect, the embodiment of the present application provides a light-emitting diode chip group, including a plurality of the above-mentioned light-emitting diode chips, and the plurality of light-emitting diode chips are arranged in an array along a direction intersecting the thickness direction of the light-emitting diode chips.

[0251] Referring to Figure 71As shown, multiple chips can be arranged in an array within a plane formed by the x-direction and the y-direction. For example, chips C1, C2, C3, and C4. Among them, the x-direction and the y-direction can intersect with each other. In some embodiments, the two can be perpendicular to each other. Multiple chips can be arranged only along the x-direction, such as chips C1 and C2. Multiple chips can also be arranged only along the y-direction, such as chips C1 and C3. The arrangement method of the chip group provided in this application can be flexibly adjusted.

[0252] Referring to Figure 71 As shown, in the chip group of this application, sub-pixels in a single chip can form a complete pixel unit. For example, in chip C1, sub-pixel B, sub-pixel G, and sub-pixel R can form a pixel unit.

[0253] In the chip group of this application, pixels of multiple chips can form a complete pixel unit.

[0254] As a first implementable embodiment, referring to Figure 83 As shown, in two adjacent light-emitting diode chips, the entire area of the sub-pixels of one light-emitting diode chip and the entire area of the sub-pixels of the other light-emitting diode chip together form a pixel unit. For example, sub-pixel B in chip C1, and sub-pixel G and sub-pixel R in chip C3 together form a pixel unit.

[0255] As a second implementable embodiment, referring to Figure 77-59 As shown, in two adjacent light-emitting diode chips, a partial area of the sub-pixels of one light-emitting diode chip and a partial area of the sub-pixels of the other light-emitting diode chip together form a pixel unit. For example, Figure 77 in, a partial area of sub-pixel R and sub-pixel G in chip C1, and a partial area of sub-pixel B in chip C2 together form a pixel unit PU2. Among them, sub-pixel R of chip C1 can also be used to form pixel unit PU1, and sub-pixel B of chip C2 can also be used to form pixel unit PU3. Therefore, this sub-pixel R and sub-pixel B are sub-pixels shared by two pixel units respectively. Figure 78 Compared with Figure 77 , the arrangement of sub-pixels in the two chips is different, but the sub-pixels shared are still sub-pixel R and sub-pixel B.

[0256] Referring to Figure 79 As shown, the sub-pixels shared can also be sub-pixel G and sub-pixel R. Referring to Figure 80 As shown, the sub-pixels shared can also be sub-pixel G and sub-pixel B.

[0257] Referring to Figures 72 to 76As shown, in the light-emitting diode chip group provided by the embodiment of the present application, two adjacent light-emitting diode chips are both irregularly shaped. One of the two adjacent light-emitting diode chips has a protruding area, and the other has a concave area; the protruding area and the concave area are adapted in shape and fit together.

[0258] It should be noted that the protruding area can be a cube, a cone, a hemisphere or other irregular shapes, and the protruding area and the concave area are adapted in shape and fit together. The number of the protruding area and the concave area can be 1, 2 or more, and the numbers of both are equal. For example, the adjacent light-emitting diode chips may include a first light-emitting diode chip and a second light-emitting diode chip.

[0259] It should be noted that Figure 72-53 taking

[0260] as an example, both the first light-emitting diode chip C1 and the second light-emitting diode chip C2 are stepped. The protruding area of the step of the first light-emitting diode chip C1 is fitted with the concave area of the step of the second light-emitting diode chip C2 in a butting manner, and the splicing is carried out in this way. In this way, the first light-emitting diode chip C1 and the second light-emitting diode chip C2 are completed in fitting. Figure 72 and Figure 73 shown, the sizes of the sub-pixels in the first light-emitting diode chip C1 are the same. In the present application, through the mutual alignment and fitting of the protruding area and the concave area, a structure similar to a "mortise and tenon structure" can be formed, so as to facilitate the self-alignment assembly of different light-emitting diode chips, reduce the alignment difficulty, and improve the preparation efficiency and yield.

[0261] The shape of the fitted light-emitting diode chips can also be convex-shaped or concave-shaped ( Figure 73 shown); or, in the stepped light-emitting diode chips, the sizes of different sub-pixels are different ( Figure 74 shown); or, the light-emitting diode chips have serrated edges ( Figure 75 shown); or, the light-emitting diode chips have arc-shaped edges ( Figure 76 shown).

[0262] In other embodiments, referring to Figures 77 to 82 shown, in the fitted chips of the light-emitting diode chip group, the shapes of different light-emitting diode chips can also be the same and regular shapes.

[0263] In the chipset provided in the embodiment of the present application, multiple light-emitting diode chips form multiple chip groups arranged in an array and multiple pixel units arranged in an array; in the same light-emitting diode chip, the distance between adjacent sub-pixels is d1; the distance between adjacent chip groups is d2; the distance between adjacent pixel units is d3; the distance between adjacent light-emitting diode chips is d4; any three of d1, d2, d3, and d4 are equal, or d1, d2, d3, and d4 are all different from each other in pairs.

[0264] Referring to Figure 71 As shown, in the chipset, along the y direction, the size of sub-pixel B of chip C1, and the sum of the distance between sub-pixel B and sub-pixel G is the first size. The size of sub-pixel B is a, the distance between sub-pixel B and sub-pixel G is b, the first size = a + b, and the first size is the sub-pixel size of sub-pixel B.

[0265] In chip C1, the sum of the size of sub-pixel G and the distance between sub-pixel G and sub-pixel R is the second size. The size of sub-pixel G is c, the distance between sub-pixel G and sub-pixel R is d, the second size = c + d, and the second size is the sub-pixel size of sub-pixel G.

[0266] In chip C1, the sum of the size of sub-pixel R and the distance between sub-pixel R of chip C1 and sub-pixel B of chip C2 is the third size. The size of sub-pixel R is e, the distance between sub-pixel R of chip C1 and sub-pixel B of chip C2 is f, the third size = e + f, and the third size is the sub-pixel size of sub-pixel R.

[0267] Optionally, the first size, the second size, and the third size are all equal; the first size, the second size, and the third size can also be all unequal. Among them, the sum of the first size, the second size, and the third size can be the pixel pitch of the pixel unit composed of sub-pixel B, sub-pixel G, and sub-pixel R of chip C1.

[0268] Similarly, in chip C2, the pixel unit formed by sub-pixel B, sub-pixel G, and sub-pixel R also has a pixel pitch. The pixel pitches of chip C1 and chip C2 can be equal or unequal.

[0269] Continuing to refer to Figure 82 , along the first direction x, in chip group CG1, the size of sub-pixel B of chip C1 is a'. The distance between sub-pixel B of chip C1 and sub-pixel B of chip C3 is g.

[0270] The sum of a' and g can be the pixel size of the pixel unit in the chip C1 along the first direction x. The sum of a, b, c, d, e, and f can be the pixel size of the pixel unit along the second direction y. The sum of m and n may or may not be equal to the sum of a, b, c, d, e, and f.

[0271] When the number of sub-pixels of the chipset along the first direction x is 1, along the first direction x, the sum of the size of the chip and the spacing between the chipsets can be flexibly adjusted, that is, Figure 82 the sum of a' and g shown in can be flexibly adjusted. In this way, it is possible to adapt to display panels with different pixel sizes.

[0272] Among them, in each light-emitting diode chip, the spacing between two adjacent sub-pixels can be d1. The spacing between adjacent chip groups can be d2. The spacing between adjacent pixel units can be d3. The spacing between two adjacent light-emitting diode chips can be d4. d1, d2, d3, and d4 can all be equal. In this way, the layout regularity of each sub-pixel, each light-emitting diode chip, each light-emitting diode chip group, and each pixel unit can be effectively improved, and the light-emitting uniformity can be improved.

[0273] Alternatively, d1, d2, d3, and d4 can all be different from each other in pairs. That is, d1 can be not equal to d2, can be not equal to d3, and can be not equal to d4; d2 can be not equal to d3 and can be not equal to d4; d3 can be not equal to d4. Among them, d3 can be determined by the PPI of the full-color display screen prepared by the light-emitting diode chip group, and the flexible adjustment of d3 can achieve efficient layouts for various applications from a watch to a large-size TV.

[0274] In a fourth aspect, an embodiment of the present application provides a display module, including a driving backplane and the light-emitting diode chip group of the above embodiment. The light-emitting diode chip group is disposed on the driving backplane and is electrically connected to the driving backplane.

[0275] It should be noted that the driving backplane can be a TFT (Thin Film Transistor) driving backplane or a CMOS (Complementary Metal Oxide Semiconductor) driving backplane.

[0276] It should be noted that as a first implementable embodiment, referring to Figure 84 as shown, there are multiple light-emitting diode chip groups, and the multiple light-emitting diode chip groups are arranged in an array on the driving backplane 200. The driving backplane 200 can provide driving current for the multiple light-emitting diode chip groups, so as to drive the multiple light-emitting diode chip groups to emit light. Figure 66The light-emitting diode chip groups CG1 and CG2 are shown arranged on the driving backplane 200. In some embodiments, there may also be 3, 4, or more light-emitting diode chip groups, and the multiple light-emitting diode chip groups are arranged in an array.

[0277] Both the light-emitting diode chip group CG1 and the light-emitting diode chip group CG2 include a light-emitting diode chip C1 and a light-emitting diode chip C2. Each light-emitting diode chip includes a pixel subgroup, and the pixel subgroup includes three sub-pixels. In some embodiments, the number of light-emitting diode chips in the light-emitting diode chip group, the number of pixel subgroups and sub-pixels in the light-emitting diode chip can all be adjusted, and this embodiment does not limit this.

[0278] As a second implementable embodiment, refer to Figure 85 As shown, the driving backplane 200 includes a driving substrate 201 and multiple driving units 202. One driving unit 202 is correspondingly electrically connected to one light-emitting diode chip group, and the multiple driving units 202 are all electrically connected to the driving substrate 201. The driving unit 202 and the driving substrate 201 can also be TFT and CMOS.

[0279] One driving unit 202 and one light-emitting diode chip group can form a micro-display module. Figure 85 The micro-display modules DBM1 and DBM2 are shown, both of which are electrically connected to the driving substrate 201. The driving substrate 201 can provide driving current for the driving units 202 in the micro-display module, so as to drive the light-emitting diode chip group to emit light through the driving unit 202. In some embodiments, the number of micro-display modules can be 3, 4, 5, or more, and this embodiment does not limit the specific value of this number.

[0280] Figure 85 The light-emitting diode chip group CG1 and the light-emitting diode chip group CG2 are shown electrically connected to two different driving units 202 respectively, and the two driving units 202 are both electrically connected to the driving substrate 201. Both the light-emitting diode chip group CG1 and the light-emitting diode chip group CG2 include a light-emitting diode chip C1 and a light-emitting diode chip C2. Each light-emitting diode chip includes a pixel subgroup, and the pixel subgroup includes three sub-pixels. In this embodiment, the number of light-emitting diode chip groups, the number of light-emitting diode chips in the light-emitting diode chip group, the number of pixel subgroups and sub-pixels in the light-emitting diode chip can all be adjusted, and this embodiment also does not limit this.

[0281] In a fifth aspect, an embodiment of the present application provides a full-color display screen, and the full-color display screen can be manufactured by encapsulating the above-mentioned display module.

[0282] Sixth aspect, an embodiment of the present application provides an electronic device, which includes the above full-color display screen. The electronic device may be a television, electronic watch, e-book, desktop computer, laptop computer, tablet computer, mobile phone, AR device (Augmented Reality), or VR device (Virtual Reality), etc. When the light-emitting diode chip of the electronic device includes ultraviolet light pixels, the electronic device may also be an ultraviolet curing lamp or an ultraviolet detection lamp, etc.

[0283] In the description of the embodiments of the present application, it should be understood that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it may be a fixed connection, or indirectly connected through an intermediate medium. It may be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific situations. The orientation or positional relationship indicated by the terms "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application. In the description of the present application, the meaning of "a plurality" is two or more, unless otherwise specifically and precisely defined.

[0284] The terms "first", "second", "third", "fourth", etc. (if any) in the specification, claims and drawings of the present application are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described here can be implemented in an order different from those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0285] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A light emitting diode chip, characterized in that: It includes an N-type electrode, a P-type electrode, and a light-emitting layer arranged between the N-type electrode and the P-type electrode, wherein the light-emitting layer is electrically connected to the N-type electrode and the P-type electrode respectively; The light-emitting layer includes N light-emitting materials, the light-emitting wavelengths of the N light-emitting materials are different, and M sub-pixels are formed, and the light-emitting wavelengths of at least some of the M sub-pixels are different, and both M and N are positive integers greater than or equal to 3, and M is greater than or equal to N; When the P-type electrode and the N-type electrode are powered on, the light emitting mechanism of the N light emitting materials is at least electroluminescence.

2. The light emitting diode chip according to claim 1, characterized in that: N light-emitting materials are arranged in parallel between the N-type electrode and the P-type electrode, and each of the light-emitting materials is electrically connected to the N-type electrode and the P-type electrode; The plurality of light-emitting materials arranged side by side correspond to the plurality of sub-pixels respectively.

3. The light emitting diode chip according to claim 1, characterized in that: Along the thickness direction of the light-emitting diode chip, at least one of the N light-emitting materials is stacked with the remaining light-emitting materials; Among the stacked light-emitting materials, at least one light-emitting material is located on a side of the remaining light-emitting materials close to the N-type electrode.

4. The light emitting diode chip according to claim 3, characterized in that: The light-emitting material closest to the N-type electrode includes a first region and a second region arranged in parallel, the first region and the second region are close to a side facing the N-type electrode and are electrically connected to the N-type electrode, and the side of the first region facing the P-type electrode corresponds to the rest of the light-emitting materials arranged in parallel; The second region and the remaining light-emitting materials are electrically connected to the P-type electrode on one side thereof facing the P-type electrode, and the second region and the remaining light-emitting materials correspond to a plurality of sub-pixels respectively.

5. The light emitting diode chip according to claim 3, characterized in that: The remaining light-emitting materials are stacked along the thickness direction of the light-emitting diode chip, and the light-emitting material closest to the N-type electrode is electrically connected to the N-type electrode on the side facing the N-type electrode.

6. The light emitting diode chip according to claim 5, characterized in that: Of the two adjacent light-emitting materials, the light-emitting material close to the N-type electrode includes a first region and a second region arranged in parallel, and a side of the first region facing the P-type electrode corresponds to the other light-emitting material; The second regions of the plurality of light-emitting materials are electrically connected to the P-type electrode at one side thereof facing the P-type electrode, and the second regions of the plurality of light-emitting materials correspond to the plurality of sub-pixels respectively.

7. The light emitting diode chip according to claim 5, characterized in that: The side of the light-emitting material farthest from the N-type electrode facing the P-type electrode is electrically connected to the P-type electrode, and different regions arranged along a direction intersecting the thickness of the light-emitting diode chip correspond to different sub-pixels.

8. The light emitting diode chip according to claim 7, characterized in that: In stacking a plurality of the luminescent materials, a plurality of the luminescent materials form a luminescent material group, and the luminescent layer has a plurality of the luminescent material groups; Along the N-type electrode to the P-type electrode, a plurality of the light-emitting material groups are arranged in sequence.

9. The light emitting diode chip according to any one of claims 3 to 8, characterized in that: It also includes a plurality of filter layers with different filtering wavelengths, the plurality of filter layers are arranged side by side on the light emitting side of the light emitting diode chip, and each of the filter layers corresponds to each of the sub-pixels one by one.

10. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: Also included is an isolation structure, wherein the isolation structure is located between any two adjacent sub-pixels; The isolation structure includes a channel; or, the isolation structure includes a channel and an isolation material disposed in the channel; or, the isolation structure is an ion implantation layer.

11. The light emitting diode chip according to claim 10, characterized in that: When at least a portion of the side of each of the light-emitting materials facing the P-type electrode is electrically connected to the P-type electrode, among the stacked light-emitting materials, the light-emitting wavelength of the light-emitting material close to the P-type electrode is greater than the light-emitting wavelength of the light-emitting material far from the P-type electrode.

12. The light emitting diode chip according to claim 11, characterized in that: Among the N light-emitting materials, the light-emitting material with the smallest light-emitting wavelength is stacked on a side of the remaining light-emitting materials close to the N-type electrode.

13. The light emitting diode chip according to claim 11, characterized in that: It also includes a hole blocking layer, which is at least arranged between the light-emitting material closest to the P-type electrode and the light-emitting material adjacent to the light-emitting material layer closest to the P-type electrode.

14. The light emitting diode chip according to claim 13, characterized in that: The hole blocking layer is also located between any two adjacent light-emitting materials among the stacked light-emitting materials.

15. The light emitting diode chip according to claim 10, characterized in that: It also includes an N-type semiconductor layer and a P-type semiconductor layer, wherein the N-type semiconductor and the P-type semiconductor are respectively located on opposite sides of the light-emitting layer in the thickness direction, the N-type electrode is electrically connected to the light-emitting layer through the N-type semiconductor, and the P-type electrode is electrically connected to the light-emitting layer through the P-type semiconductor; When the N-type electrode includes M mutually separate sub-N-type electrodes, the isolation structure is located between adjacent sub-N-type electrodes, and at least a portion of the isolation structure extends into the P-type semiconductor layer; When the P-type electrode includes M mutually independent sub-P-type electrodes, the isolation structure is located between adjacent sub-P-type electrodes, and at least a portion of the isolation structure extends into the N-type semiconductor layer.

16. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: The N-type electrode includes M separate sub-N-type electrodes, the sides of the M sub-pixels close to the P-type electrode are electrically connected to the P-type electrode, and the sides of the M sub-pixels close to the N-type electrode are electrically connected to the M sub-N-type electrodes one by one; Alternatively, the P-type electrode includes M separate sub-P-type electrodes, and the sides of the M sub-pixels close to the N-type electrode are electrically connected to the N-type electrode, and the sides of the M sub-pixels close to the P-type electrode are electrically connected to the M sub-P-type electrodes one by one.

17. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: The N-type electrode includes m mutually separate sub-N-type electrodes, a side of the M sub-pixels close to the P-type electrode is electrically connected to the P-type electrode, and a side of the M sub-pixels close to the N-type electrode is electrically connected to the m sub-N-type electrodes; m is less than M, and a part of the sub-pixels share one sub-N-type electrode; Or, the P-type electrode includes m separate sub-P-type electrodes, a side of the M sub-pixels close to the N-type electrode is electrically connected to the N-type electrode, and a side of the M sub-pixels close to the P-type electrode is electrically connected to the m sub-P-type electrodes; m is less than M, and a part of the sub-pixels share one sub-P-type electrode.

18. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: The M sub-pixels form a pixel subgroup; Alternatively, the M sub-pixels form a plurality of pixel subgroups, and the plurality of pixel subgroups are arranged in an array in a direction intersecting the thickness direction of the light emitting diode chip.

19. The light emitting diode chip according to claim 18, characterized in that: Among the plurality of sub-pixels in the pixel subgroup, light-emitting wavelengths of the plurality of sub-pixels are different from each other, or the plurality of sub-pixels include at least two sub-pixels with the same light-emitting wavelength.

20. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: M sub-pixels form a plurality of pixel units, and the plurality of pixel units are arranged in an array along a thickness direction intersecting the light-emitting diode chip; One pixel unit includes Y sub-pixels, and the Y sub-pixels include X colors; X is a positive integer greater than or equal to 3, and Y is a positive integer greater than or equal to X.

21. The light emitting diode chip according to claim 20, characterized in that: When Y is greater than X, in one pixel unit, at least a portion of the sub-pixels have the same light emission wavelength.

22. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: All the sub-pixels in the same pixel unit are only used by the pixel unit to which they belong.

23. The light emitting diode chip according to claim 22, characterized in that: Two adjacent pixel units share two sub-pixels, and the number of all sub-pixels in a single chip is a*(2X-2), where a is a positive integer greater than or equal to 1.

24. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: The invention also comprises a reflective layer, wherein the reflective layer is located at the backlight side of the light emitting diode chip.

25. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: It also includes a light-blocking layer, which is located on the light-emitting side of the light-emitting diode chip and between two adjacent sub-pixels.

26. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: The size of the light emitting diode chip is greater than or equal to 50 microns; And / or, the shape of the light-emitting diode chip is any one of a rectangle, a square, a circle, an ellipse, a triangle, a rhombus, a parallelogram and a polygon with more than four sides; and / or, the sub-pixel has a size ranging from 0.001 to 200 micrometers; And / or, the sub-pixel has a shape of any one of a rectangle, a square, a circle, an ellipse, a triangle, a rhombus, a parallelogram and a polygon with more than four sides; And / or, the shapes of different sub-pixels are the same or different; And / or, sizes of different sub-pixels are equal or different.

27. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: It also includes a buffer layer, an N-type semiconductor layer, a P-type semiconductor layer, a current spreading layer, a reflective layer and a first insulating layer; The buffer layer and the N-type semiconductor layer are stacked, the light-emitting layer is arranged on a side of the N-type semiconductor layer away from the buffer layer, and the P-type semiconductor layer is arranged on a side of the light-emitting layer away from the buffer layer; The current spreading layer is in contact with a side of the P-type semiconductor layer away from the buffer layer, the N-type electrode is in contact with the N-type semiconductor layer, and the P-type electrode is in contact with the P-type semiconductor layer and the current spreading layer; The first insulating layer is arranged on a side of the current spreading layer away from the buffer layer; The reflective layer is arranged on a side of the buffer layer away from the light-emitting layer, or the reflective layer is arranged on a side of the first insulating layer away from the buffer layer, and a second insulating layer is further arranged on the side of the reflective layer away from the buffer layer.

28. The light emitting diode chip according to claim 27, characterized in that: It also includes a substrate, which is arranged on a side of the buffer layer away from the light-emitting layer; When the reflective layer is disposed on a side of the buffer layer away from the light-emitting layer, the reflective layer is disposed on a side of the substrate away from the buffer layer.

29. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: Also includes a bonding substrate, a binding layer, an N-type semiconductor layer, a P-type semiconductor layer and a reflective layer; The bonding substrate and the binding layer are sequentially arranged on the P-type electrode, and the P-type semiconductor layer is arranged on a side of the binding layer away from the bonding substrate and in contact with the binding layer; The light emitting layer is arranged on a side of the P-type semiconductor layer away from the bonding substrate, the N-type semiconductor layer is arranged on a side of the light emitting layer away from the bonding substrate, and the N-type electrode contacts the side of the N-type semiconductor layer away from the bonding substrate; The reflective layer is arranged on a side of the P-type semiconductor layer close to the bonding substrate.

30. The light emitting diode chip according to any one of claims 1 to 8, characterized in that: It also includes a color conversion layer, which is arranged on the light-emitting side of a portion of the light-emitting diode chip and corresponds to at least a portion of the sub-pixel area.

31. A light emitting diode chipset, characterized in that: It comprises a plurality of light-emitting diode chips as described in any one of claims 1 to 30, wherein the plurality of light-emitting diode chips are arranged in an array along a thickness direction intersecting the light-emitting diode chips.

32. The light emitting diode chipset according to claim 31, characterized in that: In two adjacent LED chips, the entire area of ​​the sub-pixel of one LED chip and the entire area of ​​the sub-pixel of the other LED chip together constitute one pixel unit.

33. The light emitting diode chipset according to claim 31, characterized in that: In two adjacent LED chips, a partial area of ​​a sub-pixel of one LED chip and a partial area of ​​a sub-pixel of another LED chip together form a pixel unit.

34. The light emitting diode chip set according to any one of claims 31 to 33, characterized in that: The two adjacent light-emitting diode chips are both of special shapes; one of the two adjacent light-emitting diodes has a protruding area, and the other has a concave area; the protruding area and the concave area are matched in shape and fit together.

35. The light emitting diode chip set according to any one of claims 31 to 33, characterized in that: The plurality of light-emitting diode chips form a plurality of chip groups arranged in an array and a plurality of pixel units arranged in an array; in the same light-emitting diode chip, the spacing between adjacent sub-pixels is d1; the spacing between adjacent chip groups is d2; the spacing between adjacent pixel units is d3; and the spacing between adjacent light-emitting diode chips is d4; d1, d2, d3 and d4 are all equal, or d1, d2, d3 and d4 are not equal to each other.

36. A display module, characterized in that: It comprises a driving backplane and a light-emitting diode chipset as described in any one of claims 31-35, wherein the light-emitting diode chipset is arranged on the driving backplane and electrically connected to the driving backplane.

37. The display module according to claim 36, characterized in that: There are multiple light emitting diode chip groups; A plurality of the light emitting diode chip groups are arranged in an array on the driving backplane; Alternatively, the driving backplane includes a driving substrate and a plurality of driving units, one of the driving units is electrically connected to one of the light emitting diode chipsets, and the plurality of driving units are electrically connected to the driving substrate.

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