Chip structure and preparation method

Abstract

The present invention discloses a chip structure and preparation method for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs. The chip structure comprises a substrate, a buffer layer disposed on the substrate, a multi-quantum well layer disposed above the buffer layer, an n-type doped layer disposed on the side of the multi-quantum well layer, and an n-type contact electrode disposed above the n-type doped layer; several p-type doped layer plugs are inserted into the multi-quantum well layer, a p-type doped layer is disposed above the p-type doped layer plugs and the multi-quantum well layer, and a p-type contact electrode is disposed on the p-type doped layer; a passivation layer is disposed on the upper surface of the entire structure, and a thickened metal electrode is disposed through the passivation layer and located above the n-type contact electrode and the p-type contact electrode. The present invention can simultaneously improve insufficient hole injection in the multi-quantum well layer and improve the crystal quality of the multi-quantum well layer.

Description

Technical Field

[0001] The present invention relates to the field of ultraviolet light emitting devices, and in particular to a chip structure and a preparation method for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs. Background Art

[0002] Deep ultraviolet light has enormous application value in sterilization, healthcare, biochemical testing, curing, and industrial decontamination. AlGaN-based deep ultraviolet light-emitting diodes (LEDs) offer advantages such as environmental friendliness, easily tunable wavelengths, fast response times, ease of integration, and long lifespan, attracting significant attention from numerous research institutions and industries both domestically and internationally.

[0003] Despite ongoing technological advancements in improving the efficiency of GaN-based LEDs, the quantum efficiency of GaN-based LEDs has significantly decreased at high currents. The physical mechanism underlying this efficiency decline in GaN-based LEDs is generally believed to be the insufficient hole transport properties of nitrogen-based materials. While multiple quantum well layers are used in LEDs, due to poor hole transport properties, most of the light from GaN-based LEDs is emitted in the single quantum well near the p-GaN side. This localized recombination process increases the Auger recombination rate and electron overflow, reducing efficiency at high current densities. Furthermore, lattice mismatches between the substrate and buffer layer, and between the buffer layer and the n-type layer, degrade the crystal quality of the multiple quantum well layers, directly reducing the internal quantum efficiency of GaN-based LEDs. These issues urgently need to be addressed. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention provides a chip structure and preparation method that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs, which can improve the insufficient hole injection in the multi-quantum well layer and improve the crystal quality of the multi-quantum well layer.

[0005] In a first aspect, the present invention provides a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs, which is achieved through the following technical solutions.

[0006] A chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs comprises a substrate, a buffer layer is provided on the substrate, a multi-quantum well layer is provided above the buffer layer, an n-type doping layer is provided on the side of the multi-quantum well layer, and an n-type contact electrode is provided above the n-type doping layer; a p-type doping layer plug is inserted into the multi-quantum well layer, a p-type doping layer is provided above the p-type doping layer plug and the multi-quantum well layer, and a p-type contact electrode is provided on the p-type doping layer; a passivation layer is provided on the upper surface of the entire structure, and a thickened metal electrode is provided through the passivation layer and located on the n-type contact electrode and the p-type contact electrode.

[0007] Further, the substrate material is selected from one of sapphire, silicon, SiC, GaN, and AlN.

[0008] Further, the buffer layer material is selected from one or more of AlN, AlGaN, and GaN; the thickness of the buffer layer is greater than or equal to 50 nm and less than or equal to 2 μm.

[0009] Further, the multiple quantum well layer is an Al -3 Ga 1-x N / Al y Ga 1-y N multiple quantum well layer, where 0 < x < 1 and 0 < y < 1; the number of well layer and barrier layer periods of the multiple quantum well layer is m, where 1 ≤ m ≤ 10 and m is an integer; the thickness of the well layer of the multiple quantum well layer is 0.5 - 5 nm, and the thickness of the barrier layer of the multiple quantum well layer is 5 - 15 nm.

[0010] Further, the n-type doped layer is a doped semiconductor material obtained by doping one or more of AlN, GaN, and AlGaN, the doping element is Si, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm<00||0008>; the thickness of the n-type doped layer is the same as that of the multiple quantum well layer.

[0011] Further, the p-type doped layer plug and the p-type doped layer are doped semiconductor materials obtained by doping one or more of AlN, GaN, and AlGaN, the doping element is Mg, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 ; the thickness of the p-type doped layer is greater than or equal to 50 nm and less than or equal to 2 μm; the p-type doped layer plug is inserted into the multiple quantum well layer to the depth of the Xth quantum well, where 0 < X ≤ 10 and X is an integer.

[0012] Further, the n-type contact electrode is Ti / Al / Ti / Au; the p-type contact electrode is Ni / Au.

[0013] Further, the passivation layer material is selected from one of SiO2, Si3N4, AlN, Al2O3, and HfO2.

[0014] Further, the thickened metal electrode is Au / Sn.

[0015] In the second aspect, the present invention provides a preparation method for a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs, which is achieved through the following technical solutions.

[0016] A method for preparing the chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs comprises the following steps:

[0017] S1. epitaxially growing a buffer layer and a multi-quantum well layer on the substrate in sequence;

[0018] S2. Etching downward in the edge region of the multi-quantum well layer until the buffer layer is formed to form an n-type doped layer regrowth region for growing subsequent n-type doped layers;

[0019] S3. performing selective epitaxial growth of an n-type doped layer on the buffer layer on the side of the multi-quantum well layer;

[0020] S4. Etching is performed in the multi-quantum well layer to form a p-groove for growing subsequent p-type doped layer plugs and p-type doped layers;

[0021] S5. Epitaxially growing a p-type doped layer plug and a p-type doped layer on the etched multi-quantum well layer;

[0022] S6. Preparing an n-type contact electrode and a p-type contact electrode on the upper surface of the n-type doped layer and the p-type doped layer, respectively;

[0023] S7. Cover the upper surface of the entire structure with a passivation layer to protect the multi-quantum well layer and separate the n-type doped layer and the p-type doped layer, and open electrode windows at the n-type contact electrode and the p-type contact electrode, and then deposit thickened metal electrodes in the electrode windows.

[0024] This application has the following beneficial effects.

[0025] (1) The deep ultraviolet LED structure of the present invention has the advantages of improving carrier injection and improving the quality of quantum well crystals. By partially inserting the p-type doped layer plug into the multi-quantum well layer, the holes generated by the p-type doped layer are better injected into other quantum wells close to the substrate.

[0026] (2) The chip structure of the present invention has the function of improving both the crystal quality and injection efficiency of deep ultraviolet LEDs. By arranging the n-type doping layer on the buffer layer and on the side of the multi-quantum well layer, the dislocation extending from the buffer layer to the multi-quantum well layer is reduced, thereby improving the crystal quality of the multi-quantum well layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of the chip structure of the present invention for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs;

[0028] Figure 2 This is a flow chart of the steps of the method for preparing a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs according to the present invention;

[0029] Figure 3 This is a schematic diagram of the structure of the epitaxy of the multi-quantum well layer in the preparation method of the present invention;

[0030] Figure 4 This is a schematic diagram of the structure of the n-type doped layer regrowth region formed by etching in the preparation method of the present invention;

[0031] Figure 5 Schematic diagram of the structure for completing epitaxial growth of an n-type doped layer in the preparation method of the present invention;

[0032] Figure 6 This is a schematic diagram of the structure of completing etching to form a p-type doped layer plug and a p-type doped layer regrowth region in the preparation method of the present invention;

[0033] Figure 7 This is a schematic diagram of the structure of completing the epitaxial growth of the p-type doped layer plug in the preparation method of the present invention;

[0034] Figure 8 Schematic diagram of the structure for completing epitaxial growth of a p-type doped layer in the preparation method of the present invention;

[0035] Figure 9 Schematic diagram of the structure of completing the preparation of n-type contact electrodes and p-type contact electrodes in the preparation method of the present invention;

[0036] Figure 10 This is a schematic diagram of the structure in which the passivation layer deposition is completed in the preparation method of the present invention;

[0037] Figure 11 This is a schematic diagram of the structure for completing the preparation of a thickened metal electrode in the preparation method of the present invention.

[0038] Among them, 1. substrate; 2. buffer layer; 3. multi-quantum well layer; 4. n-type doped layer; 5. p-type doped layer plug; 6. p-type doped layer; 7. n-type contact electrode; 8. p-type contact electrode; 9. passivation layer; 10. thickened metal electrode. DETAILED DESCRIPTION

[0039] The invention is further described below with reference to the accompanying drawings and examples. Unless otherwise specified, the experimental methods used in the present invention are conventional methods, and the experimental equipment, materials, reagents, etc. used can be purchased from relevant material sales companies.

[0040] like Figure 1 As shown, a chip structure for simultaneously improving the crystal quality and injection efficiency of deep ultraviolet LEDs includes: a substrate 1, a buffer layer 2, a multi-quantum well layer 3, an n-type doped layer 4, a p-type doped layer plug 5, a p-type doped layer 6, an n-type contact electrode 7, a p-type contact electrode 8, a passivation layer 9, and a thickened metal electrode 10.

[0041] Specifically, the material of the substrate 1 is any one of sapphire, silicon, SiC, GaN, and AlN.

[0042] The buffer layer 2 is located on the substrate 1. The material of the buffer layer 2 is any one or more of AlN, AlGaN, and GaN. Among them, the thickness of the buffer layer 2 is greater than or equal to 50 nm and less than or equal to 2 μm.

[0043] The multiple quantum well layer 3 is located on the buffer layer 2 and on the side far from the substrate 1. The multiple quantum well layer 3 is an Al x Ga 1-x N / Al y Ga 1-y N multiple quantum well layer, where 0 < x < 1 and 0 < y < 1. The number of well layer and barrier layer periods of the multiple quantum well layer 3 is m, where 1 ≤ m ≤ 10 and m is an integer; the thickness of the well layer of the multiple quantum well layer 3 is 0.5 - 5 nm, and the thickness of the barrier layer of the multiple quantum well layer 3 is 5 - 15 nm.

[0044] The n-type doped layer 4 is located on the buffer layer 2 and on the side of the multiple quantum well layer 3, and on the side far from the substrate 1. The n-type doped layer 4 is a doped semiconductor material obtained by doping any one material or any combination of materials of AlN, GaN, and AlGaN. Among them, the thickness of the n-type doped layer 4 is the same as the thickness of the multiple quantum well layer 3. The doping element of the material of the n-type doped layer 4 is Si, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 .

[0045] The p-type doped layer plug 5 is inserted into the multiple quantum well layer 3 and on the side far from the substrate 1; the p-type doped layer 6 is located on the multiple quantum well layer 3 and on the side far from the substrate 1. The p-type doped layer plug 5 and the p-type doped layer 6 are doped semiconductor materials obtained by doping any one material or any combination of materials of AlN, GaN, and AlGaN. Among them, the thickness of the p-type doped layer 6 is greater than or equal to 50 nm and less than or equal to 2 μm; the doping element of the materials of the p-type doped layer plug 5 and the p-type doped layer 6 is Mg, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 ; the insertion depth of the p-type doped layer plug 5 into the multiple quantum well layer 3 is adjustable. The p-type doped layer plug 5 is inserted into the multiple quantum well layer 3 to the Xth quantum well, where 0 < X ≤ 10 and X is an integer.

[0046] The n-type contact electrode 7 is located on the n-type doping layer 4 and away from the substrate 1. The n-type contact electrode 7 is made of Ti / Al / Ti / Au.

[0047] The p-type contact electrode 8 is located on the p-type doping layer 6 and away from the substrate 1. The p-type contact electrode 8 is Ni / Au.

[0048] The passivation layer 9 is located on the upper surface of the LED and away from the substrate 1. The passivation layer 9 is made of any one of SiO2, Si3N4, AlN, Al2O3, HfO2 and the like.

[0049] The thickened metal electrode 10 is located on the n-type contact electrode 7 and the p-type contact electrode 8 and is away from the substrate 1. The thickened metal electrode 10 is Au / Sn.

[0050] like Figure 2 As shown, the present invention provides a method for preparing a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs, comprising the following steps:

[0051] Step S1: epitaxially growing a buffer layer 2 and a multi-quantum well layer 3 on a substrate 1 in sequence.

[0052] See also Figure 3 , which is a structural schematic diagram of the present invention for completing the epitaxy of the multi-quantum well layer 3. The epitaxy method can be any one of metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), ultra-high vacuum chemical vapor deposition (UHVCVD), atmospheric pressure and reduced pressure epitaxy (ATM&RP Epi).

[0053] Step S2: etching downwards from the edge region of the multi-quantum well layer 3 to the buffer layer 2 to form a regrown region of the n-type doped layer 4.

[0054] See also Figure 4 , which is a structural diagram of the present invention for completing etching to form the regrown region of the n-type doped layer 4. In this embodiment, dry etching or wet etching can be used.

[0055] Step S3: performing selective epitaxial growth of an n-type doped layer 4 on the buffer layer 2 and on the side of the multi-quantum well layer 3 .

[0056] See also Figure 5, which is a structural schematic diagram of the present invention for completing the epitaxial growth of the n-type doped layer 4. In this embodiment, a patterned mask is prepared on both side walls of the multi-quantum well layer 3 table, and the n-type doped layer 4 is epitaxially grown, wherein the patterning process is any one of photolithography, nanoimprinting, or self-assembly, the material of the mask is any one of SiO2, Si3Al4 or Al2O3, and the preparation method of the mask is any one of plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), physical vapor deposition (PVD), magnetron sputtering, etc.

[0057] Step S4: etching is performed in the multi-quantum well layer 3 to form a p-type trench for growing the subsequent p-type doped layer plug 5 and the p-type doped layer 6 .

[0058] See also Figure 6 , which is a structural diagram of the present invention for completing etching to form a p-type doped layer plug 5 and a p-type doped layer 6 regrowth region. In this embodiment, dry etching or wet etching can be used.

[0059] Step S5: epitaxially growing a p-type doped layer plug 5 and a p-type doped layer 6 on the etched multi-quantum well layer 3 .

[0060] See also Figure 7 , which is a schematic diagram of the structure of the epitaxial growth of the p-type doped layer plug 5 of the present invention, please refer to Figure 8 , which is a structural schematic diagram of the present invention for completing the epitaxial growth of the p-type doped layer 6. In this embodiment, a patterned mask is prepared on the mesa of the etched multi-quantum well layer 3 and the mesa of the n-type doped layer 4, and the p-type doped layer plug 5 is selectively epitaxially grown in the unmasked area. Then, a patterned mask is prepared on the mesa of the etched part of the multi-quantum well layer 3 and the mesa of the n-type doped layer 4, and the p-type doped layer 6 is selectively epitaxially grown in the unmasked area. The patterning process is any one of photolithography, nanoimprinting, or self-assembly, the material of the mask is any one of SiO2, Si3N4 or W, and the mask is prepared by any one of PECVD, ALD, PVD, magnetron sputtering and the like.

[0061] Step S6: preparing the n-type contact electrode 7 and the p-type contact electrode 8 on the upper surfaces of the n-type doping layer 4 and the p-type doping layer 6 respectively.

[0062] See also Figure 9 , which is a structural schematic diagram of the preparation of the n-type contact electrode 7 and the p-type contact electrode 8 of the present invention. In this embodiment, electrode materials are deposited on the n-type doped layer 4 and the p-type doped layer 6, respectively, and then peeled off and annealed to prepare the n-type contact electrode 7 and the p-type contact electrode 8.

[0063] Step S7: Cover the passivation layer 9 on the upper surface of the LED to protect the multi-quantum well layer 3 and separate the n-type doped layer 4 and the p-type doped layer 6, and open electrode windows at the n-type contact electrode 7 and the p-type contact electrode 8, and deposit a thickened metal electrode 10.

[0064] See also Figure 10 , which is a schematic diagram of the structure of the present invention for completing the deposition of the passivation layer 9, please refer to Figure 11 , which is a structural schematic diagram of the preparation of the thickened metal electrode 10 of the present invention. In this embodiment, the passivation layer 9 is deposited by the PECVD method, and the electrode windows of the n-type contact electrode 7 and the p-type contact electrode 8 are opened by photolithography and dry etching, and the thickened metal electrode 10 is deposited at the electrode windows.

[0065] In summary, the present invention provides a chip structure that simultaneously improves deep ultraviolet LED crystal quality and injection efficiency. By partially inserting the p-type doped layer plug 5 into the multi-quantum well layer 3, the holes generated by the p-type doped layer are better injected into other quantum wells close to the substrate 1. By disposing the n-type doped layer 4 on the buffer layer 2 and on the side of the multi-quantum well layer 3, the dislocations extending from the buffer layer 2 to the multi-quantum well layer 3 are reduced, thereby improving the crystal quality of the multi-quantum well layer 3.

[0066] The embodiments of this specific implementation method are all preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Therefore, any equivalent changes made based on the structure, shape, and principle of the present invention should be included in the scope of protection of the present invention.

Claims

1. A chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency, comprising a substrate (1), characterized in that: A buffer layer (2) is provided on a substrate (1). A multi-quantum well layer (3) is provided above the buffer layer (2). An n-type doped layer (4) is provided on the side of the multi-quantum well layer (3). An n-type contact electrode (7) is provided above the n-type doped layer (4); A p-type doped layer plug (5) is inserted into the multi-quantum well layer (3). A p-type doped layer (6) is provided above the p-type doped layer plug (5) and the multi-quantum well layer (3). A p-type contact electrode (8) is provided on the p-type doped layer (6); A passivation layer (9) is provided on the upper surface of the entire structure. A thickened metal electrode (10) penetrates through the passivation layer (9) and is located on the n-type contact electrode (7) and the p-type contact electrode (8); The multi-quantum well layer (3) is an Al x Ga 1-x N / Al y Ga 1-y N multi-quantum well layer, where 0 < x < 1 and 0 < y < 1; the number of well and barrier periods of the multi-quantum well layer (3) is m, where 1 ≤ m ≤ 10 and m is an integer; the thickness of the well layer of the multi-quantum well layer (3) is 0.5 - 5 nm, and the thickness of the barrier layer of the multi-quantum well layer (3) is 5 - 15 nm; The thickness of the n-type doped layer (4) is the same as that of the multi-quantum well layer (3); The p-type doped layer plug (5) is inserted into the multi-quantum well layer (3) to a depth of the Xth quantum well, where 0 < X ≤ 10 and X is an integer; A method for preparing a chip structure that simultaneously improves the crystal quality and injection efficiency of deep ultraviolet LEDs includes the following steps: S1. Epitaxially grow a buffer layer (2) and a multi-quantum well layer (3) on the substrate (1) in sequence; S2. Etch downward in the edge region of the multi-quantum well layer (3) until the buffer layer (2) to form a re-growth region for the n-type doped layer (4) for growing the subsequent n-type doped layer (4); S3. Selective area epitaxial growth of the n-type doped layer (4) on the buffer layer (2) on the side of the multi-quantum well layer (3); S4. Etch in the multi-quantum well layer (3) to form a p-groove for growing the subsequent p-type doped layer plug (5) and p-type doped layer (6); S5. Epitaxially grow the p-type doped layer plug (5) and the p-type doped layer (6) on the etched multi-quantum well layer (3) respectively; S6. Prepare an n-type contact electrode (7) and a p-type contact electrode (8) on the upper surfaces of the n-type doped layer (4) and the p-type doped layer (6) respectively; S7. Cover the passivation layer (9) on the upper surface of the entire structure to protect the multi-quantum well layer (3) and separate the n-type doped layer (4) and the p-type doped layer (6), and open electrode windows at the n-type contact electrode (7) and the p-type contact electrode (8), and then deposit the thickened metal electrode (10) in the electrode windows.

2. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The material of the substrate (1) is selected from one of sapphire, silicon, SiC, GaN, and AlN.

3. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The material of the buffer layer (2) is selected from one or more of AlN, AlGaN, and GaN; The thickness of the buffer layer (2) is greater than or equal to 50 nm and less than or equal to 2 μm.

4. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The n-type doping layer (4) is a doped semiconductor material obtained by doping one or more materials selected from AlN, GaN and AlGaN, the doping element is Si, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 .

5. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The p-type doped layer plug (5) and the p-type doped layer (6) are doped semiconductor materials obtained by doping one or more materials selected from AlN, GaN and AlGaN, the doping element is Mg, and the doping concentration is greater than or equal to 10 16 cm -3 and less than or equal to 10 22 cm -3 The thickness of the p-type doped layer (6) is greater than or equal to 50 nm and less than or equal to 2 μm.

6. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The n-type contact electrode (7) is Ti / Al / Ti / Au; The p-type contact electrode (8) is Ni / Au.

7. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The material of the passivation layer (9) is selected from one of SiO2, Si3N4, AlN, Al2O3, and HfO2.

8. The chip structure for simultaneously improving deep ultraviolet LED crystal quality and injection efficiency according to claim 1, characterized in that: The thickened metal electrode (10) is Au / Sn.

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