Single-chip server design method, SOC chip and server

Abstract

The invention relates to the technical field of chips, and discloses a single-chip server design method, an SOC chip and a server. The single-chip server design method comprises the steps that a single SOC chip is adopted by a single-chip server, the SOC chip serves as a BMC chip bearing BMC service and a CPU chip bearing a user system at the same time, the SOC chip is provided with a first operating system and serves as a host machine, an OpenBMC service is started by a kernel of the host machine and keeps running, the OpenBMC service responds to a management and monitoring request of a user side, and the OpenBMC service receives the management and monitoring request of the user side. The OpenBMC service uses a gigabit network card provided by the SOC chip as a management network card; a first virtual machine and a second virtual machine are started in a kernel of the host machine, the first virtual machine runs a mirror image of a second operating system installed by a user, and the second virtual machine runs a firmware program to manage a flash memory and provide block device service. On the premise of not influencing the service function and availability of the server, the hardware cost of the server is effectively reduced, and the localization degree and the completeness of monitoring management are improved.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and particularly to a single-chip server design method, an SOC chip, and a server. Background Art

[0002] With the continuous development of software technology, the deployment scale of servers has also shown a high-speed growth trend accordingly. Inevitably, users have put forward higher requirements for server cost control. For the server itself, chips, memory, and hard disks account for the main costs, followed by component costs such as network cards, RAID cards, and graphics cards. Generally, the necessary components required for a server include:

[0003] (1) A CPU chip, that is, a central processing unit (CPU), is the computing core and control core of the user's operating system. Its main function is to interpret computer instructions and process data in computer software. The CPU is composed of an arithmetic unit, a controller, registers, a cache, and buses for data, control, and status that connect them;

[0004] (2) A BMC chip, that is, a baseboard management controller (BMC), is a dedicated microcontroller embedded on the server motherboard. It communicates with other software and hardware components inside the host through various interfaces such as the intelligent platform management bus (IPMB), LPC (low-pin-count-interface), and system management bus (SMBus), and provides query and management to the local host / remote server through interfaces such as the network, serial / Modern, and PCI, belonging to out-of-band services.

[0005] (3) A RAID card, a RAID card (Redundant Array of Independent Disks Controller), is mainly used to manage a combination of multiple hard disk drives to achieve data redundancy and protection. The system disk of a server generally needs to adopt mirror redundancy to ensure security and availability.

[0006] (4) A management network card for BMC services. To ensure the security and isolation of management operations, the BMC service requires a dedicated network card for management request communication, such as the Intel Platform Management Interface (IPMI).

[0007] Existing servers must include components such as BMC chips, CPU chips, raid cards, and BMC service management network cards. Therefore, the cost barrier is difficult to break and the degree of resource integration is not high. In addition, BMC services require dedicated BMC chips, which have poor hardware compatibility and are currently dominated by foreign semiconductor companies. The overall degree of localization of servers is low. BMC services are out-of-band management, and their monitoring scope is limited to hardware status and cannot monitor the use of resources at the user operating system level in real time. Summary of the invention

[0008] The main purpose of the present invention is to provide a single-chip server design method, a SOC chip and a server, aiming to solve the technical problem of high use cost of existing servers.

[0009] A first aspect of the present invention provides a single-chip server design method, the single-chip server design method comprising: the single-chip server adopts a single SOC chip, the SOC chip is used as a BMC chip carrying BMC services and a CPU chip carrying a user system;

[0010] The SOC chip is installed with a first operating system and used as a host machine. The kernel of the host machine starts an OpenBMC service and keeps it running. The OpenBMC service responds to management and monitoring requests from a user side. The OpenBMC service uses a gigabit network card provided by the SOC chip as a management network card.

[0011] The first virtual machine and the second virtual machine are started in the kernel of the host machine, the first virtual machine runs the image of the second operating system installed by the user for user-side operation; the second virtual machine runs the firmware program to manage the flash memory and provide block device services, and the block device of the second virtual machine is mapped to the first virtual machine and used as the system disk; the second virtual machine manages the flash memory based on the RAID engine of the SOC chip and adopts the RAID redundancy mechanism.

[0012] Optionally, in a first implementation manner of the first aspect of the present invention, the second virtual machine implements the following operations through the firmware program:

[0013] Execute the command set defined in the NVMe protocol to process read and write IO requests;

[0014] Perform physical operations on flash memory, including storing, reading, and erasing data;

[0015] Execute NVMe commands to manage data reading, writing, and storage.

[0016] Optionally, in a second implementation of the first aspect of the present invention, the single-chip server design method further includes:

[0017] Respectively direct the register, interrupt number, and memory to the second virtual machine, so that the physical addresses and interrupt numbers accessed by the second virtual machine in the host are exactly the same.

[0018] Optionally, in the third implementation manner of the first aspect of the present invention, the implementation manner of directly passing the register and interrupt number to the second virtual machine is as follows:

[0019] When starting the first operating system of the host, configure the register ranges and interrupt numbers of each Platform device in the device tree file;

[0020] After entering the first operating system of the host, use the VFIO-Platform driver to overwrite the original drivers of each Platform device and take over each Platform device;

[0021] When starting the second virtual machine using QEMU, add each VFIO-Platform device to directly pass each VFIO-Platform device to the second virtual machine;

[0022] During the startup process of the second virtual machine, through the registers of each VFIO-Platform device, call the first function to obtain the platform bus memory mapped I / O area of the corresponding VFIO-Platform device as a memory sub-region, add the memory sub-region to the memory area and use the physical register address of the corresponding VFIO-Platform device; through the registers of each VFIO-Platform device, call the second function to map the interrupt numbers of each VFIO-Platform device to physical interrupts.

[0023] Optionally, in the fourth implementation manner of the first aspect of the present invention, the implementation manner of directly passing the memory to the second virtual machine is as follows:

[0024] When starting the first operating system of the host, configure the memory range that needs to be directly passed to the second virtual machine for use in the device tree file;

[0025] Add a new kernel module to create a character device, obtain the physical address of the device through the character device, and map the physical address of the device to virtual memory;

[0026] Use the file descriptor returned by the character device generated by the new kernel module to map the physical address of the memory of the host to virtual memory and map the virtual memory to the same physical address of the second virtual machine.

[0027] Optionally, in the fifth implementation manner of the first aspect of the present invention, the single-chip server design method further includes:

[0028] When receiving the power-on / power-off request sent by the user side in the form of the https protocol, after parsing the power-on / power-off request, the OpenBMC service calls the API interface of the virtualization management tool to perform the power-on / power-off operation of the host machine;

[0029] When receiving the installation request sent by the user side in the form of the https protocol and the uploaded ISO image, after parsing the installation request, the OpenBMC boots the UEFI firmware through the first virtual machine to load the uploaded ISO image and perform the installation of the second operating system.

[0030] Optionally, in the sixth implementation manner of the first aspect of the present invention, the single-chip server design method further includes:

[0031] Add IOMMU support to the kernel startup parameters of the host machine;

[0032] After unbinding the hardware driver from the original kernel driver, bind it to the VFIO-Platform device to provide it to the first virtual machine for the first virtual machine to directly access the physical hardware.

[0033] Optionally, in the seventh implementation manner of the first aspect of the present invention, the single-chip server design method further includes:

[0034] The OpenBMC service communicates with the hardware inside the single-chip server through a preset interface to read the raw data for out-of-band monitoring, and after processing each piece of the raw data, provides it to the user side for display or alarm. The raw data includes one or more of a temperature sensor, a voltage monitor, and a fan status;

[0035] The first virtual machine communicates with the host machine in a bridging manner to periodically collect the resource usage data of the first virtual machine for in-band monitoring through the OpenBMC service, and after analyzing and processing the resource usage data, provides it to the user side for display.

[0036] The second aspect of the present invention provides a SOC chip, and the SOC chip is designed by using any one of the single-chip server design methods provided in the first aspect above.

[0037] The third aspect of the present invention provides a server, and the server includes the SOC chip provided in the second aspect above. The server is designed by using any one of the single-chip server design methods provided in the first aspect above.

[0038] The single-chip server design method provided by the present invention designs a single server that only uses a single SOC chip as both the BMC chip (BMC processor) for carrying BMC services and the CPU chip (CPU processor) for carrying user systems. Even without using a RAID card hardware for the system disk of the server, redundant protection can still be achieved, and management request communication for BMC services can also be realized without a separate management network card. In addition, the OpenBMC service adopted by the present invention can respond to management and monitoring requests on the user side, thus having both out-of-band and in-band management functions. Without affecting the service function and availability of the server, the present invention effectively reduces the hardware cost of the server and improves the degree of localization and the completeness of monitoring and management. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a schematic diagram of the technical architecture of the single-chip server in an actual application scenario in an embodiment of the present invention;

[0040] Figure 2 It is a schematic diagram of the system disk mapping operation NAND in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0041] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments described herein can be implemented in an order other than those illustrated or described herein. In addition, the term "comprising" or "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0042] Please refer to Figure 1 , Figure 1 It is a schematic diagram of the technical architecture of the single-chip server in an actual application scenario in an embodiment of the present invention.

[0043] As Figure 1 shown, the console is the user side, and the server side is a single-chip server designed by the design method of this embodiment. The user side communicates with the single-chip server in a web manner.

[0044] The single-chip server of this embodiment installs a single SOC (System on Chip) chip, which serves as both the chip for hosting the BMC service and the CPU chip of the user system. This SOC chip has characteristics such as high security, perfect data fault tolerance, support for NAND Flash management and RAID&EC protection, high capacity and flexible expansion, and rich interfaces and protocols.

[0045] In this embodiment, an operating system (OS) is installed in the SOC chip of the server as the host machine. For example, it can be Linux Centos / Debian / Ubuntu or a domestic operating system. The host machine kernel starts the OpenBMC service and keeps it running to respond to management and monitoring requests from the user side, such as power-on / off requests, installation requests, out-of-band monitoring, and in-band monitoring, etc. In addition, various drivers are also installed in the SOC chip, such as USB drivers, I2C drivers, LPC drivers, NIC drivers, etc.

[0046] The OpenBMC service is used to provide a flexible and scalable firmware stack for the Baseboard Management Controller (BMC), which is compatible with the management protocols (HTTP / HTTPS / IPMI / SNMP, etc.) and functions of traditional BMC services, including hardware monitoring, remote management, firmware update, etc. Its open-source nature enables it to quickly adapt to new hardware platforms and management requirements. The OpenBMC service uses the gigabit network card provided by this SOC chip as the management network card for network communication, thus saving the cost of the management network card for the server.

[0047] In this embodiment, since a single SOC chip is used as the chip for hosting the BMC service, in order to achieve interaction with the user side and at the same time implement the system disk of the server, two virtual machines are started in the kernel of the host machine:

[0048] (1) The first virtual machine VM1: Runs the image of the second operating system (user OS) installed by the user (such as Windows, Linux, etc.) for the user side to operate.

[0049] (2) The second virtual machine VM2: Runs the firmware program (FW), manages the flash memory, and provides block device services. The block device of the second virtual machine (such as an NVMe device) is mapped to the first virtual machine as the system disk. That is, the first virtual machine accesses the flash memory through the second virtual machine as its own storage device. Therefore, the performance is not restricted by using the virtual software layer. In addition, the second virtual machine manages the flash memory based on the RAID engine built into the SOC chip and adopts the RAID redundancy mechanism. The SOC chip itself has a RAID engine, and the RAID redundancy mechanism can be directly used for flash memory management, so there is no longer a need for RAID card hardware. The RAID redundancy mechanism can improve the reliability and security of data. Even if some flash memory fails, the integrity and recoverability of the data can be guaranteed.

[0050] Please refer to Figure 2 , Figure 2 which is the schematic diagram of the NAND mapping operation of the system disk in the embodiment of the present invention. SW represents the software layer, and HW represents the hardware layer. VM1 represents the first virtual machine, and VM2 represents the second virtual machine. Among them, the firmware program FW runs in VM2.

[0051] Taking the installation of the Linux operating system on the host as an example below, the Linux Kernel is the core part of the Linux operating system, responsible for managing the hardware resources of the system and providing a stable and unified operating environment for upper-layer application programs.

[0052] The KVM module is the abbreviation of Kernel-based Virtual Machine, which is a virtualization module under the Linux system. The KVM module utilizes the functions provided by the Linux kernel to provide a full virtualization environment through hardware virtualization technologies (such as Intel VT or AMD-V). This enables multiple completely independent virtual guest operating systems to run simultaneously on a single physical server. Each virtual machine has its own independent hardware resources such as CPU, memory, hard disk, and network interface, thus realizing resource isolation and efficient utilization.

[0053] The VFIO (Virtual Function I / O) module is a device passthrough technology for the Linux operating system that allows physical devices (such as GPUs, PCI devices, etc.) to be directly mapped into virtual machines or containers, thus enabling high-performance hardware access and the construction of bare-metal cloud servers. The VFIO module provides a set of user-space interfaces and kernel drivers, enabling users to fully control and manage devices, bypassing the performance bottlenecks of the virtualization layer to achieve lower latency and higher throughput. The VFIO module is flexibly designed and can easily add support for other types of hardware and IOMMUs (I / O Memory Management Units). The VFIO module makes full use of the direct memory access remapping and interrupt remapping features provided by VT-d / AMD-Vi technology, achieving I / O performance close to that of physical devices while ensuring the DMA security of the passthrough device.

[0054] QEMU (Quick Emulator) is an open-source hardware virtualization software that can run virtual machines on different host platforms. QEMU adopts a full-system emulation method and can simulate a complete computer system, including processors, memory, storage, and peripheral devices, etc. It provides a set of virtual hardware models, making the operating system in the virtual machine think that it directly interacts with the hardware, but in fact, it interacts with the hardware simulated by QEMU. KVM (Kernel-based Virtual Machine) is another open-source virtualization technology and is part of the Linux kernel. KVM utilizes hardware extensions such as Intel VT or AMD-V to achieve efficient hardware-assisted virtualization. KVM provides a virtualization framework, while QEMU is usually used as a user-space component to simulate devices. QEMU can simulate I / O devices (such as network cards, disks, etc.), and KVM is responsible for the virtualization of the CPU and memory. Using QEMU and KVM together can achieve virtualization in the true sense, providing virtualization of the CPU, memory, and I / O devices. This combined method can make full use of the advantages of both, providing high performance, flexibility, and extensive device support. In QEMU-KVM, KVM runs in the kernel space and is responsible for the virtualization of the CPU and memory; while QEMU runs in the user space and is responsible for simulating I / O devices and other hardware. Through the / ioctl call to the / dev / kvm interface, QEMU hands over part of the CPU instructions to the kernel module KVM for processing, thus achieving efficient virtualization.

[0055] In one embodiment, the second virtual machine implements the following operations through a firmware program:

[0056] (1) Execute the command set defined in the NVMe protocol to process read and write I / O requests;

[0057] (2) Perform physical operations on the flash memory, including data storage, reading, and erasing;

[0058] (3) Execute NVMe commands to manage data reading, writing, and storage. The algorithm optimization logic in the firmware program determines how to efficiently execute NVMe commands, thereby managing data reading, writing, and storage, such as wear leveling, garbage collection, error handling, etc.

[0059] NVMe (Non-Volatile Memory Express) is a high-performance, PCIe-based storage interface and communication protocol designed specifically for SSDs (Solid State Drives). Although NVMe itself is not a component of the SOC chip, some high-performance SOC chips may integrate NVMe-supporting controllers or interfaces to enable access and control of high-speed SSDs. Whether an SOC chip integrates NVMe support depends on its design goals and application scenarios.

[0060] NFC (Nand Flash Controller) is the NAND flash controller integrated in the SOC chip and is a key component for managing data interaction between the NAND flash and the host system. It is responsible for performing read and write operations, data management, error correction, and optimizing storage performance between the central processing unit (CPU) of a computer or other device and the flash memory.

[0061] NAND (Not AND) is a non-volatile storage technology that uses flash memory to store data. NAND flash is a commonly used storage medium in solid state drives (SSDs), USB flash drives, SD cards, and other portable storage devices.

[0062] To enable the firmware program to run properly in the second virtual machine and thus perform the above operations, it is necessary to construct a running environment for the firmware program that is basically the same as the bare-metal environment.

[0063] In one embodiment, the following design is adopted to ensure the proper operation of the firmware program in the second virtual machine, specifically as follows:

[0064] Directly pass the registers, interrupt numbers, and memory to the second virtual machine respectively, so that the physical addresses and interrupt numbers accessed by the second virtual machine are exactly the same as those in the host machine.

[0065] (1) The implementation method of directly passing the registers and interrupt numbers to the second virtual machine is as follows:

[0066] 1.1. When starting the first operating system of the host machine, configure the register ranges and interrupt numbers of each Platform device in the device tree file;

[0067] 1.2. After entering the first operating system of the host, use the VFIO-Platform driver to overwrite the original drivers of each Platform device and take over each Platform device;

[0068] In this embodiment, add the register ranges and interrupt numbers of Platform devices such as NVMe and NFC to the device tree file used when the operating system of the host is started. After entering the operating system of the host, the Platform devices added in the above device tree file can be seen in directories such as / sys / bus / platform / devices / , and then use VFIO-Platform to overwrite the original drivers and take over the Platform devices to obtain VFIO-Platform devices.

[0069] Platform device is an architecture in the Linux system used to manage and organize hardware devices independent of the system bus. These devices include but are not limited to GPIO controllers, temperature sensors, clock controllers, etc. Platform devices are connected to the system through a virtual bus (platform bus). Platform Driver is a driver model mainly used to manage platform-specific devices. Platform Driver matches devices and driver programs through the Device Tree. Usually, devices are registered in the kernel during the platform initialization phase, and the platform_device structure is used as the representation of the device.

[0070] VFIO (Virtual Function I / O) is a framework in the operating system kernel designed to provide a mechanism that enables user-space programs to directly and securely access and manage hardware devices. Through the VFIO framework, user-space programs can obtain direct control of hardware devices. VFIO-Platform device refers to a Platform device managed and directly passed through via the VFIO framework. Platform devices are usually integrated on the system board and do not rely on traditional physical buses (such as PCI, USB, etc.), but are directly connected to the system's processor or memory controller. Through the VFIO framework, each Platform device can be securely and efficiently exposed to user-space programs or virtual machines, thus achieving more flexible and efficient utilization of hardware resources.

[0071] 1.3. When starting the second virtual machine using QEMU, add each VFIO-Platform device to directly pass through each VFIO-Platform device to the second virtual machine;

[0072] QEMU (Quick EMUlator) is an open-source machine emulator and virtualizer. It can simulate an entire computer, including the central processing unit, memory, hard disk, and other hardware devices. QEMU supports processors of multiple architectures and can run on different host operating systems.

[0073] When starting the second virtual machine using QEMU, through QEMU parameter configuration, add VFIO-Platform devices, such as passing through VFIO-Platform devices like NVME and NFC to the second virtual machine.

[0074] 1.4. During the startup process of the second virtual machine, through the registers of each VFIO-Platform device, call the first function to obtain the platform bus memory-mapped I / O area of the corresponding VFIO-Platform device as a memory sub-region, add the memory sub-region to the memory area, and use the physical register address of the corresponding VFIO-Platform device; through the registers of each VFIO-Platform device, call the second function to map the interrupt numbers of each VFIO-Platform device to physical interrupts.

[0075] In this embodiment, after completing the above steps, it is also necessary to further transform the register mapping and interrupt mapping respectively, specifically:

[0076] (1) Register mapping transformation

[0077] During the startup process of the second virtual machine, through the registers of each VFIO-Platform device, call the first function (such as the platform_bus_map_mmio function) to obtain the platform bus memory-mapped I / O area of the corresponding VFIO-Platform device as a memory sub-region, add the memory sub-region to the memory area, and use the physical register address of the corresponding VFIO-Platform device, so that the physical addresses accessed in the second virtual machine are exactly the same as those in the host machine.

[0078] (2) Interrupt mapping transformation

[0079] Through the registers of each VFIO-Platform device, call the second function (such as the platform_bus_map_irq function) to map the interrupt numbers of each VFIO-Platform device to physical interrupts, so that the interrupt numbers accessed in the second virtual machine are exactly the same as those in the host machine.

[0080] (2) The implementation method of directly passing memory to the second virtual machine is as follows:

[0081] 2.1. When starting the first operating system of the host, configure the memory range to be directly passed to the second virtual machine in the device tree file, including two memory devices, DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory).

[0082] 2.2. Add a kernel module to create a character device, obtain the physical address of the device through the character device, and map the physical address of the device to virtual memory.

[0083] 2.3. Use the file descriptor returned by the character device generated by the newly added kernel module to map the physical address of the memory of the host to virtual memory and map the virtual memory to the same physical address of the second virtual machine, so as to ensure that the physical addresses of the memory in the second virtual machine and the physical machine are exactly the same.

[0084] In this embodiment, through the above design, the register, interrupt number, and memory are directly passed to the second virtual machine respectively, so that the physical addresses and interrupt numbers accessed in the second virtual machine and the host are exactly the same, thereby ensuring the normal operation of the firmware program in the second virtual machine.

[0085] As Figure 1 shown, to further implement the OpenBMC service to respond to the management and monitoring requests on the user side, this embodiment further processes the BMC requests and the system side as follows:

[0086] (1) Power-on and power-off request processing

[0087] When receiving the power-on and power-off request sent in the form of the https protocol from the user side, after parsing the power-on and power-off request, the OpenBMC service calls the API interface of the virtualization management tool to perform the power-on and power-off operations of the host. For example, the OpenBMC service calls the API interfaces system_powerdown / system_reset of libvirt to complete the power-on and power-off operations of the host.

[0088] (2) Installation request processing

[0089] When receiving the installation request sent in the form of the https protocol from the user side and the uploaded ISO image, after parsing the installation request, OpenBMC starts the UEFI (Unified Extensible Firmware Interface) firmware through the first virtual machine to load the uploaded ISO image and perform the installation of the second operating system. The UEFI firmware is software on the computer motherboard that runs first when the computer starts, responsible for initializing the hardware, detecting the hardware functions, and booting the operating system.

[0090] (3) Hardware driver binding

[0091] Add IOMMU (Input-Output Memory Management Unit) support in the kernel startup parameters of the host machine. Then, unbind the hardware driver from the original kernel driver and bind it to the VFIO-Platform device to provide it to the first virtual machine. As a result, the first virtual machine can directly access the physical hardware.

[0092] IOMMU is used to manage and translate the access of peripherals (such as network adapters, graphics cards, storage devices, etc.) to the system memory, realizing the virtualization and conversion of physical addresses, providing address space isolation and memory protection for direct memory access, thereby enhancing the security, stability, and performance of the system.

[0093] The OpenBMC service designed in this embodiment can not only obtain the hardware status but also obtain the real-time situation of the user system resources, combining the in-band and out-of-band monitoring functions.

[0094] (1) Out-of-band monitoring

[0095] The OpenBMC service communicates with the hardware inside the single-chip server through the preset interface to read the original data for out-of-band monitoring, and processes each piece of original data and provides it to the user side for display or alarm. The original data includes one or more of temperature sensors, voltage monitors, and fan status.

[0096] For example, use interfaces such as I2C, GPIO, IPMI, etc. to directly communicate with the hardware, read the original data such as temperature sensors, voltage monitors, and fan status, and then display or alarm after processing.

[0097] (2) In-band monitoring

[0098] The first virtual machine communicates with the host machine in a bridging manner to periodically collect the resource usage data of the first virtual machine for in-band monitoring through the OpenBMC service, and analyzes and processes the resource usage data and provides it to the user side for display.

[0099] For example, the virtual machine VM1 running the user operating system communicates with the host machine in a bridging manner, periodically collects the resource usage data of the virtual machine VM1, analyzes and processes it, and provides it to the web side for display, which is convenient for the user to view.

[0100] The above Figure 1 、 Figure 2 describe in detail the design method of the single-chip server in the embodiment of the present invention. The embodiment of the present invention also provides a SOC chip, which is designed by using the design method of the single-chip server described in any one of the above embodiments. The main design is as follows:

[0101] (1) The SOC chip has features such as high security, perfect data fault tolerance, support for NAND Flash management and RAID&EC protection, high capacity and flexible expansion, and rich interfaces and protocols.

[0102] (2) Install the first operating system on the SOC chip and use it as the host machine

[0103] The kernel of the host machine starts the OpenBMC service and keeps it running. The OpenBMC service responds to management and monitoring requests from the user side. The OpenBMC service uses the gigabit network card provided by the SOC chip as the management network card;

[0104] (3) Install the first virtual machine and the second virtual machine in the kernel of the host machine

[0105] The first virtual machine runs the image of the second operating system installed by the user for the user side to operate. The second virtual machine runs the firmware program to manage the flash memory and provides block device services. Map the block device of the second virtual machine to the first virtual machine and use it as the system disk. The second virtual machine manages the flash memory based on the RAID engine built into the SOC chip and adopts the RAID redundancy mechanism.

[0106] The embodiment of the present invention also provides a server, which includes the SOC chip described in the above embodiment, and the server is designed by using the single-chip server design method described in any one of the above embodiments.

[0107] The server designed in this embodiment saves hardware costs such as BMC chips, RAID cards, and BMC service management network cards. It not only solves the problem of chip compatibility of the server BMC service, but also significantly improves the degree of localization implementation. At the same time, compared with the traditional BMC service, the server BMC service is compatible with out-of-band and in-band monitoring content, improving the monitoring completeness, and providing reference and inspiration for more efficient and flexible resource configuration management strategies in the industry.

[0108] The server design solution provided in this embodiment has a great cost advantage compared with the current existing servers, and is very suitable for scenarios with extreme requirements for server costs, such as cold data storage nodes, etc. The chip compatibility of the BMC service has been greatly improved and is no longer restricted by foreign "special chips".

[0109] Those skilled in the art can clearly understand that when the integrated module or unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0110] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of various embodiments of the present invention.

Claims

1. A single-chip server design method, characterized in that: The single-chip server design method includes: the single-chip server adopts a single SOC chip, and the SOC chip is used as a BMC chip carrying BMC services and a CPU chip carrying a user system at the same time; The SOC chip is installed with a first operating system and used as a host machine. The kernel of the host machine starts an OpenBMC service and keeps it running. The OpenBMC service responds to management and monitoring requests from a user side. The OpenBMC service uses a gigabit network card provided by the SOC chip as a management network card. The first virtual machine and the second virtual machine are started in the kernel of the host machine, the first virtual machine runs the image of the second operating system installed by the user for user-side operation; the second virtual machine runs the firmware program to manage the flash memory and provide block device services, and the block device of the second virtual machine is mapped to the first virtual machine and used as the system disk; the second virtual machine manages the flash memory based on the RAID engine of the SOC chip and adopts the RAID redundancy mechanism.

2. The single-chip server design method according to claim 1, characterized in that: The second virtual machine implements the following operations through the firmware program: Execute the command set defined in the NVMe protocol to process read and write IO requests; Perform physical operations on flash memory, including storing, reading, and erasing data; Execute NVMe commands to manage data reading, writing, and storage.

3. The single-chip server design method according to claim 2, characterized in that: The single-chip server design method further includes: The register, interrupt number and memory are respectively passed directly to the second virtual machine, so that the physical address and interrupt number accessed in the second virtual machine and the host machine are completely consistent.

4. The single-chip server design method according to claim 3, characterized in that: The implementation method of passing the register and the interrupt number directly to the second virtual machine is as follows: When starting the first operating system of the host machine, configuring the register range and interrupt number of each Platform device in the device tree file; After entering the first operating system of the host machine, use the VFIO-Platform driver to overwrite the original driver of each Platform device and take over each Platform device; When starting the second virtual machine using QEMU, adding each VFIO-Platform device to directly pass each VFIO-Platform device to the second virtual machine; During the startup process of the second virtual machine, the first function is called through the registers of each VFIO-Platform device to obtain the platform bus memory-mapped I / O area of ​​the corresponding VFIO-Platform device and use it as a memory sub-area, the memory sub-area is added to the memory area, and the physical register address of the corresponding VFIO-Platform device is used; through the registers of each VFIO-Platform device, the second function is called to map the interrupt number of each VFIO-Platform device to the physical interrupt.

5. The single-chip server design method according to claim 3, characterized in that: The implementation method of passing the memory directly to the second virtual machine is as follows: When starting the first operating system of the host machine, configuring in a device tree file a memory range that needs to be directly passed to the second virtual machine for use; Added a kernel module to create character devices, obtain device physical addresses through character devices, and map device physical addresses to virtual memory; Using the file descriptor returned by the character device generated by the newly added kernel module, the physical address of the host machine's memory is mapped to the virtual memory, and the virtual memory is mapped to the same physical address of the second virtual machine.

6. The single-chip server design method according to claim 1, characterized in that: The single-chip server design method further includes: When receiving a power-on and power-off request sent by the user side in the form of https protocol, the OpenBMC service parses the power-on and power-off request and calls the API interface of the virtualization management tool to perform the power-on and power-off operation of the host machine; When receiving the installation request and the uploaded ISO image sent by the user in the form of https protocol, the OpenBMC parses the installation request, starts the UEFI firmware through the first virtual machine to load the uploaded ISO image and executes the installation of the second operating system.

7. The single-chip server design method according to claim 1, characterized in that: The single-chip server design method further includes: Adding IOMMU support to the kernel boot parameters of the host machine; After the hardware driver is unbound from the original kernel driver, it is bound to the VFIO-Platform device and provided to the first virtual machine so that the first virtual machine can directly access the physical hardware.

8. The single-chip server design method according to claim 1, characterized in that: The single-chip server design method further includes: The OpenBMC service communicates with the hardware in the single-chip server through a preset interface to read raw data for out-of-band monitoring, and processes each of the raw data and provides it to a user side for display or alarm, wherein the raw data includes one or more of a temperature sensor, a voltage monitor, and a fan status; The first virtual machine communicates with the host machine in a bridging manner, so as to periodically collect resource usage data of the first virtual machine for in-band monitoring through the OpenBMC service, and analyze and process the resource usage data and provide it to the user side for display.

9. A SOC chip, characterized in that: The SOC chip is designed using the single-chip server design method described in any one of claims 1-8.

10. A server, characterized in that: The server comprises the SOC chip according to claim 9, and the server is designed by adopting the single-chip server design method according to any one of claims 1-8.

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