Single-phase voltage-multiplying interleaving rectifying circuit for direct-current power supply

Abstract

The invention discloses a single-phase voltage-multiplying interleaving rectifying circuit for direct-current power supply. The circuit comprises an alternating-current power supply Ug, an inductor L1, an inductor L2, diodes D1 to D6, switching tubes S1 to S2, a capacitor C1, a capacitor C2, a capacitor C3 and a load RL, the capacitor C2, the capacitor C3, the diode D5 and the inductor L2 form a voltage-multiplying unit. The advantages of the single-phase interleaving parallel technology and the voltage doubling rectifying circuit are combined, the multiple power converter units operate in an interleaving parallel mode, and voltage multiplication is achieved through the voltage doubling rectifying circuit. Compared with a traditional rectification circuit, the technology can effectively reduce the voltage stress of a power device, the input current THD and the size of an EMI filter through staggered parallel operation of a plurality of power converter units, thereby improving the overall performance and reliability of a system. Meanwhile, the voltage doubling rectifying circuit can be designed and adjusted according to requirements so as to adapt to different input and output voltage requirements.

Description

Technical Field

[0001] The present invention relates to a single-phase rectifier circuit, in particular to a single-phase voltage-doubling interleaved parallel rectifier circuit for DC power supply. Background Art

[0002] With the rapid development of renewable energy, large-scale renewable energy power generation systems need to be connected to traditional power systems, and the power system has higher and higher requirements for the quality of electric energy conversion. DC power supply systems (such as data center power supplies, industrial equipment power supplies, etc.) pose strict requirements on the high efficiency, high power density, and wide input adaptability of the front-end rectifier circuit. Traditional solutions mainly use interleaved parallel power factor correction circuits and cascaded voltage-doubling topologies, but there are still significant defects in terms of high voltage gain, device stress, and system integration. The specific analysis is as follows:

[0003] 1. The traditional interleaved parallel PFC reduces the input current ripple through multi-phase parallel connection, but its voltage gain is the same as that of the traditional Boost topology. When the input is AC (peak value 311V), if the output is 800V DC voltage, a relatively high duty cycle is required, which will cause the voltage stress borne by the MOSFET during turn-off to be the DC load output voltage, and the reverse recovery current of the body diode of the totem pole rectifier circuit will cause a significant increase in switching loss at high frequencies.

[0004] 2. To achieve high-voltage output, the traditional solution needs to adopt a "rectifier circuit + DC / DC cascade structure", which requires the introduction of additional components. Although this method can achieve wide-range output, the efficiency after the superposition of the two levels will be significantly reduced. In addition, the introduction of the post-stage DC / DC unit leads to an increase in the volume of the circuit. Taking an 800V output as an example, at least 5 diodes and 1 high-voltage capacitor are required, and the PCB area increases significantly.

[0005] 3. To improve the power density, the traditional solution tends to a high-frequency design, such as above 150KHz. However, high-frequency operation will exacerbate the problems of switching loss and EMI. The charge and discharge loss of the output capacitance of the MOSFET is proportional to the efficiency. As the switching frequency increases, the loss also increases. And high-frequency harmonics require a larger volume of common-mode inductors, resulting in an increase in the volume of the charging pile and unable to meet the high power density of the circuit. Summary of the Invention

[0006] To solve the above technical problems, the present invention provides a single-phase voltage-doubling interleaved parallel rectifier circuit for DC power supply. This interleaved parallel rectifier circuit combines the advantages of single-phase interleaved parallel technology and voltage-doubling units. Through the interleaved parallel operation of multiple power converter units and in combination with voltage-doubling units, voltage multiplication is achieved. The voltage stress of the switching tubes and one diode, as well as the current stress of another diode and one inductor, of this single-phase voltage-doubling interleaved parallel rectifier circuit are significantly reduced. It not only has the characteristics of high efficiency, stability, and flexibility; at the same time, this single-phase voltage-doubling interleaved parallel rectifier circuit can also be designed and adjusted as needed to adapt to different input and output voltage requirements.

[0007] The technical solution adopted by the present invention is as follows:

[0008] A single-phase voltage-doubling pseudo totem-pole rectifier circuit for a DC charging pile, comprising:

[0009] AC power supply U g , inductor L 1 , inductor L 2 , inductor L 3 , diode D 1 ~D 6 , switching tube S 1 ~S 2 , capacitor C 1 , capacitor C 2 , capacitor C 3 , load R L ;

[0010] One end of the power supply U g is respectively connected to the anode of the diode D 1 and the cathode of the diode D 3 , and they are commonly connected to the node a;

[0011] The other end of the power supply U g is respectively connected to the anode of the diode D 2 and the cathode of the diode D 4 , and they are commonly connected to the node b;

[0012] The cathode of the diode D 1 is respectively connected to the cathode of the diode D 2 , one end of the inductor L 1 , one end of the inductor L 2 , and they are commonly connected to the node c;

[0013] The anode of the diode D 3 is respectively connected to the anode of the diode D 4 , the source of the switching tube S 1 , S 2 , the source of the capacitor C 2 , the negative electrode of the capacitor C1 The negative electrode of L is connected to the other end of the load R and they are jointly connected to node d;

[0014] Inductor L 1 The other ends of are respectively connected to the drain of the switching transistor S 1 The drain of the switching transistor S 2 The drain of the switching transistor S, the other end of the inductor L 1 The anode of the diode D 5 The negative electrode of the capacitor C 3 are connected and jointly connected to node e;

[0015] Diode D 5 The cathode of is respectively connected to the positive electrode of the capacitor C 2 The positive electrode of, the one end of the inductor L 3 are connected and jointly connected to node g;

[0016] Diode D 6 The anode of is respectively connected to the other end of the inductor L 3 The positive electrode of the capacitor C 3 are connected and jointly connected to node h;

[0017] Diode D 6 The cathode of is respectively connected to the positive electrode of the capacitor C 1 The positive electrode of, the other end of the load R L are connected and jointly connected to node p. The capacitor C 2 The capacitor C 3 The diode D 5 The inductor L 3 are connected to form a voltage multiplier unit.

[0018] The four diodes D 1 , D 2 , D 3 , D 4 in the rectifier bridge of the rectifier circuit can all be replaced by switching transistors containing anti-parallel diodes such as MOSFETs, IGBTs or IGCTs, which can improve the rectification efficiency, reduce power consumption and voltage loss, and at the same time have good controllability, reverse blocking ability and heat dissipation performance.

[0019] This rectifier circuit includes 6 operating modes:

[0020] Mode 1: The switching transistor S 2 is turned off, S 1 is turned on, the current flows through the inductor L 1 , and returns to the power supply U 1 after passing through the switching transistor S g ; At this time, the power supply U g charges the inductor L 1 ; The inductor L 2 , through the diode D5 , inductor L 3 , diode D 6 charges the load R L ; capacitor C 2 charges capacitor C through inductor L 3 , diode D 6 ; inductor L 1 charges capacitor C 3 ; inductor L 3 charges capacitor C 1 ; the current in inductor L starts to linearly increase from zero, and the current in inductor L 2 continues to decrease;

[0021] Mode 2: Switching transistor S 2 remains off, S 1 remains on, and the current flows through inductor L 1 , switching transistor S 1 and then returns to power supply U g ; at this time, power supply U g continues to charge inductor L 1 ; capacitor C 3 charges capacitor C through inductor L 3 ; capacitor C 2 charges capacitor C 1 ; capacitor C L charges load R 2 ; the current in inductor L has decreased to 0, and the current in inductor L 1 continues to increase;

[0022] Mode 3: Switching transistors S 1 , S 2 are all off, and inductor L 1 charges load R through diode D 5 , inductor L 3 , diode D 6 ; inductor L L discharges to zero; capacitor C 2 charges capacitor C through inductor L 2 , diode D 3 ; inductor L 6 charges capacitor C 1 ; inductor L 3 charges capacitor C 3 ; inductor L 1 ; the current in inductor L starts to linearly decrease, and the current in inductor L 2 continues to be 0;

[0023] Mode 4: Switching transistor S 1 is off, S 2 is on, and the current flows through inductor L 2 , switching transistor S 2 and then returns to power supply U g; At this time, the power supply U g charges the inductor L 2 ; The inductor L 1 charges the load R through the diode D 5 and the inductor L 3 and the diode D 6 ; The capacitor C L charges the capacitor C through the inductor L 2 and the diode D 3 ; The inductor L 6 charges the capacitor C 1 ; The inductor L 3 charges the capacitor C 3 ; The current in the inductor L 1 continues to linearly decrease, and the current in the inductor L 2 starts to linearly increase;

[0024] Mode 5: The switching transistor S 1 remains off, and S 2 remains on, and the current flows through the inductor L 2 , and returns to the power supply U after passing through the switching transistor S 2 ; At this time, the power supply U g continues to charge the inductor L g ; The capacitor C 2 charges the capacitor C through the inductor L 3 ; The capacitor C 3 charges the load R 2 ; The current in the inductor L 1 decreases to 0, and the current in the inductor L L continues to increase; 1 2 1 2

[0025] Mode 6: The switching transistors S 1 and S 2 are all turned off, and the inductor L 2 charges the load R through the diode D 5 and the inductor L 3 and the diode D 6 ; The capacitor C L charges the capacitor C through the inductor L 2 and the diode D 3 ; The inductor L 6 charges the capacitor C 1 ; The inductor L 3 charges the capacitor C 3 ; The current in the inductor L 1 continues to be 0, and the current in the inductor L 2 starts to linearly decrease.

[0026] Among the 6 operating modes, the capacitor voltage U 1 = U 2 + U 3 = Udc , where U 1 represents the voltage of capacitor C 1 , U 2 represents the voltage of capacitor C 2 , U 3 represents the voltage of capacitor C3, U dc represents the DC load output voltage.

[0027] A single-phase voltage-doubling interleaved parallel rectifier circuit for DC power supply according to the present invention has the following beneficial effects:

[0028] 1) The single-phase voltage-doubling interleaved parallel rectifier circuit of the present invention itself has the functions of boosting and rectifying. This single-phase voltage-doubling interleaved parallel rectifier circuit has fewer power transistors, and the voltage stress of the switching transistor and one diode, as well as the current stress of the other diode and the inductor, are significantly reduced. Inexpensive switching devices can be selected to save costs.

[0029] 2) The single-phase voltage-doubling interleaved parallel rectifier circuit of the present invention itself has the functions of boosting and rectifying. Through the basic principle of voltage-doubling rectification, the single-phase voltage-doubling Boost rectifier circuit can boost the input single-phase AC voltage several times.

[0030] 3) The present invention adopts a quasi-Z-source network to form a voltage-doubling unit, achieving voltage multiplication, and has the advantages of high efficiency, stability, and flexibility. At the same time, this single-phase voltage-doubling interleaved parallel rectifier circuit can also be designed and adjusted according to needs to adapt to different input and output voltage requirements.

[0031] 4) The single-phase voltage-doubling interleaved parallel rectifier circuit of the present invention adopts an interleaved parallel design, enabling each rectifier unit to work alternately, thus effectively dispersing the current load and reducing the current stress of a single rectifier unit. This not only improves the overall working efficiency of the rectifier circuit but also extends the service life of the rectifier unit. Description of the Drawings

[0032] The present invention will be further described below in conjunction with the drawings and examples;

[0033] Figure 1 is a schematic diagram of the principle of a single-phase voltage-doubling interleaved parallel rectifier circuit for DC power supply according to the present invention.

[0034] Figure 2 is a schematic diagram of the current path of the single-phase voltage-doubling interleaved parallel rectifier circuit in working mode 1.

[0035] Figure 3 is a schematic diagram of the current path of the single-phase voltage-doubling interleaved parallel rectifier circuit in working mode 2.

[0036] Figure 4Schematic diagram of the current path in operating mode 3 of the single-phase voltage-doubling interleaved rectifier circuit.

[0037] Figure 5 Schematic diagram of the current path in operating mode 4 of the single-phase voltage-doubling interleaved rectifier circuit.

[0038] Figure 6 Schematic diagram of the current path in operating mode 5 of the single-phase voltage-doubling interleaved rectifier circuit.

[0039] Figure 7 Schematic diagram of the current path in operating mode 6 of the single-phase voltage-doubling interleaved rectifier circuit.

[0040] Figure 8 For the input voltage U of the single-phase voltage-doubling interleaved rectifier circuit g and current i g waveform diagram.

[0041] Figure 9 For the output DC voltage U of the single-phase voltage-doubling interleaved rectifier circuit dc waveform diagram.

[0042] Figure 10 For the output DC voltage U when the load of the single-phase voltage-doubling interleaved rectifier circuit is halved dc waveform diagram. Detailed implementation method

[0043] As Figure 1 shown, a single-phase voltage-doubling pseudo totem-pole rectifier circuit for a DC charging pile includes:

[0044] AC power supply U g 、inductor L 1 、inductor L 2 、inductor L 3 、diode D 1 ~D 6 、switching tube S 1 ~S 2 、capacitor C 1 、capacitor C 2 、capacitor C 3 、load R L ;

[0045] One end of the power supply U g is respectively connected to the anode of the diode D 1 and the cathode of the diode D 3 and commonly connected to node a;

[0046] The other end of the power supply U g is respectively connected to the anode of the diode D 2 and the cathode of the diode D 4 and commonly connected to node b;

[0047] Diode D 1 The cathodes of which are respectively connected to the cathode of diode D 2 and one end of inductor L 1 and one end of inductor L 2 and are commonly connected to node c;

[0048] Diode D 3 The anodes of which are respectively connected to the anode of diode D 4 and the source of switching transistor S 1 and the source of S 2 and the negative electrode of capacitor C 2 and the negative electrode of capacitor C 1 and the other end of load R L and are commonly connected to node d;

[0049] Inductor L 1 The other end of which is respectively connected to the drain of switching transistor S 1 and the drain of switching transistor S 2 and the other end of inductor L 1 and the anode of diode D 5 and the negative electrode of capacitor C 3 and are commonly connected to node e;

[0050] Diode D 5 The cathodes of which are respectively connected to the positive electrode of capacitor C 2 and one end of inductor L 3 and are commonly connected to node g;

[0051] Diode D 6 The anodes of which are respectively connected to the other end of inductor L 3 and the positive electrode of capacitor C 3 and are commonly connected to node h;

[0052] Diode D 6 The cathodes of which are respectively connected to the positive electrode of capacitor C 1 and the other end of load R L and are commonly connected to node p. The capacitor C 2 and capacitor C 3 and diode D 5 and inductor L 3 are connected to form a voltage doubling unit.

[0053] The following describes the rectifier circuit of the present invention, the specific working principle of a single-phase voltage doubling interleaved parallel rectifier circuit for DC power supply. The single-phase voltage doubling interleaved parallel rectifier circuit has 6 working modes, among which the capacitor voltage U 1 =U 2 +U 3 =U dc, the specific analysis process is as follows:

[0054] Figure 2 It is a schematic diagram of the current path in Mode 1: The switch tube S 2 turns off, S 1 turns on, and the current flows through the inductor L 1 , the switch tube S 1 and then returns to the power supply U g ; At this time, the power supply U g charges the inductor L 1 ; The inductor L 2 , through the diode D 5 , the inductor L 3 , the diode D 6 charges the load R L ; The capacitor C 2 charges the capacitor C 3 through the inductor L 6 , the diode D 1 ; The inductor L 3 charges the capacitor C 3 ; The inductor L 1 the current in it starts to rise linearly from zero, and the current in the inductor L 2 continues to decrease.

[0055] Figure 3 It is a schematic diagram of the current path in Mode 2: The switch tube S 2 continues to turn off, S 1 continues to turn on, and the current flows through the inductor L 1 , the switch tube S 1 and then returns to the power supply U g ; At this time, the power supply U g continues to charge the inductor L 1 ; The capacitor C 3 charges the capacitor C 3 through the inductor L 2 ; The capacitor C 1 charges the load R L ; The current in the inductor L 2 has dropped to 0, and the current in the inductor L 1 continues to rise.

[0056] Figure 4 It is a schematic diagram of the current path in Mode 3: The switch tubes S 1 and S 2 are all turned off, and the inductor L 1 through the diode D 5 , the inductor L 3 , the diode D 6 charges the load R L ; The inductor L 2 discharges to zero; The capacitor C 2 through the inductor L3 and diode D 6 charges capacitor C 1 ; inductor L 3 charges capacitor C 3 ; the current in inductor L 1 starts to linearly decrease, and the current in inductor L 2 continues to be 0.

[0057] Figure 5 is a schematic diagram of the current path in Mode 4: Switching transistor S 1 turns off, S 2 turns on, and the current flows through inductor L 2 , switching transistor S 2 and then returns to power supply U g ; at this time, power supply U g charges inductor L 2 ; inductor L 1 charges load R 5 through diode D 3 , inductor L 6 , diode D L ; capacitor C 2 charges capacitor C 3 through inductor L 6 , diode D 1 ; inductor L 3 charges capacitor C 3 ; inductor L 1 continues to linearly decrease, and the current in inductor L 2 starts to linearly increase.

[0058] Figure 6 is a schematic diagram of the current path in Mode 5: Switching transistor S 1 continues to turn off, S 2 continues to turn on, and the current flows through inductor L 2 , switching transistor S 2 and then returns to power supply U g ; at this time, power supply U g continues to charge inductor L 2 ; capacitor C 3 charges capacitor C 3 through inductor L 2 ; capacitor C 1 charges load R L ; inductor L 1 drops to 0, and the current in inductor L 2 continues to increase.

[0059] Figure 7 is a schematic diagram of the current path in Mode 6: Switching transistors S 1 and S 2 both turn off, inductor L2 Through diode D 5 , inductor L 3 , diode D 6 charge the load R L ; Capacitor C 2 charges capacitor C through inductor L 3 , diode D 6 ; L 1 inductor charges capacitor C 3 ; L 3 charges capacitor C 1 ; The current in L continues to be 0, and the current in inductor L 2 starts to linearly decrease.

[0060] Table 1 is a correspondence table of the pulse distribution mode of the rectifier circuit switching tube, the DC-side inductor, and the capacitor operating state, where the conduction and cutoff of the switching tube are represented by "1" and "0" respectively, and the zero inductor discharge is represented by "0".

[0061] Table 1 Correspondence Table of Pulse Distribution Mode of Rectifier Circuit Switching Tube, DC-Side Inductor, and Capacitor Operating State

[0062]

[0063] To verify that a single-phase voltage-doubling interleaved parallel rectifier circuit for DC power supply of the present invention can achieve the voltage-doubling function, under the PR control strategy, experimental verification is carried out. Experimental parameters: RMS input voltage 220V, operating frequency 50Hz, inductors L 1 , L 2 are 2.5mH, inductor L 3 is 8mH, capacitor C 1 is 3000uF, capacitor C 2 is 250uF, capacitor C 3 is 160uF, switching frequency 20kHz, load 100Ω.

[0064] Figure 8 is the waveform diagram of the input voltage U g and current i g of the single-phase voltage-doubling interleaved parallel rectifier circuit. By controlling the conduction and cutoff of the switch converter, the present invention makes the input current waveform as close to a sine wave as possible, which can further reduce the harmonic content of the grid-side current. As shown in Figure 8 the waveform, the voltage and current are in the same phase, that is, the power factor correction function is achieved.

[0065] Figure 9 is the waveform diagram of the output DC voltage U dc of the single-phase voltage-doubling interleaved parallel rectifier circuit. The present invention designs a single-phase voltage-doubling interleaved parallel rectifier circuit with an input of 220V and an output of 800V, which consists of Figure 9It can be seen from the waveform that the voltage U is achieved dc doubled.

[0066] Figure 10 It is the waveform diagram of the output DC voltage U when the load of the single-phase voltage-doubling interleaved parallel rectifier circuit is halved. When the load suddenly reduces from 100Ω to 50Ω at 0.3s and returns to 50Ω at 0.5s, the output DC voltage U dc The waveform is slightly adjusted from 0.3s to 0.5s and quickly returns to the stable state, indicating that the single-phase voltage-doubling interleaved parallel rectifier circuit under the hysteresis control strategy has strong system dynamic regulation ability and good anti-disturbance performance. dc The present invention proposes a single-phase voltage-doubling interleaved parallel rectifier circuit for DC power supply. This single-phase voltage-doubling interleaved parallel rectifier circuit can make the rectifier circuit have low voltage stress on the switch, thereby reducing costs and switching losses. Compared with traditional boost converters, due to the parasitic resistance in the circuit, they cannot provide high voltage gain. This circuit combines the advantages of single-phase interleaved parallel technology and voltage-doubling rectifier circuit. By operating multiple power converter units in interleaved parallel and using a voltage-doubling rectifier circuit to achieve voltage doubling. Compared with traditional rectifier circuits, this technology can effectively reduce the voltage stress of power devices, the THD of input current and the size of EMI filters by operating multiple power converter units in interleaved parallel, thereby improving the overall performance and reliability of the system. At the same time, the voltage-doubling rectifier circuit can also be designed and adjusted according to needs to adapt to different input and output voltage requirements.

[0067] ​

Claims

1. A single-phase voltage-doubling pseudo-totem pole rectifier circuit for a DC charging pile, characterized in that include: AC power supply U g , inductor L1, inductor L2, inductor L3, diodes D1~D6, switch tubes S1~S2, capacitors C1, capacitors C2, capacitors C3, load R L ; Power supply g One end of is respectively connected to the anode of diode D1 and the cathode of diode D3, and are connected to node a together; Power supply g The other end of is connected to the anode of diode D2 and the cathode of diode D4 respectively, and are connected to node b together; the cathode of diode D1 is connected to the cathode of diode D2, one end of inductor L1 and one end of inductor L2 respectively, and are connected to node c together; The anode of diode D3 is connected to the anode of diode D4, the source of switch tube S1, the source of S2, the cathode of capacitor C2, the cathode of capacitor C1, and the load R L The other end of is connected to the node d; The other end of the inductor L1 is respectively connected to the drain of the switch tube S1, the drain of the switch tube S2, the other end of the inductor L1, the anode of the diode D5, and the negative electrode of the capacitor C3, and are connected together to the node e; The cathode of the diode D5 is connected to the positive electrode of the capacitor C2 and one end of the inductor L3 respectively, and they are connected to the node g together; The anode of the diode D6 is connected to the other end of the inductor L3 and the positive electrode of the capacitor C3 respectively, and they are connected together to the node h; The cathode of diode D6 is connected to the positive electrode of capacitor C1 and the load R L The other end is connected to the node p.

2. According to claim 1, a single-phase voltage-doubling pseudo-totem pole rectifier circuit for a DC charging pile is characterized in that: The capacitor C2, the capacitor C3, the diode D5, and the inductor L3 are connected to form a voltage doubling unit.

3. According to claim 1, a single-phase voltage-doubling pseudo-totem pole rectifier circuit for a DC charging pile is characterized in that: The four diodes D1, D2, D3, and D4 in the rectifier bridge of the rectifier circuit can all be replaced by switch tubes such as MOSFET, IGBT, or IGCT containing anti-parallel diodes.

4. According to claim 1, a single-phase voltage-doubling pseudo-totem pole rectifier circuit for a DC charging pile is characterized in that: The rectifier circuit includes 6 working modes: Mode 1: Switch S2 is off, S1 is on, current flows through inductor L1, and then returns to power supply U after switching S1. g ; At this time, the power supply U g Charges the inductor L1; the inductor L2 charges the load R through the diode D5, the inductor L3, and the diode D6 L Charging; capacitor C2 charges capacitor C1 through inductor L3 and diode D6; inductor L3 charges capacitor C3; the current in inductor L1 rises linearly from zero, and the current in inductor L2 continues to decrease; Mode 2: Switch S2 continues to be turned off, S1 continues to be turned on, the current flows through the inductor L1, and then returns to the power supply U after the switch S1 g ; At this time, the power supply U g Continue to charge the inductor L1; capacitor C3 charges capacitor C2 through inductor L3; capacitor C1 charges load R L Charging; the current in inductor L2 has dropped to 0, and the current in inductor L1 continues to rise; Mode 3: Switches S1 and S2 are all turned off, and inductor L1 transmits power to load R through diode D5, inductor L3, and diode D6. L Charging; the inductor L2 is discharged to zero; the capacitor C2 charges the capacitor C1 through the inductor L3 and the diode D6; the inductor L3 charges the capacitor C3; the current in the inductor L1 begins to decrease linearly, and the current in the inductor L2 continues to be 0; Mode 4: Switch S1 is turned off, S2 is turned on, the current flows through the inductor L2, and then returns to the power supply U after the switch S2. g ; At this time, the power supply U g The inductor L2 is charged; the inductor L1 is charged to the load R through the diode D5, the inductor L3 and the diode D6. L Charging; capacitor C2 charges capacitor C1 through inductor L3 and diode D6; inductor L3 charges capacitor C3; the current in inductor L1 continues to decrease linearly, and the current in inductor L2 begins to increase linearly; Mode 5: Switch S1 continues to be turned off, S2 continues to be turned on, the current flows through the inductor L2, and then returns to the power supply U after the switch S2 g ; At this time, the power supply U g Continue to charge the inductor L2; capacitor C3 charges capacitor C2 through inductor L3; capacitor C1 charges load R L Charging; the current in inductor L1 drops to 0, and the current in inductor L2 continues to rise; Mode 6: Switches S1 and S2 are all turned off, and inductor L2 supplies power to load R through diode D5, inductor L3, and diode D6. L Charging; capacitor C2 charges capacitor C1 through inductor L3 and diode D6; inductor L3 charges capacitor C3; the current in L1 continues to be 0, and the current in inductor L2 begins to decrease linearly.

5. A single-phase voltage-doubling pseudo-totem pole rectifier circuit for a DC charging pile according to claim 4, characterized in that: In the 6 working modes, the capacitor voltage U1=U2+U3=U dc , where U1 represents the voltage of capacitor C1, U2 represents the voltage of capacitor C2, U3 represents the voltage of capacitor C3, and U dc Indicates the DC load output voltage.

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