A high linearity radio frequency amplifier with adaptive bias circuit
The adaptive bias circuit provides the RF amplifier with a reference voltage that is independent of the power supply voltage and a dynamic bias voltage that changes with the input signal, thereby solving the gain compression problem of the traditional HBT amplifier when the input signal increases, and realizing the design of a low-power and high-linearity RF amplifier.
Patent Information
- Application Number
- CN202510225286.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2045-02-27
AI Technical Summary
When the input signal of a traditional HBT amplifier continues to increase, the effective value of the bias voltage decreases, resulting in gain compression. Existing technologies cannot effectively solve this problem and also have problems of high power consumption and low integration.
A high-linearity RF amplifier with an adaptive bias circuit is used, including a bias voltage reference source circuit and an adaptive bias circuit. A negative feedback loop is used to provide the RF amplifier with a reference voltage that is independent of the power supply voltage and a bias voltage that is dynamically adjusted as the input signal changes.
The high linearity of the amplifier is maintained under low power consumption conditions, gain compression is avoided, and the overall performance of the RF amplifier is improved.
Smart Images

Figure CN120090580B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of radio frequency integrated circuits, and in particular to a high linearity radio frequency amplifier with an adaptive bias circuit. BACKGROUND
[0002] Radio frequency (RF) signal amplifiers are an important component of various wireless receivers. Radio frequency, often abbreviated as RF, refers to electromagnetic frequencies that can be radiated into space, with a frequency range from 300 KHz to 30 GHz. Radio frequency is a high-frequency alternating electromagnetic wave. Radio frequency signal, like radio frequency concept, is a modulated electromagnetic wave with a certain transmission frequency. We call high-frequency electromagnetic waves with long-distance transmission capability as radio frequency, and radio frequency technology is widely used in the field of wireless communication. Radio frequency amplifier is a fine-tuned amplifier that can amplify high-frequency signals used in radio communication. Wireless communication systems often need to receive signals of different strengths, and the amplifiers in the receiver are required to process signals of different strengths without distortion, maintaining high linearity under large dynamic range input signals, which is crucial for coping with complex communication environments.
[0003] In the field of electronic engineering, HBT refers to Heterojunction Bipolar Transistor. It is a special bipolar transistor whose emitter region and base region use different semiconductor materials. Because the emitter junction, i.e. the PN junction between the emitter region and the base region, forms a heterojunction, this kind of transistor has some unique electrical properties, such as high transconductance, high frequency characteristics, etc. Therefore, HBT has a wide range of applications in radio frequency electronic devices.
[0004] In the conventional HBT amplifier design, there are mainly three ways to realize the bias circuit. The first way is to provide bias voltage for the base of each stage of amplifying tube by the off-chip circuit. The off-chip circuit needs to provide accurate bias voltage, which increases the product cost and reduces the product integration. The threshold voltage and mobility of the amplifying tube change with temperature under the condition of constant bias voltage, which deteriorates the gain and linearity of the amplifier. The bias voltage provided for the base of each stage of amplifying tube cannot be dynamically adjusted with the change of input signal. The second way is to provide bias voltage for the base of each stage of amplifying tube by resistance voltage division or resistance load current mirror. The off-chip needs to provide accurate power supply voltage in order to obtain accurate bias voltage. The threshold voltage and mobility of the amplifying tube change with temperature under the condition of constant power supply voltage, which deteriorates the gain and linearity of the amplifier. The bias voltage provided for the base of each stage of amplifying tube cannot be dynamically adjusted with the change of input signal. The third way is to provide reference voltage by on-chip reference circuit, which provides bias voltage for the base of HBT amplifying tube independent of the power supply voltage, and does not need to provide accurate power supply voltage off-chip. The bias voltage provided for the base of amplifying tube cannot be dynamically adjusted with the change of input signal, especially when the input signal continuously increases, the effective value of the bias voltage of the base of HBT amplifying tube gradually decreases, which causes the gain of the amplifier to be slowly compressed.
[0005] In order to avoid the situation that the effective value of the bias voltage of the base of amplifying tube decreases when the input signal continuously increases, which causes the gain of the amplifier to be slowly compressed, the conventional method is to directly increase the bias voltage of HBT transistor, which greatly increases the power consumption of the amplifier and reduces the backoff efficiency of the amplifier. Therefore, how to design an adaptive bias circuit for a high linearity radio frequency amplifier is a great challenge in the field of radio frequency integrated circuit design. SUMMARY
[0006] The purpose of the present application is to solve the problems existing in the prior art, and provide an on-chip fully integrated adaptive bias circuit applied to a high linearity radio frequency amplifier, which can provide bias voltage for the base of the radio frequency amplifier independent of the power supply voltage and dynamically adjusted with the change of input signal.
[0007] In order to achieve the above object, the application adopts the following technical scheme: a high linearity radio frequency amplifier with adaptive bias circuit, comprising: a bias voltage reference source circuit, an adaptive bias circuit and a radio frequency amplifier. The bias voltage reference source circuit provides a reference voltage Vref independent of the power supply voltage for the adaptive bias circuit, and simultaneously provides a bias voltage Vb2 for the adaptive bias circuit; the adaptive bias circuit, through a negative feedback loop, makes the effective value of the bias voltage Vb1 provided by the adaptive bias circuit for the radio frequency amplifier always follow the reference voltage Vref.
[0008] Compared with the prior art, the application has the following advantages: all the circuits and devices involved in the application can be realized on a chip of HBT process, and are small in size, light in weight and low in cost. The bias voltage reference source circuit provides a bias voltage independent of the power supply voltage for the radio frequency amplifier, which can ensure that the HBT crystal amplifier of the amplifier maintains a relatively constant transconductance, and realizes a radio frequency amplifier with relatively constant gain. The reference voltage following circuit provides a bias voltage dynamically adjusted with the input signal for the radio frequency amplifier, which solves the problem of gain compression of the radio frequency amplifier at low power consumption bias voltage when the input power increases, and greatly improves the linearity of the low power consumption radio frequency amplifier. BRIEF DESCRIPTION OF DRAWINGS
[0009] Figure 1 is a schematic diagram of a conventional radio frequency amplifier with resistance load bias circuit.
[0010] Figure 2 is a system block diagram of the high linearity radio frequency amplifier with adaptive bias circuit of the application.
[0011] Figure 3 is a schematic diagram of the high linearity radio frequency amplifier with adaptive bias circuit of the application.
[0012] Figure 4 is a comparison of the simulation results of the base DC bias voltage of the radio frequency amplifier a in the application and in the prior art under the condition that the input radio frequency signal gradually increases. Figure 1
[0013] Figure 5 is a comparison of the simulation results of the gain compression characteristic of the radio frequency amplifier a in the application and in the prior art under the condition that the input radio frequency signal gradually increases. Figure 1 DETAILED DESCRIPTION
[0014] Reference is made to Figure 2 In one preferred embodiment of the following embodiment description, a high linearity radio frequency amplifier with adaptive bias circuit includes: a bias voltage reference source circuit, an adaptive bias circuit and a radio frequency amplifier connected in parallel between a common terminal GND and a power supply terminal VDD. A reference voltage Vref output terminal of the bias voltage reference source circuit is connected with a reference voltage Vref input terminal of the adaptive bias circuit; a bias voltage Vb2 output terminal of the bias voltage reference source circuit is connected with a bias voltage Vb2 input terminal of the adaptive bias circuit; and a bias voltage Vb1 output terminal of the adaptive bias circuit is connected with a bias voltage Vb1 input terminal of the radio frequency amplifier.
[0015] Referring to Figure 3The bias voltage reference source circuit comprises HBT transistor Q1, HBT transistor Q2, HBT transistor Q3, HBT transistor Q4, HBT transistor Q5, resistor R1, reference voltage Vref output end of the bias voltage reference source circuit and bias voltage Vb2 output end of the bias voltage reference source circuit. The collector of the HBT transistor Q1 is connected with the collector of the HBT transistor Q4, the base of the HBT transistor Q4, the base of the HBT transistor Q5 and the reference voltage Vref output end of the bias voltage reference source circuit, the base of the HBT transistor Q1 is connected with the base of the HBT transistor Q2, the emitter of the HBT transistor Q3 and the bias voltage Vb2 output end of the bias voltage reference source circuit, and the emitter of the HBT transistor Q1 is connected with the power supply end VDD; the collector of the HBT transistor Q2 is connected with the base of the HBT transistor Q3 and the collector of the HBT transistor Q5, the base of the HBT transistor Q2 is connected with the base of the HBT transistor Q1, the emitter of the HBT transistor Q3 and the bias voltage Vb2 output end of the bias voltage reference source circuit, and the emitter of the HBT transistor Q2 is connected with the power supply end VDD; the collector of the HBT transistor Q3 is connected with the base of the HBT transistors Q1 and Q2 and the bias voltage Vb2 output end of the bias voltage reference source circuit, the base of the HBT transistor Q3 is connected with the collector of the HBT transistor Q2, and the emitter of the HBT transistor Q3 is connected with the common end GND; the collector of the HBT transistor Q4 is connected with the base of the HBT transistor Q4, the collector of the HBT transistor Q1, the base of the HBT transistor Q5 and the reference voltage Vref output end of the bias voltage reference source circuit, and the emitter of the HBT transistor Q4 is connected with the common end GND; the collector of the HBT transistor Q5 is connected with the base of the HBT transistor Q3 and the collector of the HBT transistor Q2, the base of the HBT transistor Q5 is connected with the base of the HBT transistor Q4, the collector of the HBT transistor Q4, the collector of the HBT transistor Q1 and the reference voltage Vref output end of the bias voltage reference source circuit, and the emitter of the HBT transistor Q5 is connected with one end of the resistor R1; one end of the resistor R1 is connected with the emitter of the HBT transistor Q5, and the other end of the resistor R1 is connected with the common end GND.
[0016] The bias voltage reference source circuit comprises the base-to-base connected transistors Q1 and Q2, the emitter connected to the power supply end VDD, the same-size transistors Q1 and Q2 forming a current mirror, the forced equal current flowing through the collectors of the transistors Q4 and Q5, and the auxiliary transistor Q3 improving the precision of the current copying ratio of the current mirror formed by the transistors Q1 and Q2.
[0017] Referring to Figure 3An adaptive bias circuit comprises HBT transistor Q6, HBT transistor Q8, HBT transistor Q9, HBT transistor Q10, HBT transistor Q11, HBT transistor Q12, HBT transistor Q13, HBT transistor Q14, HBT transistor Q15, resistor R2, resistor R3, resistor R4, capacitor C3, reference voltage Vref input end of the adaptive bias circuit, bias voltage Vb2 input end of the adaptive bias circuit, bias voltage Vb1 output end of the adaptive bias circuit. Wherein, the collector of HBT transistor Q8 is connected with the emitter of HBT transistor Q9 and the emitter of HBT transistor Q10, the base of HBT transistor Q8 is connected with the base of HBT transistor Q14 and the bias voltage Vb2 input end of the adaptive bias circuit, and the emitter of HBT transistor Q8 is connected with power supply end VDD; the collector of HBT transistor Q9 is connected with the base of HBT transistor Q11 and the collector of HBT transistor Q12, the base of HBT transistor Q9 is connected with one end of resistor R2, the emitter of HBT transistor Q9 is connected with the collector of HBT transistor Q8 and the emitter of HBT transistor Q10; the collector of HBT transistor Q10 is connected with the base of HBT transistor Q15, the collector of HBT transistor Q13 and one end of capacitor C3, the base of HBT transistor Q10 is connected with one end of resistor R3, the emitter of HBT transistor Q10 is connected with the collector of HBT transistor Q8 and the emitter of HBT transistor Q9; the collector of HBT transistor Q11 is connected with power supply end VDD, the base of HBT transistor Q11 is connected with the collector of HBT transistor Q9 and the collector of HBT transistor Q12, the emitter of HBT transistor Q11 is connected with the base of HBT transistor Q12 and the base of HBT transistor Q13; the collector of HBT transistor Q12 is connected with the base of HBT transistor Q11 and the collector of HBT transistor Q9, the base of HBT transistor Q12 is connected with the emitter of HBT transistor Q11 and the base of HBT transistor Q13, the emitter of HBT transistor Q12 is connected with common end GND; the collector of HBT transistor Q13 is connected with the base of HBT transistor Q15, the collector of HBT transistor Q10 and one end of capacitor C3, the base of HBT transistor Q13 is connected with the emitter of HBT transistor Q11 and the base of HBT transistor Q12, the emitter of HBT transistor Q13 is connected with common end GND; the collector of HBT transistor Q14 is connected with the collector of HBT transistor Q15, the base of HBT transistor Q6 and the other end of capacitor C3, the base of HBT transistor Q14 is connected with the base of HBT transistor Q8 and the bias voltage Vb2 input end of the adaptive bias circuit, the emitter of HBT transistor Q14 is connected with power supply end VDD.The collector of HBT transistor Q15 is connected with the collector of HBT transistor Q14, the base of HBT transistor Q6 and the other end of capacitor C3, the base of HBT transistor Q15 is connected with the collector of HBT transistor Q10, the collector of HBT transistor Q13 and the one end of capacitor C3, the emitter of HBT transistor Q15 is connected with the common terminal GND; the collector of HBT transistor Q6 is connected with the power terminal VDD, the base of HBT transistor Q6 is connected with the collector of HBT transistor Q14, the collector of HBT transistor Q15 and the other end of capacitor C3, the emitter of HBT transistor Q6 is connected with the one end of resistor R4; the one end of resistor R2 is connected with the base of HBT transistor Q9, the other end of resistor R2 is connected with the reference voltage Vref input terminal of adaptive bias circuit; the one end of resistor R3 is connected with the base of HBT transistor Q10, the other end of resistor R3 is connected with the other end of resistor R4 and the bias voltage Vb1 output terminal of adaptive bias circuit; the one end of resistor R4 is connected with the emitter of HBT transistor Q6, the other end of resistor R4 is connected with the other end of resistor R3 and the bias voltage Vb1 output terminal of adaptive bias circuit; the one end of capacitor C3 is connected with the collector of HBT transistor Q13, the base of HBT transistor Q15 and the collector of HBT transistor Q10, the other end of capacitor C3 is connected with the base of HBT transistor Q6, the collector of HBT transistor Q14 and the collector of HBT transistor Q15.
[0018] The adaptive bias circuit, the bases of back-to-back connected transistors Q12 and Q13 are connected, the emitters are connected on the common terminal GND line, the transistors Q12 and Q13 with the same size constitute a current mirror, and the current forced to flow through the collectors of transistors Q9 and Q10 is equal; Q11 is an auxiliary transistor, which can improve the accuracy of current replication ratio of the current mirror composed of Q12 and Q13.
[0019] Referring to Figure 3The RF amplifier includes an HBT transistor Q7, an inductor L1, a capacitor C1, a capacitor C2, an RF signal input terminal RFin, an RF signal output terminal RFout, and an RF amplifier bias voltage Vb1 input terminal. The collector of the HBT transistor Q7 is connected to one end of the inductor L1 and one end of the capacitor C2, the base of the HBT transistor Q7 is connected to one end of the capacitor C1 and the bias voltage Vb1 input terminal of the RF amplifier, and the emitter of the HBT transistor Q6 is connected to the common terminal GND; one end of the inductor L1 is connected to the collector of the HBT transistor Q7 and one end of the capacitor C2, and the other end of the inductor L1 is connected to the power supply terminal VDD; one end of the capacitor C1 is connected to the base of the HBT transistor Q7 and the bias voltage Vb1 input terminal of the RF amplifier, and the other end of the capacitor C1 is connected to the RF signal input terminal RFin; one end of the capacitor C2 is connected to the collector of the HBT transistor Q7 and one end of the inductor L1, and the other end of the capacitor C2 is connected to the RF signal output terminal RFout.
[0020] Based on the above circuit structure, the operating mechanism of the high-linearity RF amplifier with an adaptive bias circuit of the present invention is as follows: when the RF input signal is small, the bias voltage Vb1 is equivalent to the reference voltage Vref provided by the bias voltage reference source circuit; as the RF input signal gradually increases, the effective value of the bias voltage Vb1 gradually decreases to less than Vref. At this time, the base voltage of the HBT transistor Q15 in the adaptive bias circuit decreases, driving the base voltage of the HBT transistor Q6 in the adaptive bias circuit to increase, thereby increasing the emitter current of the HBT transistor Q6, and ultimately raising Vb1 to a level equivalent to Vref.
[0021] See Figure 4 In order to verify the above mechanism, the present invention and Figure 1 The bias voltage of RF amplifier a is simulated and compared. When the input RF signal gradually increases, the DC bias voltage Vb1 remains constant, while the DC bias voltage Vb1a gradually decreases.
[0022] See Figure 5 In order to verify the improvement of linearity performance of the present invention, the present invention and Figure 1 The gain compression simulation of RF amplifier a was compared. RF amplifier a experienced gain compression when the input RF signal was greater than -30dBm, while the RF amplifier of the present invention experienced gain compression only when the input RF signal was greater than -15dBm.
[0023] In summary, the application adopts a bias voltage reference source circuit to provide a radio frequency amplifier with a bias voltage independent of the power supply voltage, which can ensure that the HBT crystal amplifier of the amplifier maintains a relatively constant transconductance, and realizes a radio frequency amplifier with a relatively constant gain. The reference voltage following circuit is adopted to provide a radio frequency amplifier with a bias voltage dynamically adjusted according to the input signal, which solves the problem of gain compression of the radio frequency amplifier at low power consumption bias voltage when the input power increases, and greatly improves the linearity of the low power consumption radio frequency amplifier.
[0024] Many modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. The scope of the application is not intended to be limited to the described particular embodiments. Any substitutions of technical elements in the described particular embodiments with technically equivalent elements, or any technical solutions obtained by those skilled in the art without creative effort based on the described particular embodiments, shall be deemed to fall within the protection scope of the application.
Claims
1. A high linearity radio frequency amplifier with an adaptive bias circuit, characterized in that: It includes a bias voltage reference source circuit, an adaptive bias circuit and a radio frequency amplifier connected in parallel between a common terminal GND and a power supply terminal VDD; The reference voltage Vref output terminal of the bias voltage reference source circuit is connected to the reference voltage Vref input terminal of the adaptive bias circuit; The bias voltage Vb2 output terminal of the bias voltage reference source circuit is connected to the bias voltage Vb2 input terminal of the adaptive bias circuit; The bias voltage Vb1 output terminal of the adaptive bias circuit is connected to the bias voltage Vb1 input terminal of the radio frequency amplifier; The bias voltage reference source circuit provides a reference voltage Vref that is independent of the power supply voltage for the adaptive bias circuit, and also provides a bias voltage Vb2 for the adaptive bias circuit; The adaptive bias circuit uses a negative feedback loop so that the effective value of the bias voltage Vb1 provided by the adaptive bias circuit to the radio frequency amplifier always follows the reference voltage Vref; The adaptive bias circuit includes an HBT transistor Q6, an HBT transistor Q8, an HBT transistor Q9, an HBT transistor Q10, an HBT transistor Q11, an HBT transistor Q12, an HBT transistor Q13, an HBT transistor Q14, an HBT transistor Q15, a resistor R2, a resistor R3, a resistor R4, a capacitor C3, a reference voltage Vref input terminal of the adaptive bias circuit, a bias voltage Vb2 input terminal of the adaptive bias circuit, and a bias voltage Vb1 output terminal of the adaptive bias circuit; The collector of the HBT transistor Q8 is connected to the emitter of the HBT transistor Q9 and the emitter of the HBT transistor Q10, the base of the HBT transistor Q8 is connected to the base of the HBT transistor Q14 and the bias voltage Vb2 input terminal of the adaptive bias circuit, and the emitter of the HBT transistor Q8 is connected to the power supply terminal VDD; The collector of the HBT transistor Q9 is connected to the base of the HBT transistor Q11 and the collector of the HBT transistor Q12, the base of the HBT transistor Q9 is connected to one end of the resistor R2, and the emitter of the HBT transistor Q9 is connected to the collector of the HBT transistor Q8 and the emitter of the HBT transistor Q10; The collector of the HBT transistor Q10 is connected to the base of the HBT transistor Q15, the collector of the HBT transistor Q13, and one end of the capacitor C3. The base of the HBT transistor Q10 is connected to one end of the resistor R3. The emitter of the HBT transistor Q10 is connected to the collector of the HBT transistor Q8 and the emitter of the HBT transistor Q9. The collector of the HBT transistor Q11 is connected to the power supply terminal VDD, the base of the HBT transistor Q11 is connected to the collector of the HBT transistor Q9 and the collector of the HBT transistor Q12, and the emitter of the HBT transistor Q11 is connected to the base of the HBT transistor Q12 and the base of the HBT transistor Q13; The collector of the HBT transistor Q12 is connected to the base of the HBT transistor Q11 and the collector of the HBT transistor Q9, the base of the HBT transistor Q12 is connected to the emitter of the HBT transistor Q11 and the base of the HBT transistor Q13, and the emitter of the HBT transistor Q12 is connected to the common terminal GND; The collector of the HBT transistor Q13 is connected to the base of the HBT transistor Q15, the collector of the HBT transistor Q10, and one end of the capacitor C3; the base of the HBT transistor Q13 is connected to the emitter of the HBT transistor Q11 and the base of the HBT transistor Q12; and the emitter of the HBT transistor Q13 is connected to the common terminal GND; The collector of the HBT transistor Q14 is connected to the collector of the HBT transistor Q15, the base of the HBT transistor Q6, and the other end of the capacitor C3. The base of the HBT transistor Q14 is connected to the base of the HBT transistor Q8 and the bias voltage Vb2 input terminal of the adaptive bias circuit. The emitter of the HBT transistor Q14 is connected to the power supply terminal VDD. The collector of the HBT transistor Q15 is connected to the collector of the HBT transistor Q14, the base of the HBT transistor Q6, and the other end of the capacitor C3. The base of the HBT transistor Q15 is connected to the collector of the HBT transistor Q10, the collector of the HBT transistor Q13, and one end of the capacitor C3. The emitter of the HBT transistor Q15 is connected to the common terminal GND. The collector of the HBT transistor Q6 is connected to the power supply terminal VDD, the base of the HBT transistor Q6 is connected to the collector of the HBT transistor Q14, the collector of the HBT transistor Q15, and the other end of the capacitor C3, and the emitter of the HBT transistor Q6 is connected to one end of the resistor R4; one end of the resistor R2 is connected to the base of the HBT transistor Q9, and the other end of the resistor R2 is connected to the reference voltage Vref input terminal of the adaptive bias circuit; One end of the resistor R3 is connected to the base of the HBT transistor Q10, and the other end of the resistor R3 is connected to the other end of the resistor R4 and the bias voltage Vb1 output end of the adaptive bias circuit; One end of the resistor R4 is connected to the emitter of the HBT transistor Q6, and the other end of the resistor R4 is connected to the other end of the resistor R3 and the bias voltage Vb1 output end of the adaptive bias circuit; One end of the capacitor C3 is connected to the collector of the HBT transistor Q13, the base of the HBT transistor Q15, and the collector of the HBT transistor Q10, and the other end of the capacitor C3 is connected to the base of the HBT transistor Q6, the collector of the HBT transistor Q14, and the collector of the HBT transistor Q15.
2. The bias voltage reference source circuit according to claim 1, wherein: including an HBT transistor Q1, an HBT transistor Q2, an HBT transistor Q3, an HBT transistor Q4, an HBT transistor Q5, a resistor R1, a reference voltage Vref output terminal of a bias voltage reference source circuit, and a bias voltage Vb2 output terminal of the bias voltage reference source circuit; The collector of the HBT transistor Q1 is connected to the collector of the HBT transistor Q4, the base of the HBT transistor Q4, the base of the HBT transistor Q5, and the reference voltage Vref output terminal of the bias voltage reference source circuit; the base of the HBT transistor Q1 is connected to the base of the HBT transistor Q2, the emitter of the HBT transistor Q3, and the bias voltage Vb2 output terminal of the bias voltage reference source circuit; and the emitter of the HBT transistor Q1 is connected to the power supply terminal VDD; The collector of the HBT transistor Q2 is connected to the base of the HBT transistor Q3 and the collector of the HBT transistor Q5, the base of the HBT transistor Q2 is connected to the base of the HBT transistor Q1, the emitter of the HBT transistor Q3, and the bias voltage Vb2 output terminal of the bias voltage reference source circuit, and the emitter of the HBT transistor Q2 is connected to the power supply terminal VDD; The collector of the HBT transistor Q3 is connected to the bases of the HBT transistors Q1 and Q2 and the bias voltage Vb2 output terminal of the bias voltage reference source circuit, the base of the HBT transistor Q3 is connected to the collector of the HBT transistor Q2, and the emitter of the HBT transistor Q3 is connected to the common terminal GND; The collector of the HBT transistor Q4 is connected to the base of the HBT transistor Q4, the collector of the HBT transistor Q1, the base of the HBT transistor Q5, and the reference voltage Vref output terminal of the bias voltage reference source circuit, and the emitter of the HBT transistor Q4 is connected to the common terminal GND; The collector of the HBT transistor Q5 is connected to the base of the HBT transistor Q3 and the collector of the HBT transistor Q2. The base of the HBT transistor Q5 is connected to the base of the HBT transistor Q4, the collector of the HBT transistor Q4, the collector of the HBT transistor Q1, and the reference voltage Vref output terminal of the bias voltage reference source circuit. The emitter of the HBT transistor Q5 is connected to one end of the resistor R1. One end of the resistor R1 is connected to the emitter of the HBT transistor Q5 , and the other end of the resistor R1 is connected to the common terminal GND.
3. The radio frequency amplifier according to claim 1, wherein: It includes an HBT transistor Q7, an inductor L1, a capacitor C1, a capacitor C2, a radio frequency signal input terminal RFin, a radio frequency signal output terminal RFout, and a bias voltage Vb1 input terminal of the radio frequency amplifier; The collector of the HBT transistor Q7 is connected to one end of the inductor L1 and one end of the capacitor C2, the base of the HBT transistor Q7 is connected to one end of the capacitor C1 and the bias voltage Vb1 input end of the RF amplifier, and the emitter of the HBT transistor Q7 is connected to the common terminal GND; One end of the inductor L1 is connected to the collector of the HBT transistor Q7 and one end of the capacitor C2, and the other end of the inductor L1 is connected to the power supply terminal VDD; One end of the capacitor C1 is connected to the base of the HBT transistor Q7 and the bias voltage Vb1 input terminal of the RF amplifier, and the other end of the capacitor C1 is connected to the RF signal input terminal RFin; One end of the capacitor C2 is connected to the collector of the HBT transistor Q7 and one end of the inductor L1 , and the other end of the capacitor C2 is connected to the radio frequency signal output terminal RFout.
Citation Information
Patent Citations
Dynamic offset control circuit applied to linear mode power amplifier
CN102969995A