High-bandwidth loopback circuit in high-speed serdes

Abstract

The invention aims to provide a high-bandwidth loopback circuit in a high-speed serdes. The high-bandwidth loopback circuit in the high-speed serdes comprises a T-coil module, an IOpad access, a loopback access and an ESD (Electro-Static Discharge) capacitor, the T-coil module is connected with the IOpad access, the ESD capacitor and the looopback access, and is used for eliminating the influence of the ESD capacitor on the circuit; and the IOpad access is switched off when the looopback access is switched on. According to the invention, the loopback circuit is put into the ESD shared T-coil, so that the bandwidth expansion advantage is brought, the influence of the loopback switch on a signal path is reduced, and an inductor is additionally arranged on the loopback path, so that the attenuation caused by large parasitism of an ESD branch is reduced.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a high-bandwidth loopback circuit in a high-speed serdes. Background Art

[0002] ‌Loopback circuit‌ is a communication technology that sends electronic signals or data streams back to the sender as is, mainly used for testing communication functions. It can be a communication channel with only one communication endpoint, and any message sent will be received immediately and only by the same channel‌. The basic principle of the loopback circuit is to redirect the outgoing electronic signals and digital data streams back to the source, thereby simulating a network connection. Loopback test is a commonly used transmission system test method, which is usually used to check and analyze the correctness of the chip transceiver module interface circuit, internal logic and transmission line hardware implementation. In the process of logic simulation, the loopback test function is used to verify the correctness of the transceiver module logic design and loopback design function. The loopback test in the debugging stage is mainly used to quickly find and locate the transmission fault point. Especially in the FPGA debugging or chip bare die testing stage, the loopback test can save a lot of time and manpower costs for chip development work. The loopback test includes inner loop test and outer loop test. The inner loop refers to the loop test of the transmitter TX and the receiver RX of the transceiver module itself; the outer loop refers to the sending and receiving loop test of the transceiver module and the external remote module. During the inner loop test, the loopback control logic configures the system loopback register to put the transceiver module into loopback mode, that is, the data or message can be directly looped back to its own receiver RX through its own transmitter TX; during the outer loop test, the loopback register is configured by sending a loopback protocol message to control the remote external module to enter the loopback mode. The data or message is looped back from the near-end transmitter TX to the near-end receiver RX after passing through the external remote module. The correctness of the chip transmitter, receiver and internal interconnection logic is determined by checking and analyzing the difference between the received data or message and the sent data or message to locate the fault point.

[0003] With the continuous increase in wired communication data rates and the continuous advancement of integrated circuit technology, high-speed serial data interface (SerDes) technology has widely replaced traditional parallel interface technology. The SerDes interface solves the problem of parallel data asynchrony under high-speed conditions, while greatly reducing the number of I / O interfaces and having better electromagnetic compatibility. In SerDes design, the implementation of loopback circuits is necessary, which can effectively locate many problems in testing. As the speed in high-speed design increases, the sensitivity to parasitics is also increasing. The parasitic capacitance on the switch attached to the addition of the loopback circuit will reduce the signal bandwidth. Summary of the invention

[0004] The object of the present invention is to provide a high-bandwidth loopback circuit in a high-speed SerDes. This circuit utilizes the bandwidth expansion advantage brought by placing the loopback circuit in an ESD-shared T-coil, reducing the impact of the loopback switch on the signal path, and additionally adding an inductor on the loopback path to reduce the attenuation caused by large parasitics in the ESD branch.

[0005] A high-bandwidth loopback circuit in a high-speed SerDes, comprising: a T-coil module, an IOpad path, a loopback path, and an ESD capacitor; The T-coil module is connected to the IOpad path, the ESD capacitor, and the loopback path, and is used to eliminate the influence of the ESD capacitor on the circuit; The IOpad path is disconnected when the loopback path is conducting.

[0006] Preferably, the T-coil module comprises: a first capacitor, a first inductor, and a second inductor; The first plate of the first capacitor is connected to the first end of the first inductor, and the second plate is connected to the second end of the second inductor; The second end of the first inductor is connected to the first end of the second inductor.

[0007] Preferably, the IOpad path is connected to the second end of the second inductor.

[0008] Preferably, the loopback path comprises: a third inductor, a fourth inductor, a first switch, and a second switch; The first end of the first switch is connected to the first end of the second inductor, and the second end is connected to the first end of the third inductor; The second end of the third inductor is connected to the first end of the fourth inductor; The second end of the fourth inductor is connected to the first end of the second switch; The loopback path is connected in parallel with the IOpad path.

[0009] Preferably, it further comprises: a first resistor and a second resistor; The second end of the first resistor is connected to the first end of the first inductor; The first end of the second resistor is connected to the second end of the second switch.

[0010] A method for implementing a high-bandwidth loopback circuit in a high-speed SerDes, comprising: Placing the loopback circuit into the T-coil module; Adding an inductor module to the loopback circuit.

[0011] Preferably, placing the loopback circuit into the T-coil module includes: Connecting the loopback circuit between two inductors in the T-coil module.

[0012] Preferably, adding an inductor module to the loopback circuit includes: Adding an inductor to the branch between the loopback circuit and the two inductors in the T-coil module to balance the influence of the ESD capacitance parasitics on the signal bandwidth.

[0013] An electronic device includes: a chip, a processor, and a memory. The memory is used to store computer program code, and the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a method for implementing a high-bandwidth loopback circuit in a high-speed serdes.

[0014] A computer-readable storage medium stores a computer program. The computer program includes program instructions. When the program instructions are executed by a processor of an electronic device, the processor is caused to execute a method for implementing a high-bandwidth loopback circuit in a high-speed serdes.

[0015] The beneficial effects of the present invention are as follows: 1. The present invention places the loopback circuit into the ESD shared T-coil, bringing the bandwidth expansion advantage, and reducing the influence of the loopback switch on the signal path. 2. The present invention additionally adds an inductor to the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch. Description of the Drawings

[0016] The drawings here are incorporated into the specification and form a part of the specification, indicating the embodiments that conform to the present invention, and are used together with the specification to explain the principles of the present invention.

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0018] Figure 1 It is a loopback circuit diagram with high bandwidth in a high-speed serdes of the present invention; Figure 2 It is a schematic diagram for analyzing the T-coil model of the present invention; Figure 3 It is a bandwidth comparison diagram between the new loopback path and the old loopback path of the present invention; Figure 4 It is a schematic diagram of the hardware structure of an electronic device of the present invention. Detailed implementation manners

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0020] It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0021] In addition, the descriptions involving "first", "second", etc. in the present invention are only for descriptive purposes, and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present invention.

[0022] With the continuous improvement of the data rate of wired communication and the continuous progress of integrated circuit technology, high-speed serial data interface (SerDes) technology has widely replaced the traditional parallel interface technology. The SerDes interface solves the problem of asynchronous parallel data under high-speed conditions, and at the same time can greatly reduce the number of I / O interfaces and has better electromagnetic compatibility. In SerDes design, the implementation of a loopback circuit is necessary, which can effectively locate many problems in testing. With the increase in speed in high-speed design, the sensitivity to parasitics is also increasing, and the parasitic capacitance on the attached switch of the loopback circuit will reduce the signal bandwidth.

[0023] The present invention brings the bandwidth expansion advantage of placing the loopback circuit into the ESD shared T-coil, making the signal path less affected by the loopback switch. The present invention additionally adds an inductor on the loopback path to reduce the attenuation caused by large parasitics in the ESD branch.

[0024] Embodiment 1 A high-bandwidth loopback circuit in a high-speed serdes, referring to Figure 1 , including: a T-coil module, an IOpad path, a loopback path, and an ESD capacitor; In a high-speed SerDes (Serializer / Deserializer) system, a high-bandwidth loopback circuit allows the signal from the transmitter (TX) to be directly looped back to the receiver (RX) to verify the functionality and performance of the SerDes without relying on external devices. Functions of the high-bandwidth loopback circuit: Functional testing: Verify whether the TX and RX circuits are working properly. Performance evaluation: Measure key parameters such as signal integrity, jitter, and bit error rate. Fault diagnosis: Locate possible hardware or signal integrity issues in the system. Self-calibration: Support internal calibration to optimize signal quality.

[0025] The T-coil module is connected to the IOpad path, ESD capacitor, and loopback path to eliminate the influence of the ESD capacitor on the circuit; The T-coil circuit is a circuit structure used to expand bandwidth and is widely applied in high-speed circuit designs (such as amplifiers, drivers, and receivers), especially in scenarios that require high bandwidth and low noise. Functions of the T-coil circuit: Bandwidth expansion: By introducing an inductor (T-coil), counteract the influence of parasitic capacitance, thereby expanding the bandwidth of the circuit. Impedance matching: Provide good impedance matching to reduce signal reflection. Noise reduction: Optimize high-frequency performance and reduce noise and distortion. Working principle of the T-coil circuit: Counteract parasitic capacitance: In high-speed circuits, parasitic capacitance limits bandwidth. The T-coil introduces an inductor to form resonance with the parasitic capacitance, thereby counteracting its influence. Expand bandwidth: By optimizing the values of the inductor and capacitor, the T-coil can expand the bandwidth of the circuit far beyond the limit of traditional RC circuits. Impedance matching: The T-coil network can provide good impedance matching, reduce signal reflection, and improve signal integrity. Advantages of the T-coil circuit: High bandwidth: Significantly expand the bandwidth of the circuit, suitable for high-speed signal processing. Low noise: Optimize high-frequency performance and reduce noise and distortion. Compact design: Compared with other bandwidth expansion technologies, the T-coil structure is more compact and suitable for integrated circuit design.

[0026] The IOpad path is disconnected when the loopback path is conducting.

[0027] The IOpad path refers to the electrical path involved in the chip pin processing module (IOpad) when processing input and output signals. The main function of the IOpad is to process the signals of the chip pins and send them to the inside of the chip, or to process the signals output from the inside of the chip and send them to the chip pins. The IOpad involves various types of signal processing, including clock signals, reset signals, JTAG interface signals, etc.

[0028] Preferably, the T-coil module includes: a first capacitor, a first inductor, and a second inductor; The first plate of the first capacitor is connected to the first end of the first inductor, and the second plate is connected to the second end of the second inductor; The second end of the first inductor is connected to the first end of the second inductor.

[0029] Reference Figure 2 , in many high-speed designs, T-coil is used to reduce the impact of ESD parasitics on the signal bandwidth. The circuit for Loopback can be placed inside the T-coil together. However, there are new additional problems when placing the loopback circuit in the ESD branch. In the T-coil formula, the bandwidth extension for node B filters out C across the entire band. L The impact brought by C, but for node C, the introduction of the T-coil only brings better bandwidth extension than the conventional inductive peak. So only for the loopback path, the loss IL here becomes larger. Therefore, on this basis, the present invention adds an inductor, which can form a certain degree of filtering effect with the inductor on the left side of the T-coil. It effectively makes up for the shortcoming of placing the loopback circuit in the ESD path.

[0030] Preferably, the IOpad path is connected to the second end of the second inductor.

[0031] In the loopback circuit, the main function of the IOPad path is to implement the loopback test of the signal, which is used to verify whether the input and output functions of the chip or circuit are normal. The IOPad path allows the output signal to be directly looped back to the input port, so as to test the input and output functions of the chip without relying on external devices.

[0032] In this way, the electrical characteristics (such as driving ability, level compatibility, etc.) of the IOPad and signal integrity can be verified. The loopback test can help quickly locate the fault point. If an abnormality occurs during the loopback of the signal, it can be determined whether it is a problem with the IOPad itself or the internal logic circuit. For example, if the output signal is normal but the input signal after loopback is abnormal, there may be a problem with the input path of the IOPad. Through the loopback test, it can be checked whether parameters such as signal delay, jitter, and noise are within the allowable range.

[0033] Preferably, the loopback path includes: a third inductor, a fourth inductor, a first switch, and a second switch; The first end of the first switch is connected to the first end of the second inductor, and the second end is connected to the first end of the third inductor; The second end of the third inductor is connected to the first end of the fourth inductor; The second end of the fourth inductor is connected to the first end of the second switch; The loopback path is connected in parallel with the IOpad path.

[0034] The loopback path forms a closed signal path by directly returning the output signal to the input through an internal or external connection. This design allows the system to test and verify itself without relying on external devices. In the loopback path, the signal is transmitted from the output end (such as TX, the transmitting end) to the input end (such as RX, the receiving end). The signal path can be a digital signal, an analog signal, or a mixed signal, depending on the circuit design. The loopback path is implemented by control logic (such as a multiplexer MUX) for selecting whether to enable the loopback mode. In the test mode, the control logic switches the signal from the output end to the input end; in the normal mode, the signal is normally transmitted to external devices. The loopback path forms a closed signal path by returning the output signal to the input end, which is used to test, diagnose, and verify the functions and performance of an electronic system or chip. Its main functions include functional testing, fault diagnosis, performance verification, simplifying the test process, and improving the test coverage.

[0035] Preferably, it further includes: a first resistor and a second resistor; The second end of the first resistor is connected to the first end of the first inductor; The first end of the second resistor is connected to the second end of the second switch.

[0036] Reference Figure 3 , the light color represents the loopback path of the present invention, the dark color represents the loopback path of the prior art, and the bandwidth of the light color is significantly larger than that of the dark color.

[0037] Embodiment 2 A method for implementing a high-bandwidth loopback circuit in a high-speed SerDes, including: S100, placing the loopback circuit into the T-coil module; The main purpose of placing the loopback circuit into the T-coil module is to enhance the signal integrity test and fault diagnosis capabilities, and at the same time optimize the transmission performance of high-frequency signals. The T-coil itself is an inductor structure used to improve bandwidth and signal integrity, and is commonly used in high-speed interfaces (such as SerDes). The T-coil module is used to improve the transmission quality of high-frequency signals, and the loopback circuit can return the output signal to the input end to verify whether the signal transmission in the T-coil module is complete. Through the loopback test, problems such as signal attenuation, reflection, and distortion in the T-coil module can be detected to ensure signal integrity.

[0038] S200, adding an inductor module to the loopback circuit.

[0039] For the high-frequency noise signals existing in the loopback circuit, the inductor presents a high impedance, which can prevent these high-frequency noises from passing through, enabling the DC component or low-frequency useful signal in the signal to pass through smoothly, thereby improving the purity of the signal. For example, in the loopback test circuit of a communication device, it can prevent external high-frequency electromagnetic interference from entering the circuit and affecting the accuracy of the test results.

[0040] During the operation of the loopback circuit, when there are instantaneous changes in energy demand or power supply voltage fluctuations, the inductor can store or release energy, playing the role of energy buffering. For example, in the power supply loopback detection circuit, when the power supply voltage drops instantaneously, the inductor releases the stored energy to maintain the normal operation of the circuit and prevent the circuit from malfunctioning due to voltage fluctuations.

[0041] Preferably, S100, placing the loopback circuit into the T-coil module includes: Connecting the loopback circuit between two inductors in the T-coil module.

[0042] In the embodiment of the present invention, putting the loopback circuit into the ESD shared T-coil brings the advantage of bandwidth expansion, reducing the influence of the loopback switch on the signal path. The T-coil module is usually used for high-frequency signal transmission (such as SerDes interfaces above 10 Gbps), and the loopback circuit can be used to verify the transmission performance of high-frequency signals. After integrating the loopback circuit into the T-coil module, signal testing can be completed inside the chip without relying on external testing equipment. The role of placing the loopback circuit into the T-coil module is mainly to enhance signal integrity testing, support high-frequency performance verification, simplify the testing process, support fault diagnosis and location, and optimize design and debugging.

[0043] Preferably, S200, adding an inductor module to the loopback circuit includes: Adding an inductor to the branch between the loopback circuit and the two inductors in the T-coil module to balance the influence of the ESD capacitance parasitics on the signal bandwidth.

[0044] In the embodiment of the present invention, an additional inductor is added to the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch.

[0045] Embodiment 3 An electronic device includes: a chip, a processor, and a memory. The memory is used to store computer program code, and the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a method for implementing a high-bandwidth loopback circuit in a high-speed serdes.

[0046] Reference Figure 4, the electronic device 2 includes a processor 21, a memory 22, an input device 23, and an output device 24. The processor 21, the memory 22, the input device 23, and the output device 24 are coupled through a connector, which includes various interfaces, transmission lines, buses, etc., and the embodiments of the present invention do not limit this. It should be understood that in various embodiments of the present invention, coupling means being interconnected in a specific manner, including being directly connected or indirectly connected through other devices. For example, they can be connected through various interfaces, transmission lines, buses, etc.

[0047] The processor 21 can be one or more graphics processors. When the processor 21 is a GPU, the GPU can be a single-core GPU or a multi-core GPU. Optionally, the processor 21 can be a processor group composed of multiple GPUs, and multiple processors are coupled to each other through one or more buses. Optionally, the processor can also be other types of processors, etc., and the embodiments of the present invention do not limit this.

[0048] The memory 22 can be used to store computer program instructions and various computer program codes including the program codes for implementing the solution of the present invention. Optionally, the memory includes but is not limited to a random access memory, a read-only memory, an erasable programmable read-only memory, or a portable read-only memory, and this memory is used for relevant instructions and data.

[0049] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 can be independent devices or an integrated device.

[0050] Embodiment 4 A computer-readable storage medium stores a computer program, and the computer program includes program instructions. When the program instructions are executed by the processor of an electronic device, the processor is caused to execute a method for implementing a high-bandwidth loopback circuit in a high-speed serdes.

[0051] The present invention brings the bandwidth expansion advantage of putting the loopback circuit into the ESD-shared T-coil, making the signal path less affected by the loopback switch. The present invention additionally adds an inductor on the loopback path to reduce the attenuation caused by the large parasitics of the ESD branch.

[0052] The above are only specific embodiments of the present invention, enabling those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features claimed herein.

Claims

1. A high bandwidth loopback circuit in a high speed serdes, characterized in that: include: T-coil module, IOpad path, loopback path and ESD capacitor; The T-coil module is connected to the IOpad path, the ESD capacitor and the loopback path, and is used to eliminate the influence of the ESD capacitor on the circuit; The IOpad path is disconnected when the loopback path is turned on; The T-coil module includes: a first capacitor, a first inductor and a second inductor; The first electrode plate of the first capacitor is connected to the first end of the first inductor, and the second electrode plate is connected to the second end of the second inductor; The second end of the first inductor is connected to the first end of the second inductor.

2. A high bandwidth loopback circuit in a high speed serdes according to claim 1, characterized in that: The IOpad path is connected to the second end of the second inductor.

3. A high bandwidth loopback circuit in a high speed serdes according to claim 1, characterized in that: The loopback path includes: a third inductor, a fourth inductor, a first switch and a second switch; The first end of the first switch is connected to the first end of the second inductor, and the second end of the first switch is connected to the first end of the third inductor; The second end of the third inductor is connected to the first end of the fourth inductor; The second end of the fourth inductor is connected to the first end of the second switch; The loopback path is connected in parallel with the IOpad path.

4. A high bandwidth loopback circuit in a high speed serdes according to claim 1, characterized in that: Also includes: a first resistor and a second resistor; The second end of the first resistor is connected to the first end of the first inductor; The first end of the second resistor is connected to the second end of the second switch.

5. A method for realizing a high-bandwidth loopback circuit in a high-speed serdes, applied to a high-bandwidth loopback circuit in a high-speed serdes according to any one of claims 1 to 4, characterized in that: include: Place the loopback circuit into the T-coil module; An inductor module is added into the loop circuit.

6. The method for realizing a high-bandwidth loopback circuit in a high-speed serdes according to claim 5, characterized in that: Placing the loopback circuit into the T-coil module includes: Connect the loopback circuit between the two inductors in the T-coil module.

7. The method for realizing a high-bandwidth loopback circuit in a high-speed serdes according to claim 5, characterized in that: The adding of an inductor module into the loop circuit comprises: Add inductance to the branch between the loopback circuit and the two inductors in the T-coil module to balance the effect of ESD capacitor parasitics on signal bandwidth.

8. An electronic device, characterized in that: include: A chip, a processor and a memory, wherein the memory is used to store computer program codes, wherein the computer program codes include computer instructions. When the chip executes the computer instructions, the electronic device executes a method for realizing a high-bandwidth loopback circuit in a high-speed serdes as described in any one of claims 5 to 7.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, which includes program instructions. When the program instructions are executed by a processor of an electronic device, the processor executes a method for implementing a high-bandwidth loopback circuit in a high-speed serdes as described in any one of claims 5 to 7.

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