Message data processing methods and related equipment for message acquisition systems in C2F applications

Abstract

The message data processing method of the message acquisition system under the C2F application and the related equipment provided by the embodiments of the present application, the message acquisition system comprises a P4 switching chip, a CPU and a FPGA which are connected with each other, and the method comprises the following steps: firstly, obtaining a plurality of C2F application message data sent by an external device through the P4 switching chip; then, performing first message data screening on the plurality of C2F application message data to obtain at least one screened message data in the P4 switching chip; finally, obtaining the screened message data through the FPGA, and performing second message data screening on the screened message data by using a preset capture condition in the FPGA to obtain C2F application target message data, so as to improve the data screening and transmission rate of the message acquisition system by using the high processing capacity of the FPGA, improve the screening accuracy and reliability of the target message data, relieve the processing load of the CPU, and thus improve the data processing performance of the message acquisition system.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to message data processing methods and related equipment in a message acquisition system under C2F applications. Background Technology

[0002] With societal development, a new business model called C2F (customer to factory) has emerged. In this model, customers can place orders directly through a digital platform, and factories produce and deliver according to the order requirements. By directly connecting consumers and manufacturers, it eliminates intermediaries, thereby improving efficiency, reducing costs, and providing more personalized customization services. Under the C2F model, factories need to respond to consumer order demands in real time and be able to quickly adjust production lines to meet individual needs. This requires not only efficient production processes but also robust and flexible hardware infrastructure to support high-speed data transmission and processing.

[0003] In factories, information layer switches need to transmit massive data flows from various industrial devices and business management systems, thus requiring high-performance and flexible switches to quickly respond to changes in business operations. Programmable switches are programmable data plane devices that allow users to define network behavior using the P4 (Programming Protocol-independent Packet Processors) language, enabling highly flexible and customizable network functions. P4 programmable switches can achieve high-bandwidth, low-latency data transmission, flexible network configuration, security isolation, and multi-protocol conversion. Therefore, in the context of the C2F (Consumer-to-Factory) business model trend, P4 programmable switches have great potential in application scenarios involving packet data filtering and transmission.

[0004] In related technologies, to improve message transmission efficiency, after acquiring message data sent by the peer device using a P4 switching chip, the P4 switching chip and the connected CPU are typically used to filter the message data to obtain the target message data. The target message data is then sent to the CPU for backup to ensure the reliability of message data transmission, and finally transmitted to the other peer device. However, due to the interface limitations of the P4 switching chip in existing P4 programmable switches, the transmission rate between the P4 switching chip and the CPU cannot reach the maximum transmission rate of the P4 switching chip. Furthermore, using the CPU for message selection increases the CPU's processing load, resulting in low efficiency in message data filtering and transmission via the P4 programmable switch. Summary of the Invention

[0005] This application provides a message data processing method and related equipment for a message acquisition system under C2F applications, which can improve the filtering efficiency of message data under C2F applications.

[0006] To achieve the above objectives, a first aspect of this application proposes a message data processing method for a message acquisition system under a C2F application. The message acquisition system includes a P4 switching chip, a CPU, and an FPGA interconnected with each other. The method includes:

[0007] The P4 switching chip acquires multiple C2F application message data sent by external devices;

[0008] In the P4 switching chip, the multiple C2F application message data are first filtered to obtain at least one filtered message data.

[0009] The filtered message data is obtained through the FPGA, and a second message data filtering is performed on the filtered message data in the FPGA using preset capture conditions to obtain C2F application target message data.

[0010] In some embodiments, before performing a second packet data filtering on the filtered packet data using preset capture conditions in the FPGA to obtain the C2F application target packet data, the method further includes:

[0011] The CPU generates a configuration file based on the message filtering requirements of the message acquisition system.

[0012] The CPU sends the configuration file to the FPGA through a configuration interface, so that the FPGA configures the preset capture conditions according to the configuration file.

[0013] In some embodiments, the step of performing a second packet data filtering on the filtered packet data in the FPGA using preset capture conditions to obtain C2F application target packet data includes:

[0014] In the FPGA, each of the filtered message data is parsed to obtain message filtering parsing data;

[0015] Based on the preset capture conditions, data matching is performed on the filtered and parsed data of each message to obtain the data matching result;

[0016] The target message data for the C2F application is selected from multiple filtered message data based on the data matching results.

[0017] In some embodiments, the preset capture conditions include message type conditions, message segment conditions, and message error detection conditions. The step of performing data matching on each message filtering and parsing data based on the preset capture conditions to obtain data matching results includes:

[0018] The parsed message type in the message filtering parsing data is matched with the message type condition to obtain the message type matching result;

[0019] The parsed message field segments in the message filtering parsing data are matched with the message field segment conditions to obtain the message field segment matching result;

[0020] Based on the message error detection conditions, message error detection is performed on the message filtering and parsing data to obtain message error detection matching results;

[0021] The data matching result is obtained based on the message type matching result, the message segment matching result, and the message error detection matching result.

[0022] In some embodiments, the preset capture conditions include segment filtering trigger conditions, timing filtering trigger conditions, and location filtering trigger conditions. The step of performing data matching on each packet filtering and parsing data based on the preset capture conditions to obtain data matching results includes:

[0023] Select at least one segment parsing data that matches the segment filtering triggering condition from a plurality of the segment parsing parsing data as the segment filtering parsing data;

[0024] Select at least one segment filtering parsing data whose timing time matches the timing filtering trigger condition from all the segment filtering parsing data as the timing filtering parsing data;

[0025] Select at least one timed filtering parsing data from all the timed filtering parsing data whose message data location matches the location filtering trigger condition as the target filtering parsing data;

[0026] Based on the preset capture conditions, data matching is performed on the filtered and parsed data of each target to obtain the data matching result.

[0027] In some embodiments, the step of performing data matching on the filtered and parsed data of each packet based on the preset capture conditions to obtain data matching results includes:

[0028] Obtain the current message data generation rate of the external device, and obtain the current data processing rate of the FPGA;

[0029] An adjustment factor is generated based on the ratio of the data processing rate to the message data generation rate;

[0030] The preset capture conditions are updated based on the adjustment factor to obtain updated preset capture conditions. Then, data matching is performed on the filtered and parsed data of each message based on the updated preset capture conditions to obtain data matching results.

[0031] In some embodiments, the message acquisition system further includes a memory connected to the FPGA. After acquiring the filtered message data through the FPGA and performing a second message data filtering on the filtered message data using preset capture conditions in the FPGA to obtain C2F application target message data, the method further includes:

[0032] The C2F application target message data is stored in the memory, and the first message data filtering and the second message data filtering of the C2F application message data are repeated until the memory is full.

[0033] In some embodiments, the step of performing a first packet data filtering on the plurality of C2F application packet data in the P4 switching chip to obtain at least one filtered packet data includes:

[0034] In the P4 switching chip, each C2F application message data is parsed to obtain message field parsing data;

[0035] The C2F application message data that matches the message field parsing data with the preset message field segment is selected from the multiple C2F application message data as the filtered message data.

[0036] In some embodiments, after selecting C2F application message data whose message field parsing data matches a preset message field segment from a plurality of C2F application message data as the filtered message data, the method further includes:

[0037] The preset message segment is updated based on the P4 adjustment factor to obtain the updated preset message segment. The P4 adjustment factor is generated based on the data processing rate of the FPGA and the amount of filtered message data to be processed.

[0038] The C2F application message data that matches the message field parsing data and the updated preset message field segment is selected from the multiple C2F application message data as the filter message data.

[0039] To achieve the above objectives, a second aspect of this application provides a message data processing apparatus for a message acquisition system under a C2F application. The system includes a P4 switching chip, a CPU, and an FPGA. The apparatus includes:

[0040] The message data acquisition module is used to acquire multiple C2F application message data sent by external devices through the P4 switching chip;

[0041] The first filtering module is used to perform first message data filtering on the multiple C2F application message data in the P4 switching chip to obtain at least one filtered message data.

[0042] The second filtering module is used to acquire the filtered message data through the FPGA, and to perform second message data filtering on the filtered message data in the FPGA using preset capture conditions to obtain C2F application target message data. The preset capture conditions are configured by the CPU on the FPGA.

[0043] To achieve the above objectives, a third aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the message data processing method of the C2F application message acquisition system as described in the first aspect.

[0044] To achieve the above objectives, a fourth aspect of the present application provides a storage medium, which is a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the message data processing method of the message acquisition system under the C2F application described in the first aspect.

[0045] The message data processing method and related equipment of the C2F application message acquisition system proposed in this application embodiment include a P4 switching chip, a CPU and an FPGA connected to each other. The method includes: first, acquiring multiple C2F application message data sent by an external device through the P4 switching chip; then, performing a first message data filtering on the multiple C2F application message data in the P4 switching chip to obtain at least one filtered message data; finally, acquiring the filtered message data through the FPGA, and performing a second message data filtering on the filtered message data in the FPGA using preset capture conditions to obtain the C2F application target message data. In this embodiment, an FPGA connected to the P4 switching chip is additionally set up in the message acquisition system for message capture. Utilizing the high transmission rate of the FPGA, the transmission rate of C2F application message data between the FPGA and the P4 switching chip can reach the maximum transmission rate of the P4 switching chip, thereby improving the data filtering and transmission rate of C2F application message data in the message acquisition system. Furthermore, the two-layer message data filtering of C2F application message data using the P4 switching chip and FPGA, along with the higher data processing capability of the FPGA compared to the P4 switching chip, further improves the accuracy and reliability of filtering C2F application target message data from the C2F application message data. In addition, the high data processing capability of the FPGA is used to process the C2F application message data that requires data processing, thereby alleviating the CPU's processing load and improving the data processing performance of the message acquisition system.

[0046] Other features and advantages of this application will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the description, claims and drawings. Attached Figure Description

[0047] Figure 1 This is a schematic diagram of the structure of a message acquisition system under C2F application provided in an embodiment of this application.

[0048] Figure 2 This is a schematic diagram of the structure of an FPGA provided in another embodiment of this application.

[0049] Figure 3 This is a flowchart of a message data processing method for a message acquisition system under a C2F application, provided in another embodiment of this application.

[0050] Figure 4 yes Figure 3 The flowchart for step 302.

[0051] Figure 5This is a flowchart of configuring preset capture conditions for an FPGA, provided in another embodiment of this application.

[0052] Figure 6 yes Figure 3 The flowchart for step 303.

[0053] Figure 7 yes Figure 6 The flowchart for step 602.

[0054] Figure 8 yes Figure 7 The flowchart for step 702.

[0055] Figure 9 yes Figure 7 Another flowchart for step 702.

[0056] Figure 10 A flowchart for updating preset capture conditions is provided in another embodiment of this application.

[0057] Figure 11 This is a schematic diagram of the structure of the message data processing device of the C2F application message acquisition system provided in another embodiment of this application.

[0058] Figure 12 This is a schematic diagram of the hardware structure of an electronic device provided in another embodiment of this application. Detailed Implementation

[0059] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0060] It should be noted that although functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart.

[0061] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0062] With societal development, a new business model called C2F (customer to factory) has emerged. In this model, customers can place orders directly through a digital platform, and factories produce and deliver according to the order requirements. By directly connecting consumers and manufacturers, it eliminates intermediaries, thereby improving efficiency, reducing costs, and providing more personalized customization services. Under the C2F model, factories need to respond to consumer order demands in real time and be able to quickly adjust production lines to meet individual needs. This requires not only efficient production processes but also robust and flexible hardware infrastructure to support high-speed data transmission and processing.

[0063] In factories, information layer switches need to transmit massive data flows from various industrial devices and business management systems, thus requiring high-performance and flexible switches to quickly respond to changes in business operations. Programmable switches are programmable data plane devices that allow users to define network behavior using the P4 (Programming Protocol-independent Packet Processors) language, enabling highly flexible and customizable network functions. P4 programmable switches can achieve high-bandwidth, low-latency data transmission, flexible network configuration, security isolation, and multi-protocol conversion. Therefore, in the context of the C2F (Consumer-to-Factory) business model trend, P4 programmable switches have great potential in application scenarios involving packet data filtering and transmission.

[0064] P4 is a domain-specific programming language for network devices that specifies how the data plane processes network packets. P4's goals include: protocol independence (switches should not be bound to any specific network protocol); target independence (programmers should be able to describe packet processing functionality independently of the underlying hardware details); and field reconfigurability (once deployed, programmers should be able to change how the switch processes packets).

[0065] Representative P4 switching chips on the market include Intel's Tofino1 and Tofino2 chips. A P4 switch utilizing the Tofino chip is the Wedge100BF-65X, which provides 65 100G ports and is programmable using the P4 language. This means that users can customize the data plane processing flow according to their needs after purchasing the switch, without requiring switch manufacturers to develop new chips or launch new switch products. These characteristics of P4 switches significantly reduce the technical barriers and costs of developing new switch functions. More importantly, it greatly accelerates the time to market for new functions, eliminating the need to wait for chip development cycles that are measured in years. This gives enterprises a competitive edge in a rapidly changing market. Therefore, P4 has become a hot area of ​​research and application. Similarly, in C2F applications, P4 switches have become essential equipment.

[0066] Just like any product, users will inevitably encounter problems when using P4 switches, making debugging capabilities extremely important. Network packet capture, as the first step in protocol analysis, is crucial; the ability to capture packets accurately and promptly at the time of a problem is key to troubleshooting.

[0067] In related technologies, in order to improve the efficiency of message transmission, after the P4 switching chip is used to obtain the message data sent by the peer device, the P4 switching chip and the connected CPU are usually used to filter the message data to obtain the target message data. The target message data is then sent to the CPU for backup to ensure the reliability of message data transmission, and the target message data is then transmitted to another peer device.

[0068] However, due to the interface limitations of the P4 switching chips in existing P4 programmable switches—specifically, the Tofino1 chip uses a PCIe Gen2 x4 interface with a bandwidth of 16Gbps, while the Tofino2 chip uses a PCIe Gen3 x4 interface with a bandwidth of 32Gbps—the transmission rate between the P4 switching chip and the CPU cannot reach the maximum transmission rate of the P4 switching chip, which is 100Gbps. Furthermore, when the P4 switching chip is capturing data, it may encounter tasks it cannot handle and may delegate these tasks to the CPU for software processing. For example, in the gPTP protocol, floating-point operations are required, but the P4 switching chip does not support floating-point operations, so these operations must be handled by the CPU, which then returns the results to the P4 switching chip. This increases the CPU's processing load. When the CPU's processing load is too high, it will affect the synchronization accuracy during packet data transmission, further impacting the functionality and performance of the P4 switching chip, ultimately resulting in lower efficiency for packet data filtering and transmission through the P4 programmable switch.

[0069] To improve the efficiency of message data filtering in C2F applications, this embodiment of the application additionally sets up an FPGA connected to the P4 switching chip in the message acquisition system for message capture. Utilizing the high transmission rate of the FPGA, the transmission rate of C2F application message data between the FPGA and the P4 switching chip can reach the maximum transmission rate of the P4 switching chip, thereby improving the data filtering and transmission rate of C2F application message data in the message acquisition system. Furthermore, the two-layer message data filtering of C2F application message data using the P4 switching chip and FPGA, along with the higher data processing capability of the FPGA compared to the P4 switching chip, further improves the accuracy and reliability of filtering C2F application target message data from the C2F application message data. In addition, the high data processing capability of the FPGA is used to process the C2F application message data that requires data processing, thereby alleviating the CPU's processing load and improving the data processing performance of the message acquisition system.

[0070] The following will further describe the message data processing method and related equipment of the C2F application-based message acquisition system provided in the embodiments of this application. First, the C2F application-based message acquisition system provided in the embodiments of this application will be described. (Refer to...) Figure 1 This is a schematic diagram of a message acquisition system under a C2F application provided in an embodiment of this application. Figure 1 As shown, the message acquisition system includes an interconnected P4 switching chip, a CPU, and an FPGA, with the FPGA connected to a DDR memory. The P4 switching chip is programmable using the P4 language and is also connected to external devices (such as…). Figure 1 Devices 1, 2, and n shown are connected to receive C2F application message data sent by external devices. Then, the message acquisition system filters these C2F application message data to capture C2F application target message data, so as to save the C2F application target message data and send it to the external receiving device.

[0071] The P4 switch chip is the executor of the P4 program in the packet acquisition system. It receives and parses C2F application packet data according to user-defined programming requirements (e.g., parsing various segments of IP, UDP, TCP, ARP, and other protocol packets), edits C2F application packet data, and performs traffic scheduling and forwarding of C2F application packet data. Typical P4 switch chips include Intel's Tofino1 and Tofino2 chips. A typical P4 switch chip includes a programmable parser, a programmable Match-Action pipeline, a programmable deparser, and a traffic management module. The parser module parses the C2F application packet data according to the user-input P4 language programming. The Match-Action pipeline compares the key value of the C2F application packet data with the user's configuration entries, and executes a specific action after matching a specific row. This part is the essence of P4; it is programmable, meaning users can re-encode it using the P4 language to execute different functions. The traffic management module includes packet traffic management (such as limiting the rate of packets from a certain source IP address to less than 1Mbps) and packet copying. The Deparser module completes the assembly of packets to form the final packet to be sent.

[0072] The CPU is the processor in the message acquisition system, and can be an ARM, RISC-V, or x86 CPU. It runs the software within the message acquisition system, such as configuring entries on the P4 switching chip and processing special messages. In this embodiment, because the message acquisition system aims to capture target message data for a C2F application, two sets of interfaces can be configured between the CPU and the FPGA: one for configuration (e.g., PCIe or local bus interface) and the other for message transmission (e.g., USB or Ethernet port). The configuration interface enables the CPU to configure the FPGA, while the data interface enables the CPU to read the message capture results. Similarly, two sets of interfaces can also be configured between the CPU and the P4 switching chip.

[0073] The FPGA, based on the CPU configuration, captures C2F application target message data and writes the captured C2F application target message data to DDR. (Refer to...) Figure 2 This is a schematic diagram of an FPGA structure provided in an embodiment of this application. Figure 2 As shown, the FPGA and P4 switching chip can have one or more Ethernet interfaces (such as...). Figure 2Ethernet interface 1 (which can be one or more) receives C2F application message data copied from the P4 chip. The message parsing module then parses the C2F application message data, extracting various fields (e.g., IP, UDP, and TCP segments) to trigger the capture logic. This trigger logic automatically controls when to start and stop capture, achieving precise capture of the target C2F application message data. Furthermore, Figure 2 The configuration interface shown is used to interface with the CPU to configure registers. This interface can be a PCIe, local bus, or similar interface. The registers receive the message capture conditions configured by the CPU to control the triggering conditions. The DDR controller and DDR PHY convert bus timing to DDR timing; this can be implemented using IP embedded within the FPGA. Interface 2 connects to the CPU to read captured messages, reading the message results from DDR memory. This can be a USB or Ethernet port. After reading the results, the CPU can analyze the problem using network protocol analysis software. The bus is the interconnecting module within the FPGA; it can be an AXI4 bus module. Other interfaces include necessary ones such as I2C and UART.

[0074] DDR is the memory of the packet acquisition system. It can be DDR4, DDR5, or other memory devices. Device 1, Device 2, and Device n are external devices that interface with the P4 switching chip, and can be network devices such as workstations and switches.

[0075] The following will describe in detail the message data processing method of the message acquisition system under C2F application in the embodiments of this application. (Refer to...) Figure 3 This is an optional flowchart of a message data processing method for a message acquisition system under C2F application provided in this application embodiment. Figure 3 The method may include, but is not limited to, steps 301 to 303. It is also understood that this embodiment... Figure 3 The order of steps 301 to 303 is not specifically limited; the order of steps can be adjusted or certain steps can be added or removed according to actual needs. The message data processing method of the C2F application message acquisition system provided in this embodiment can be applied to the CPU in the C2F application message acquisition system, or to other control processors connected to the message acquisition system.

[0076] Step 301: Obtain multiple C2F application message data sent by external devices through the P4 switching chip.

[0077] Step 301 will be described in detail below.

[0078] In some embodiments, when the C2F application message acquisition system responds to the capture and transmission of C2F application target message data transmitted by an external device, it receives these C2F application message data through the network port connected to the external device via the P4 switching chip and enters the message acquisition system to facilitate the screening process of C2F application message data.

[0079] Step 302: In the P4 switching chip, perform first message data filtering on multiple C2F application message data to obtain at least one filtered message data.

[0080] Step 302 will be described in detail below.

[0081] In some embodiments, after acquiring multiple C2F application message data, in order to further improve the capture accuracy of C2F application target message data, the P4 switching chip first performs a relatively coarse first message data screening on the multiple C2F application message data, thereby effectively filtering out redundant message data that is irrelevant to user needs from the multiple C2F application message data, thus leaving multiple filtered message data that are more in line with user needs.

[0082] Furthermore, as described in the above message acquisition system description, before performing message data filtering, the user pre-sets the P4 filtering conditions corresponding to the first message data filtering for the P4 switching chip using the CPU and P4 programming language according to their own needs, so that in the actual C2F application message filtering, the P4 switching chip can perform the first message data filtering on multiple C2F application message data based on the P4 filtering conditions.

[0083] The following section will further describe how to perform the first packet data filtering on multiple C2F application message data in the P4 switching chip.

[0084] Reference Figure 4 In the P4 switching chip, multiple C2F application message data are filtered to obtain at least one filtered message data, including the following steps 401 to 402.

[0085] Step 401: In the P4 switching chip, the data of each C2F application message is parsed to obtain the message field parsing data.

[0086] Step 402: Select C2F application message data from multiple C2F application message data whose message field parsing data matches the preset message field segment as the filter message data.

[0087] Steps 401 to 402 are described in detail below.

[0088] In some embodiments, after the P4 switching chip receives multiple C2F application message data, P4 code is programmed in the P4 switching chip to parse each C2F application message data one by one to obtain the message field parsing data of each C2F application message data, which typically includes message field information. Then, each message field parsing data is compared with a preset message field segment in the preset P4 filtering conditions to perform the first message data filtering, that is, matching the message field with the specified value, thereby selecting C2F application message data whose message field parsing data matches the preset message field segment from the multiple C2F application message data as the filtered message data. The filtered message data is copied and sent to the port connected to the FPGA during normal processing controlled by the P4 program, so as to be transmitted to the FPGA for the second message data filtering.

[0089] Understandably, the first message data filtering in the P4 switching chip can also be done without any judgment, directly and unconditionally copying all C2F application message data of a certain port to the FPGA.

[0090] Through steps 401 to 402 above, for the multiple C2F application message data obtained by the P4 switching chip, the multiple C2F application message data are pre-filtered based on the preset message field in the P4 filtering conditions specified by the user through the P4 programming language. In this way, the simple processing capability of the P4 switching chip is used to effectively remove redundant message data in the C2F application message data, thereby reducing the amount of data filtering in the subsequent FPGA, and thus improving the filtering efficiency and accuracy of the C2F application target message data.

[0091] Furthermore, since the P4 switching chip requires a second packet screening by the FPGA after initial screening, the amount of filtered packet data that the FPGA needs to process is related to the leniency of the P4 screening conditions in the P4 switching chip. Therefore, to further improve the packet screening reliability of the packet acquisition system in C2F applications, when the P4 switching chip performs the first packet data screening based on a preset packet segment, the leniency of the preset packet segment needs to be adaptively adjusted according to the real-time data processing rate of the FPGA, as described below.

[0092] Reference Figure 5 After selecting C2F application message data whose message field parsing data matches the preset message field segment from multiple C2F application message data as the filtered message data, the message data processing method of the C2F application message acquisition system further includes the following steps 501 to 502.

[0093] Step 501: Update the preset message segment based on the P4 adjustment factor to obtain the updated preset message segment.

[0094] Step 502: Select C2F application message data from multiple C2F application message data that match the message field parsing data and the updated preset message field segment as the filter message data.

[0095] Steps 501 to 502 are described in detail below.

[0096] In some embodiments, during the first message data filtering process of the P4 switching chip, the ratio of the amount of filtered message data to be processed in real time by the FPGA to the real-time data processing speed of the FPGA is used to generate the waiting processing delay of the filtered message data that the FPGA needs to process. Then, the waiting processing delay is matched with a preset P4 adjustment time. When the waiting processing delay is greater than the preset P4 adjustment time, the matching value segment of the preset message segment is reduced according to the preset P4 adjustment factor (which is a fixed value, such as 0.8) to obtain the updated preset message segment.

[0097] Then, taking advantage of the P4 switching chip's ability to dynamically configure filtering conditions and execute different matching actions, configurable actions include: forwarding to port 1, discarding the packet, handing it over to the CPU, forwarding it to the FPGA, and modifying certain content within the packet. The contents of this table can be dynamically configured by the CPU while the P4 switching chip is running, thereby executing different actions.

[0098] Then, the updated preset message field segment replaces the original preset message field segment of the P4 switching chip, so as to select C2F application message data that matches the message field parsing data and the updated preset message field segment from multiple C2F application message data as the filtering message data. In this way, the P4 can adjust the filtering conditions in real time to adjust the generation rate of the filtering message data in real time, thereby improving the message filtering reliability of the message acquisition system under C2F application.

[0099] Step 303: Obtain the filtered message data through the FPGA, and perform a second message data filtering on the filtered message data in the FPGA using preset capture conditions to obtain the C2F application target message data.

[0100] Step 303 will be described in detail below.

[0101] In some embodiments, after the P4 switching chip performs a first message data filtering on multiple C2F application message data to obtain multiple filtered message data, the P4 switching chip transmits the multiple filtered message data to the FPGA through an Ethernet interface connected to the FPGA. Utilizing the high processing power of the FPGA and combined with the preset capture conditions configured by the CPU for the FPGA, a more accurate second message data filtering is performed on the multiple filtered messages to obtain C2F application target message data that accurately meets the user's needs.

[0102] The following describes how the CPU configures the preset capture conditions for the FPGA.

[0103] Reference Figure 6 Before obtaining the target message data for the C2F application by performing a second message data filtering on the filtered message data using preset capture conditions in the FPGA, the message data processing method of the message acquisition system under C2F application further includes the following steps 601 to 602.

[0104] Step 601: Generate a configuration file by obtaining the system's message filtering requirements through the CPU.

[0105] Step 602: The CPU sends the configuration file to the FPGA through the configuration interface between the CPU and the FPGA, so that the FPGA can configure the preset capture conditions according to the configuration file.

[0106] Steps 601 to 602 are described in detail below.

[0107] In some embodiments, before actually capturing the target message data of the C2F application, the CPU generates a configuration file corresponding to the FPGA based on the message filtering requirements input by the user to the message acquisition system, and sends the configuration file to the FPGA using the configuration interface between the CPU and the FPGA, so that the FPGA bus can be set to trigger control according to the configuration file, thereby completing the setting of the preset capture conditions.

[0108] In some embodiments, preset capture conditions typically include: (1) Unconditional packet capture: once packet capture is started, all received packets are written to DDR until DDR is full or CPU configuration stops. (2) Packet type condition: matching is triggered based on packet type, such as capturing only IPv4, IPv6, UDP packets. Multiple matching types can be set to capture multiple types of packets. (3) Packet segment condition or segment filtering trigger condition: matching is triggered based on the value of the packet segment, such as specifically capturing packets with a destination IP address of 202.100.190.3. Only packets with this destination IP address are captured, and other packets are discarded. Of course, it is also possible to set matching based on the subnet value. (4) Packet error detection condition: abnormal packets are triggered, such as only capturing packets with header checksum errors in the IP packet header. (5) Timed filtering trigger conditions, i.e., counter triggering for specific events: for example, counting packets with source IP address 10.10.1.100, and triggering packet capture when the count reaches 10000 (where 10000 is configurable). (6) Timer triggering for specific events: for example, starting a timer and beginning packet capture when a TCP connection establishment SYNC message is received, and triggering a timeout to stop packet capture when the timer reaches 1 millisecond. This allows for complete recording of all interactive packets for subsequent analysis. (7) Position filtering trigger conditions, i.e., setting the position of trigger events: the percentage of a trigger event (such as timeout, count, or matching a condition) in the entire captured packets can be configured. 0% means the trigger event occurs at the beginning of the entire recorded packet sequence, 50% means the event occurs in the middle of the entire packet, and 100% means the event occurs at the end of the entire packet. This function allows for flexible control over the position of an event within the entire recorded message sequence, which is highly beneficial for a complete analysis of the entire problem process (if the position cannot be controlled, the beginning may be visible but the end may not be, or only the end may be visible but the beginning may not be, making it impossible to know what actually happened before and after the problem, thus increasing the difficulty of problem localization).

[0109] As can be seen, through the above flexible logic control, messages can be accurately acquired and the amount of message data reduced, thereby alleviating the pressure of subsequent analysis. Of course, this solution can also capture messages unconditionally, which can be useful when the cause of the problem is initially unknown.

[0110] The following section will further describe how to perform precise second message data filtering on the filtered message data in an FPGA.

[0111] Reference Figure 7 In the FPGA, the target message data for C2F application is obtained by using preset capture conditions to perform a second message data filtering. This includes the following steps 701 to 703.

[0112] Step 701: In the FPGA, each filtered message data is parsed to obtain message filtering parsing data.

[0113] Step 702: Based on the preset capture conditions, filter and parse the data of each message and perform data matching to obtain the data matching results.

[0114] Step 703: Select C2F application target message data from multiple filtered message data based on the data matching results.

[0115] Step 703 will be described in detail below.

[0116] Steps 701 to 703 are described in detail below.

[0117] In some embodiments, after the FPGA receives multiple filtering message data, each filtering message data is first parsed to obtain the message filtering parsing data for each filtering message data. This typically includes the parsed message type, the parsed message field, and the message filtering parsing data. In addition, the time (i.e., timing time) and position (i.e., message data position) of each filtering message data in all C2F application message data are also recorded.

[0118] Next, in the FPGA, data matching is performed on the filtered parsed data of each message based on the preset capture conditions, so as to obtain the data matching result of each filtered message data, so as to accurately capture the target message data of C2F application from multiple filtered message data using the data matching result.

[0119] The following section will further describe how to perform data matching.

[0120] Reference Figure 8 The process involves filtering and parsing data for each message based on preset capture conditions, and then performing data matching to obtain the data matching results, including the following steps 801 to 804.

[0121] Step 801: Select at least one packet filtering parsing data from multiple packet filtering parsing data that matches the domain segment filtering triggering condition as the domain segment filtering parsing data.

[0122] Step 802: Select at least one segment filtering data from all segment filtering parsing data that matches the timing time and timing filtering trigger condition as timing filtering parsing data.

[0123] Step 803: Select at least one timed filtering parsing data from all timed filtering parsing data that matches the message data location with the location filtering trigger condition as the target filtering parsing data.

[0124] Step 804: Based on the preset capture conditions, filter and parse the data for each target and perform data matching to obtain the data matching results.

[0125] Steps 801 to 804 are described in detail below.

[0126] In some embodiments, after the FPGA parses multiple filtered message data to obtain the message filtering parsing data corresponding to each filtered message data, based on the above-mentioned list of preset capture conditions, it is necessary to pre-select at least one message filtering parsing data that matches the domain segment parsing trigger condition from the multiple message filtering parsing data as the domain segment filtering parsing data; further, at least one domain segment filtering parsing data that matches the timing time and timing trigger condition from all the domain segment filtering parsing data is selected as the timing filtering parsing data; further still, at least one timing filtering parsing data that matches the message data position and the position filtering trigger condition from all the timing filtering parsing data is selected as the target filtering parsing data; finally, data matching is performed on each target filtering parsing data based on the preset capture conditions, as described in the following description.

[0127] Reference Figure 9 The process includes steps 901 to 904, which involve filtering and parsing data for each message based on preset capture conditions to obtain data matching results.

[0128] Step 901: Match the parsed message type in the message filtering parsing data with the message type conditions to obtain the message type matching result.

[0129] Step 902: Match the parsed message field segments in the message filtering parsing data with the message field segment conditions to obtain the message field segment matching results.

[0130] Step 903: Perform message error detection on the message filtering and parsing data based on the message error detection conditions to obtain the message error detection matching results.

[0131] Step 904: Obtain the data matching result based on the message type matching result, message segment matching result, and message error detection matching result.

[0132] Steps 901 to 904 are described in detail below.

[0133] In some embodiments, after obtaining target filtering parsing data by applying field segment filtering trigger conditions, timing filtering trigger conditions, and location filtering trigger conditions to multiple filtered message data, in order to further improve the filtering accuracy of C2F application target message data, the parsed message type in the message filtering parsing data corresponding to the filtering parsing data is matched with the message type condition to obtain a message type matching result; and the parsed message field in the message filtering parsing data corresponding to the filtering parsing data is matched with the message field condition to obtain a message field matching result; furthermore, message error detection is performed on the message filtering parsing data corresponding to the filtering parsing data based on message error detection conditions to obtain a message error detection matching result, and C2F application message data that meets the preset capture conditions in terms of message type matching result, message field matching result, and message error detection matching result is selected as C2F application target message data.

[0134] Through steps 801 to 804 and steps 901 to 904 above, the high computing power of the FPGA is utilized, combined with the complex preset capture conditions pre-configured for the FPGA, to perform complex and multi-round second message data filtering on the filtered message data, so as to obtain the target message data of C2F application accurately and quickly.

[0135] Furthermore, in actual C2F application message acquisition systems, the generation rate of C2F application message data from external devices fluctuates. Therefore, in order to adapt to the different generation rates of C2F application message data under different conditions, the accuracy or efficiency of capturing target message data in C2F applications can be improved.

[0136] Reference Figure 10 The process involves filtering and parsing data for each message based on preset capture conditions, performing data matching to obtain data matching results, and also includes the following steps 1001 to 1003.

[0137] Step 1001: Obtain the current message data generation rate of the external device and the current data processing rate of the FPGA.

[0138] Step 1002: Generate an adjustment factor based on the ratio of data processing rate to message data generation rate.

[0139] Step 1003: Update the preset capture conditions based on the adjustment factor to obtain updated preset capture conditions, and perform data matching on the filtered parsed data of each message based on the updated preset capture conditions to obtain data matching results.

[0140] Steps 1001 to 1003 are described in detail below.

[0141] In some embodiments, during the capture and filtering of target message data for C2F applications, it is also necessary to obtain the current message data generation rate of the external device and the current data processing rate of the FPGA in real time, so as to generate an adjustment factor α based on the ratio of the data processing rate to the message data generation rate. Then, based on the adjustment factor α, at least one of the domain segment filtering trigger conditions, timing filtering trigger conditions, and location filtering trigger conditions in the preset capture conditions is updated to obtain the updated preset capture conditions.

[0142] Understandably, when the data processing rate available to the FPGA is greater than the message data generation rate of the external device, the adjustment factor will be greater than 1, i.e., α>1. This corresponds to the situation where the message data generation of the external device is slow. In order to further improve the accuracy of capturing and filtering the target message data of the C2F application, the domain segment filtering trigger condition, timing filtering trigger condition, and location filtering trigger condition in the preset capture conditions will be reduced based on the adjustment factor α, thereby improving the accuracy of capturing the target message data of the C2F application while improving the filtering calculation.

[0143] Conversely, when the data processing rate currently available to the FPGA is less than the current message data generation rate of the external device, the adjustment factor will be less than 1, i.e., α < 1. This corresponds to the situation where the message data generation of the external device is relatively fast. In order to further improve the capture and filtering efficiency of the target message data of the C2F application, the domain segment filtering trigger condition, timing filtering trigger condition, and location filtering trigger condition in the preset capture conditions will be expanded based on the adjustment factor α, so as to improve the capture efficiency of the target message data of the C2F application while reducing the filtering calculation.

[0144] Then, based on the updated preset capture conditions, the data of each message is filtered and parsed for data matching to obtain the data matching result, which facilitates the filtering and capture of C2F application target message data according to the data matching result.

[0145] Referring to steps 1001 to 1003 above, during the capture and filtering process of C2F application target message data, the preset capture conditions are updated using the adjustment factor generated in real time by the current message data generation rate of the external device and the current data processing rate of the FPGA. This improves the capture efficiency or accuracy of C2F application target message data in the message acquisition system under C2F application, thereby enhancing the flexibility of the message acquisition system under C2F application and improving the reliability of target message data acquisition.

[0146] In some embodiments, after obtaining the C2F application target message data, the C2F application target message data is stored in the memory DDR, and other newly obtained C2F application message data are repeatedly filtered in the P4 switching chip and filtered in the FPGA to obtain new C2F application target message data and stored in the memory DDR, until the memory is full.

[0147] The message data processing method and related equipment of the C2F application message acquisition system proposed in this application embodiment include a P4 switching chip, a CPU, and an FPGA interconnected. The method includes: First, acquiring multiple C2F application message data sent by an external device through the P4 switching chip; then, parsing each C2F application message data in the P4 switching chip to obtain message field parsing data, and selecting C2F application message data whose message field parsing data matches a preset message field segment from the multiple C2F application message data as filtered message data; finally, acquiring the filtered message data through the FPGA, and parsing each filtered message data in the FPGA to obtain message filtering parsing data, selecting at least one message filtering parsing data whose field segment parsing data matches a field segment filtering trigger condition from the multiple message filtering parsing data as field segment filtering parsing data, selecting at least one field segment filtering parsing data whose timing time matches a timing filtering trigger condition from all field segment filtering parsing data as timing filtering parsing data, and selecting from all timing filtering parsing data... At least one timing-based filtering parsing data that matches the message data location and the location filtering trigger condition is selected as the target filtering parsing data. The parsed message type in the message filtering parsing data is matched with the message type condition to obtain the message type matching result. The parsed message segment in the message filtering parsing data is matched with the message segment condition to obtain the message segment matching result. Message error detection is performed on the message filtering parsing data based on the message error detection condition to obtain the message error detection matching result. Data matching result is obtained based on the message type matching result, message segment matching result, and message error detection matching result. C2F application target message data is selected from multiple filtered message data based on the data matching result. In addition, the current message data generation rate of the external device and the current data processing rate of the FPGA are obtained. An adjustment factor is generated based on the ratio of the data processing rate to the message data generation rate. The preset capture condition is updated based on the adjustment factor to obtain the updated preset capture condition. Data matching is performed on each message filtering parsing data based on the updated preset capture condition to obtain the data matching result.

[0148] This application embodiment additionally sets up an FPGA interconnected with the P4 switching chip in the message acquisition system for message capture. Utilizing the high transmission rate of the FPGA, the transmission rate of C2F application message data between the FPGA and the P4 switching chip can reach the maximum transmission rate of the P4 switching chip, thereby improving the data filtering and transmission rate of C2F application message data in the message acquisition system. Furthermore, for multiple C2F application message data acquired by the P4 switching chip, a relatively simple message data filtering is performed in advance based on preset message fields in the P4 filtering conditions defined by the user through the P4 programming language. This utilizes the simple processing capabilities of the P4 switching chip to effectively remove redundant message data from the C2F application message data, thereby reducing the amount of data filtering required by the FPGA and improving the filtering efficiency and accuracy of the target C2F application message data. Additionally, the high transmission rate of the FPGA... The computing power, combined with complex preset capture conditions pre-configured for the FPGA, performs complex and multi-round second-round filtering of the selected message data to accurately and quickly obtain the target message data for C2F applications. Furthermore, the high data processing capability of the FPGA is utilized to process the C2F application message data requiring further processing, thereby alleviating the CPU's processing load and improving the data processing performance of the message acquisition system. Moreover, during the capture and filtering of the target message data for C2F applications, the preset capture conditions are updated in real-time using adjustment factors generated by the current message data generation rate of the external device and the current data processing rate of the FPGA. This specifically improves the capture efficiency or accuracy of the target message data for C2F applications, enhancing the system's flexibility and improving the reliability of target message data acquisition.

[0149] This application also provides a message data processing apparatus for a message acquisition system under C2F applications, which can implement the message data processing method of the aforementioned message acquisition system under C2F applications. (Refer to...) Figure 11 The device 1100 includes:

[0150] The message data acquisition module 1110 is used to acquire multiple C2F application message data sent by external devices through the P4 switching chip;

[0151] The first filtering module 1120 is used to filter multiple C2F application message data in the P4 switching chip to obtain at least one filtered message data.

[0152] The second filtering module 1130 is used to acquire the filtered message data through the FPGA, and to perform second message data filtering on the filtered message data in the FPGA using preset capture conditions to obtain the C2F application target message data. The preset capture conditions are configured by the CPU on the FPGA.

[0153] In some embodiments, the second filtering module 1130 is further configured to:

[0154] The CPU generates a configuration file based on the system's message filtering requirements obtained from the messages.

[0155] The CPU sends a configuration file to the FPGA through the configuration interface between the CPU and the FPGA, so that the FPGA can configure the preset capture conditions according to the configuration file.

[0156] In some embodiments, the second filtering module 1130 is further configured to:

[0157] In the FPGA, each filtered message data is parsed to obtain message filtering parsing data;

[0158] Based on preset capture conditions, each message is filtered and parsed for data matching to obtain the data matching results;

[0159] The target message data for C2F application is selected from multiple filtered message data based on the data matching results.

[0160] In some embodiments, the second filtering module 1130 is further configured to:

[0161] The message type in the message filtering parsing data is matched with the message type conditions to obtain the message type matching result;

[0162] The parsed message segments in the message filtering parsing data are matched with the message segment conditions to obtain the message segment matching results;

[0163] Based on the message error detection conditions, message error detection is performed on the message filtering and parsing data to obtain message error detection matching results;

[0164] The data matching results are obtained based on the message type matching results, message segment matching results, and message error detection matching results.

[0165] In some embodiments, the second filtering module 1130 is further configured to:

[0166] Select at least one segment parsing data that matches the segment parsing trigger condition from multiple segment parsing data as the segment parsing parsing data;

[0167] Select at least one segment of the filtered data that matches the timing time and timing filtering trigger condition from all the segment filtered data as the timing filtering data;

[0168] Select at least one timed filter parsing data that matches the message data location and the location filter trigger condition from all timed filter parsing data as the target filter parsing data;

[0169] Based on preset capture conditions, the second filtering module 1130 performs data matching on the filtered data of each target to obtain the data matching result. In some embodiments, the second filtering module 1130 is further configured to:

[0170] Get the current message data generation rate of the external device and the current data processing rate of the FPGA;

[0171] An adjustment factor is generated based on the ratio of data processing rate to message data generation rate;

[0172] The preset capture conditions are updated based on the adjustment factor to obtain the updated preset capture conditions. Then, the data of each message is filtered and parsed based on the updated preset capture conditions to obtain the data matching results.

[0173] In some embodiments, the second filtering module 1130 is further configured to:

[0174] The target message data of the C2F application is stored in the memory, and the first and second message data filtering of the C2F application message data are repeated until the memory is full.

[0175] In some embodiments, the first filtering module 1120 is further configured to:

[0176] In the P4 switching chip, the data of each C2F application message is parsed to obtain the message field parsing data;

[0177] Select C2F application message data from multiple C2F application message data that match the preset message field data as the filter message data.

[0178] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, the specific implementation of the message data processing device of the message acquisition system under C2F application is basically the same as the specific implementation of the message data processing method of the message acquisition system under C2F application, and will not be repeated here.

[0179] In this embodiment, the message data processing device of the C2F application message acquisition system additionally sets up an FPGA interconnected with the P4 switching chip for message capture. Utilizing the high transmission rate of the FPGA, the transmission rate of C2F application message data between the FPGA and the P4 switching chip can reach the maximum transmission rate of the P4 switching chip, thereby improving the data filtering and transmission rate of C2F application message data in the message acquisition system. Furthermore, for multiple C2F application message data acquired by the P4 switching chip, a relatively simple message data filtering is performed in advance based on preset message fields in the P4 filtering conditions defined by the user using the P4 programming language. This utilizes the simple processing capabilities of the P4 switching chip to effectively remove redundant message data from the C2F application message data, thereby reducing the amount of data filtering required by the FPGA and improving the filtering efficiency and accuracy of the target C2F application message data. Furthermore, leveraging the high computing power of the FPGA, combined with complex preset capture conditions pre-configured for the FPGA, a complex and multi-round second-round filtering of the selected message data is performed to accurately and quickly obtain the target message data for C2F applications. In addition, the high data processing capability of the FPGA is used to process the C2F application message data that requires data processing, thereby alleviating the CPU's processing load and improving the data processing performance of the message acquisition system. Moreover, during the capture and filtering of the target message data for C2F applications, the preset capture conditions are updated in real-time using adjustment factors generated by the current message data generation rate of the external device and the current data processing rate of the FPGA. This specifically improves the capture efficiency or accuracy of the target message data for C2F applications, thereby enhancing the flexibility of the C2F application message acquisition system and improving the reliability of target message data acquisition.

[0180] This application also provides an electronic device, including:

[0181] At least one memory;

[0182] At least one processor;

[0183] At least one program;

[0184] The program is stored in a memory, and the processor executes the at least one program to implement the message data processing method of the C2F application-based message acquisition system described above. The electronic device can be any smart terminal, including mobile phones, tablets, personal digital assistants (PDAs), and in-vehicle computers.

[0185] Please see Figure 12 , Figure 12 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes:

[0186] The processor 1201 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0187] The memory 1202 can be implemented in the form of ROM (Read-Only Memory), static storage device, dynamic storage device, or RAM (Random Access Memory). The memory 1202 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1202 and is called and executed by the processor 1201 to execute the message data processing method of the message acquisition system under the C2F application of this application embodiment.

[0188] The input / output interface 1203 is used to implement information input and output;

[0189] The communication interface 1204 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0190] Bus 1205 transmits information between various components of the device (e.g., processor 1201, memory 1202, input / output interface 1203, and communication interface 1204);

[0191] The processor 1201, memory 1202, input / output interface 1203 and communication interface 1204 are connected to each other within the device via bus 1205.

[0192] This application embodiment also provides a storage medium, which is a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the message data processing method of the message acquisition system under the C2F application described above.

[0193] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0194] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0195] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0196] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0197] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0198] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0199] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0200] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. The coupling or direct coupling or communication connection between the shown or discussed units may be through some interfaces, or indirect coupling or communication connection between the apparatus or units, and may be electrical, mechanical, or other forms.

[0201] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0202] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0203] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0204] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A message data processing method of a message acquisition system under a C2F application, characterized by, The message acquisition system comprises a P4 switching chip, a CPU and an FPGA connected with each other, and the method comprises the following steps: a plurality of C2F application message data sent by an external device are acquired through the P4 switching chip; at least one filtered message data is obtained by performing first message data filtering on the plurality of C2F application message data in the P4 switching chip; the filtered message data is acquired through the FPGA, and second message data filtering is performed on the filtered message data in the FPGA by using a preset capture condition to obtain C2F application target message data; the first message data filtering comprises the following steps: message field analysis data is obtained by analyzing each C2F application message data in the P4 switching chip; from the plurality of C2F application message data, the C2F application message data whose message field analysis data matches a preset message field segment is selected as the filtered message data; before the second message data filtering is performed on the filtered message data in the FPGA by using the preset capture condition to obtain the C2F application target message data, the method further comprises the following steps: a configuration file is generated by the CPU according to the message filtering requirement of the message acquisition system; the configuration file is sent to the FPGA through the configuration interface between the CPU and the FPGA by using the CPU, so that the FPGA configures the preset capture condition according to the configuration file.

2. The message data processing method of the C2F application message acquisition system according to claim 1, characterized by, the second message data filtering comprises the following steps: message filtering analysis data is obtained by analyzing each filtered message data in the FPGA; data matching is performed on each message filtering analysis data based on the preset capture condition to obtain a data matching result; the C2F application target message data is selected from the plurality of filtered message data based on the data matching result.

3. The message data processing method of the C2F application message acquisition system according to claim 2, characterized by, the preset capture condition comprises a message type condition, a message field segment condition and a message error detection condition, and the data matching comprises the following steps: the analysis message type in the message filtering analysis data is matched with the message type condition to obtain a message type matching result; the analysis message field segment in the message filtering analysis data is matched with the message field segment condition to obtain a message field segment matching result; message error detection is performed on the message filtering analysis data based on the message error detection condition to obtain a message error detection matching result; the data matching result is obtained based on the message type matching result, the message field segment matching result and the message error detection matching result.

4. The message data processing method of the C2F application message acquisition system according to claim 2, characterized by, the preset capture condition comprises a field segment filtering trigger condition, a timing filtering trigger condition and a position filtering trigger condition, and the data matching comprises the following steps: selecting, from the multiple message screening analysis data, at least one message screening analysis data matching the domain segment screening trigger condition as domain segment screening analysis data; selecting, from all the domain segment screening analysis data, at least one domain segment screening analysis data matching the timing screening trigger condition as timing screening analysis data; selecting, from all the timing screening analysis data, at least one timing screening analysis data matching the position screening trigger condition as target screening analysis data; performing data matching on each of the target screening analysis data based on the preset capture condition to obtain the data matching result.

5. The message data processing method of the C2F application message acquisition system according to claim 3, characterized by, The data matching result is obtained by performing data matching on each of the message screening analysis data based on the preset capture condition, including: obtaining the current message data generation rate of the external device, and obtaining the current data processing rate of the FPGA; generating an adjustment factor based on the ratio of the data processing rate and the message data generation rate; updating the preset capture condition based on the adjustment factor to obtain an updated preset capture condition, and performing data matching on each of the message screening analysis data based on the updated preset capture condition to obtain the data matching result.

6. The message data processing method of the C2F application message acquisition system according to claim 2, characterized by, The message acquisition system further comprises a memory connected to the FPGA, and after the FPGA acquires the screening message data and performs second message data screening on the screening message data in the FPGA using a preset capture condition to obtain C2F application target message data, the method further comprises: storing the C2F application target message data into the memory, and repeatedly performing the first message data screening and the second message data screening of the C2F application message data until the memory is full.

7. The message data processing method of the C2F application-under-report message acquisition system according to claim 1, characterized by, After selecting the message domain analysis data matching the preset message domain segment from the multiple C2F application message data as the screening message data, the method further comprises: updating the preset message domain segment based on a P4 adjustment factor to obtain an updated preset message domain segment, the P4 adjustment factor being generated based on the data processing rate of the FPGA and the screening message data amount of the screening message data to be processed; selecting C2F application message data matching the message domain analysis data and the updated preset message domain segment from the multiple C2F application message data as the screening message data.

8. A message data processing apparatus of a message acquisition system under a C2F application, characterized by, The system comprises a P4 switch chip, a CPU and an FPGA, and the device comprises: a message data acquisition module for acquiring multiple C2F application message data sent by an external device through the P4 switch chip; a first screening module for performing first message data screening on the multiple C2F application message data in the P4 switch chip to obtain at least one screening message data; A second screening module is configured to acquire the screening packet data by the FPGA, and perform second packet data screening on the screening packet data by using preset capture conditions in the FPGA, to obtain C2F application target packet data. The first packet data screening on the plurality of C2F application packet data in the P4 switching chip comprises: In the P4 switching chip, each C2F application packet data is parsed to obtain packet field analysis data; From the plurality of C2F application packet data, C2F application packet data matching the preset packet field segment is selected as the screening packet data; Before the second packet data screening on the screening packet data by using preset capture conditions in the FPGA to obtain C2F application target packet data, the method further comprises: A configuration file is generated by the CPU according to packet screening requirements of the packet acquisition system; The configuration file is sent to the FPGA by the CPU through a configuration interface between the CPU and the FPGA, so that the FPGA configures the preset capture conditions according to the configuration file. 9.An electronic device comprising a memory and a processor, the memory storing a computer program, wherein, The processor executes the computer program to implement the packet data processing method of the C2F application packet acquisition system according to any one of claims 1 to 7.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the packet data processing method of the C2F application packet acquisition system according to any one of claims 1 to 7.

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