Process optimization method and system for flexible circuit board production line

Abstract

The invention relates to the technical field of flexible circuit board production, in particular to a process optimization method and system for a flexible circuit board production line. The method comprises the following steps: acquiring characteristic data of a flexible circuit board material; executing a circuit board thermocuring action according to the material characteristic data of the flexible circuit board, performing thermal stress intensity evaluation, and generating stress hot spot distribution data; performing real-time curing temperature control feedback adjustment according to the stress hotspot distribution data to obtain circuit board curing effect evaluation data; detecting a real-time surface wettability index of the to-be-processed flexible circuit board in front of the laminating station; and fitting process parameter compensation is carried out based on the circuit board curing effect evaluation data and the real-time surface wettability index so as to realize curing-fitting process optimization of the flexible circuit board production line. According to the invention, intelligent optimization of the curing-laminating process of the flexible circuit board production line is realized, and the quality problems of uneven stress and overlarge deformation in the thermocuring-laminating process are effectively solved.

Description

Technical Field

[0001] The present invention relates to the technical field of flexible printed circuit board production, and particularly to a process optimization method and system for a flexible printed circuit board production line. Background Art

[0002] In the manufacturing process of flexible printed circuit boards, the curing and lamination processes are key links to ensure product performance and quality. These processes are usually carried out in a high-temperature environment, and temperature parameters need to be strictly controlled to ensure the full curing and good lamination of substrates such as polyimide (PI) and polyethylene terephthalate (PET), as well as various adhesives. However, in traditional flexible printed circuit board production lines, the temperature control system usually adopts a fixed-parameter control method and cannot be dynamically adjusted according to the characteristics of different batches of materials, environmental changes, and transient requirements during the process. This static temperature control scheme often results in uneven temperature distribution when processing flexible display circuit boards of different thicknesses and sizes, leading to uneven thermal expansion and contraction inside the materials, and then causing microscopic-scale structural deformation, resulting in a series of quality problems such as wire breakage, delamination between layers, and poor contact inside the circuit board, seriously affecting the reliability and service life of the product. Especially in the production process of large-size and multi-layer flexible printed circuit boards, due to the mismatch of the thermal expansion coefficients of materials, different degrees of thermal stress are easily generated during the heating and cooling processes, which in turn leads to microscopic deformation. This deformation will cause stress accumulation between layers and ultimately result in defects such as delamination between layers, warping, or microcracks. Summary of the Invention

[0003] Based on this, the present invention provides a process optimization method and system for a flexible printed circuit board production line to solve at least one of the above technical problems.

[0004] To achieve the above object, a process optimization method for a flexible printed circuit board production line includes the following steps: Step S1: Obtain the material characteristic data of the flexible printed circuit board; perform the thermal curing action of the circuit board according to the material characteristic data of the flexible printed circuit board, and collect the temperature distribution data on the board surface in real time during the curing process; Step S2: Analyze the planar thermal force according to the temperature distribution data on the board surface, and then construct a three-dimensional thermal field of the circuit board; evaluate the thermal stress intensity of the three-dimensional thermal field of the circuit board through the material characteristic data of the flexible printed circuit board to generate stress hot spot distribution data; divide the stress area according to the stress hot spot distribution data, and perform micro-region thermal balance strategy processing to obtain micro-region thermal balance control data; Step S3: Perform real-time curing temperature control feedback adjustment according to the micro-region thermal balance control data, and perform an evaluation of the influence of curing deformation after the flexible printed circuit board curing process is completed to obtain circuit board curing effect evaluation data; Step S4: Detect the real-time surface wettability index of the flexible circuit board to be processed before the lamination station; perform lamination process parameter compensation based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve the curing-lamination process optimization of the flexible circuit board production line.

[0005] Preferably, the present invention further provides a process optimization system for a flexible circuit board production line, which executes the process optimization method for a flexible circuit board production line as described above. The process optimization system for a flexible circuit board production line includes: A thermal curing data acquisition module, configured to obtain flexible circuit board material characteristic data; perform circuit board thermal curing actions according to the flexible circuit board material characteristic data, and collect the board surface temperature distribution data during the curing process in real time; A thermal stress balance module, configured to analyze the planar thermal force according to the board surface temperature distribution data, and then construct a three-dimensional thermal field of the circuit board; perform a thermal stress intensity evaluation on the three-dimensional thermal field of the circuit board through the flexible circuit board material characteristic data to generate stress hot spot distribution data; perform stress area division according to the stress hot spot distribution data, and perform a micro-region thermal balance strategy process to obtain micro-region thermal balance control data; A curing control and evaluation module, configured to perform real-time curing temperature control feedback adjustment according to the micro-region thermal balance control data, and perform a curing deformation influence evaluation after the flexible circuit board curing process is completed to obtain circuit board curing effect evaluation data; A lamination process optimization module, configured to detect the real-time surface wettability index of the flexible circuit board to be processed before the lamination station; perform lamination process parameter compensation based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve the curing-lamination process optimization of the flexible circuit board production line.

[0006] The present invention first obtains the characteristic data of flexible printed circuit board materials and combines it with the precise acquisition of real-time temperature distribution. The solution can dynamically adjust the thermal field distribution during the curing process according to the material characteristics of different batches, different thicknesses, and different sizes. This adaptive heat source control based on material characteristic parameters effectively avoids problems such as insufficient or excessive curing, uneven heating, etc. caused by material differences and environmental changes. By real-time analyzing the temperature distribution on the board surface during the curing process, constructing a three-dimensional thermal field model, and combining with material thermal performance parameters, it quantifies and evaluates the thermal stress intensity and its spatial distribution, realizes the precise identification of potential stress hotspots, and through the division of stress regions and the implementation of micro-region thermal balance strategies, each micro-region can obtain personalized temperature control adjustment according to the actual thermal stress state during the curing process. Compared with the traditional overall heating and passive compensation methods, this micro-region thermal balance control significantly improves the spatial resolution and response speed of temperature control, effectively suppresses defects such as microstructural deformation and interlayer delamination caused by local overheating or temperature difference, and greatly improves the yield and consistency of large-size and multi-layer flexible printed circuit boards. The three-dimensional thermal field construction and thermal stress intensity evaluation technology realize the accurate prediction of the internal thermal stress distribution of materials, and the micro-region thermal balance strategy effectively eliminates the local stress concentration phenomenon caused by uneven thermal distribution, fundamentally solving the problem of microstructural deformation caused by uneven temperature. The real-time curing temperature control feedback adjustment system ensures the stability of the entire curing process, reduces the interlayer stress accumulation caused by the mismatch of thermal expansion coefficients, and effectively prevents quality defects such as internal wire breakage and interlayer delamination in the circuit board. The surface wettability index detection and bonding process parameter compensation mechanism further optimize the subsequent bonding process, ensure the tight bonding of the material interface, and improve the structural integrity of multi-layer flexible printed circuit boards. This "curing-bonding" full-process intelligent optimization solution significantly extends the product service life, improves the production yield of large-size and multi-layer flexible display circuit boards, reduces material waste and rework costs, and enhances the adaptability and stability of the product in complex application environments. Therefore, a process optimization method for a flexible printed circuit board production line according to the present invention obtains the characteristic data of flexible printed circuit board materials, dynamically controls the heat source to perform thermal curing actions, combines with the material characteristic data to evaluate the thermal stress intensity, performs micro-region thermal balance strategy processing according to the stress hotspot distribution data, and performs real-time curing temperature control feedback adjustment and bonding process parameter compensation according to the micro-region thermal balance control data, realizing the curing-bonding process optimization of the flexible printed circuit board production line, significantly improving the production efficiency and product quality of flexible printed circuit boards, reducing production costs and energy consumption, and enhancing the reliability and service life of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a schematic flow chart of the steps of a process optimization method for a flexible printed circuit board production line according to the present invention; Figure 2 isFigure 1 Schematic diagram of the detailed implementation steps of step S3 in The realization, functional features, and advantages of the object of the present invention will be further described in conjunction with the embodiments with reference to the accompanying drawings. Specific implementation manners

[0008] The technical method of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative work belong to the scope of protection of the present invention.

[0009] In addition, the accompanying drawings are only schematic diagrams of the present invention and are not necessarily drawn to scale. The same reference numerals in the drawings represent the same or similar parts, and thus the repeated description of them will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. The functional entities can be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor methods and / or microcontroller methods.

[0010] It should be understood that although terms such as "first" and "second" may be used here to describe various units, these units should not be limited by these terms. These terms are only used to distinguish one unit from another. For example, without departing from the scope of the exemplary embodiments, the first unit can be called the second unit, and similarly the second unit can be called the first unit. The term "and / or" used here includes any and all combinations of one or more of the listed related items.

[0011] To achieve the above object, please refer to Figures 1 to 2 , the present invention provides a process optimization method for a flexible printed circuit board production line, including the following steps: Step S1: Obtain the material characteristic data of the flexible printed circuit board; perform the thermal curing action of the printed circuit board according to the material characteristic data of the flexible printed circuit board, and collect the board surface temperature distribution data during the curing process in real time; Step S2: Analyze the planar thermal force according to the board surface temperature distribution data, and then construct a three-dimensional thermal field of the printed circuit board; evaluate the thermal stress intensity of the three-dimensional thermal field of the printed circuit board through the material characteristic data of the flexible printed circuit board to generate stress hot spot distribution data; divide the stress area according to the stress hot spot distribution data, and perform micro-zone thermal balance strategy processing to obtain micro-zone thermal balance control data; Step S3: Perform real-time curing temperature control feedback adjustment according to the micro-region thermal equilibrium control data. After the curing process of the flexible printed circuit board is completed, evaluate the influence of curing deformation to obtain the evaluation data of the curing effect of the circuit board. Step S4: Detect the real-time surface wettability index of the flexible printed circuit board to be processed before the bonding station; perform bonding process parameter compensation based on the circuit board curing effect evaluation data and the real-time surface wettability index to optimize the curing-bonding process of the flexible printed circuit board production line.

[0012] In the embodiment of the present invention, the process optimization method for the flexible printed circuit board production line includes the following steps: Step S1: Obtain the material characteristic data of the flexible printed circuit board; perform the thermal curing action of the circuit board according to the material characteristic data of the flexible printed circuit board, and collect the board surface temperature distribution data during the curing process in real time. In the embodiment of the present invention, for example, taking the flexible display connection circuit board of a smart watch as an example, the thermal characteristics of the circuit board are tested by a differential scanning calorimeter. The glass transition temperature of the polyimide substrate is measured to be 267 °C, the thermal expansion coefficient is 20×10^-6 per degree Celsius, and the thermal conductivity is 0.12 watts per meter Kelvin. Based on the measured material characteristic data, set the curing process temperature curve: raise the temperature from room temperature to 120 °C at a rate of 3 °C per second and hold for 3 minutes to remove moisture, then raise the temperature to 210 °C at a rate of 2 °C per second and hold for 15 minutes for curing. The heat source uses an infrared heating array, which consists of a 16×16 matrix arrangement of heat source units, each unit with a size of 10 mm × 10 mm, and the distance between the heat source and the circuit board is precisely controlled at 15 mm. At the same time, 64 K-type thermocouples are arranged on the surface of the circuit board in a hexagonal honeycomb pattern with a spacing of 8 mm and a sampling frequency of 2 Hz. 12 micro-thermistors are embedded in the middle layer of the substrate to measure the internal temperature distribution. The real-time collected data is converted into digital signals through a 24-bit analog-to-digital converter and recorded as a three-dimensional temperature matrix, which includes a triple of spatial coordinates, time stamps, and temperature values. When the surface temperature uniformity of the circuit board reaches ±3 °C and remains at 210 °C for 15 minutes, the system controls the heat source to cool down at a rate of 2 °C per second to complete the thermal curing process.

[0013] Step S2: Analyze the planar thermal force according to the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; perform thermal stress intensity evaluation on the three-dimensional thermal field of the circuit board through the material characteristic data of the flexible printed circuit board to generate stress hot spot distribution data; perform stress region division according to the stress hot spot distribution data, and perform micro-region thermal equilibrium strategy processing to obtain micro-region thermal equilibrium control data. In the embodiments of the present invention, based on the collected temperature distribution data, the temperature gradient vector field is calculated by the central difference method, and it is identified that the temperature gradient in the connector area reaches 4.3 °C / mm, exceeding the safety threshold of 3.5 °C / mm. The system further calculates the vertical temperature change rate from the temperature data at three depths and finds that the vertical temperature gradient in the display signal transmission area reaches 5.8 °C / mm, which is much higher than the average value of 2.1 °C / mm. Subsequently, the system constructs a three-dimensional thermal field model and calculates the stress distribution through finite element analysis, determining five thermal stress concentration points: the stress value in the area around the connector pad reaches 105 MPa, the stress value in the bending area of the display signal line reaches 93 MPa, and the stress value in the power distribution area reaches 87 MPa. The system divides the circuit board into three types of stress areas, where the area with stress exceeding 85 MPa is marked as the thermal stress concentration area, the area with stress between 25 - 85 MPa is marked as the transition area, and the area with stress below 25 MPa is marked as the low stress area. The grid in the thermal stress concentration area is refined, and the grid spacing is refined from 0.5 mm to 0.05 mm. The system calculates that the thermal stress concentration area highly coincides with the area with too fast cooling rate, so a micro-region thermal balance strategy is designed: the cooling rate in the thermal stress concentration area is reduced to 1.2 °C / s, a buffer cooling rate of 2.0 °C / s is set in the surrounding transition area, the standard cooling rate of 2.5 °C / s is maintained in the remaining areas, and at the same time, a 5-second constant temperature holding stage is added in the connector area to relieve the internal stress accumulation.

[0014] Step S3: Perform real-time solidification temperature control feedback adjustment according to the micro-region thermal balance control data. When the solidification process of the flexible circuit board is completed, evaluate the influence of solidification deformation to obtain the circuit board solidification effect evaluation data; In the embodiments of the present invention, during the curing process, the system uses pulse width modulation technology to control the heat source power output. The pulse frequency of 45 Hz and the duty cycle of 65% are adopted in the connector area; the pulse frequency of 52 Hz and the duty cycle of 58% are adopted in the display signal line area; the pulse frequency of 48 Hz and the duty cycle of 62% are adopted in the power distribution area. The real-time temperature feedback control adopts a three-level cascade PID algorithm. When the temperature fluctuation in the connector area is detected to exceed 1.5 °C, the system immediately increases the sampling frequency to 5 Hz and adjusts the PID parameters to P = 2.3, I = 0.8, D = 0.4 to achieve fast response to suppress temperature fluctuations. After the curing process is completed, the circuit board is transferred to the optical inspection station, and the surface deformation is scanned using a Zeiss three-dimensional scanner with a resolution of 0.01 mm. The scanning results show that the maximum deformation in the connector area is 0.078 mm, which is significantly lower than 0.127 mm before optimization; the deformation uniformity in the signal line area is improved by 42%; the warpage of the whole board is reduced from 0.23 mm to 0.12 mm. The system calculates the spatial correlation between the deformation and the functional area, and generates a curing effect score of 87 points (out of 100), including 35 points (out of 40) for the deformation amount score, 32 points (out of 35) for the uniformity score, and 20 points (out of 25) for the key functional area protection score.

[0015] Step S4: Detect the real-time surface wettability index of the flexible circuit board to be processed before the bonding station; perform bonding process parameter compensation based on the circuit board curing effect evaluation data and the real-time surface wettability index to optimize the curing-bonding process of the flexible circuit board production line.

[0016] In the embodiment of the present invention, the system starts the humidity sensor array to detect the surface wettability. Five Rotronic digital humidity sensors are used for detection, which are located at the center and four corners of the circuit board respectively. The currently measured relative humidity is 43.2%, which is lower than the standard condition of 45%. The surface wettability index is calculated to be 87. The system simultaneously extracts key area information from the curing effect evaluation data and finds that the residual stress in the connector area is 72 MPa, and targeted fitting parameter adjustment is required. The system adjusts the standard fitting temperature from 165 °C to 162 °C, and the calculation formula is comprehensively determined based on the wettability index and stress distribution; the fitting pressure is adjusted from the reference value of 0.50 MPa to a regionally differentiated pressure distribution: the pressure in the connector area is increased to 0.54 MPa, the pressure in the signal line area is set to 0.51 MPa, and the pressure in the remaining areas is reduced to 0.48 MPa to form a smooth transition zone; the cooling rate is adjusted from 3.0 °C / min to 2.7 °C / min to reduce the thermal stress accumulation during the cooling process. The fitting process is executed in four stages: the preheating stage for 30 seconds to raise the temperature from the ambient temperature to 50 °C; the heating stage for 120 seconds to raise the temperature from 50 °C to 162 °C; the fitting stage for 300 seconds to keep the temperature constant and execute according to the pressure distribution; the cooling stage for 240 seconds to cool down to 85 °C at a rate of 2.7 °C / min. The system uses a 16-channel pressure sensor to monitor the force distribution in real time, and immediately triggers the correction mechanism when the detected pressure deviation exceeds 3%. After the process is completed, the system re-scans the micro-deformation of the finished circuit board, and measures that the interface peeling risk index in the connector area is reduced to 1.8, which is lower than the warning value of 2.5, and the thermal curing deformation compensation rate reaches 83%, proving that the curing-fitting collaborative optimization process effectively improves the production quality of the flexible circuit board of the smart watch.

[0017] Preferably, in step S1, performing the circuit board thermal curing action according to the flexible circuit board material characteristic data includes: Extracting the substrate thermal conductivity value, thermal expansion coefficient value, and latent heat of phase change value as material thermal characteristic data according to the flexible circuit board material characteristic data; Setting the target curing temperature and curing duration as the curing process specification data according to the material thermal characteristic data; Performing a pulsed heating mode setting and heat source power timing processing according to the curing process specification data to obtain the initial curing parameters; Initializing the production unit based on the initial curing parameters, then conveying and fixing the flexible circuit board to be processed at the curing position, and receiving the trigger signal for the flexible circuit board to enter the curing position to obtain the circuit board in-place signal data; Controlling the positioning of the heat source array according to the circuit board in-place signal data to obtain the heat source array positioning completion data; Based on the heat source array positioning completion data, driving the heat source to perform the circuit board thermal curing action, and collecting the board surface temperature distribution data during the curing process in real time.

[0018] In the embodiments of the present invention, before thermal curing, a differential scanning calorimeter is used to test a flexible printed circuit board sample. The test temperature range is set from 25°C to 200°C, and the heating rate is 5°C / minute. The heat flow change curve is recorded by a measuring instrument, and the material thermal conductivity λ value is calculated from it. The typical value is 0.2 - 0.4 W / (m·K). The dimensional change rate of the material in the temperature range of 30°C to 180°C is measured by a thermomechanical analyzer. The coefficient of thermal expansion value is calculated according to the formula where ΔL is the change in length, L0 is the initial length, and ΔT is the change in temperature. The typical value is 18 - 25 ppm / °C. The heat released during the curing process is measured by calorimetry, and the latent heat of phase change value H is calculated. The latent heat of phase change value of a typical polyimide substrate is 40 - 60 J / g. These three parameters constitute the material thermal property data set. Based on the extracted thermal property data, a thermal kinetic model is used to determine the target curing temperature. The calculation formula is where Tg is the glass transition temperature of the material and Cp is the specific heat capacity of the material. For a polyimide substrate, the temperature is usually set in the range of 175°C to 185°C. The curing duration is calculated by the gelation kinetic equation where A is the frequency factor, Ea is the activation energy, R is the gas constant, and T is the absolute temperature. The lower the thermal conductivity λ value, the longer the required curing duration; the higher the coefficient of thermal expansion α value, the lower the heating rate should be to prevent warping. Based on the calculation results, the target curing temperature is set to 180°C, and the curing duration is 90 minutes. According to the curing process specification data, a pulsed heating mode is designed by numerical simulation. The entire curing process is divided into three stages: the preheating stage (25°C to 120°C), with a temperature holding growth rate of 2°C / minute; the medium temperature stage (120°C to 160°C), with a growth rate of 1°C / minute; and the final curing stage (160°C to 180°C), with a growth rate of 0.5°C / minute. The heat source power time sequence adopts a pulse modulation method, and the pulse duty cycle changes with the temperature stage: 70% in the preheating stage, 50% in the medium temperature stage, and 30% in the final curing stage. The pulse frequency is set to 5 Hz. According to the heat conduction equation where Let ρ be the density, c be the specific heat capacity, T be the temperature, t be the time, and q be the heat source term. Calculate the heat source power density required for each stage. Convert the calculation results into heat source control parameters, including current intensity, pulse width, and frequency, to form an initial curing parameter data set. Based on the initial curing parameters, start the production unit initialization program. The control system sends a parameter configuration command to the heat source array, sets the PID parameters of the temperature controller, with the proportionality coefficient Kp = 50, the integral coefficient Ki = 0.5, and the derivative coefficient Kd = 8. Initialize the vacuum adsorption system and set the adsorption pressure to -85 kPa. Subsequently, the conveyor belt transports the flexible printed circuit board to be processed to the curing position at a speed of 0.2 m / s. After reaching the predetermined position, the edge positioning pins extend to accurately position the circuit board, with a positioning accuracy of ±0.05 mm. The vacuum adsorption system is started, and a stable adsorption force is established within 1.5 seconds to fix the circuit board. The photoelectric sensor detects the in-place state of the circuit board. When the four-corner position sensors all detect the presence signal of the circuit board and the vacuum pressure reaches the set value, the system generates in-place signal data of the circuit board, including the circuit board ID code, position coordinate data, and timestamp. According to the in-place signal data of the circuit board, the heat source array control system starts the precise positioning program. The heat source array consists of ceramic heating elements arranged in a 10×12 matrix, with each element having a power of 200 W and a size of 25 mm×25 mm. The servo motor drives the X-Y moving platform to move the heat source array directly above the circuit board. The displacement sensor real-time feedbacks the position of the heat source array. The control system calculates the heat source coverage position according to the circuit board size data to align the center of the heat source array with the center of the circuit board. The positioning accuracy in the XY direction is ±0.1 mm, and the height adjustment accuracy in the Z direction is ±0.05 mm. After positioning is completed, the displacement sensor confirms that the distance between the heat source array and the circuit board is 25 mm, and the infrared sensor verifies that the alignment degree between the heat source element and the circuit board edge is more than 98%. Subsequently, the system generates heat source array positioning completion data, including the heat source position coordinates, alignment confirmation status, and readiness flag. After receiving the heat source array positioning completion data, the system enters the thermal curing execution stage. The controller drives the heat source array according to the initial curing parameters and starts the pulsed heating program. In the first stage, the temperature is raised from 25°C to 120°C at a heating rate of 2°C per minute for 47.5 minutes; in the second stage, the temperature is raised from 120°C to 160°C at a heating rate of 1°C per minute for 40 minutes; in the third stage, the temperature is raised from 160°C to 180°C at a heating rate of 0.5°C per minute for 40 minutes; and finally, in the constant temperature stage, it is maintained at 180°C for 30 minutes. During the entire thermal curing process, the temperature distribution data of the board surface is collected in real time by an infrared thermal imager, with a sampling frequency of 10 Hz, a temperature resolution of 0.1°C, and a spatial resolution of 2 mm. The system calculates the temperature gradient and uniformity based on the thermal imager data. When it detects that the local temperature deviation exceeds ±3°C, it automatically adjusts the heat source power of the corresponding area to ensure the temperature uniformity of the entire circuit board.

[0019] Preferably, the real-time acquisition of the board surface temperature distribution data during the curing process in step S1 includes: Place a thermocouple array on the surface of the flexible printed circuit board on the production line in a hexagonal honeycomb layout, with a spacing of 8 mm, and add an infrared sensor as a vertical supplementary acquisition point according to the substrate thickness specification in the flexible printed circuit board material characteristic data to obtain a micro-region temperature acquisition point array; among them, the vertical supplementary acquisition point can collect the temperature of the middle layer and the bottom layer of the flexible printed circuit board; Use the micro-region temperature acquisition point array to collect the surface temperature of the flexible printed circuit board every 2 seconds to obtain the original value of the temperature lattice; Calculate the temperature difference between adjacent temperature measurement points according to the original value of the temperature lattice. Increase the sampling frequency to 0.2 seconds / time at the position where the temperature difference exceeds 1.2 °C, and reduce it to 3 seconds / time in the area where the temperature difference is less than 0.5 °C to obtain the frequency regulation parameter; Based on the frequency regulation parameter, adaptively adjust the acquisition frequency of the micro-region temperature acquisition point array, and then perform multi-level temperature differential acquisition to obtain the multi-level temperature data of the circuit board; Divide the temperature transition zone between the edge area and the center area of the flexible printed circuit board through the multi-level temperature data of the circuit board, and then perform interpolation of the partition temperature data to generate the board surface temperature distribution data; among them, the edge area is interpolated at a point density of 0.5 mm / point, and the center area is interpolated at a point density of 0.2 mm / point.

[0020] In the embodiment of the present invention, based on the board surface temperature distribution data, the sliding window method is used to analyze the temperature fluctuation of all measurement points. First, the entire circuit board is divided into grid units of 5 mm × 5 mm, and each unit contains 25 temperature monitoring points. For each grid unit, take 30 seconds of continuous temperature data, a total of 300 data points (sampling frequency 10 Hz), and calculate the temperature standard deviation , where is the temperature value at each time point, Tavg is the average temperature, and n is the number of samples. The temperature fluctuation threshold of 0.3 °C is determined through statistical analysis of the temperature fluctuations during the curing process of 10 batches of qualified products, and the upper limit value of the 95% confidence interval is taken. When the temperature standard deviation σ calculated for a certain grid unit is > 0.3 °C, mark this area as a hot spot area. Subsequently, record the temperature peak value Tmax (the highest temperature in the area), the area range S (the total area calculated by merging adjacent hot spot grid units), and the fluctuation frequency f (the main frequency of the temperature fluctuation analyzed by fast Fourier transform) of this hot spot area. The characteristic data of all hot spot areas are stored in the hot spot characteristic data table, which contains four key parameters: coordinates, temperature peak value, area range, and fluctuation frequency. Based on the characteristic data of the hot spot area, construct a full-board surface temperature gradient vector field. Use the second-order central difference method to calculate the temperature gradient at each grid point (i, j). The gradient in the x direction is , and the gradient in the y direction is , where T(i, j) represents the temperature value at the coordinate (i, j). is the grid spacing, both being 5 mm. The temperature gradient vector G(i, j) is synthesized from the gradients in the x and y directions, and its magnitude is |G(i, j)| = , and the direction angle . For the hot spot area, a refined calculation is carried out using a densified grid, and the grid spacing is reduced to 1 mm. The temperature gradient vector field is presented in the form of a heat map. The gradient magnitude is color-coded (blue represents low gradient, and red represents high gradient), and the gradient direction is represented by arrows. The calculation results are stored as a planar thermal data matrix, which includes four groups of parameters: the position coordinates, temperature value, gradient magnitude, and direction of each grid point. For the temperature distribution in the z-axis depth direction of the flexible printed circuit board, a multi-layer infrared temperature sensor array is used for measurement. The three-layer depth is specifically defined as: the surface layer (0 mm from the top), the middle layer (0.1 mm from the top, i.e., at half of the thickness of the circuit board), and the bottom layer (0.2 mm from the top, i.e., the bottom surface of the circuit board). The surface layer temperature is directly obtained through an infrared thermal imager, the middle layer temperature is measured through 10 micro-thermocouples embedded in the sample board, and the bottom layer temperature is measured through the lower infrared array sensor. The measurement accuracy is controlled within ±0.1 °C. The temperature change rate in the vertical direction is calculated by the formula , where Ttop(i, j) is the surface layer temperature, Tbottom(i, j) is the bottom layer temperature, and d is the thickness of the circuit board (0.2 mm). At the same time, the differences between the middle layer temperature and the surface layer and bottom layer temperatures are calculated, and are respectively denoted as and . The temperature change rate data in the vertical direction is recorded in the form of a heat map, and the high change rate areas (greater than 5 °C / mm) are marked as key areas of concern. Based on the correlation analysis between the temperature change rate in the vertical direction and the characteristic data of the hot spot area, the areas where heat conduction is blocked are identified. First, the average value Gz_avg and the standard deviation Gz_std of the temperature change rate Gz in the vertical direction within each hot spot area are calculated. Define the heat transfer blockage coefficient , when k > 2.0, it indicates that the vertical heat conduction non-uniformity in the hot spot area is significant. Subsequently, focus on analyzing the hot spot areas that meet the condition of k > 2.0, and calculate the ratio r of ΔTtop-mid to ΔTmid-bottom. When r > 3.0 or r < 0.33, it is determined as the unbalanced state of heat transfer between layers. For the areas that simultaneously meet k > 2.0 and have abnormal r values, extract the point with the maximum vertical temperature gradient as the heat transfer blockage point, and record its three-dimensional coordinates (x, y, z), where the z coordinate determines the depth position of the blockage by comparing the temperature differences of the three layers. Output the set of heat transfer blockage point coordinates, including the position information of each blockage point, its k value, r value, and vertical temperature gradient value. Combine the heat transfer blockage point coordinates with the planar thermal data to construct the complete three-dimensional thermal field of the circuit board. First, establish a three-dimensional grid model with a grid spacing of 1 mm in the x-y plane and divided into 10 layers in the z direction with a layer spacing of 0.02 mm. For non-blockage areas, use the heat diffusion equation for simulation, where α is the thermal diffusion coefficient, which is calculated by dividing the thermal conductivity of the material by the density and specific heat capacity as obtained . For the heat transfer blockage point area, introduce the thermal resistance coefficient , and modify the heat diffusion equation to . The thermal resistance coefficient is determined according to the value and value of the heat transfer blockage point, specifically as . Use the finite difference method to solve the modified heat diffusion equation with a time step of 0.1 second and iterate 100 time steps until the three-dimensional temperature field distribution is stable. Finally, output the three-dimensional thermal field data as a four-dimensional matrix , including the temperature values of each spatial point on the circuit board at different times.

[0021] Preferably, in step S2, analyzing the planar thermal force based on the board surface temperature distribution data and then constructing the three-dimensional thermal field of the circuit board includes: Mark the hot spots in the areas with frequent temperature fluctuations in the board surface temperature distribution data through a preset temperature fluctuation threshold. When the standard deviation of temperature fluctuations in a certain area exceeds the preset temperature fluctuation threshold, mark this area as a hot spot area, and record the temperature peak value, area range, and fluctuation frequency of this area as the characteristic data of the hot spot area; among them, the temperature fluctuation threshold is set to 0.3 °C; Based on the characteristic data of the hot spot area, establish a temperature gradient vector field in the x-y plane, calculate the temperature change rates in the x-axis and y-axis directions at each point, synthesize them into a direction vector, the vector magnitude represents the temperature change rate, and the vector direction points to the temperature increase direction to obtain the planar thermal force data; Extract and compare the temperatures at three depths along the z-axis based on the temperature distribution data on the board surface, and then calculate the temperature change rate in the vertical direction; among them, the three depths along the z-axis are specifically the surface, middle layer, and bottom layer of the flexible printed circuit board. Correlate the temperature change rate in the vertical direction with the characteristic data of the hot spot area to identify the area where heat conduction is blocked in the vertical direction and obtain the coordinates of the heat transfer blockage points. Conduct vertical direction heat diffusion analysis on the planar thermal data through the coordinates of the heat transfer blockage points, and then construct the three-dimensional thermal field of the circuit board.

[0022] In the embodiment of the present invention, during the thermal curing process of the circuit board, the temperature distribution data on the board surface is collected by a 10×10 dot matrix infrared thermal imager, and the sampling frequency is set to 5 Hz. The temperature fluctuation threshold of 0.3 °C is determined through the previous experimental data. The specific method is as follows: thermally cure 10 batches of high-quality circuit boards under standard process conditions, record the temperature fluctuation standard deviation of each measurement point in each batch, and statistically obtain the 95% quantile value of the fluctuation standard deviation as 0.28 °C, which is rounded to 0.3 °C. For the real-time collected temperature data, the sliding time window method is used for processing. The window duration is 20 seconds, and the calculation formula is σ = , where Ti is the temperature value at each moment within the window, Tm is the average temperature within the window, and n is the number of data points within the window. When the calculated σ value of a certain area exceeds 0.3 °C, it is marked as a hot spot area, and at the same time, record the temperature peak value Tpeak (the highest temperature value within the area), the area range S (the area of the continuously high-temperature area, unit: mm²), and the fluctuation frequency f (the main frequency calculated through fast Fourier transform, unit: Hz). The characteristic data of all hot spot areas are stored as a quadruple (P, Tpeak, S, f), where P is the center coordinate of the hot spot. Based on the characteristic data of the hot spot area, construct a temperature gradient vector field, and divide the circuit board plane into 2 mm×2 mm grid units. For each grid point (i, j), use the central difference method to calculate the temperature gradient vector. The gradient calculation formula in the x direction is , and the gradient calculation formula in the y direction is , where T(i, j) is the temperature value at the coordinate point (i, j), and Δx and Δy are the grid spacings of 2 mm. The gradient vectors in the two directions are combined into a temperature gradient vector , and the vector modulus | represents the temperature change rate, and the vector direction points to the temperature increase direction. For each hot spot area, the grid is encrypted to 0.5 mm×0.5 mm to improve the accuracy. The calculation results form a planar thermal data matrix, and each point contains four parameters: position coordinates, temperature value, gradient magnitude, and gradient direction. The data storage format is The temperature extraction of three layers in the z-axis depth adopts a multi-layer temperature measurement technique. The temperature of the surface layer (z = 0 mm) is directly measured by a high-precision infrared thermal imager with a spatial resolution of 0.5 mm × 0.5 mm and a temperature measurement accuracy of ±0.1 °C; the temperature of the middle layer (z = 0.1 mm, i.e., at half the thickness of the circuit board) is measured by an array of 20 micro-thermocouples pre-buried in the sample board. The diameter of the thermocouple is 0.05 mm and the temperature measurement accuracy is ±0.05 °C; the temperature of the bottom layer (z = 0.2 mm, the bottom surface of the circuit board) is measured by an array of downward-looking infrared sensors located below the circuit board, corresponding to the position of the upper thermal imager. The acquisition frequency is uniformly set to 5 Hz to ensure the time synchronization of the three-layer data. The temperature change rate in the vertical direction is calculated by the two-point method, and the calculation formula is , where Tsurf is the surface temperature, Tbot is the bottom layer temperature, and d is the board thickness of 0.2 mm. At the same time, calculate the temperature stratification ratio , which is used to evaluate the uniformity of temperature distribution in the vertical direction. The ideal value is 1.0, indicating a linear distribution. To identify the heat transfer blockage points, first calculate the average value μG and the standard deviation σG of the vertical temperature change rate Gz of the whole board. Define the heat transfer anomaly index . When |TAI| > 2.5, mark this point as a potential heat transfer anomaly point. Secondly, for each hot spot area, calculate the average value Gz_local of the vertical temperature change rate and the temperature stratification ratio Rt_local in this area. Define the heat transfer blockage determination conditions: ① (the vertical temperature gradient is significantly higher than the average value); ② (the temperature stratification is significantly uneven); ③ the area S of the hot spot area > 25 mm² (excluding noise points). When all three conditions are met simultaneously, it is confirmed as a heat transfer blockage area. In each heat transfer blockage area, extract the peak point of the vertical temperature change rate as the heat transfer blockage point, and record its three-dimensional coordinates (x, y, z), where the z value is determined according to the temperature stratification ratio Rt: when Rt > 1.8, z = 0.05 mm (close to the surface); when Rt < 0.2, z = 0.15 mm (close to the bottom layer); in other cases, z = 0.1 mm (middle layer). The output set of heat transfer blockage point coordinates is . Based on the coordinates of the heat transfer blockage points and the planar thermal data, construct a three-dimensional thermal field model of the circuit board. First, establish a three-dimensional grid with an x-y plane resolution of 1 mm × 1 mm and the z direction divided into 10 layers, each layer with a thickness of 0.02 mm. For the non-blockage area, use the three-dimensional heat conduction equation for calculation, where α is the thermal diffusivity, equal to the thermal conductivity λ divided by the product of the density ρ and the specific heat capacity cp. For the area where the heat transfer blockage points are located, introduce a local thermal resistance model and modify the heat conduction equation to , where β is the heat transfer attenuation coefficient in the vertical direction, which is determined according to the TAI value of the heat transfer blockage point: The modified heat conduction equation is solved using the alternating direction implicit finite difference method with a time step of 0.1 s and a spatial step of 1 mm in the x-y plane and 0.02 mm in the z direction. After 50 time steps of iterative calculation, the steady-state three-dimensional thermal field distribution is obtained. The calculation results are stored in the form of three-dimensional voxel data, where each voxel contains position coordinates and temperature values, forming a complete three-dimensional thermal field model of the circuit board.

[0023] Preferably, the thermal stress intensity evaluation of the three-dimensional thermal field of the circuit board by the flexible circuit board material property data in step S2 includes: Extracting the temperature change rates in the x, y, and z directions of each measurement point based on the three-dimensional thermal field of the circuit board, and combining the temperature change rates in the three directions to obtain a temperature gradient vector; Calculating the modulus value of the gradient vector according to the temperature gradient vector to obtain gradient intensity distribution data; Based on the gradient intensity distribution data, the points exceeding 3.5 °C / mm are marked as thermal gradient critical points; Performing material type zoning on the flexible circuit board, dividing the board surface into three categories: ITO conductive layer area, polyimide base layer area, and edge encapsulation area, establishing the correspondence between the coordinate points and material types in the three-dimensional thermal field of the circuit board, and generating circuit board material zoning data; Mapping the regional thermal expansion coefficient, material elastic modulus, and thermal conductivity to the circuit board material zoning data based on the flexible circuit board material property data to obtain material thermal property data; Performing thermal stress intensity evaluation on the circuit board material zoning data through the thermal gradient critical points and material thermal property data to generate stress hot spot distribution data.

[0024] In the embodiment of the present invention, based on the three-dimensional thermal field data of the circuit board, the three-dimensional temperature change rate at each grid point (i, j, k) is extracted using the central difference method. The calculation formula for the temperature change rate in the x direction is , where T(i, j, k) represents the temperature value at the coordinate point (i, j, k), and Δx is the grid spacing in the x direction, set to 1 mm. Similarly, the calculation formula for the temperature change rate in the y direction is , Δy is 1 mm; the calculation formula for the temperature change rate in the z direction is , Δz is 0.02 mm. For boundary points, the one-sided difference method is used for calculation. The temperature change rates in the three directions are combined into a temperature gradient vector , which characterizes the temperature change direction and rate at each point in space. The calculation results are stored as a four-dimensional matrix, including spatial coordinates and the corresponding three-dimensional temperature gradient vector components. Calculate the gradient intensity distribution data according to the temperature gradient vector, that is, the modulus value of the gradient vector. The calculation formula is , representing the absolute magnitude of temperature change per unit distance, with the unit of ℃ / mm. Considering that the grid spacing in the z-axis direction is much smaller than that in the xy plane, the z-direction gradient is normalized, and the correction formula is . Double-precision floating-point numbers are used during the calculation to ensure accuracy. For the calculated gradient intensity data, a gradient intensity heat map is constructed, and color coding is used to represent the magnitude of the gradient intensity: 0 - 1.0℃ / mm is blue, 1.0 - 2.0℃ / mm is green, 2.0 - 3.0℃ / mm is yellow, 3.0 - 3.5℃ / mm is orange, and greater than 3.5℃ / mm is red. The gradient intensity distribution data is stored in the form of a three-dimensional matrix, and each element contains the grid point coordinates and the corresponding gradient intensity value. Based on the gradient intensity distribution data, heat gradient critical point marking is performed. The threshold is set at 3.5℃ / mm, which is determined based on the thermal stress safety threshold of the polyimide material and is derived from the experimental data of material thermal stress tests. All grid points are scanned, and the points with gradient intensity values greater than 3.5℃ / mm are marked as heat gradient critical points, recording their three-dimensional coordinates (x, y, z) and the gradient intensity value |G|. Clustering is performed on adjacent heat gradient critical points. When the distance between two critical points is less than 2mm, they are regarded as the same heat gradient critical region. For each heat gradient critical region, the area S and the average gradient intensity value Gavg are calculated, and the maximum gradient intensity value Gmax and its position coordinates within the region are recorded. The distribution of heat gradient critical points is represented in the form of a point cloud, and the percentage P of heat gradient critical points in all grid points is calculated, which reflects the degree of heat gradient risk. The heat gradient critical point dataset is output, including the coordinates, gradient intensity values, and the critical region numbers to which each critical point belongs. The flexible printed circuit board is processed for material type zoning based on the circuit design drawings and material composition data. First, the CAD design file of the flexible printed circuit board is imported, and the material distribution information of each layer is extracted. The board surface is divided into three major types of regions: ITO conductive layer region, polyimide base layer region, and edge encapsulation region. Identification method for the ITO conductive layer region: Extract the conductive layer data of the circuit board, including all conductive lines and electrodes; Identification method for the polyimide base layer region: Extract the substrate layer data, including non-conductive and non-edge regions; Identification method for the edge encapsulation region: Extract the 5mm-wide border region around the periphery, including all sealing and strengthening structures. Different color codings are used to distinguish the three material regions: the ITO conductive layer is golden, the polyimide base layer is brown, and the edge encapsulation region is gray. A mapping relationship between the three-dimensional grid point coordinates (x, y, z) and the material type is established to form the circuit board material zoning data matrix M(i, j, k), where M = 1 represents the ITO conductive layer, M = 2 represents the polyimide base layer, and M = 3 represents the edge encapsulation region. Based on the flexible printed circuit board material zoning data, regional thermal property parameter mapping is performed. For each material type, the corresponding thermal expansion coefficient α, elastic modulus E, and thermal conductivity λ values are extracted from the material property database. ITO conductive layer: Thermal expansion coefficient , the elastic modulus E1 = 116 GPa, the thermal conductivity ; Polyimide-based bottom layer: the coefficient of thermal expansion , the elastic modulus E2 = 2.5 GPa, the thermal conductivity ; Edge encapsulation area: the coefficient of thermal expansion α3 = 16×10^-6 / °C, the elastic modulus E3 = 4.2 GPa, the thermal conductivity . Three three-dimensional matrices are established: the coefficient of thermal expansion matrix A(i, j, k), the elastic modulus matrix E(i, j, k), and the thermal conductivity matrix L(i, j, k). According to the material partition data M(i, j, k), the corresponding material parameters are assigned to each grid point. For the material junction, the weighted average method is used to calculate the mixed parameters, and the weight is inversely proportional to the distance. Output the material thermal property dataset containing coordinates and three material parameters. Evaluate the thermal stress intensity through the thermal gradient critical points and the material thermal property data. Use the thermal stress calculation formula , where σ is the thermal stress intensity, E is the elastic modulus, α is the coefficient of thermal expansion, |G| is the temperature gradient intensity, and d is the characteristic length (take 1 mm). For each thermal gradient critical point, calculate the corresponding thermal stress intensity value. When σ > 12 MPa, it is marked as a stress hot spot. At the same time, considering the material interface factor, when the thermal gradient critical point is located at the junction of different materials, the thermal stress amplification factor is set to 1.5, that is . Calculate the stress severity index for each stress hot spot, where σcritical is the material fracture stress (120 MPa for ITO, 160 MPa for polyimide, and 85 MPa for the encapsulation material). Divide the risk level of the stress hot spot according to the SI value: SI < 0.3 is low risk (green), 0.3 ≤ SI < 0.6 is medium risk (yellow), and SI ≥ 0.6 is high risk (red). Generate a stress hot spot distribution map, marking the coordinates, thermal stress intensity value, and risk level of each hot spot.

[0025] Especially important is that the thermal stress intensity evaluation of the printed circuit board material partition data through the thermal gradient critical points and the material thermal property data is specifically as follows: Calculate the thermal conductivity of the heat flow in each material layer for the printed circuit board material partition data through the thermal gradient critical points and the material thermal property data to obtain the partition thermal conductivity; Construct the heat flow vector field of the flexible printed circuit board based on the partition thermal conductivity and the temperature gradient vector; Mark the area with a thermal conductivity lower than 0.8 W / m·K as the thermal barrier area according to the heat flow vector field; Calculate the change in the flow direction of the heat flow before and after the obstacle area for the thermal barrier area to obtain the heat flow deflection angle data; Calculate the heat flow divergence value of each area according to the heat flow deflection angle data and the heat flow vector field, Points with a negative heat flux divergence value whose absolute value is greater than the set threshold are marked as heat energy aggregation areas, and points with a positive heat flux divergence value greater than the set threshold are marked as heat energy divergence areas. Calculate the area size and intensity of each area to obtain potential stress hot spot data; Perform a thermal stress intensity assessment on the potential stress hot spot data based on the material thermal property data to obtain stress hot spot distribution data.

[0026] In the embodiments of the present invention, based on the circuit board material partition data and the material thermal property data, calculate the partition thermal conductivity of each area. For the ITO conductive layer area, the thermal conductivity takes the material intrinsic value ; for the polyimide base layer area, the thermal conductivity takes the material intrinsic value ; for the edge encapsulation area, the thermal conductivity takes the material intrinsic value . For the thermal gradient critical point area, considering the influence of temperature on the thermal conductivity, use the correction formula to calculate the temperature-dependent thermal conductivity, where λ is the material intrinsic thermal conductivity, β is the thermal conductivity temperature coefficient (0.001 / °C for ITO, 0.003 / °C for polyimide, 0.002 / °C for the encapsulation material), T is the current temperature, and T0 is the reference temperature of 25°C. For the material junction, use the harmonic mean method to calculate the equivalent thermal conductivity , where f1 and f2 are the volume fractions of the two materials. Construct a heat flux vector field based on the partition thermal conductivity and the temperature gradient vector. According to Fourier's law of heat conduction, the heat flux density vector , where λ is the partition thermal conductivity and ∇T is the temperature gradient vector. For each point (i, j, k) in the three-dimensional space, calculate the heat flux density vector components: ; ; ; The magnitude of the heat flux vector , with the unit of W / m², represents the heat energy transfer rate per unit area. The heat flux direction represents the projection angle in the xy plane, Denote the angle with the z-axis. For visualizing the heat flux vector field, arrows are used to represent the heat flux direction, and the color shade represents the magnitude of the heat flux (blue for low heat flux < 500 W / m², red for high heat flux > 2000 W / m²), generating a heat flux vector distribution map. Mark the thermal barrier zones according to the partition thermal conductivity data. Scan the thermal conductivity values λ(i, j, k) of all spatial points, and mark the points with thermal conductivity lower than 0.8 W / (m·K) as thermal barrier regions. This threshold of 0.8 W / (m·K) is determined based on thermal theory and experimental verification, representing the critical value where heat conduction is blocked. Cluster the marked points, and the points with adjacent distance less than 1.5 mm are grouped into the same thermal barrier zone. Calculate the volume V and average thermal conductivity λavg of each thermal barrier zone. Focus on analyzing the thermal barrier zones with an area greater than 5 mm², as these regions are more likely to cause thermal stress concentration. Calculate the central position coordinates (xc, yc, zc) and regional shape parameters (major axis a, minor axis b, and direction angle φ) for the key thermal barrier zones. Generate a thermal barrier zone distribution map, using blue shading to represent the range of the thermal barrier zone, and the color shade represents the magnitude of the thermal conductivity. Output a data table of thermal barrier zone characteristics, including the number, central coordinates, volume, average thermal conductivity, and shape parameters of each thermal barrier zone. Calculate the change in the flow direction of the heat flux before and after the barrier for the thermal barrier zones, obtaining the heat flux deflection angle data. First, determine the incident boundary and exit boundary where the heat flux passes through the thermal barrier zone. Method for defining the incident boundary: Along the main direction of the heat flux, find the set of points on the edge of the thermal barrier zone where the heat flux flows inward; Method for defining the exit boundary: Along the main direction of the heat flux, find the set of points on the edge of the thermal barrier zone where the heat flux flows outward. For each pair of incident point Pin and exit point Pout, calculate the angle between the incident heat flux direction vector qin and the exit heat flux direction vector qout, where qin·qout represents the vector dot product. The range of the heat flux deflection angle is from 0° to 180°, and a larger deflection angle indicates that the heat flux is strongly disturbed. Calculate the average deflection angle θavg and the maximum deflection angle θmax for each thermal barrier zone. Mark the regions with deflection angles greater than 45° as high-risk regions. Generate a heat flux deflection angle distribution map, using color coding to represent the magnitude of the deflection angle (green for small deflection < 15°, yellow for medium deflection 15° - 45°, red for large deflection > 45°). Calculate the heat flux divergence value for each region according to the heat flux vector field. The heat flux divergence is defined as , representing the rate of thermal energy accumulation or dissipation per unit volume. Use the central difference method to calculate the heat flux divergence: ; The unit is W / m³. For boundary points, use one-sided difference calculation. A negative heat flux divergence indicates that thermal energy accumulates at this point (heat sink), and a positive value indicates that thermal energy diverges from this point (heat source). A large absolute value of the heat flux divergence indicates a high intensity of thermal energy accumulation or divergence. Set the divergence threshold Dth = ±3×10 5W / m³. This threshold is obtained through heat flux simulation and experimental verification, representing the critical point of significantly uneven thermal energy distribution. Calculate the average divergence Davg and standard deviation Dstd of the entire plate surface. Mark and calculate data for the thermal energy aggregation areas and divergence areas based on the heat flux divergence values. Marking condition for the thermal energy aggregation area: div(q) < -3×10 5 W / m³; Marking condition for the thermal energy divergence area: div(q) > 3×10 5 W / m³. Cluster the marked points, and points with an adjacent distance less than 1 mm are grouped into the same area. Calculate the area Sc and average divergence intensity of each thermal energy aggregation area, and the area Sd and average divergence intensity of each thermal energy divergence area. Focus on areas with an area greater than 2 mm² and an intensity greater than 5×10 5 W / m³. These areas constitute potential stress hotspots. Calculate the central position coordinates (x, y, z) and shape parameters (area S, perimeter L, and roundness ) for each potential stress hotspot. Analyze the spatial relationship between the thermal energy aggregation areas and divergence areas. When the distance between the aggregation area and the divergence area is less than 3 mm, a heat flux gradient pair is formed, and this paired structure is more likely to induce thermal stress. Output a potential stress hotspot data table, including type (aggregation type or divergence type), position coordinates, area, intensity, and shape parameters. Evaluate the thermal stress intensity of the potential stress hotspot data based on the material thermal property data. Use the thermal stress calculation formula , where σ is the thermal stress intensity, E is the elastic modulus, α is the thermal expansion coefficient, ΔT is the product of the temperature gradient and the characteristic length (take , L is the characteristic length of 2 mm), and ν is the Poisson's ratio (0.25 for ITO, 0.34 for polyimide, and 0.30 for the encapsulation material). For the thermal energy aggregation area, the thermal stress is compressive stress with a negative sign; for the thermal energy divergence area, the thermal stress is tensile stress with a positive sign. Regarding the absolute value of the heat flux divergence and the material parameter inhomogeneity, introduce a stress enhancement factor , and correct the thermal stress calculation: . For the stress hotspots at the material junction, considering the interface effect, introduce an interface stress concentration factor Ki = 1.8 and further correct the stress calculation: . Compare the calculated stress value with the material ultimate strength σlim (the tensile strength of ITO is 120 MPa, and the compressive strength is 850 MPa; the tensile strength of polyimide is 160 MPa, and the compressive strength is 240 MPa; the tensile strength of the encapsulation material is 85 MPa, and the compressive strength is 120 MPa), and calculate the safety factor When SF < 2.0, it is marked as a stress hot spot. Output the stress hot spot distribution data, including position coordinates, stress type, stress value, safety factor, and risk level (SF < 1.2 is high risk, 1.2 ≤ SF < 2.0 is medium risk, SF ≥ 2.0 is low risk).

[0027] Preferably, step S2 includes the following steps: Divide the flexible printed circuit board into stress regions based on the stress hot spot distribution data, and then perform micro-region adaptive grid processing to obtain micro-region grid data; among them, the stress region division includes a thermal stress concentration region and a thermal stress sparse region; Evaluate the thermal stress level of the micro-region grid data and assign a thermal stress risk region weight value; Screen the cooling point positions for the thermal stress points in the micro-region grid data, and screen the points with a temperature 1 °C or more lower than the preset process reference temperature within a range of 10 - 30 mm around the thermal stress points as candidate cooling points; Establish a thermal-cold point pairing table based on the thermal stress points and candidate cooling points in the micro-region grid data; Score the heat conduction efficiency of the thermal-cold point pairing table, and perform weighted thermal-cold point pairing selection based on the thermal stress risk region weight value to obtain thermal stress point-cold point pairing data; Perform micro-region thermal balance strategy processing based on the thermal stress point-cold point pairing data to obtain micro-region thermal balance control data.

[0028] In the embodiment of the present invention, stress regions are divided based on the stress hot spot distribution data, and the hierarchical clustering algorithm is used to classify the stress points on the board surface. The algorithm sets the clustering distance threshold to 5 mm, and when the distance between stress points is less than 5 mm, they are classified into the same cluster. Calculate the stress density for each cluster region , where Ns is the number of stress points in the region and A is the area of the region. When ρs > 0.4 points / cm², mark this region as a thermal stress concentration region; when ρs ≤ 0.4 points / cm², mark it as a thermal stress sparse region. Subsequently, perform micro-region adaptive grid processing, use a high-precision grid (grid size 1 mm × 1 mm) for the thermal stress concentration region, and use a standard grid (grid size 3 mm × 3 mm) for the thermal stress sparse region. The grid encryption algorithm uses a quadtree structure and is gradually encrypted within a range of 2 mm around the thermal stress points to ensure higher calculation accuracy in regions with a large stress gradient. Assign a unique identification code to each grid cell, in the form of "XnnnYmmm", where nnn represents the X-direction index and mmm represents the Y-direction index. The output micro-region grid data includes the position coordinates, size, stress region type, and grid identification code of each grid cell. Calculate the average thermal stress value σavg, the maximum thermal stress value σmax, and the thermal stress standard deviation σstd of each grid cell. Define the thermal stress scoring formula , where σref is the reference thermal stress value (taken as 5 MPa), and σcrit is the critical thermal stress value of the material (120 MPa for ITO, 160 MPa for polyimide, and 85 MPa for the encapsulation material). The thermal stress level is divided according to the SL value: SL < 0.3 is low risk (L1), 0.3 ≤ SL < 0.6 is medium risk (L2), 0.6 ≤ SL < 0.9 is high risk (L3), and SL ≥ 0.9 is the danger level (L4). Weight values are assigned to each risk level: the weight of L1 level is 1.0, the weight of L2 level is 2.5, the weight of L3 level is 4.0, and the weight of L4 level is 6.0. Considering the influence of material type, a material risk factor is introduced: multiply by 1.2 for the ITO area, multiply by 1.0 for the polyimide area, and multiply by 0.8 for the encapsulation area. The final weight value W of the risk area = basic weight × material risk factor × area factor, and the area factor , S is the area of the grid cell. With the thermal stress point as the center, three search rings are set within the range of 10 - 30 mm: the inner ring (10 - 15 mm), the middle ring (15 - 22 mm), and the outer ring (22 - 30 mm). The search step sizes are 1 mm for the inner ring, 1.5 mm for the middle ring, and 2 mm for the outer ring. The temperature values T(x, y) of each search point are extracted and compared with the process reference temperature Tref. The process reference temperature is determined according to the curing stage: 125 °C for the preheating stage, 165 °C for the medium-temperature stage, and 185 °C for the final curing stage. The screening condition is: , that is, the points where the temperature is more than 1 °C lower than the process reference temperature. Calculate the temperature difference and the distance d from the thermal stress point for the points that meet the conditions. The comprehensive score is used to evaluate the potential of the point as a cooling point. Retain the top 5 points with the highest scores for each thermal stress point as candidate cooling points, and record their coordinate positions, temperature values, distances, and comprehensive scores. For each thermal stress point i and its candidate cooling point j, create a pairing item (i, j), and calculate the pairing parameters: the straight-line distance dij, the angle θij (referenced to the center of the circuit board), the temperature difference ΔTij, and the material type Mij between the two points. Define the shortest heat transfer path Pij, which is calculated by the A* algorithm, and consider the cost function affected by the thermal conductivity of the material: , where d is the path element length, and λ is the thermal conductivity at this point. The path calculation accuracy is 0.5 mm, and it is prohibited to cross the board boundary or functional area. Calculate the heat transfer time evaluation for each pair of hot and cold points, where α is the thermal diffusivity, which is calculated by , ρ is the density, and cp is the specific heat capacity. Output a hot and cold point pairing table containing all feasible pairings. Each pairing item includes the thermal stress point ID, the cooling point ID, the distance, the angle, the temperature difference, the heat transfer path length, the heat transfer time, and the path material information. Conduct a heat conduction efficiency score and weighted selection on the hot and cold point pairing table. The heat conduction efficiency score uses the comprehensive formula , where ΔTij is the temperature difference (°C), τij is the heat transfer time (seconds), dij is the linear distance (mm), and λavg is the average thermal conductivity (W / m·K). The scoring is normalized to the range of 0 - 100. A score above 80 indicates an excellent match, 60 - 80 indicates a good match, 40 - 60 indicates an average match, and below 40 indicates an inefficient match. A weighted score is calculated by combining with the weight value Wi of the thermal stress risk area. The higher the weight value, the greater the importance of the match. Rules for handling match conflicts: One cooling point can serve at most two thermal stress points; high-risk thermal stress points (Level L3 and L4) must be assigned exclusive cooling points; when a cooling point is competed for by multiple thermal stress points, the match with the highest WES is assigned. A greedy algorithm is used for global match optimization: Traverse the match table in descending order of WES, and the matches that meet the constraint conditions are selected. Output the thermal stress point - cooling point match data, including the coordinates, distance, temperature difference, efficiency score, and match priority of each pair of matches. For different match distances, three types of thermal equilibrium strategies are adopted: For short-range matches (10 - 15 mm), a pulse modulation strategy is used; for medium-range matches (15 - 22 mm), a temperature gradient control strategy is used; for long-range matches (22 - 30 mm), a heat flux guiding strategy is used. The specific parameters of the pulse modulation strategy are: Reduce the duty cycle by 10% - 20% in the heating unit where the thermal stress point is located, and increase the duty cycle by 5% - 10% in the heating unit where the cooling point is located, while keeping the pulse frequency at 5 Hz unchanged. The specific parameters of the temperature gradient control strategy are: Divide 5 equally spaced control points between the thermal stress point and the cooling point, set the temperature gradient to be linear, and the temperature drop amplitude , r is the distance from the thermal stress point. The specific parameters of the heat flux guiding strategy are: Form temperature trenches within a range of 2 mm on both sides of the thermal - cooling point connection line, and the depth of the trench is , and the width changes parabolically with the distance . The thermal equilibrium scheme for each micro-region is recorded as a control instruction set, including position coordinates, control type (power, temperature, or gradient), numerical range, and timing information. Output the micro-region thermal equilibrium control data, including the strategy type, control parameters, and execution timing of all thermal - cooling point matches.

[0029] Preferably, the micro-region thermal equilibrium strategy processing based on the thermal stress point - cooling point match data includes: Conduct a heat conduction path analysis on the thermal stress point - cooling point match data to generate heat conduction path data; Calculate the heat conduction rates of each micro-region in the plane and perpendicular direction of the flexible circuit board based on the heat conduction path data to obtain heat conduction parameters; Conduct a temperature sensitivity analysis of the heat conduction parameters, and identify the regions where the thermal conductivity changes significantly with temperature to obtain the coordinate data of the temperature-sensitive points; Conduct a real-time latent heat of material phase change evaluation based on the coordinate data of the temperature-sensitive points, and calculate the phase change region compensation value to obtain the phase change region compensation value;​ Obtain the humidity data of the processing environment; Perform environmental factor correction on the phase change region compensation value through the humidity data of the processing environment to obtain the environmental correction compensation value; Based on the environmental correction compensation value, perform micro-region heat balance regulation processing on the micro-region grid data to obtain micro-region heat balance control data, where the micro-region heat balance regulation processing includes heating / cooling power, action time, and startup sequence priority configuration.

[0030] In the embodiment of the present invention, the circuit board is divided into 0.5mm×0.5mm grid units, and each unit is assigned a thermal resistance value , where l is the grid side length, λ is the local thermal conductivity, and A is the cross-sectional area perpendicular to the heat flow direction. The improved Dijkstra algorithm is used to calculate the minimum thermal resistance path from the thermal stress point to the cold point, and the thermal resistance weight , and i is the node on the path. During the path search process, crossing the board boundary and key electrical function areas is prohibited, and these areas are marked as infinite thermal resistance. For each heat conduction path, extract the key point set {( , ), ( , ),..., ( , )}, with an interval of 1mm. For each key point, record the local thermal conductivity, material type, temperature value, and heat flow direction angle , where qx is the component of the heat flux density vector in the x-axis direction, and qy is the component of the heat flux density vector in the y-axis direction. Each heat conduction path generates path characteristic parameters: total length L, average thermal conductivity , minimum thermal conductivity and its position, curvature , and the output is the heat conduction path data set. Calculate the heat conduction rates in the plane and vertical directions according to the heat conduction path data. The heat conduction rate in the plane direction is calculated based on Fourier's law of heat conduction, , where λ_xy is the thermal conductivity in the plane direction (10.2W / (m·K) for the ITO conductive layer and 0.16W / (m·K) for the polyimide base layer), is the temperature difference between adjacent calculation points, ρ is the material density, c_p is the specific heat capacity, and d_xy is the calculation point spacing. The heat conduction rate in the vertical direction is calculated as , where λ_z is the thermal conductivity in the vertical direction (usually 0.7 - 0.9 times that in the plane direction, affected by the material lamination direction), ΔT_z is the temperature difference in the z direction, and d_z is the interlayer distance. At the material interface, the correction formula is used, is the equivalent thermal conductivity, ρ_eff and c_p_eff are the equivalent density and specific heat. The calculation results form a thermal conduction parameter matrix, including v_xy, v_z, and t_conduct (thermal conduction time, t_conduct = L² / (2α), where α is the thermal diffusivity) for each micro-region. A temperature-thermal conductivity relationship model is established , where is the reference temperature (at 25°C), β is the temperature coefficient (-0.001 / °C for ITO, -0.003 / °C for polyimide, -0.002 / °C for the encapsulation material). The temperature sensitivity of thermal conductivity is calculated across the entire board surface , with the unit of . Subsequently, the temperature fluctuation amplitude ΔT_fluct and the percentage change in thermal conductivity are calculated for each point on the thermal conduction path . When Rλ > 2.5%, it is marked as a temperature-sensitive point. The temperature influence index is calculated for each temperature-sensitive point , where is the thermal conduction rate at this point, and v_avg is the average thermal conduction rate of the path. Sorting by the TII value from high to low, the top 20% of the points are extracted as the key temperature-sensitive points, recording their three-dimensional coordinates (x, y, z), temperature fluctuation amplitude ΔT_fluct, percentage change in thermal conductivity Rλ, and material type, generating a temperature-sensitive point coordinate data table. A differential scanning calorimetry method is used to establish a material phase change temperature range model. The phase change temperature range of the polyimide substrate is 170°C - 185°C, the ITO conductive layer is 140°C - 145°C, and the encapsulation material is 160°C - 175°C. The phase change process is detected through temperature time-series data, and the judgment conditions are: ① the temperature rise rate v_T = dT / dt suddenly decreases (the decrease amplitude > 50%); ② the duration τ exceeds 30 seconds; ③ the temperature remains within the phase change temperature range. The latent heat influence coefficient is calculated for the identified phase change region , where h is the latent heat of material phase change (45 J / g for polyimide, 9 J / g for ITO, 28 J / g for the encapsulation material), c_p is the specific heat capacity, and ΔT is the normal temperature rise. The phase change region compensation value calculation formula is , P is the heating power density, with the unit of W / cm². For each phase change region, record its center coordinates, area, phase change temperature, latent heat influence coefficient, and compensation value, forming a phase change region compensation value data table. Five high-precision humidity sensors (accuracy ±1.5%RH) are installed inside the thermal curing equipment, located at the center and four corners of the equipment respectively. The sensor model is DHT22, and the measurement range is 10% - 95%RH. The humidity data sampling frequency is 10 seconds / time, and short-term fluctuations are eliminated through digital filter processing (5-point moving average). The system records the original humidity value H_raw and its standard deviation σ_H, and at the same time calculates the humidity gradient vector , for analyzing the humidity distribution non-uniformity. Three key parameters are extracted from the humidity data through time series analysis: average humidity H_avg, humidity fluctuation ΔH, and humidity change rate dH / dt. The system automatically judges the environmental humidity state: low humidity (<30%RH), normal (30%-50%RH), high humidity (>50%RH). For the curing process, the preset ideal humidity range is 35%-45%RH. A humidity-thermal property correction model is established, and the sensitivity of the material thermal conductivity to humidity is calculated by the formula where λ is the thermal conductivity under standard humidity , γ is the humidity correction coefficient (0.002 / %RH for polyimide, 0.0005 / %RH for ITO, 0.003 / %RH for packaging materials). The latent heat of phase change under the influence of humidity is corrected to , δ is the humidity latent heat influence coefficient (usually 0.001 - 0.005 / %RH). The environmental correction coefficient , with the unit of °C. The calculation formula for the environmental correction compensation value is , and a 10% safety margin is added for high humidity conditions (>50%RH). For the significant region of the humidity gradient ( ), the local correction coefficient is adopted. The final environmental correction compensation value data table contains the position coordinates, original compensation value, humidity correction coefficient, and final correction compensation value of each phase change region. Three-parameter control instructions are assigned to each micro-region: heating / cooling power P, action time τ, and start priority SP. The calculation formula for the heating / cooling power is , P_base is the base power density (1.2W / cm² for the heating region, -0.5W / cm² for the cooling region), and the ± sign depends on the type of the heat / cold region. The action time , where ρ is the density, c_p is the specific heat capacity, d is the effective thickness, and ΔT is the target temperature change. The start priority SP is set based on the thermal stress risk level: the priority for the L4-level risk region is 1, L3-level is 2, L2-level is 3, and L1-level is 4. For the phase change region, the power holding time is increased to ensure the complete progress of the phase change. The execution order of the control instructions is: the region with priority 1 starts first for 25 seconds, the region with priority 2 starts with a 10-second delay, the region with priority 3 starts with a 20-second delay, and the region with priority 4 starts with a 30-second delay. A maximum allowable temperature gradient of 15°C / mm is set between the hot and cold points. When it is detected that this value is exceeded, the system automatically adjusts the power of the adjacent regions to smooth the temperature distribution. The output micro-region thermal equilibrium control data contains the position coordinates, control type, power value, action time, start order, and holding time of each micro-region.

[0031] As an example of the present invention, as shown in reference to Figure 2 , it is Figure 1Schematic diagram of the detailed implementation steps of step S3. In this example, step S3 includes: Step S31: Perform pulse heat flux frequency modulation according to the micro-region heat balance control data to generate pulse frequency allocation data; In the embodiment of the present invention, pulse heat flux modulation adopts pulse width modulation technology (PWM), the basic period T is set to 2 seconds, and the pulse duty cycle D is determined according to the heating power requirement P_req in the micro-region heat balance control data. The calculation formula is: , where P_req is the required power (watts) and P_max is the maximum output power of the heater (watts). For high-risk thermal stress regions, a high-frequency pulse mode is adopted, with a pulse frequency f_high = 5 Hz; for medium-risk regions, a medium-frequency pulse mode is adopted, f_medium = 2 Hz; for low-risk regions, a low-frequency pulse mode is adopted, f_low = 0.5 Hz. The product of the frequency and the duty cycle determines the final heat energy input rate. The system introduces phase difference modulation, and the pulse phase difference Δφ between adjacent micro-regions = 360°×i / n, where i is the micro-region serial number and n is the total number of micro-regions, to avoid peak power superposition. The pulse preview time t_advance = τ / 2 is adjusted according to the heat conduction delay time τ to ensure the timeliness of the heat energy reaching the target point. The system constructs a pulse parameter table, which includes four parameters: pulse frequency, duty cycle, phase difference, and preview time for each micro-region, to form complete pulse frequency allocation data and transmit it to the execution control unit.

[0032] Step S32: Perform real-time curing temperature control feedback adjustment based on the pulse frequency allocation data to obtain real-time state data of heat flux control; In the embodiment of the present invention, the system sets up a three-layer control architecture: micro-region local control layer, regional coordination control layer, and global optimization control layer. The micro-region local control layer adopts a proportional-integral-differential (PID) controller, and the control parameters are: proportional coefficient Kp = 12.5, integral coefficient Ki = 0.8, differential coefficient Kd = 3.2, and the sampling period is 0.1 second. The temperature deviation , where T_target is the target temperature and T_actual is the measured temperature. The control output , and the output value is limited within the range of 0 - 100%. The regional coordination control layer adopts a model predictive control algorithm, the prediction time domain is set to 10 seconds, the control time domain is 2 seconds, and the constraint conditions include: the temperature rise rate does not exceed 5 °C / second, and the temperature fluctuation range does not exceed ±1.5 °C. The global optimization control layer uses an adaptive fuzzy control strategy to adjust the weight coefficients of the controllers of each micro-region based on the real-time temperature distribution pattern and heat flux trend. The system establishes a temperature prediction model: , where K is the thermal efficiency coefficient, P(t) is the heating power, C is the specific heat capacity, V is the control volume, R is the heat dissipation coefficient, and T_ambient is the ambient temperature. The system updates the control strategy every 0.5 seconds to achieve temperature closed-loop control, generating real-time state data of heat flow control, including the current temperature, temperature deviation, control output value, predicted temperature value, and controller status flag.

[0033] Step S33: Monitor the curing completion trigger signal based on the real-time state data of heat flow control, and then transfer the circuit board that has completed curing to the detection station for surface grid-like microscopic deformation scanning to obtain the measured curing morphology parameters. In the embodiment of the present invention, the system sets the curing completion determination conditions: ① The cumulative time for the average temperature in the main curing area to be maintained within the range of the target curing temperature ±2 °C reaches 90 seconds; ② The temperature gradient within the curing area is less than 1.2 °C / mm; ③ The resistivity change rate of the curing material is lower than 0.05% / minute, and the resistivity change of the material is monitored in real time through the embedded resistivity sensor array. When all three conditions are met simultaneously, the system generates a curing completion trigger signal. After curing is completed, the servo transfer mechanism accurately positions the circuit board to the detection station at a speed of 250 mm / s, and the positioning accuracy is ±0.05 mm. The detection station is equipped with a laser triangulation system, which consists of a measurement array of 25 laser probes. The wavelength of the laser beam is 650 nm, the spot diameter is 20 μm, the Z-axis resolution is 0.5 μm, and the XY plane resolution is 20 μm. The scanning adopts a grid-like path, the stroke spacing is 0.8 mm, and the scanning speed is 50 mm / s, covering the entire surface of the circuit board. The three-dimensional coordinate values (x, y, z) are recorded at each sampling point, where the z value represents the surface height. The system collects approximately 25,000 surface point data to form a high-density point cloud. The collected data is filtered by median filtering (the filter window size is 5×5 points) to eliminate outliers, and then a uniform grid surface model with a resolution of 0.2 mm is generated through cubic spline interpolation to form the measured curing morphology parameter data, including surface height values, surface normal vectors, and local curvature parameters.

[0034] Step S34: Calibrate the measured curing morphology parameters with respect to the reference plane, and then calculate the vertical distance from each point to the reference plane to calibrate the positive and negative values of the deformation amount, obtaining the deformation amount calibration data. In the embodiment of the present invention, 100 measurement points without obvious stress at the edge of the circuit board are selected as the reference point set P, and then the reference plane parameters are determined by solving the system of equations AX = b, where A is the coefficient matrix composed of the coordinates of the reference points, b is the Z-value vector, and X is the plane parameter to be solved. The plane equation is expressed as . The Gaussian elimination method is used to solve the system of equations to obtain the plane parameters a, b, and c. Calculate the vertical distance di from each measurement point to the reference plane, and the formula is , where (xi, yi, zi) are the coordinates of the measurement points. The calibration method for the positive and negative values of the deformation amount is as follows: when the point position is higher than the reference plane , the deformation amount is positive; when the point position is lower than the reference plane, the deformation amount is negative. The system generates a deformation amount calibration data set , where si is the deformation symbol (1 or -1). Calculate the average deformation amount for each grid area (0.5mm × 0.5mm) , k is the number of measurement points in the area, forming a complete deformation amount calibration data matrix.

[0035] Step S35: Identify the thermal stress deviation area according to the deformation amount calibration data; In the embodiment of the present invention, the evaluation criteria for the deformation amount are determined: the slightly deformed area is defined as |di| < 5 microns; the moderately deformed area is defined as 5 microns ≤ |di| < 15 microns; the severely deformed area is defined as |di| ≥ 15 microns. The system applies a double-threshold segmentation algorithm to the deformation amount calibration data, using 5 microns and 15 microns as two key thresholds, and screens out all point sets with |di| ≥ 5 microns to form a preliminary thermal stress deviation area. Then, the region growing algorithm is applied for point clustering. When the distance between adjacent points is less than 2 mm and the difference in deformation amount is less than 3 microns, they are grouped into the same area to form a continuous thermal stress deviation area. The system calculates the area, average deformation amount, maximum deformation amount, and deformation gradient (the change rate of the deformation amount between adjacent points) of each area. The thermal stress deviation area is represented as , each area Ri contains the coordinates, deformation amount, centroid position of the area, and area shape parameters (major axis, minor axis, orientation angle) of all points in the area, forming a complete thermal stress deviation area data set.

[0036] Step S36: Perform morphological classification on the thermal stress deviation area to obtain deformation type marking data; In the embodiment of the present invention, the deformation is divided into five typical types: convex type, concave type, wavy type, twisted type, and folded type. The classification is based on the main deformation characteristics: the convex type is characterized in that the deformation amount in the central area is positive and the deformation amount decreases from the center to the outside; the concave type is characterized in that the deformation amount in the central area is negative and the deformation amount increases from the center to the outside; the wavy type is characterized in that the deformation amount shows periodic positive and negative alternation in the area, with a frequency greater than 2 times / cm; the twisted type is characterized in that there is an obvious twisted axis in the area, and the deformation amount symbols on both sides of the axis are opposite; the folded type is characterized in that the deformation amount changes violently in a long and narrow area, with a gradient greater than 5 microns / mm. The classification algorithm uses a morphological feature extraction method to calculate parameters such as the deformation amount distribution pattern, gradient vector field, principal curvature, and Gaussian curvature of each area. The system calculates the morphological feature vector for each thermal stress deviation area Ri , including 10 morphological parameters, and then determining the deformation type Ti through discriminant analysis to form the deformation type marking data C = {Ri, Fi, Ti}, and completely recording the spatial distribution, morphological characteristics and classification results of each thermal stress deviation area.

[0037] Step S37: Evaluate the curing deformation influence on the thermal stress deviation area through the deformation type marking data to obtain the circuit board curing effect evaluation data.

[0038] In the embodiment of the present invention, the curing deformation influence evaluation is based on the comprehensive analysis of the importance of the circuit function area and the degree of deformation. The evaluation process is divided into three steps: The first step is to determine the key function areas of the circuit board, including the connector area, the integrated circuit welding area, the high-density circuit area, etc., and establish the functional importance weight matrix W, where the weight value ranges from 1 to 10, and the larger the value, the higher the importance of the area; The second step is to calculate the deformation influence factor I of each thermal stress deviation area. The formula is , where S is the area of the area (square millimeters), D is the average deformation amount (micrometers), G is the maximum deformation gradient (micrometers / mm), and T is the deformation type coefficient (1.2 for the convex type, 1.5 for the concave type, 1.8 for the wavy type, 2.0 for the twisted type, 2.5 for the folded type); The third step is to calculate the comprehensive score of the area , where W is the functional importance weight corresponding to this area. The system calculates the scores of all thermal stress deviation areas, generates a score ranking table, and divides the circuit board into four levels according to the score threshold: excellent (all E < 150), qualified (there is 150 ≤ E < 300), to be repaired (there is 300 ≤ E < 500), scrapped (there is E ≥ 500). Finally, the circuit board curing effect evaluation data is generated, including the position, deformation type, influence factor, comprehensive score of each thermal stress deviation area and the overall board quality level, forming a complete curing effect evaluation report.

[0039] Preferably, step S4 includes the following steps: Step S41: Obtain the flexible circuit board bonding process parameters; among them, the flexible circuit board bonding process parameters include the initial bonding temperature, the reference value of the bonding pressure, and the reference value of the cooling rate; Step S42: Perform weighted bonding area pressure compensation processing on the reference value of the bonding pressure through the circuit board curing effect determination data to obtain the bonding pressure compensation distribution data; Step S43: Correct the initial bonding temperature and the reference value of the cooling rate according to the real-time surface wettability index, and generate a bonding process instruction sequence according to the bonding pressure compensation distribution data; Step S44: Send the control set values to the temperature controller, pressure actuator and cooling rate regulator of the bonding equipment respectively through the bonding process instruction sequence to perform the bonding process optimization operation.

[0040] In the embodiments of the present invention, the initial lamination temperature is obtained based on the circuit board material data, set to 165±2°C for polyimide substrates and 145±2°C for polyester substrates. The temperature value is monitored in real time by a thermocouple array (15 evenly distributed measurement points), with a sampling frequency of 2Hz and a spatial accuracy of ±0.5°C. The reference value of the lamination pressure is determined through a pressure calibration test. The specific method is as follows: Conduct a pressure gradient test on 5 batches of qualified products (from 0.5MPa to 2.0MPa, at intervals of 0.1MPa), record the interfacial bonding strength at each pressure, and select the lowest pressure value at which the bonding strength reaches 1.2N / mm and the fluctuation does not exceed ±5% as the reference value, usually in the range of 1.2 - 1.5MPa. The reference value of the cooling rate is determined through DSC analysis of the material, set to 3.0°C / min for polyimide substrates and 5.0°C / min for polyester substrates. The process parameter dataset is automatically transmitted to the central control unit via Ethernet and is displayed in real time on the operation terminal. The circuit board surface is divided into a 5×5 grid area, with each area sized 20mm×20mm. A curing effect weight is assigned to each grid area i , and the calculation formula is , where Fr is the warpage curvature of the area, Dv is the deformation amount, Wp is the number of warping points, and adding the subscript max represents the maximum value of the entire board. The worse the curing effect, the higher the weight. The pressure compensation coefficient , where Wavg is the average weight of the entire board, Kp is the pressure adjustment coefficient, with a value of 0.2. The calculation formula for the area lamination pressure is , and P0 is the reference pressure. For areas with severe warping deformation , set the pressure upper limit to P0×1.3 to prevent overpressure damage. The precise control of the area pressure is achieved through a hydraulic multi-zone independent adjustment system, with a pressure adjustment resolution of 0.05MPa. The output lamination pressure compensation distribution data includes the coordinates, weight values, compensation coefficients, and final lamination pressure values of 25 grid areas. The surface wettability index WI is obtained in real time by a contact angle measuring instrument, and 6 points on the circuit board surface are measured before lamination. The calculation formula is , where θ is the droplet contact angle. The larger the WI, the better the wettability. The temperature correction formula , where WIavg is the measured average wettability index, WI0 is 85% of the standard wettability index, and Kt is the temperature adjustment coefficient of 3.0°C. The corrected initial lamination temperature , where T0 is the initial lamination temperature. The cooling rate correction formula , where Kr is the cooling rate adjustment coefficient of 0.5°C / min. The corrected cooling rate , and R0 is the reference value of the cooling rate. The lamination process instruction sequence is generated in XML format and includes four parts: ① Preheating stage (temperature rises from room temperature to T ×0.8, pressure is Pi×0.3); ② Laminating stage (temperature is T , pressure is Pi); ③ Pressure holding stage (temperature remains at T , pressure remains at Pi, duration is 10 minutes); ④ Cooling stage (temperature drops to 40°C at a rate, and pressure gradually decreases to 0.3 MPa). Connect to the laminating equipment control system through the OPC-UA communication protocol to establish a secure data channel. The temperature controller adopts a multi-channel PID control method, and the data sent to it includes the target temperature T , heating rate (5°C / minute), temperature holding time (10 minutes), and cooling rate , using floating-point format with an accuracy of 0.1°C. The pressure actuator adopts a servo-hydraulic control system, and the pressure values Pi for 25 areas are sent to it. The pressure unit is MPa, with an accuracy of 0.01 MPa. At the same time, the pressure application rate (0.2 MPa / second) and pressure relief rate (0.1 MPa / second) are sent. The cooling rate regulator adopts proportional flow control, and the cooling rate and the temperature-flow correspondence table are sent, and the control quantity is the opening percentage of the cooling water valve. The control instructions are sent step by step according to the timing requirements: the preheating stage instructions are sent at t = 0, the laminating stage instructions are sent after preheating is completed, the pressure holding stage instructions are sent when the laminating temperature reaches T , and the cooling stage instructions are sent when the pressure holding time ends.

[0041] Especially importantly, after step S4, it also includes: Real-time measure the force distribution in each area of the flexible printed circuit board during the laminating operation; Calculate the delamination risk index of the interfaces of each functional layer of the circuit board according to the force distribution in each area; Evaluate the interface reliability data of the circuit board according to the delamination risk index; Identify potential delamination risk points based on the interface reliability data of the circuit board. When the delamination risk index exceeds 2.5, it is marked as a high-risk point to obtain the delamination warning area data; Optimize the laminating pressure distribution according to the delamination warning area data, increase the local pressure by 5 - 8% in the high-risk area, and reduce the pressure in the surrounding area by 2 - 3% to form a pressure gradient transition zone to obtain the optimized laminating pressure distribution data; After the flexible printed circuit board laminating process is completed, perform a micro-deformation re-scan on the flexible printed circuit board and evaluate the effect of thermal curing deformation compensation.

[0042] In the embodiments of the present invention, during the lamination operation, a high-precision pressure distribution measurement system is used to monitor the forces on each area of the circuit board in real time. The system consists of an 8×8 array pressure sensor matrix. Each sensor has an area of 5mm×5mm, a measurement range of 0 - 3MPa, and an accuracy of ±0.01MPa. The sensor matrix is placed under the lamination platform, and the sampling frequency is set to 10Hz. The acquired original pressure data is enhanced in resolution to 320×320 dot matrix through a bilinear interpolation algorithm to form a full-board pressure distribution heat map. The system calculates the average pressure Pavg, the standard deviation of pressure and the pressure gradient value . The pressure non-uniformity factor is defined as . When UI > 15%, it is marked as a pressure abnormal area. The output data includes the time-series pressure distribution matrix P(x, y, t), the pressure gradient matrix ∇P(x, y, t), and the coordinate set of the pressure abnormal areas. The peeling risk index of the functional layer interface of the circuit board is calculated according to the force distribution of each area. The calculation formula of the peeling risk index CRI is , where Popt is the ideal lamination pressure (obtained from the material database, usually 1.4MPa), Pact is the actually measured pressure, Kt is the temperature influence coefficient , Tact is the actual lamination temperature, Topt is the ideal lamination temperature, Kp is the pressure fluctuation coefficient , and Ks is the interface material sensitivity coefficient (1.0 for the polyimide-copper interface, 1.2 for the polyimide-polyimide interface, and 1.5 for the copper-solder mask interface). The interface layer is divided into three layers: the top copper foil-substrate interface, the substrate-substrate interface, and the bottom substrate-copper foil interface. The CRI value of each area of each interface is calculated respectively. The peeling risk rating is set as: CRI < 1.0 is low risk (green), 1.0 ≤ CRI < 2.5 is medium risk (yellow), and CRI ≥ 2.5 is high risk (red). The interface reliability score IRS is calculated based on multi-parameter weighting. The formula is: ; Among them, CRIavg is the average peeling risk index, HRA is the total area of high-risk regions, A is the total interface area, Bstr is the peeling strength (N / mm) of the sampling test, Bref is the reference peeling strength (1.2 N / mm), PND is the number of pressure-unstable regions, and PNmax is the total number of regions. The IRS score ranges from 0 to 100, and the higher the score, the better the interface reliability. The evaluation system marks the interface with IRS < 60 as "unqualified", 60 ≤ IRS < 75 as "critical", 75 ≤ IRS < 90 as "qualified", and IRS ≥ 90 as "excellent". For each interface, the system calculates its reliability indicators including the average peeling risk index, the percentage of high-risk area, the pressure stability score, and the predicted value of interface bonding strength. Scan the peeling risk index of all grid regions, and mark the points with CRI ≥ 2.5 as high-risk points. Conduct cluster analysis on adjacent high-risk points, and set the clustering distance threshold to 5 mm. When the distance between two high-risk points is less than the threshold, they are classified into the same risk region. Calculate the area S, the average peeling risk index CRIavg, and the maximum peeling risk index CRImax of each risk region. The risk level is further subdivided: 2.5 ≤ CRI < 3.0 is the "warning" level, 3.0 ≤ CRI < 4.0 is the "dangerous" level, and CRI ≥ 4.0 is the "severe" level. Priority is given to marking the regions with an area greater than 25 mm² and containing points of the "dangerous" or "severe" level. The system calculates the morphological characteristics of each risk region, including the centroid coordinates (xc, yc), the shape approximation (similarity to a circle, rectangle, or strip), and the boundary curvature. For each warning region i, the central pressure increase is calculated as , where Pbase is the base fitting pressure, and the formula ensures that the pressure increase range is 5 - 8%. The pressure increase region adopts a Gaussian distribution model, and the pressure increase value decays with the increase of the distance r from the region center, and the formula is , is the characteristic length parameter, and its value is 1.2 times the equivalent radius of the region. A pressure transition zone with a width of 10 mm is established outside the warning region, and the pressure decrease is , ensuring that the pressure decrease range is 2 - 3%. The pressure adjustment value is realized through a 32-channel servo hydraulic control system. The control area of each hydraulic unit is 15 mm × 15 mm, and the pressure adjustment resolution is 0.01 MPa. Calculate the deformation difference before and after fitting ; then compare it with the fitting deviation from the ideal plane to obtain the deformation compensation effect score , where represents the standard deviation; finally, analyze the local high and low points, calculate the waviness Wa and flatness Fa, and generate a deformation compensation effect evaluation report.

[0043] Preferably, the present invention further provides a process optimization system for a flexible printed circuit board production line, which executes the process optimization method for a flexible printed circuit board production line as described above. The process optimization system for a flexible printed circuit board production line includes: A thermal curing data acquisition module, configured to obtain flexible printed circuit board material characteristic data; execute a circuit board thermal curing action according to the flexible printed circuit board material characteristic data, and collect in real time the board surface temperature distribution data during the curing process; A thermal stress balance module, configured to analyze the planar thermal force according to the board surface temperature distribution data, and then construct a three-dimensional thermal field of the circuit board; perform a thermal stress intensity evaluation on the three-dimensional thermal field of the circuit board through the flexible printed circuit board material characteristic data to generate stress hot spot distribution data; perform stress region division according to the stress hot spot distribution data, and perform a micro-region thermal balance strategy process to obtain micro-region thermal balance control data; A curing control and evaluation module, configured to perform real-time curing temperature control feedback adjustment according to the micro-region thermal balance control data, and perform a curing deformation influence evaluation after the flexible printed circuit board curing process is completed to obtain circuit board curing effect evaluation data; A lamination process optimization module, configured to detect the real-time surface wettability index of the flexible printed circuit board to be processed before the lamination station; perform lamination process parameter compensation based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve the curing-lamination process optimization of the flexible printed circuit board production line.

[0044] By obtaining the flexible printed circuit board material characteristic data and combining with the accurate collection of the real-time temperature distribution, the present invention can dynamically adjust the thermal field distribution during the curing process according to the material characteristics of different batches, different thicknesses, and different sizes. Analyze in real time the board surface temperature distribution during the curing process, construct a three-dimensional thermal field model, and combine with the material thermal performance parameters to quantitatively evaluate the thermal stress intensity and its spatial distribution, realizing the accurate identification of potential stress hot spots. Effectively suppressing defects such as microscopic structure deformation and interlayer delamination caused by local overheating or temperature difference, and greatly improving the yield and consistency of large-size and multi-layer flexible printed circuit boards. By real-time detecting the surface wettability index of the flexible printed circuit board and dynamically adjusting the lamination process parameters according to the curing effect evaluation data, it can ensure the tight combination of the material interface and improve the structural integrity of the multi-layer flexible printed circuit board. By real-time monitoring the force distribution during the lamination process and evaluating the reliability of the circuit board interface according to the delamination risk index, potential delamination risk points can be identified in advance, and preventive adjustments can be made by optimizing the lamination pressure distribution. This proactive quality control strategy not only improves the controllability and stability of the production process, but also enhances the adaptability and stability of the product in complex application environments. Through the optimized lamination pressure distribution, it can effectively reduce the interface delamination problem caused by local pressure unevenness, and further improve the reliability and consistency of the product.

[0045] Therefore, from any perspective, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the application documents are intended to be encompassed within the present invention.

[0046] The above are only specific embodiments of the present invention, enabling those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features invented herein.

Claims

1. A process optimization method for a flexible circuit board production line, characterized in that: The following steps are involved: Step S1: obtaining material characteristic data of the flexible circuit board; performing thermal curing of the circuit board according to the material characteristic data of the flexible circuit board, and collecting temperature distribution data of the board surface during the curing process in real time; Step S2: Analyze the plane thermal force according to the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; The thermal stress intensity of the three-dimensional thermal field of the circuit board is evaluated through the material characteristic data of the flexible circuit board, and the stress hot spot distribution data is generated; According to the stress hot spot distribution data, the stress area is divided and the micro-area thermal balance strategy is processed to obtain the micro-area thermal balance control data; Step S3: Perform real-time curing temperature control feedback adjustment according to the micro-area thermal balance control data, and evaluate the curing deformation impact after the flexible circuit board curing process is completed to obtain circuit board curing effect evaluation data; Step S4: detecting the real-time surface wettability index of the flexible circuit board to be processed in front of the bonding station; Based on the circuit board curing effect evaluation data and the real-time surface wettability index, the bonding process parameters are compensated to achieve the optimization of the curing-bonding process of the flexible circuit board production line.

2. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: In step S1, the circuit board thermal curing action is performed according to the material characteristic data of the flexible circuit board, including: Extract the thermal conductivity value, thermal expansion coefficient value, and phase change latent heat value of the substrate as material thermal characteristic data according to the material characteristic data of the flexible circuit board; According to the material thermal characteristic data, the target curing temperature and curing time are set as the curing process specification data; According to the curing process specification data, the pulse heating mode is set and the heat source power timing is processed to obtain the initial curing parameters; Initialize the production unit based on the initial curing parameters, then transport and fix the flexible circuit board to be processed to the curing station, receive the trigger signal of the flexible circuit board entering the curing station, and obtain the circuit board arrival signal data; Control the positioning of the heat source array according to the circuit board arrival signal data, and obtain the heat source array positioning completion data; Based on the positioning of the heat source array, the data is driven to drive the heat source to perform the circuit board thermal curing action, and the board surface temperature distribution data during the curing process is collected in real time.

3. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: The real-time acquisition of the board surface temperature distribution data during the curing process in step S1 includes: A thermocouple array is placed on the surface of the flexible circuit board on the production line in a hexagonal honeycomb layout, with a spacing of 8mm. Infrared sensors are added as vertical supplementary collection points according to the substrate thickness specifications in the material characteristic data of the flexible circuit board to obtain a micro-area temperature collection point array; among them, the vertical supplementary collection points can collect the temperatures of the middle and bottom layers of the flexible circuit board; The surface temperature of the flexible circuit board is collected every 2 seconds using a micro-area temperature collection point array to obtain the original value of the temperature point array; The temperature difference between adjacent temperature measurement points is calculated based on the original value of the temperature dot matrix. The sampling frequency is increased to 0.2 seconds / time at locations where the temperature difference exceeds 1.2°C, and reduced to 3 seconds / time in areas where the temperature difference is less than 0.5°C, in order to obtain the frequency control parameters. Based on the frequency control parameters, the acquisition frequency of the micro-area temperature acquisition point array is adaptively adjusted, and then multi-level temperature differentiation acquisition is performed to obtain multi-level temperature data of the circuit board; The flexible circuit board is divided into temperature transition zones of the edge area and the center area through the multi-level temperature data of the circuit board, and then the partition temperature data is interpolated to generate the board surface temperature distribution data; among them, the edge area is interpolated at a density of 0.5mm / point, and the center area is interpolated at a density of 0.2mm / point.

4. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: In step S2, the planar thermal force is analyzed according to the board surface temperature distribution data, and then the three-dimensional thermal field of the circuit board is constructed, including: The temperature distribution data of the panel surface is marked as hot spots in areas with frequent temperature fluctuations by using a preset temperature fluctuation threshold. When the standard deviation of temperature fluctuation in a certain area exceeds the preset temperature fluctuation threshold, the area is marked as a hot spot area, and the temperature peak value, area range and fluctuation frequency of the area are recorded as the characteristic data of the hot spot area. The temperature fluctuation threshold is set to 0.3℃. Based on the characteristic data of the hot spot area, a temperature gradient vector field is established on the xy plane, and the temperature change rate of each point along the x-axis and y-axis directions is calculated and synthesized into a direction vector. The vector size represents the temperature change rate, and the vector direction points to the direction of temperature increase, thus obtaining the plane thermal data; According to the temperature distribution data of the board surface, the temperature of the three layers of depth in the z-axis is extracted and compared, and then the temperature change rate in the vertical direction is calculated; wherein the three layers of depth in the z-axis are specifically the surface, middle layer and bottom layer of the flexible circuit board; According to the vertical temperature change rate and the characteristic data of the hot spot area, the area where heat conduction is blocked in the vertical direction is identified, and the coordinates of the heat transfer blocking point are obtained; The heat diffusion in the vertical direction is analyzed on the plane thermal data through the coordinates of the heat transfer blockage points, and then the three-dimensional thermal field of the circuit board is constructed.

5. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: In step S2, the thermal stress intensity evaluation of the three-dimensional thermal field of the circuit board is performed using the material characteristic data of the flexible circuit board, including: Based on the three-dimensional thermal field of the circuit board, the temperature change rate of each measurement point in the three directions of x, y and z is extracted, and the temperature change rates in the three directions are combined to obtain the temperature gradient vector; Calculate the modulus of the gradient vector according to the temperature gradient vector to obtain gradient intensity distribution data; Based on the gradient intensity distribution data, the points exceeding 3.5°C / mm were marked as thermal gradient critical points; The flexible circuit board is partitioned by material type, and the board surface is divided into three categories: ITO conductive layer area, polyimide base layer area and edge packaging area. The corresponding relationship between the coordinate points in the three-dimensional thermal field of the circuit board and the material type is established to generate circuit board material partition data; Based on the material characteristic data of the flexible circuit board, the regional thermal expansion coefficient, material elastic modulus and thermal conductivity coefficient of the circuit board material partition data are mapped to obtain the material thermal characteristic data; The thermal stress intensity of the circuit board material partition data is evaluated through the thermal gradient critical point and material thermal property data to generate stress hot spot distribution data.

6. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: Step S2 includes the following steps: The stress area of ​​the flexible circuit board is divided according to the stress hot spot distribution data, and then the micro-area adaptive mesh processing is performed to obtain the micro-area mesh data; wherein the stress area division includes the thermal stress concentration area and the thermal stress sparse area; Evaluate the thermal stress level on the micro-region grid data and assign thermal stress risk area weight values; Screen the cooling points of the thermal stress points in the micro-area grid data, and select the points with a temperature lower than the preset process reference temperature by more than 1°C within 10-30mm around the thermal stress points as candidate cooling points; Establish a hot and cold point pairing table based on the thermal stress points and candidate cooling points in the micro-region grid data; The heat conduction efficiency is scored for the hot and cold spot pairing table, and weighted hot and cold spot pairing selection is performed based on the weight value of the thermal stress risk area to obtain thermal stress point-cold spot pairing data; The micro-area thermal balance strategy is processed according to the thermal stress point-cold spot pairing data to obtain the micro-area thermal balance control data.

7. The process optimization method for a flexible circuit board production line according to claim 6, characterized in that: The micro-area thermal balance strategy processing based on the thermal stress point-cold point pairing data includes: Perform heat conduction path analysis on the thermal stress point-cold point pairing data to generate heat conduction path data; According to the heat conduction path data, the heat conduction rate of each micro-area in the plane and vertical direction of the flexible circuit board is calculated to obtain the heat conduction parameters; According to the temperature sensitivity analysis of heat conduction parameters, the area where the thermal conductivity changes significantly with temperature is identified, and the coordinate data of temperature sensitive points are obtained; According to the coordinate data of the temperature sensitive points, the latent heat of material phase change is evaluated in real time, and the compensation value of the phase change zone is calculated to obtain the compensation value of the phase change zone; Obtain processing environment humidity data; The environmental factor correction is performed on the phase change zone compensation value through the processing environment humidity data to obtain the environmental correction compensation value; Based on the environmental correction compensation value, the micro-area grid data is subjected to micro-area thermal balance regulation and control processing to obtain micro-area thermal balance control data, wherein the micro-area thermal balance regulation and control processing includes heating / cooling power, action time and startup sequence priority configuration.

8. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: Step S3 includes the following steps: Step S31: performing pulse heat flow frequency modulation according to micro-area thermal balance control data to generate pulse frequency distribution data; Step S32: performing real-time curing temperature control feedback adjustment based on the pulse frequency distribution data to obtain real-time state data of heat flow control; Step S33: monitoring the curing completion trigger signal according to the real-time status data of the heat flow control, and then transmitting the circuit board that has completed curing to the inspection station for surface grid-type microscopic deformation scanning to obtain the measured curing morphological parameters; Step S34: calibrate the measured solidification morphological parameters with a reference plane, and then calculate the vertical distance from each point to the reference plane, calibrate the positive and negative values ​​of the deformation variable, and obtain deformation variable calibration data; Step S35: identifying the thermal stress deviation area according to the deformation calibration data; Step S36: morphologically classify the thermal stress deviation area to obtain deformation type labeling data; Step S37: evaluating the curing deformation effect of the thermal stress deviation area through the deformation type marking data to obtain circuit board curing effect evaluation data.

9. The process optimization method for a flexible circuit board production line according to claim 1, characterized in that: Step S4 includes the following steps: Step S41: obtaining flexible circuit board lamination process parameters; wherein the flexible circuit board lamination process parameters include an initial lamination temperature, a lamination pressure reference value, and a cooling rate reference value; Step S42: performing weighted lamination area pressure compensation processing on the lamination pressure reference value according to the circuit board curing effect determination data to obtain lamination pressure compensation distribution data; Step S43: correcting the initial bonding temperature and cooling rate reference value according to the real-time surface wettability index, and generating a bonding process instruction sequence according to the bonding pressure compensation distribution data; Step S44: Control set values ​​are sent to the temperature controller, pressure actuator and cooling rate regulator of the bonding equipment respectively through the bonding process instruction sequence to perform bonding process optimization operation processing.

10. A process optimization system for a flexible circuit board production line, characterized in that: Used to perform the process optimization method for a flexible circuit board production line according to claim 1, the process optimization system for a flexible circuit board production line comprises: The thermal curing data acquisition module is used to obtain the material characteristic data of the flexible circuit board; perform the thermal curing action of the circuit board according to the material characteristic data of the flexible circuit board, and collect the board surface temperature distribution data during the curing process in real time; The thermal stress balance module is used to analyze the plane thermal force according to the board surface temperature distribution data, and then construct the three-dimensional thermal field of the circuit board; evaluate the thermal stress intensity of the three-dimensional thermal field of the circuit board through the material characteristic data of the flexible circuit board, and generate stress hot spot distribution data; divide the stress area according to the stress hot spot distribution data, and perform micro-area thermal balance strategy processing to obtain micro-area thermal balance control data; The curing control and evaluation module is used to make real-time curing temperature control feedback adjustments based on the micro-area thermal balance control data. After the curing process of the flexible circuit board is completed, the curing deformation impact evaluation is performed to obtain the circuit board curing effect evaluation data; The laminating process optimization module is used to detect the real-time surface wettability index of the flexible circuit board to be processed in front of the laminating station; the laminating process parameters are compensated based on the circuit board curing effect evaluation data and the real-time surface wettability index to achieve the curing-laminating process optimization of the flexible circuit board production line.

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