PCIe test device with versatility and method thereof

Abstract

A universal PCIe testing device and method thereof, a DUT and a universal adapter card device are electrically connected through a mediation card and a connecting line, the universal adapter card device includes multiple connectors for connecting a virtual PCIe card, an input / output board, and providing power required by the mediation card and the input / output board, and a controller executes multiple test instructions to test a signal on a circuit loop formed by the DUT, the mediation card, the connecting line, the universal adapter card device and the virtual PCIe card, wherein the universal adapter card device tests differential signals, ground signals and conventional input / output signals, and transmits non-conventional input / output signals to the input / output board for testing, so as to achieve the technical effects of improving testing efficiency and reducing testing cost.

Description

TECHNICAL FIELD

[0001] The present application relates to a PCIe testing device and method thereof, in particular, a PCIe testing device and method thereof with universality. BACKGROUND

[0002] In recent years, with the popularity and vigorous development of semiconductor technology, various electronic products have emerged like mushrooms, however, electronic products have many components and complex circuit, how to ensure product quality has been one of the problems that manufacturers are eager to solve.

[0003] Generally speaking, to ensure product quality will be achieved through various testing means, for example, the traditional test server, the first way is to use the server motherboard with the installation components, such as various specifications of hard disk to test; the second way is to use special adapter card with components for testing. However, the first way has the disadvantages of time-consuming and high cost; the second way needs to be customized for each specification, so it also has the disadvantages of time-consuming and high cost, so the traditional way has the problems of low test efficiency and high test cost. Therefore, it is urgent to provide a solution that can reduce the time of customized development, increase the reusability of the adapter card to reduce the test cost.

[0004] In summary, it can be seen that there has been a problem of low test efficiency and high test cost in the prior art for a long time, so it is necessary to propose an improved technical means to solve this problem. SUMMARY

[0005] The present application discloses a PCIe testing device and method thereof with universality.

[0006] First, the present application discloses a universal PCIe test device applied in the environment of testing a unit under test (UUT), the UUT is connected with a plurality of dummy storage devices and contains an interface under test to provide a plurality of test signals, the interface under test has a slot for power connection, the PCIe test device contains: a mediation card, an input / output carrier board and a universal adapter device. Wherein, one end of the mediation card allows insertion into a slot with the same specification, and the other end of the mediation card is connected with a corresponding connection line; the input / output carrier board contains an input / output connector, a SATA connector and a power connector, to receive a plurality of sideband signals to perform function test, wherein the sideband signals contain IIC function, clock signal and irregular input / output signal. Then, the universal adapter device contains a plurality of connectors and a controller. Wherein, the connectors contain a first connector, a second connector, a third connector, a fourth connector and a fifth connector, wherein the first connector is a PCIe interface to connect a dummy PCIe card, the first connector and the second connector are electrically connected with each other through a plurality of first wires, and the second connector is connected with the connection line to electrically connect the universal adapter device, the mediation card and the unit under test when the mediation card is inserted into one of the slots, the second connector and the third connector are electrically connected with each other through a plurality of second wires, the third connector and the input / output connector are electrically connected with each other, the fourth connector and the SATA connector are electrically connected with each other, and the fifth connector and the power connector are electrically connected with each other to provide power for the mediation card and the input / output carrier board; and the controller is electrically connected with the connectors and executes a plurality of test instructions to make the universal adapter device test a plurality of differential signals, a plurality of ground signals and sideband signals provided by the unit under test as test signals, wherein when the sideband signals are irregular, the sideband signals are sequentially transmitted to the input / output carrier board through the second connector, the second wires, the third connector and the input / output connector to perform function test.

[0007] In addition, the application also discloses a universal PCIe testing method applied to an environment for testing a unit under test, wherein the unit under test is connected with a plurality of virtual storage devices and comprises an interface under test for providing a plurality of testing signals, and the interface under test has corresponding slots for electrical connection. The steps of the method include: inserting one end of an intermediate card into a corresponding slot; connecting the other end of the intermediate card with a corresponding connecting line; electrically connecting the connecting line with a universal adapter device, wherein the universal adapter device comprises a plurality of connectors and a controller, the connectors comprise a first connector, a second connector, a third connector, a fourth connector and a fifth connector, the first connector and the second connector are electrically connected with each other through a plurality of first wires, the second connector and the third connector are electrically connected with each other through a plurality of second wires, when the connecting line is connected with the second connector and the intermediate card is inserted into one of the slots, the universal adapter device, the intermediate card and the unit under test are electrically connected with each other; electrically connecting an input / output board with the universal adapter device, wherein the input / output board comprises an input / output connector, a SATA connector and a power connector, the input / output connector is electrically connected with the third connector, the SATA connector is electrically connected with the fourth connector, and the power connector is electrically connected with the fifth connector to provide power for the intermediate card and the input / output board; connecting a first connector of a PCIe interface with a virtual PCIe card; and controlling the controller to execute a plurality of testing instructions to make the universal adapter device test a plurality of differential signals, a plurality of ground signals and a plurality of out-of-band signals provided by the unit under test as testing signals, wherein when the out-of-band signals are irregular, the out-of-band signals are sequentially transmitted to the input / output board through the second connector, the second wires, the third connector and the input / output connector to perform a function test, and the out-of-band signals comprise IIC functions, clock signals and irregular input / output signals.

[0008] The device and method disclosed by the application are different from the prior art in that the unit under test, the intermediate card and the universal adapter device are electrically connected through the connecting line, the universal adapter device comprises a plurality of connectors for connecting the virtual PCIe card and the input / output board and providing power required by the intermediate card and the input / output board, and the controller executes a plurality of testing instructions to test the testing signals on a circuit loop formed by the unit under test, the intermediate card, the connecting line, the universal adapter device and the virtual PCIe card, wherein the universal adapter device tests the differential signals, the ground signals and the regular input / output signals, and the irregular input / output signals are transmitted to the input / output board for testing.

[0009] Through the above technical means, the application can achieve the technical effects of improving testing efficiency and reducing testing cost. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 Device block diagram of the PCIe testing device with universality of the present application.

[0011] Figure 2A And Figure 2B Method flow chart of the PCIe testing method with universality of the present application.

[0012] Figure 3 Schematic diagram of testing using multiple intermediate cards simultaneously according to the present application.

[0013] Figure 4 Schematic diagram of connection pin positions according to the present application.

[0014] Explanation of reference numerals:

[0015] 100: PCIe testing device

[0016] 101: unit to be tested

[0017] 102: virtual storage device

[0018] 103: slot

[0019] 110: intermediate card

[0020] 111: connection line

[0021] 120: input / output carrier board

[0022] 121: input / output connector

[0023] 122: SATA connector

[0024] 123: power supply connector

[0025] 130, 130a, 130b: universal adapter device

[0026] 131: connector

[0027] 131a: first connector

[0028] 131b: second connector

[0029] 131c: third connector

[0030] 131d: fourth connector

[0031] 131e: fifth connector

[0032] 132: controller

[0033] 133a: first wire

[0034] 133b: second wire

[0035] 310a: first intermediate card

[0036] 310b: second intermediate card

[0037] 411: connection line

[0038] Step 210: inserting one end of at least one intermediate card into a corresponding slot, and connecting the other end of each intermediate card to a corresponding connection line

[0039] Step 220: electrically connecting the connection lines to a universal adapter card device, wherein the universal adapter card device comprises a plurality of connectors and a controller, the connectors comprise a first connector, a second connector, a third connector, a fourth connector and a fifth connector, the first connector and the second connector are electrically connected to each other by a plurality of first wires, the second connector and the third connector are electrically connected to each other by a plurality of second wires, when the connection lines are connected to the second connector and the intermediate cards are inserted into the slots, the universal adapter card device, the intermediate cards and the unit under test are electrically connected to each other

[0040] Step 230: electrically connecting an input / output carrier board to the universal adapter card device, wherein the input / output carrier board comprises an input / output connector, a SATA connector and a power connector, the input / output connector is electrically connected to the third connector, the SATA connector is electrically connected to the fourth connector, and the power connector is electrically connected to the fifth connector to provide power to the intermediate cards and the input / output carrier board

[0041] Step 240: connecting the first connector of the PCIe interface to a virtual PCIe card

[0042] Step 250: the controller executes a plurality of test instructions to make the universal adapter card device test a plurality of differential signals, a plurality of ground signals and a plurality of sideband signals provided by the unit under test as test signals, wherein when the sideband signals are irregular, the sideband signals are sequentially transmitted to the input / output carrier board through the second connector, the second wires, the third connector and the input / output connector to perform a function test, the sideband signals comprise IIC function, clock signal and irregular input / output signal DETAILED DESCRIPTION

[0043] The embodiments of the present application will be described in detail with reference to the accompanying drawings and examples, so that the implementation process of how the present application applies technical means to solve technical problems and achieves technical effects can be fully understood and implemented.

[0044] Please refer to Figure 1 , Figure 1The device block diagram of the PCIe testing device with the universality of the present application is applied to the environment of testing the unit under test 101, the unit under test 101 is connected with the plurality of virtual storage devices 102, and includes the interface under test (i.e. PCIe interface) to provide the plurality of test signals, the interface under test has the corresponding slot 103 (such as MICO, Slimline connector, etc.) for electrical connection, the PCIe testing device 100 includes: the intermediate card 110, the input / output carrier board 120 and the universal adapter card device 130. Wherein, one end of the intermediate card 110 allows to be inserted into the corresponding slot 103, and the other end of the intermediate card 110 is connected with the corresponding connecting line 111. In actual implementation, the present application does not limit the type of the slot 103, that is, various slot types capable of providing the insertion of the intermediate card 110 are not deviated from the application scope of the present application.

[0045] The input / output carrier board 120 includes the input / output connector 121, the SATA connector 122 and the power connector 123, and the input / output carrier board 120 is used to receive the plurality of out-of-band signals to perform the function test, wherein the out-of-band signals include the IIC function, the clock signal (CLK) and the irregular input / output signal, that is, the input / output carrier board 120 is responsible for testing the signals with the related functions, such as IIC, CLK, SPI (Serial Peripheral Interface) / UART (Universal Asynchronous Receiver / Transmitter), JTAG (Joint Test Action Group), power (Power), etc.

[0046] Then, the universal adapter card device 130 includes: the plurality of connectors 131 and the controller 132. Wherein, the connector 131 includes the first connector 131a, the second connector 131b, the third connector 131c, the fourth connector 131d and the fifth connector 131e, wherein the first connector 131a is the standard PCIe interface, used to connect the virtual PCIe card, which can be tested by the boundary scan (Boundary Scan). In actual implementation, the virtual PCIe card is inserted into the first connector 131a to simulate the actual PCIe interface card, thereby allowing the interface card to test the PCIe interface.

[0047] The first connector 131a and the second connector 131b are electrically connected by a plurality of first conductive lines 133a, and the second connector 131b is connected to the connecting line, so as to electrically connect the universal adapter card device 130, the intermediate card 110 and the unit 101 to be tested when the intermediate card 110 is inserted into one of the slots 103. The second connector 131b and the third connector 131c are electrically connected by a plurality of second conductive lines 133b, the third connector 131c is electrically connected to the input / output connector 121, the fourth connector 131d is electrically connected to the SATA connector 122, and the fifth connector 131e is electrically connected to the power connector 123 to provide power to the intermediate card 110 and the input / output carrier board 120. In actual implementation, these connectors can be MCIO (Mini Cooledge IO), Slimline, etc.

[0048] The controller 132 is electrically connected to the connector 131 and executes a plurality of test instructions to cause the universal adapter card device 130 to test a plurality of differential signals, a plurality of ground signals and out-of-band signals provided by the unit under test 101 as test signals. When the out-of-band signals are irregular, the universal adapter card device 130 sequentially transmits the out-of-band signals to the input / output board 120 through the second connector 131b, the second wire 133b, the third connector 131c and the input / output connector 121 to perform a function test. Taking the differential signals as an example, the virtual PCIe card, the first connector 131a, the first wire 133a and the second connector 131b of the universal adapter card device 130, the connection line 111, the intermediate card 110, the unit under test 101 and the virtual storage device 102 sequentially form a signal loop. The virtual PCIe card sends a test vector on the transmission line (TX) of the differential signals for the virtual storage device 102 to receive, and the virtual storage device 102 sends a test vector on the reception line (RX) of the differential signals for the virtual PCIe card to receive, so as to complete the differential signal test. Taking the ground signals as an example, the ground pins of the unit under test 101 can be electrically connected to the ground pins of the virtual PCIe card through the intermediate card 110 and the corresponding connection line 111, and after sending a high potential, it is ensured that the low potential is returned. Taking the out-of-band signals as an example, assuming that the connection line 111 includes a first IIC signal and a second IIC signal, when testing the IIC function of the out-of-band signals, the controller 132 assigns the first IIC signal to the fourth connector 131d, i.e. the IIC connection pin (IIC Connect) and the input / output (Dummy PCIe IO) of the virtual PCIe card, and assigns the second IIC signal to the input / output (or Retimer IO) of the virtual PCIe card and the third connector 131c (IO Connect); assuming that the connection line 111 includes a first clock signal and a second clock signal, the controller 132 assigns the first clock signal to the clock pin (Dummy PCIe CLK) and the input / output pin (Dummy PCIe IO) of the virtual PCIe card, and assigns the second clock signal to the input / output pin (Dummy PCIe IO) of the virtual PCIe card and the third connector 131c. In addition, when the out-of-band signals are irregular, the input / output board 120 can perform an Inter-Integrated Circuit (IIC) function test and a Serial Peripheral Interface (SPI) / Universal Asynchronous Receiver / Transmitter (UART) function test, etc., which will be further described later with reference to the drawings.In particular, as mentioned above, the input / output carrier board 120 is responsible for testing signals with related functions, while in the part of the universal adapter card device 130, it is responsible for testing general input / output signals, such as enable signals (Enable, EN), power good signals (Power Good, PG), reset signals (Reset, RST), PCIe reset signals (PCIe Reset, PRST), and the like.

[0049] In particular, in actual implementation, the present application can be partially or completely implemented based on hardware, for example, through hardware elements such as integrated circuit chips, system on chip (SoC), field programmable gate array (FPGA), complex programmable logic device (CPLD), and the like. The test instructions can be written through a combination of language instructions, instruction set architecture instructions, machine instructions, machine-related instructions, microinstructions, firmware instructions, or any combination of one or more program languages, including object-oriented program languages such as Common Lisp, Python, C++, Objective-C, Smalltalk, Delphi, Java, Swift, C#, Perl, Ruby, and PHP, and conventional procedural program languages such as C language or similar program languages.

[0050] Please refer to Figure 2A and Figure 2B , Figure 2A and Figure 2BFor the method flowchart of the PCIe test method with universality of the application, applied in the environment of testing the unit under test 101, the unit under test 101 is connected with a plurality of virtual storage devices 102, and contains an interface under test to provide a plurality of test signals, the interface under test has a corresponding slot 103 for electrical connection, and the steps include: one end of the intermediate card 110 is inserted into the corresponding slot 103, and the other end of the intermediate card 110 is connected with the corresponding connecting line 111 (step 210); the connecting line 111 is electrically connected with the universal adapter card device 130, the universal adapter card device 130 contains a plurality of connectors 131 and a controller 132, wherein the connector 131 contains a first connector 131a, a second connector 131b, a third connector 131c, a fourth connector 131d and a fifth connector 131e, the first connector 131a and the second connector 131b are electrically connected with each other through a plurality of first wires 133a, the second connector 131b and the third connector 131c are electrically connected with each other through a plurality of second wires 133b, when the connecting line 111 is connected with the second connector 131b and the intermediate card 110 is inserted into one of the slots 103, the universal adapter card device 130, the intermediate card 110 and the unit under test 101 are electrically connected with each other (step 220); the input / output board 120 is electrically connected with the universal adapter card device 130, wherein the input / output board 120 contains an input / output connector 121, a SATA connector 122 and a power connector 123, the input / output connector 121 is electrically connected with the third connector 131c, the SATA connector 122 is electrically connected with the fourth connector 131d, and the power connector 123 is electrically connected with the fifth connector 131e to provide power for the intermediate card 110 and the input / output board 120 (step 230); the first connector 131a of the PCIe interface is connected with the virtual PCIe card (step 240); and the controller 132 executes a plurality of test instructions to make the universal adapter card device 130 test a plurality of differential signals, a plurality of ground signals and a plurality of out-of-band signals provided by the unit under test 101 as test signals, wherein when the out-of-band signal is irregular, the out-of-band signal is sequentially transmitted to the input / output board 120 through the second connector 131b, the second wire 133b, the third connector 131c and the input / output connector 121 to perform a function test, the out-of-band signal contains IIC function, clock signal and irregular input / output signal (step 250).By the above steps, the DUT 101 and the universal adapter card device 130 can be electrically connected through the mediation card 110 and the connecting line 111. The universal adapter card device 130 includes a plurality of connectors 131 for connecting the virtual PCIe card, the input / output board 120, and providing the power required by the mediation card 110 and the input / output board 120. A plurality of test instructions are executed by the controller 132 to test the signals on the circuit loop formed by the DUT 101, the mediation card 110, the connecting line 111, the universal adapter card device 130, and the virtual PCIe card. The universal adapter card device 130 tests the differential signals, the ground signals, and the conventional input / output signals, and transmits the non-conventional input / output signals to the input / output board 120 for testing.

[0051] The following Figure 3 and Figure 4 are described by way of example. Please refer to Figure 3 , Figure 3 for the following description. Figure 1 is a schematic diagram of the application using a plurality of mediation cards for testing. In actual implementation, in addition to using a single mediation card for testing as shown in Figure 1 , a plurality of mediation cards (e.g., the first mediation card 310a and the second mediation card 310b) and a plurality of universal adapter card devices (130a, 130b) can be used for testing a plurality of interfaces on the DUT 101 as shown in Figure 3 . The mediation cards (e.g., the first mediation card 310a and the second mediation card 310b) can be different specifications, such as MCIO to Slimline x8, Slimline x4 to x8, Nearstack to Slimline x8, or the like, for electrically connecting with the DUT 101. Here, x4 and x8 refer to different bandwidths, such as four times the bandwidth and eight times the bandwidth.

[0052] As shown in Figure 4 , Figure 4A schematic diagram of the connection pin of the application. In actual implementation, the number of pins of the connection line 111 is less than or equal to 74, in which 32 transmission differential signals, 24 transmission ground signals, 4 (two groups) transmission IIC signals, 4 (two groups) transmission clock signals, and 10 transmission other out-of-band signals, a total of 74 wires and corresponding to the same number of pins. In other words, the out-of-band signal can be transmitted through 4 wires to transmit two groups of IIC signals (i.e. first IIC signal, second IIC signal), in which the first IIC signal is preset to be allocated to the input / output (Input / Output, IO) of the fourth connector 131d (i.e. IIC Connect) and the dummy PCIe card (Dummy PCIe), when the IIC signal on the unit under test 101 has an IIC slave (Slave), the fourth connector 131d is connected to the SATA connector 122 of the input / output carrier board 120 to perform IIC read / write related tests; if the IIC signal on the unit under test 101 is simply connected to the virtual storage device slot (such as: NVMe Slot) of the unit under test 101, the dummy PCIe card and the dummy storage device (such as: Dummy NVMe) are used for IO test. In addition, the second IIC signal is preset to be allocated to the input / output of the dummy PCIe card and the third connector 131c (IO Connect), when the IIC signal on the unit under test 101 is simply connected to the virtual storage device slot (such as: NVMe Slot) of the unit under test 101, the dummy PCIe card and the dummy storage device are also used for IO test, otherwise, if there is an IIC slave, the third connector 131c is connected to the input / output connector 121 of the input / output carrier board 120 to perform IIC read / write related tests.

[0053] In addition, the out-of-band signal can also transmit two groups of clock (CLK) signals through 4 wires, i.e. a first clock signal and a second clock signal. The first clock signal is preset to be distributed to the CLK and IO pins of the dummy PCIe card. When there is a clock source on the first clock signal of the unit under test 101, the clock test pin of the dummy PCIe card is used to read the 100M clock signal frequency. On the contrary, if the first clock signal of the unit under test 101 is simply connected to the dummy storage device slot (e.g. NVMe Slot) of the unit under test 101, the IO test is performed using the dummy PCIe card (e.g. Dummy PCIe) and the dummy storage device (e.g. Dummy NVMe). Then, the second clock signal is preset to be distributed to the input / output (Dummy PCIe IO) of the dummy PCIe card and the third connector 131c. If the second clock signal of the unit under test 101 is simply connected to the dummy storage device slot of the unit under test 101, the IO test is performed using the dummy PCIe card and the dummy storage device. On the contrary, if there is a clock source on the second clock signal of the unit under test 101, the third connector 131c and the connecting wire are used to connect to the clock test pin on the input / output connector 121 of the input / output board 120 for clock signal test.

[0054] Finally, the out-of-band signal can also transmit other input / output signals through 10 wires, which are preset to be distributed to the input / output of the dummy PCIe card and the third connector 131c. If these signals are only the conventional EN, PG, RST, PRST, etc. related IO signals on the unit under test 101, the corresponding transceiving test is performed using the IO of the dummy PCIe card. If the SIDEBAND Pin on the unit under test has IIC, CLK, SPI, JTAG, Power, etc. with related function test, the third connector is used to connect to the corresponding function pin on the input / output connector 121 of the input / output board 120 through the connecting wire (Cable) for related signal test.

[0055] In summary, the difference between the present application and the prior art is that the to-be-tested unit and the universal adapter card device are electrically connected through the intermediate card and the connecting line, the universal adapter card device includes multiple connectors for connecting the virtual PCIe card and the input / output board, and provides the power required by the intermediate card and the input / output board, and the controller executes multiple test instructions to test the to-be-tested signal on the circuit loop formed by the to-be-tested unit, the intermediate card, the connecting line, the universal adapter card device and the virtual PCIe card, wherein the universal adapter card device tests the differential signal, the ground signal and the conventional input / output signal, and transmits the non-conventional input / output to the input / output board for testing. Through this technical means, the problems existing in the prior art can be solved, and the technical effects of improving the test efficiency and reducing the test cost are achieved.

[0056] Although the present application is disclosed with the above-mentioned embodiments, it is not intended to limit the present application, and any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the present application, therefore the patent protection scope of the present application shall be subject to the scope defined by the claims attached to the present specification.

Claims

1. A universal PCIe test device for testing a DUT in an environment, the DUT connected to a plurality of virtual storage devices and comprising at least one interface under test for providing a plurality of signals under test, the interface under test having corresponding sockets for electrical connection, the PCIe test device comprising: at least one adapter card, one end of the adapter card allowing insertion into the corresponding socket, the other end of the adapter card connected to a corresponding connection line; An input / output carrier board includes an input / output connector, a SATA connector, and a power connector to receive a plurality of out-of-band signals to perform a functional test, wherein, the out-of-band signals comprising IIC functions, clock signals and irregular input / output signals; and a universal adapter device comprising: a plurality of connectors, the connectors comprising a first connector, a second connector, a third connector, a fourth connector and a fifth connector, wherein the first connector is a PCIe interface for connecting a virtual PCIe card, the first connector and the second connector are electrically connected to each other through a plurality of first wires, and the second connector is connected to the connection line for electrically connecting the universal adapter device, the adapter card and the DUT to each other when the adapter card is inserted into one of the sockets, the second connector and the third connector are electrically connected to each other through a plurality of second wires, the third connector and the input / output connector are electrically connected to each other, the fourth connector and the SATA connector are electrically connected to each other, and the fifth connector and the power connector are electrically connected to each other for providing power to the adapter card and the input / output board; and a controller electrically connected to the connectors and executing a plurality of test instructions for testing a plurality of differential signals, a plurality of ground signals and the out-of-band signals provided by the DUT as the signals under test, wherein when the out-of-band signals are irregular, the out-of-band signals are transmitted to the input / output board through the second connector, the second wires, the third connector and the input / output connector in sequence for performing function tests.

2. The universal PCIe test device of claim 1, wherein when the controller tests the differential signals, the virtual PCIe card, the first connector of the universal adapter device, the first and second connectors, the connection line, the adapter card, the DUT and the virtual storage devices form a signal loop in sequence, the virtual PCIe card sends a test vector on a transmission line of the differential signals for the virtual storage devices to receive, the virtual storage devices send the test vector on a receiving line of the differential signals for the virtual PCIe card to receive for completing the differential signal test.

3. The universal PCIe test device of claim 1, wherein when the controller tests the ground signals, the ground pins of the DUT are electrically connected to the ground pins of the virtual PCIe card through the adapter card and the corresponding connection line, and after sending a high voltage, the controller ensures that the voltage returns to a low voltage. ​ 4. The universal PCIe test device of claim 1, wherein the connection line comprises a first IIC signal and a second IIC signal, and the controller, when testing the IIC function of the out-of-band signal, distributes the first IIC signal to the fourth connector and the input / output of the virtual PCIe card, and distributes the second IIC signal to the input / output of the virtual PCIe card and the third connector.

5. The universal PCIe test device of claim 1, wherein the connection line comprises a first clock signal and a second clock signal, and the controller, when testing the clock signal of the out-of-band signal, distributes the first clock signal to the clock pin and the output / input pin of the virtual PCIe card, and distributes the second clock signal to the input / output of the virtual PCIe card and the third connector.

6. A universal PCIe test method applied in an environment for testing a unit under test, the unit under test connected with a plurality of virtual storage devices, and comprising at least one interface under test for providing a plurality of signals under test, the interface under test having a corresponding slot for electrical connection, the steps comprising: inserting one end of at least one intermediate card into the corresponding slot of the same specification, the other end of the intermediate card connected with a corresponding connection line; electrically connecting the connection line with a universal adapter card device, the universal adapter card device comprising a plurality of connectors and a controller, wherein the connectors comprise a first connector, a second connector, a third connector, a fourth connector and a fifth connector, the first connector and the second connector electrically connected with each other through a plurality of first wires, the second connector and the third connector electrically connected with each other through a plurality of second wires, when the connection line is connected with the second connector and the intermediate card is inserted into one of the slots, the universal adapter card device, the intermediate card and the unit under test are electrically connected with each other; electrically connecting an input / output board with the universal adapter card device, wherein the input / output board comprises an input / output connector, a SATA connector and a power connector, the input / output connector electrically connected with the third connector, the SATA connector electrically connected with the fourth connector, and the power connector electrically connected with the fifth connector to provide power to the intermediate card and the input / output board; connecting the first connector of a PCIe interface with a virtual PCIe card; and the controller executing a plurality of test instructions to make the universal adapter card device test a plurality of differential signals, a plurality of ground signals and a plurality of out-of-band signals provided by the unit under test as the signals under test, wherein when the out-of-band signal is irregular, the out-of-band signal is sequentially transmitted to the input / output board through the second connector, the second wires, the third connector and the input / output connector to perform a function test, the out-of-band signal comprising an IIC function, a clock signal and an irregular input / output signal.

7. The universal PCIe testing method of claim 6, wherein when the controller tests the differential signal, the virtual PCIe card, the first connector of the universal adapter device, the first and second conductors, the connection line, the mediation card, the unit under test, and the virtual storage device form a signal loop in sequence, the virtual PCIe card sends a test vector on a transmission line of the differential signal for the virtual storage device to receive, the virtual storage device sends the test vector on a receiving line of the differential signal for the virtual PCIe card to receive, so as to complete the differential signal test.

8. The universal PCIe testing method of claim 6, wherein when the controller tests the ground signal, the ground pin of the unit under test is electrically connected to the ground pin of the virtual PCIe card through the mediation card and the corresponding connection line, and after a high voltage is sent, a low voltage is ensured to be returned.

9. The universal PCIe testing method of claim 6, wherein the connection line comprises a first IIC signal and a second IIC signal, and when the controller tests the IIC function of the out-of-band signal, the first IIC signal is distributed to the fourth connector and the input / output of the virtual PCIe card, and the second IIC signal is distributed to the input / output of the virtual PCIe card and the third connector.

10. The universal PCIe testing method of claim 6, wherein the connection line comprises a first clock signal and a second clock signal, and when the controller tests the clock signal of the out-of-band signal, the first clock signal is distributed to the clock pin and the output / input pin of the virtual PCIe card, and the second clock signal is distributed to the input / output pin of the virtual PCIe card and the third connector.

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