Power supply glitch signal detection circuit and method and security chip

Abstract

The invention relates to the technical field of semiconductor safety chip protection, and provides a power supply glitch signal detection circuit and method and a safety chip, and the circuit comprises a filter circuit which is used for filtering an original glitch signal of a power supply voltage, so that the amplitude of the original glitch signal is compressed, and a compressed glitch signal is obtained; the glitch detection circuit is used for comparing the compressed glitch signal with the original glitch signal to obtain a signal voltage difference and generating an alarm signal under the condition that the signal voltage difference is greater than a threshold voltage; and the signal processing module is used for amplifying the alarm signal and carrying out level conversion and broadening processing on the amplified alarm signal to obtain a target signal. The circuit is simple in structure and stable in circuit operation, automatic detection and alarm of the power supply burr signals are achieved, positive and negative burr signals can be detected at the same time through one set of detection circuit, the chip area can be reduced, and the chip cost is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor safety chip protection technology, and in particular to a power glitch signal detection circuit, method and safety chip. Background Art

[0002] With the popularity of smart card chips, they have become the main target of hackers in the security field. Power glitch attacks are to quickly change the power supply voltage or ground voltage input to the smart card chip, so that some circuit units inside the chip are disturbed, causing one or more circuit units to enter an error state, which causes the timing disorder or state flip of the logic system, causing the system to enter an abnormal working state, resulting in erroneous data reading or abnormal operation, and finally leaking sensitive information in the memory.

[0003] At present, most of the power glitch signal detection technologies rely on analog circuits, which are sampled through sampling modules, then compared through comparators, latched, and finally sent to digital to trigger alarms. However, the existing technology is difficult to ensure the robustness and consistency of the circuit, and it is even more unable to cover the detection of glitch signals of different amplitudes and widths, thus failing to protect the chip from attacks. In addition, two sets of sampling circuits are used for positive and negative glitch signals respectively, which not only increases the chip area, but also is not conducive to cost control. Summary of the invention

[0004] The present invention provides a power glitch signal detection circuit, method and safety chip, which are used to solve the defects in the related art that the power glitch signal detection circuit has poor robustness, is difficult to ensure the consistency of the detection result, and is not conducive to reducing the chip cost.

[0005] The present invention provides a power glitch signal detection circuit, comprising: A filter circuit, the filter circuit is connected to a power supply voltage and is used to filter an original glitch signal of the power supply voltage so that the amplitude of the original glitch signal is compressed to obtain a compressed glitch signal; a glitch detection circuit, the glitch detection circuit being connected to the power supply voltage and the filter circuit, and being used for comparing the compressed glitch signal with the original glitch signal to obtain a signal pressure difference, and generating an alarm signal when the signal pressure difference is greater than a threshold voltage; A signal processing module is connected to the glitch detection circuit, and is used to amplify the alarm signal, and perform level conversion and widening processing on the amplified alarm signal to obtain a target signal, wherein the target signal is used to indicate that a glitch signal has appeared in the power supply voltage.

[0006] According to a power glitch signal detection circuit provided by the present invention, the filtering circuit includes a first resistor and a first capacitor, one end of the first resistor is connected to the power supply voltage, the other end of the first resistor is connected to one end of the first capacitor, the other end of the first capacitor is grounded, and the end of the first resistor connected to the first capacitor is the output end of the filtering circuit.

[0007] According to a power glitch signal detection circuit provided by the present invention, the first resistor is an adjustable resistor, and the first capacitor is an adjustable capacitor.

[0008] According to a power glitch signal detection circuit provided by the present invention, the glitch detection circuit includes a first PMOS tube, a second PMOS tube and a second resistor, the gate of the first PMOS tube and the source of the second PMOS tube are both connected to the power supply voltage, the source of the first PMOS tube and the gate of the second PMOS tube are both connected to the output end of the filter circuit, the drain of the first PMOS tube and the drain of the second PMOS tube are both connected to the first end of the second resistor, the second end of the second resistor is grounded, the first end of the second resistor is the output end of the glitch detection circuit, and the second resistor is an adjustable resistor.

[0009] According to a power glitch signal detection circuit provided by the present invention, the threshold voltages of the first PMOS tube and the second PMOS tube are the same.

[0010] According to a power glitch signal detection circuit provided by the present invention, the signal processing module includes a glitch amplification circuit, a level conversion circuit and an alarm signal widening circuit connected in sequence; The burr amplifier circuit is used to amplify the alarm signal to obtain an amplified alarm signal; The level conversion circuit is used to convert the amplified alarm signal from the high voltage power domain to the low voltage power domain to obtain a converted alarm signal; The alarm signal stretching circuit is used to stretch the time width of the converted alarm signal to obtain the target signal.

[0011] According to a power glitch signal detection circuit provided by the present invention, the glitch amplification circuit is an inverting amplifier circuit, the inverting amplifier circuit includes a third PMOS tube and a first NMOS tube, the source of the third PMOS tube is connected to the power supply voltage, the source of the first NMOS tube is grounded, the gate of the third PMOS tube and the gate of the first NMOS tube are both connected to the output end of the glitch detection circuit, the drain of the third PMOS tube is connected to the drain of the first NMOS tube, and serves as the output end of the glitch amplification circuit.

[0012] According to a power glitch signal detection circuit provided by the present invention, the alarm signal widening circuit includes an RC circuit and a monostable trigger, the RC circuit is connected to the level conversion circuit and the monostable trigger respectively, and the monostable trigger is used to output the target signal.

[0013] The present invention also provides a power glitch signal detection method, which is applied to any of the power glitch signal detection circuits described above, and comprises: Filtering the original glitch signal of the power supply voltage so that the amplitude of the original glitch signal is compressed to obtain a compressed glitch signal; Comparing the compressed glitch signal with the original glitch signal to obtain a signal pressure difference, and generating an alarm signal when the signal pressure difference is greater than a threshold voltage; The alarm signal is amplified, and the amplified alarm signal is level-converted and widened to obtain a target signal, wherein the target signal is used to indicate that a glitch signal has occurred in the power supply voltage.

[0014] The present invention also provides a safety chip, comprising any one of the power glitch signal detection circuits described above.

[0015] The power glitch signal detection circuit, method and safety chip provided by the present invention adopt a relatively simple circuit structure, which is mainly composed of a filtering circuit, a glitch detection circuit and a signal processing module, and can ensure the high stability of the circuit during operation. By filtering the original glitch signal through the filtering circuit, the amplitude of the original glitch signal can be compressed, which helps to protect the subsequent circuit while making the subsequent circuit process the glitch signal more stably and reliably. By using a set of glitch detection circuits, positive and negative glitch signals can be detected at the same time, avoiding the need to use two sets of circuits in the traditional method, thereby significantly reducing the chip area and thus reducing the chip cost. The signal processing module can amplify, level convert and widen the alarm signal to obtain a clear and stable target signal, which is convenient for the digital system to detect the target signal and trigger an alarm. In addition, the power glitch signal detection circuit of the present invention can automatically detect the glitch signal after starting, and output an alarm signal when an abnormality is detected, thereby realizing automatic detection and alarm. This function simplifies the control timing and reduces the difficulty of use. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the present invention or related technologies, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 This is one of the structural schematic diagrams of the power glitch signal detection circuit provided by the present invention; Figure 2 This is the second structural schematic diagram of the power glitch signal detection circuit provided by the present invention; Figure 3 This is the third structural schematic diagram of the power glitch signal detection circuit provided by the present invention; Figure 4 It is a structural schematic diagram of the resistor string R0 provided by the present invention; Figure 5 is a schematic diagram of the structure of the capacitor array C0 provided by the present invention; Figure 6 It is a schematic diagram of the result of the power supply glitch signal detection circuit provided by the present invention detecting the glitch signal frequency; Figure 7 It is a flow chart of a power glitch signal detection method provided by the present invention; Figure 8 It is a schematic diagram of simulation results of the power glitch signal detection circuit provided by the present invention; Fig. 9 It is a schematic diagram of the detection results of burr signals with different amplitudes provided by the present invention; Fig.10 It is a schematic diagram of the detection results of burr signals with different widths provided by the present invention. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] In the production process of SIM chips (a type of smart card chip), it is usually necessary to perform power glitch injection tests on the chips to evaluate the stability and reliability of the chips when they are subject to specific types of power interference. Specifically, during the test, the SIM chip is in the power-on state, and the chip is performing read and write operations on the flash memory, and glitches can be injected into the chip power pins. The power glitch needs to be injected at a specific time point, that is, during the execution of the flash data erase and write instruction after the chip completes data transmission but before returning data output, which ensures that the glitch injection occurs at the critical stage of data processing inside the chip.

[0020] The parameters of the power supply glitch injection test include: positive glitch signal amplitude of about 1.8V~7.7V, negative glitch signal amplitude of about -4.5V~0V, and glitch signal width of about 5ns~250ns. Here, the glitch signal amplitude refers to the degree of deviation of the power supply voltage from the normal voltage level. The positive glitch signal amplitude indicates the degree to which the voltage rises above the normal value, while the negative glitch signal amplitude indicates the degree to which the voltage drops below the normal value. The glitch signal width refers to the duration of a single glitch signal.

[0021] Within the above power glitch injection parameters, the chip is subjected to 100,000 flash erase and write operations, which simulates the power interference that the chip may encounter during long-term use and multiple data erase and write operations. During the test, after each flash erase and write operation, it is verified whether the written data is consistent with the expected data, which is a key indicator for evaluating the data integrity of the chip when it is attacked by power glitches. After the test, it is checked whether the chip and its functions are still in the expected working state and have not entered any unexpected or undefined state, which ensures that the chip can still work reliably after being attacked.

[0022] Based on the above test process, it can be seen that during the power glitch injection test, power glitch signals with different amplitudes and widths will be injected for testing. Similarly, in actual applications, the chip may be attacked by power glitch signals with different amplitudes and widths. Therefore, it is necessary to detect power glitch signals with different amplitudes and widths.

[0023] However, the current power glitch signal cannot detect glitch signals of different amplitudes and widths, but can only detect glitch signals of specific amplitudes and widths. The current power glitch attacks are all random amplitudes and widths, which makes it impossible to cover glitch signal attacks of different amplitudes and widths. Moreover, the current power glitch signal detection circuit is usually divided into a rising glitch detection module and a falling glitch detection module, that is, two sets of circuits are used to detect positive and negative glitch signals respectively, resulting in a reduction in chip area, which is not conducive to reducing chip costs. In addition, the existing glitch signal detection circuit usually uses analog circuits, which have high circuit power consumption and poor robustness and consistency.

[0024] In view of this, the present invention provides a power glitch signal detection circuit and method to overcome the above-mentioned defects. Figure 1 FIG. 1 is one of the structural schematic diagrams of the power glitch signal detection circuit provided by the present invention. Figure 1 As shown, the circuit includes: A filter circuit 100, the filter circuit 100 is connected to the power supply voltage 400, and is used to filter the original glitch signal of the power supply voltage 400, so that the amplitude of the original glitch signal is compressed to obtain a compressed glitch signal; A glitch detection circuit 200, the glitch detection circuit 200 is connected to the power supply voltage 400 and the filter circuit 100, and is used to compare the compressed glitch signal with the original glitch signal to obtain a signal pressure difference, and generate an alarm signal when the signal pressure difference is greater than a threshold voltage; The signal processing module 300 is connected to the glitch detection circuit 200, and is used to amplify the alarm signal, and perform level conversion and widening processing on the amplified alarm signal to obtain a target signal, wherein the target signal is used to indicate that a glitch signal has appeared in the power supply voltage 400.

[0025] It should be noted that the filter circuit, the glitch detection circuit and the signal processing module together constitute the core part of the power supply glitch signal detection circuit. By working together, they can achieve accurate detection of the glitch signal in the power supply voltage.

[0026] Specifically, a filter circuit is a circuit used to remove unnecessary frequency components from an input signal and only allow certain specific frequency components to pass through. The filter circuit can achieve different filtering functions, such as low-pass filtering, high-pass filtering, band-pass filtering, and band-stop filtering, by combining components such as capacitors, inductors, and resistors. The filter circuit in the embodiment of the present invention can be an RC low-pass filter.

[0027] The process of filtering the original glitch signal of the power supply voltage by the filter circuit can be achieved by selecting appropriate filter parameters. For example, the resistance and capacitance in the RC low-pass filter are both adjustable. By setting different resistance values ​​and different capacitance values, sampling and detection of glitch signals of different amplitudes and widths can be achieved. It should be understood that the original glitch signal of the power supply voltage refers to the short-term, high-frequency voltage fluctuations that appear in the power supply voltage waveform. These fluctuations may be caused by internal instability of the power supply, external interference or load changes. The presence of glitch signals will interfere with the normal operation of the circuit and may even damage the components in the circuit.

[0028] It is understandable that when the filter circuit filters the original glitch signal, by selecting appropriate filter parameters, the filter can have a certain attenuation effect on the glitch signal. This means that the filter circuit can reduce the amplitude of the glitch signal, thereby compressing the amplitude of the original glitch signal to obtain a compressed glitch signal. Here, the compressed glitch signal refers to a glitch signal whose amplitude is reduced or weakened after being processed by the filter circuit. Compared with the original glitch signal, the compressed glitch signal has a smaller amplitude and less interference with the normal operation of the circuit.

[0029] After being processed by the filter circuit and obtaining the compressed glitch signal, the signal will enter the glitch detection circuit. Here, the glitch detection circuit is a circuit specifically used to detect whether there is a glitch signal in the power supply voltage. It compares the filtered power supply voltage (i.e., the compressed glitch signal) with the unfiltered power supply voltage (i.e., the original glitch signal) to obtain the signal voltage difference between the two. It should be understood that the signal voltage difference refers to the voltage difference between the compressed glitch signal and the original glitch signal. When the signal voltage difference is greater than the threshold voltage, it indicates that there is a glitch signal in the power supply voltage. In this case, the glitch detection circuit will generate an alarm signal.

[0030] The signal processing module refers to a circuit used to perform various processing (such as amplification, level conversion, widening, etc.) on the alarm signal generated by the glitch detection circuit. In the power glitch signal detection circuit, the signal processing module may include a glitch amplification circuit, a level conversion circuit, a widening circuit, etc., which are used to further process the alarm signal to obtain a more accurate and reliable target signal. Here, the target signal refers to the final indication signal obtained after processing by the signal processing module. In the power glitch signal detection circuit, the target signal is usually used to indicate whether there is a glitch signal in the power supply voltage. If the target signal is triggered, it indicates that there is a glitch signal in the power supply voltage, and corresponding measures need to be taken to deal with it.

[0031] Specifically, the amplification of the alarm signal can be achieved through an amplifier, which can amplify the weak alarm signal to a sufficient amplitude so that the subsequent circuit can accurately identify and process it. Level conversion refers to converting the voltage level of the alarm signal to a range compatible with the subsequent circuit, which can be achieved by using components such as level converters or voltage followers. Stretching processing refers to extending the duration of the alarm signal to a fixed time width so that the subsequent circuit can detect the alarm signal more reliably.

[0032] The detection circuit provided by the embodiment of the present invention adopts a relatively simple circuit structure, which is mainly composed of a filtering circuit, a burr detection circuit and a signal processing module, and can ensure the high stability of the circuit during operation. By filtering the original burr signal through the filtering circuit, the amplitude of the original burr signal can be compressed, which helps to protect the subsequent circuit while making the subsequent circuit process the burr signal more stably and reliably. By using a set of burr detection circuits, positive and negative burr signals can be detected at the same time, avoiding the need to use two sets of circuits in the traditional method, thereby significantly reducing the chip area and thus reducing the chip cost. The signal processing module can amplify, level convert and widen the alarm signal to obtain a clear and stable target signal, which is convenient for the digital system to detect the target signal and trigger an alarm. In addition, the power supply burr signal detection circuit of the present invention can automatically detect the burr signal after starting, and output an alarm signal when an abnormality is detected, thereby realizing automatic detection and alarm. This function simplifies the control timing and reduces the difficulty of use.

[0033] Based on any of the above embodiments, Figure 2 FIG. 2 is a second structural diagram of a power glitch signal detection circuit provided by the present invention. Figure 2 As shown, the signal processing module 300 includes a burr amplification circuit 310, a level conversion circuit 320 and an alarm signal widening circuit 330 connected in sequence; The burr amplifying circuit 310 is connected to the burr detecting circuit 200 and is used to amplify the alarm signal to obtain an amplified alarm signal; The level conversion circuit 320 is used to convert the amplified alarm signal from the high voltage power domain to the low voltage power domain to obtain a converted alarm signal; The alarm signal stretching circuit 330 is used to stretch the time width of the converted alarm signal to obtain the target signal.

[0034] Specifically, the glitch amplifier circuit is a circuit specially designed to amplify weak electronic signals (i.e. alarm signals). In the power glitch signal detection circuit, the glitch amplifier circuit is responsible for receiving the alarm signal from the glitch detection circuit and amplifying it to a level sufficient to be processed and recognized by subsequent circuits (such as level conversion circuits and alarm signal widening circuits).

[0035] It is understood that the glitch amplifier circuit can use an operational amplifier or other types of amplifiers to achieve signal amplification. These amplifiers amplify the input signal by adjusting its gain (i.e., the amplification factor). In the glitch amplifier circuit, the alarm signal is sent to the amplifier as an input signal, and after amplification, an amplified alarm signal is output. This amplified signal has a higher amplitude, making it easier to be processed and recognized by subsequent circuits.

[0036] A level shifter is a circuit used to convert signal levels between different voltage domains. In a power glitch signal detection circuit, the level shifter is responsible for converting the amplified alarm signal from the high-voltage power domain to the low-voltage power domain. This conversion is critical to ensure that the signal can be properly processed and identified in the subsequent low-voltage circuit. Specifically, the level shifter can use integrated circuits (such as level converters) to achieve voltage domain conversion, which can provide reliable signal transmission between high and low voltages while maintaining signal integrity and stability. During the conversion process, the voltage amplitude of the alarm signal is reduced to a level suitable for low-voltage circuit processing, while the characteristics of the signal such as frequency and phase remain unchanged.

[0037] It should be understood that high-voltage power domain and low-voltage power domain refer to areas with different voltage ranges used in the circuit. In the power glitch signal detection circuit, since the alarm signal may be generated in the high-voltage power domain, and the subsequent processing circuit (such as a microcontroller or digital signal system) may need to run in the low-voltage power domain, it is necessary to convert the alarm signal from the high-voltage power domain to the low-voltage power domain, for example, converting the voltage of the alarm signal from 3.3V to 1.1V to facilitate the digital signal system to detect the glitch signal. This conversion helps ensure that the signal can be safely and reliably transmitted to the subsequent circuit while avoiding damage or interference to the low-voltage circuit.

[0038] The alarm signal stretching circuit is a circuit used to increase the time width of the signal. In the power glitch signal detection circuit, the alarm signal stretching circuit is responsible for stretching the time width of the alarm signal after level conversion to ensure that the signal can stably trigger the response of the subsequent circuit (such as a digital signal system). This stretching helps to reduce the problem of false triggering or leaking triggering caused by too narrow signal width, thereby improving the detection sensitivity. It should be understood that stretching the time width of the alarm signal means extending the duration of the signal (i.e., the time interval from the start to the end of the signal). By stretching the time width of the alarm signal, it can be ensured that the signal can stably trigger the response of the subsequent circuit, thereby improving the reliability and stability of the entire circuit.

[0039] Based on any of the above embodiments, Figure 3 FIG. 3 is a schematic diagram of the structure of the power glitch signal detection circuit provided by the present invention. Figure 3 As shown, the circuit includes five modules: a filter circuit 100 , a glitch detection circuit 200 , a glitch amplification circuit 310 , a level conversion circuit 320 and an alarm signal widening circuit 330 .

[0040] The filter circuit 100 may be an RC filter, whose main function is to filter positive and negative glitch signals to compress the amplitude of the glitch signals. The resistors and capacitors in the RC filter are adjustable to ensure that the RC filter can detect glitch signals of different amplitudes and widths. The frequency range of the RC filter to detect glitch signals may be 721KHZ~794.3MHZ, and the corresponding glitch signal width is 1.38ns~1.25us.

[0041] The glitch detection circuit 200 is composed of two PMOS switches and an adjustable resistor. The circuit samples and compares the signal after RC filtering, that is, compares the compressed glitch signal with the original glitch signal. When the signal voltage difference between the two is greater than the threshold voltage of the PMOS switch, the PMOS switch is turned on, and the glitch signal passes through the switch to form a detection current. The current passes through the resistor to generate an alarm voltage. The alarm voltage here is the generated alarm signal. It should be understood that the resistor in the glitch detection circuit can be configured with different resistance values ​​according to different glitch amplitudes, thereby generating an alarm voltage.

[0042] The glitch amplifier circuit 310 may be an inverting amplifier circuit, which is used to amplify the alarm signal generated by the glitch circuit. After amplification, the signal amplitude may reach the power supply amplitude.

[0043] The level conversion circuit 320 is used to convert the power supply voltage of the amplified alarm signal from 3.3V to 1.1V power supply domain, so as to facilitate the digital signal system to detect the glitch signal.

[0044] The alarm signal stretching circuit 330 is used to stretch the time width of the alarm signal. For example, a 150ns signal can be stretched into a 2us alarm signal to facilitate detection by a digital signal system.

[0045] It should be noted that the functions of the various circuit modules of the power glitch signal detection circuit are introduced above, and the structure of each circuit module will be described below.

[0046] Based on any of the above embodiments, Figure 3 As shown, the filtering circuit 100 includes a first resistor R0 and a first capacitor C0, one end of the first resistor R0 is connected to the power supply voltage VCC, the other end of the first resistor R0 is connected to one end of the first capacitor C0, the other end of the first capacitor C0 is grounded, and the end of the first resistor R0 connected to the first capacitor C0 is the output end of the filtering circuit 100.

[0047] Specifically, when the glitch signal attacks the power supply, the glitch on the power supply voltage VCC passes through a low-pass filter composed of R0 and C0 and becomes a VCC_RC voltage. Compared with the original glitch signal (i.e., the glitch on the power supply voltage VCC), the voltage amplitude of VCC_RC is compressed, and VCC_RC is the compressed glitch signal.

[0048] Furthermore, the first resistor R0 is an adjustable resistor, and the first capacitor C0 is an adjustable capacitor.

[0049] Figure 4 : is a schematic diagram of the structure of the resistor string R0 provided by the present invention, such as Figure 4 As shown, the first resistor R0 can be composed of a resistor string R1_TRIM~R4_TRIM, and the resistance value of the first resistor R0 can be adjusted by setting the state of the switches SW1~SW4. It should be understood that the resistance value at both ends of R_IN and R_OUT is the resistance value of the first resistor R0.

[0050] Figure 5 : is a schematic diagram of the structure of the capacitor array C0 provided by the present invention, such as Figure 5 As shown, the first capacitor C0 can be composed of a capacitor array C1_trim~C4_trim, and the capacitance value of the first capacitor C0 can be adjusted by setting the state of the switch corresponding to each capacitor. It should be understood that the capacitance value at both ends of C_IN and C_OUT is the capacitance value of the first capacitor C0.

[0051] It is understandable that the frequency regulation of the power glitch signal is mainly determined by Figure 4 The resistor string shown is Figure 5 The capacitor array shown in the figure has the following frequency calculation formula: in, Indicates the frequency of the power glitch signal, and Different parameters can be configured. The width of the corresponding glitch signal is: T=1 / f.

[0052] Figure 6 FIG. 1 is a schematic diagram showing the result of the power glitch signal detection circuit provided by the present invention detecting the glitch signal frequency. Figure 6 As shown, by configuring different resistor values and different capacitance values , we can get the frequency range of the detected glitch signal is 721KHZ~794.3MHZ, and the corresponding detection glitch signal width is 1.38ns~1.25us. It should be noted that, Figure 6The horizontal axis represents frequency, and the vertical axis represents voltage. The frequency value corresponding to point M1 is about 721KHZ, and the frequency value corresponding to point M2 is about 794.3MHz.

[0053] Based on any of the above embodiments, Figure 3 As shown, the burr detection circuit 200 includes a first PMOS tube MP0, a second PMOS tube MP1 and a second resistor R1, the gate of the first PMOS tube MP0 and the source of the second PMOS tube MP1 are both connected to the power supply voltage VCC, the source of the first PMOS tube MP0 and the gate of the second PMOS tube MP1 are both connected to the output end of the filter circuit 100, the drain of the first PMOS tube MP0 and the drain of the second PMOS tube MP1 are both connected to the first end of the second resistor R1, the second end of the second resistor R1 is grounded, the first end of the second resistor R1 is the output end of the burr detection circuit 200, and the second resistor R1 is an adjustable resistor.

[0054] Specifically, when a positive glitch signal attacks the power supply, the glitch on the power supply voltage VCC passes through a low-pass filter composed of R0 and C0 and becomes a VCC_RC voltage. Compared with the original glitch signal (i.e., the glitch on the power supply voltage VCC), the voltage amplitude of VCC_RC is compressed. When the compression amplitude of the VCC_RC voltage exceeds the threshold voltage Vth of the first PMOS tube MP0, MP0 will be turned on, generating a spike current, and the spike current will form a spike voltage V1 after passing through the second resistor R1. The spike voltage V1 here is the alarm signal generated by the glitch detection circuit.

[0055] Similarly, when a negative glitch signal attacks the power supply, the glitch on the power supply voltage VCC is filtered by RC and becomes a VCC_RC voltage, and the amplitude of the VCC_RC voltage is increased (since it is a negative glitch signal at this time, although the amplitude is increased, the glitch amplitude is essentially compressed). When the increase in the VCC_RC voltage exceeds the threshold voltage Vth of the second PMOS tube MP1, MP1 will be turned on, generating a spike current, and the spike current will form a spike voltage V1 after passing through the second resistor R1. The spike voltage V1 here is the alarm signal generated by the glitch detection circuit.

[0056] It can be understood that the first PMOS transistor MP0 and the second PMOS transistor MP1 have the same size and the same threshold voltage. When the power supply voltage VCC is filtered by RC, VCC is attenuated to VCC_RC. For a positive glitch signal: When the voltage difference between VCC and VCC_RC satisfies the above formula, the MP0 switch tube is turned on to generate a peak current I1, and the current I1 passes through the resistor R1 (the resistance value of R1 is adjustable) to generate a voltage V1.

[0057] For negative glitch signal: When the voltage difference between VCC_RC and VCC satisfies the above formula, the MP0 switch tube is turned on to generate a peak current I1, and the current I1 passes through the resistor R1 (the resistance value of R1 is adjustable) to generate a voltage V1.

[0058] It should be noted that MP0 and MP1 have the same size, so their threshold voltages are the same, that is, .

[0059] The generated voltage V1 is the alarm signal generated by the glitch detection circuit, and its calculation formula is as follows: The resistance value of resistor R1 is adjustable. Different resistance values ​​of R1 are configured according to system requirements and different glitch signal amplitudes. It should be understood that It represents the threshold voltage of the first NMOS tube MN5 in the glitch amplifier circuit. By configuring different R1 resistance values, the voltage V1 satisfies the above formula, so that the inverting amplifier (i.e., the glitch amplifier circuit) is turned on, and the amplified alarm signal is output, which is then processed accordingly by the level conversion circuit and the alarm signal widening circuit in turn.

[0060] Based on any of the above embodiments, Figure 3 As shown, the glitch amplifier circuit 310 is an inverting amplifier circuit, which includes a third PMOS tube MP2 and a first NMOS tube MN5. The source of the third PMOS tube MP2 is connected to the power supply voltage VCC, the source of the first NMOS tube MN5 is grounded, the gate of the third PMOS tube MP2 and the gate of the first NMOS tube MN5 are both connected to the output end of the glitch detection circuit 200, and the drain of the third PMOS tube MP2 is connected to the drain of the first NMOS tube MN5 and serves as the output end of the glitch amplifier circuit 310.

[0061] Specifically, the third PMOS tube MP2 and the first NMOS tube MN5 form an inverting amplifier circuit. When the burr detection circuit forms a peak voltage V1, the peak voltage will turn on the inverting amplifier, and after amplification by the inverting amplifier, the output voltage V2 is an alarm signal.

[0062] Based on any of the above embodiments, the level conversion circuit 320 is Figure 3The levelshift module shown in the figure. After the peak voltage V1 is amplified by the inverting amplifier, the alarm signal of the output voltage V2 is output. After V2 passes through the level conversion circuit, it will be converted from the high voltage power domain to the low voltage power domain, such as converting the power supply voltage of V2 from 3.3V to 1.1V, which is convenient for the subsequent digital signal system to detect. It should be understood that Figure 3 The VDD connected to the levelshift module represents the internal operating voltage of the device.

[0063] Based on any of the above embodiments, Figure 3 As shown, the alarm signal stretching circuit 330 includes an RC circuit 331 and a monostable trigger 332. The RC circuit 331 is connected to the level conversion circuit 320 and the monostable trigger 332 respectively. The monostable trigger 332 is used to output the target signal.

[0064] It should be noted that the RC circuit 331 includes a switch array and a capacitor Cp1, wherein the switch array includes PMOS transistors MP3, MP4, MP5, MP6 and MP7 and NMOS transistor MN6. By controlling the conduction state of these MOS transistors, the switch array can be made to act as a large resistor, thereby forming an RC circuit with the capacitor Cp1. Here, the RC circuit is used to provide the necessary delay, and the monostable trigger 332 (i.e. Figure 3 The SMT module shown in the figure is used to extend the time width of the signal to the required length. Specifically, when the input signal triggers the monostable trigger, it will output a pulse signal with a fixed width. The width of this pulse signal is determined by the internal parameters of the monostable trigger. In this way, the time width of the alarm signal is effectively extended.

[0065] Specifically, after the voltage V2 is processed by the level conversion circuit, a converted alarm signal will be obtained, and the alarm signal will be processed by the RC circuit and the SMT module, so that the time width of the final output target signal GD_OUT can be widened, which is convenient for sampling and detection of the digital signal system. It should be understood that Figure 3 The circuit shown also includes an enable signal EN, which is used to control the switch state of the entire power glitch signal detection circuit.

[0066] Based on any of the above embodiments, Figure 7 FIG. 1 is a flow chart of a method for detecting a power glitch signal provided by the present invention. Figure 7 As shown, the method is applied to any of the power glitch signal detection circuits described above, and the method includes: Step 710, filtering the original glitch signal of the power supply voltage so that the amplitude of the original glitch signal is compressed to obtain a compressed glitch signal; Step 720, comparing the compressed glitch signal with the original glitch signal to obtain a signal pressure difference, and generating an alarm signal when the signal pressure difference is greater than a threshold voltage; Step 730, amplify the alarm signal, and perform level conversion and widening processing on the amplified alarm signal to obtain a target signal, wherein the target signal is used to indicate that a glitch signal appears in the power supply voltage.

[0067] Specifically, the method provided in the embodiment of the present invention can be applied to the above-mentioned power glitch signal detection circuit, which includes a filter circuit, a glitch detection circuit and a signal processing module. The signal processing module includes a glitch amplification circuit, a level conversion circuit and an alarm signal flattening circuit.

[0068] First, the original glitch signal of the power supply voltage is filtered through a filtering circuit so that the amplitude of the original glitch signal is compressed, thereby obtaining a compressed glitch signal. Next, the compressed glitch signal and the original glitch signal are received through a glitch detection circuit, and the two are compared to obtain the signal pressure difference between the two. When the signal pressure difference is greater than the threshold voltage of the PMOS switch in the glitch detection circuit, the switch is turned on, and the glitch signal forms a detection current after passing through the switch. The current passes through the resistor to generate an alarm voltage (i.e., an alarm signal). Subsequently, the alarm voltage is amplified by a glitch amplifier circuit, and is converted from a high-voltage power domain to a low-voltage power domain through a circuit conversion circuit to obtain a converted alarm signal. Finally, the converted alarm signal is processed by a widening circuit to widen the time width of the alarm signal, which is convenient for detection by a digital signal system.

[0069] The method provided by the embodiment of the present invention can more accurately identify glitch signals with smaller amplitudes by filtering the original glitch signal to obtain a compressed glitch signal and comparing it with the original glitch signal, thereby improving the sensitivity of detection. By setting the comparison between the signal pressure difference and the threshold voltage, an alarm signal is generated only when the signal pressure difference exceeds the threshold voltage. This mechanism helps to avoid false alarms caused by noise or other non-glitch factors, thereby improving the accuracy of detection. By amplifying, level converting and widening the alarm signal, it can be ensured that the target signal has sufficient amplitude and width so that the subsequent circuit or device can stably and reliably receive the alarm indication.

[0070] Based on any of the above embodiments, an embodiment of the present invention provides a method and circuit for detecting power glitch signals of different widths and amplitudes, wherein the detection method includes: Step 1: After the original glitch signal of the power supply voltage passes through the RC filter, the amplitude of the glitch signal is compressed to obtain a compressed glitch signal; Step 2: Compare the compressed glitch signal with the original glitch signal. If the signal voltage difference between the two is greater than the threshold voltage of the PMOS switch, the PMOS switch is turned on. Step 3: After the compressed glitch signal passes through the PMOS switch, a detection current is formed, and the current passes through the resistor to generate an alarm voltage; Step 4: The alarm voltage is amplified by an inverting amplifier; Step 5: After the alarm voltage is level-converted, it is converted from the 3.3V power supply to the 1.1V power domain; Step 6: After the alarm signal of the 1.1V power domain passes through the widening circuit, the width of the alarm signal is changed from 150ns to an alarm signal of about 2us, which is convenient for the digital system to detect the alarm signal.

[0071] The above detection method can be applied to a detection circuit, which is mainly composed of five modules, namely, an RC filter, a glitch detection circuit, a glitch amplification circuit, a level conversion circuit, and an alarm signal widening circuit. The specific functions of each circuit module can be referred to the above embodiment and will not be repeated here. The working principle of the power glitch signal detection circuit provided in an embodiment of the present invention is introduced below.

[0072] Figure 8 FIG. 1 is a schematic diagram of simulation results of a power glitch signal detection circuit provided by the present invention, such as Figure 8 As shown in the figure, the horizontal axis is time and the vertical axis is voltage. The working principle of the detection circuit is as follows: Assuming the power supply voltage VCC = 5V, when a positive (negative) glitch with a width of 250ns appears in the power supply voltage, the glitch signal is filtered by RC, and the VCC voltage decays to VCC_RC, that is, the voltage amplitude of VCC_RC is compressed. When the compression amplitude of the VCC_RC voltage (that is, the voltage difference between VCC and VCC_RC) exceeds the threshold voltage of the switch MP0 When the alarm signal is turned on, the MP0 switch will be turned on, generating a spike current. The spike current passes through the resistor R1, forming a spike voltage V1. The spike voltage turns on the inverting amplifier, and after amplification by the inverting amplifier, the output voltage V2 is an alarm signal. V2 converts the alarm signal from the high-voltage power domain to the low-voltage power domain through the level conversion circuit. Finally, after the alarm signal is processed by the RC circuit and the SMT module, the time width of the alarm signal GD_OUT is widened from 150ns to about 2us, which is convenient for the digital signal system to sample.

[0073] Fig. 9 is a schematic diagram of the detection results of burr signals with different amplitudes provided by the present invention, Fig.10 is a schematic diagram of the detection results of burr signals with different widths provided by the present invention, such as Fig. 9 and 10As shown, the detection method and circuit provided by the embodiment of the present invention can detect positive and negative glitch signals of different amplitudes and widths, cover a large detection range, and are very sensitive.

[0074] The detection method and circuit provided by the embodiment of the present invention have the following advantages: (1) The power glitch signal detection circuit of the present invention is composed of an RC filter (to detect glitch signals of different amplitudes and widths), a glitch detection circuit, a glitch amplification circuit, a level conversion circuit, and an alarm signal widening circuit. The three modules of the RC filter (composed of R0 and C0), the glitch detection circuit (composed of MP0, MP1, and R1), and the glitch amplification circuit (composed of MN5 and MP2) constitute the core circuit of the present invention. The core circuit has a simple structure and high stability. In addition, the circuit of the present invention can detect positive and negative glitches at the same time with one set of circuits, which greatly reduces the chip area. The detection is very sensitive and can detect glitches within 2ns, and can quickly and effectively output alarm results. (2) The core circuit of the power glitch detection in the present invention adopts an RC filter and a MOS switch detection circuit structure, which effectively improves the robustness and consistency of the circuit compared to the traditional analog circuit or comparator structure, and has more flexible requirements on the circuit layout; (3) The detection circuit of the present invention has a trim function (i.e., R0, R1, and C0 are adjustable), which can be used to detect glitch signals of different amplitudes and widths. By configuring different parameters in the system, it can cope with glitch attacks of different amplitudes and widths, providing more comprehensive protection. (4) The detection circuit of the present invention has a relatively wide working power supply coverage range and uses a static detection mode to work with low additional power consumption. When the system is in sleep mode, the static power consumption of the detection circuit as a whole increases to close to zero, and can be integrated into an ultra-low power circuit. (5) The detection circuit of the present invention does not require the addition of special devices, does not require additional bandgap reference current or voltage, has a very high degree of independence, and is compatible with detectors of other detection mechanisms. After the detection circuit is started as a whole, it can automatically detect and output an alarm, saving control timing and reducing the difficulty of use.

[0075] Based on any of the above embodiments, the present invention further provides a security chip, including the power glitch signal detection circuit as described in any of the above embodiments. Here, the structure of the power glitch signal detection circuit can be set with reference to the above embodiments, which will not be described in detail here.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A power glitch signal detection circuit, characterized in that: include: A filter circuit, the filter circuit is connected to a power supply voltage and is used to filter an original glitch signal of the power supply voltage so that the amplitude of the original glitch signal is compressed to obtain a compressed glitch signal; a glitch detection circuit, the glitch detection circuit being connected to the power supply voltage and the filter circuit, and being used for comparing the compressed glitch signal with the original glitch signal to obtain a signal pressure difference, and generating an alarm signal when the signal pressure difference is greater than a threshold voltage; A signal processing module is connected to the glitch detection circuit, and is used to amplify the alarm signal, and perform level conversion and widening processing on the amplified alarm signal to obtain a target signal, wherein the target signal is used to indicate that a glitch signal has appeared in the power supply voltage.

2. The power glitch signal detection circuit according to claim 1, characterized in that: The filtering circuit includes a first resistor and a first capacitor, one end of the first resistor is connected to the power supply voltage, the other end of the first resistor is connected to one end of the first capacitor, the other end of the first capacitor is grounded, and the end of the first resistor connected to the first capacitor is the output end of the filtering circuit.

3. The power glitch signal detection circuit according to claim 2, characterized in that: The first resistor is an adjustable resistor, and the first capacitor is an adjustable capacitor.

4. The power glitch signal detection circuit according to claim 1, characterized in that: The burr detection circuit includes a first PMOS tube, a second PMOS tube and a second resistor, the gate of the first PMOS tube and the source of the second PMOS tube are both connected to the power supply voltage, the source of the first PMOS tube and the gate of the second PMOS tube are both connected to the output end of the filter circuit, the drain of the first PMOS tube and the drain of the second PMOS tube are both connected to the first end of the second resistor, the second end of the second resistor is grounded, the first end of the second resistor is the output end of the burr detection circuit, and the second resistor is an adjustable resistor.

5. The power glitch signal detection circuit according to claim 4, characterized in that: The threshold voltages of the first PMOS tube and the second PMOS tube are the same.

6. The power glitch signal detection circuit according to any one of claims 1 to 5, characterized in that: The signal processing module includes a burr amplification circuit, a level conversion circuit and an alarm signal widening circuit connected in sequence; The burr amplifier circuit is used to amplify the alarm signal to obtain an amplified alarm signal; The level conversion circuit is used to convert the amplified alarm signal from the high voltage power domain to the low voltage power domain to obtain a converted alarm signal; The alarm signal stretching circuit is used to stretch the time width of the converted alarm signal to obtain the target signal.

7. The power glitch signal detection circuit according to claim 6, characterized in that: The glitch amplification circuit is an inverting amplifier circuit, which includes a third PMOS tube and a first NMOS tube, the source of the third PMOS tube is connected to the power supply voltage, the source of the first NMOS tube is grounded, the gate of the third PMOS tube and the gate of the first NMOS tube are both connected to the output end of the glitch detection circuit, and the drain of the third PMOS tube is connected to the drain of the first NMOS tube and serves as the output end of the glitch amplification circuit.

8. The power glitch signal detection circuit according to claim 6, characterized in that: The alarm signal expansion circuit comprises an RC circuit and a monostable trigger. The RC circuit is connected to the level conversion circuit and the monostable trigger respectively. The monostable trigger is used to output the target signal.

9. A method for detecting a power glitch signal, characterized in that: The method is applied to the power glitch signal detection circuit according to any one of claims 1 to 8, and the method comprises: Filtering the original glitch signal of the power supply voltage so that the amplitude of the original glitch signal is compressed to obtain a compressed glitch signal; Comparing the compressed glitch signal with the original glitch signal to obtain a signal pressure difference, and generating an alarm signal when the signal pressure difference is greater than a threshold voltage; The alarm signal is amplified, and the amplified alarm signal is level-converted and widened to obtain a target signal, wherein the target signal is used to indicate that a glitch signal has occurred in the power supply voltage.

10. A security chip, characterized in that: The invention comprises a power glitch signal detection circuit as claimed in any one of claims 1 to 8.

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