Lightweight chip defect detection method suitable for bright and dark field combined image

Abstract

The invention discloses a lightweight chip defect detection method suitable for a bright and dark field combined image, and the method comprises the steps: S1, constructing a chip defect data set which comprises a plurality of chip images and defect region masks corresponding to the chip images; s2, constructing an improved deep learning segmentation network, training and quantifying the improved deep learning segmentation network by using a chip defect data set to obtain a lightweight defect detection model, introducing an adaptive dynamic gating module, and performing model quantification based on a quantitative sensitivity-based threshold adaptive strategy and Monte Carlo-based multi-objective optimization; and S3, performing defect detection on the to-be-detected chip image by using the lightweight defect detection model. According to the method, important features and redundant background information can be effectively separated, the accuracy of defect detection in a complex image is improved, the optimal quantitative configuration based on the sensitivity and the performance standard of the detection model can be systematically recognized through the two quantitative methods, and therefore efficient and accurate defect detection is achieved on equipment with limited resources.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip defect detection, and in particular relates to a lightweight chip defect detection method suitable for bright and dark field combined images. Background Art

[0002] With the rapid development of information technology, the semiconductor industry is undergoing a major transformation. Chip size continues to shrink, manufacturing precision requirements are significantly increased, and traditional production methods are difficult to meet complex market demands. In this context, intelligent manufacturing has gradually become the core strategy of semiconductor manufacturing. By introducing intelligent technology, companies can achieve a higher level of automated generation, optimize processes, and flexibly respond to market changes, thereby gaining an advantage in global competition.

[0003] At the same time, the complexity of semiconductor processes has increased with technological advances. The design complexity and integration of integrated circuits (ICs) have increased significantly, especially driven by Moore's Law, the number of transistors in a single chip has increased exponentially. This complexity step is reflected in the diversity of circuit design, as well as in the miniaturization of devices and the depth of functional integration. The reduction of process nodes requires more precision in each link of the manufacturing process, such as lithography, etching, deposition, and ion implantation, and slight deviations may seriously affect the performance and reliability of the chip. To meet these challenges, intelligent manufacturing technology is widely used in semiconductor production, especially in detection and control. Intelligent detection systems can detect tiny defects such as dust, residual glue, and bubbles in a timely manner, thereby improving the yield and reliability of chips.

[0004] Traditional chip defect detection methods mainly rely on manually designed feature extraction. Although they have achieved certain results on specific defect types, their versatility and adaptability are limited. In recent years, with the rise of deep learning technology, convolutional neural networks (CNNs) have quickly become the mainstream method in visual tasks due to their excellent performance in automatic feature learning. However, compared with general image detection, chip defect detection tasks face unique challenges. Due to its combined imaging method of light and dark fields, background complexity, shadow effects, and uneven illumination are more obvious. High-contrast details and complex textures in light and dark field images can easily interfere with the model, causing the edges and textures of non-defective areas to be mistakenly identified as defects, thereby increasing the difficulty of detection. In addition, shadow effects can also form pseudo-defects, leading to false detections. Feature mutations caused by uneven illumination increase the difficulty of the model's consistent defect recognition, further increasing the robustness requirements for the model. At the same time, mainstream deep learning models have large parameter sizes and high computing requirements, which is a bottleneck for resource-constrained devices that require real-time inference. For example, classic network structures such as TransUnet and Swim-Unet perform well in visual tasks, but their complex structures limit their real-time applications on low-power, low-resource hardware platforms. In addition, the increase in model size brings about an increase in computing overhead and storage requirements, which affects the inference speed and increases power consumption. These problems are particularly prominent in chip defect detection tasks that require high real-time performance. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the lightweight chip defect detection method suitable for light and dark field combined images provided by the present invention solves the problems of limited versatility and adaptability of traditional chip defect detection methods, as well as the difficulty of chip defect detection for light and dark field combined images.

[0006] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is: a lightweight chip defect detection method suitable for bright and dark field combined images, comprising the following steps:

[0007] S1. Construct a chip defect dataset, including several chip images and their corresponding defect area masks;

[0008] S2. Build an improved deep learning segmentation network, train it with the chip defect dataset and quantize it to obtain a lightweight defect detection model;

[0009] The improved deep learning segmentation network is a network structure formed by introducing an adaptive dynamic gating module into the deep learning segmentation network; the quantization method includes a threshold adaptive strategy based on quantization sensitivity and a multi-objective optimization based on Monte Carlo;

[0010] S3. Use a lightweight defect detection model to perform defect detection on the image of the chip to be inspected.

[0011] Furthermore, in step S2, the improved deep learning segmentation network includes an encoder, a bottleneck layer and a decoder, wherein the bottleneck layer is located between the encoder and the decoder, and the features extracted by the encoder are directly transmitted to the corresponding layer of the decoder via a jump connection between the encoder and the decoder;

[0012] The encoder is used to gradually extract features from the input image and extract the most significant features through a maximum pooling operation while discarding minor features;

[0013] The bottleneck layer is used to process high-level semantic features with minimal spatial dimension;

[0014] The decoder is used to gradually restore the spatial resolution of the image through upsampling, and at the same time combine the high-resolution features provided by the encoder to generate refined defect detection results.

[0015] Furthermore, in step S2, in the improved deep learning segmentation network, the bottleneck layer is an adaptive dynamic gating module, including a depth-by-depth convolution branch and a point-by-point convolution branch.

[0016] Furthermore, the adaptive dynamic doorway module processes the input feature map as follows:

[0017] S21, in the depth-wise convolution branch, extracting spatial dimension features from the input feature map;

[0018] S22, introducing nonlinear mapping to the extracted spatial dimension features through Tanh activation function to obtain local spatial structure features;

[0019] S23, in the point-by-point convolution branch, the features of the input feature map in each channel dimension are fused;

[0020] S24, activating the channel fusion feature through the Sigmoid activation function to obtain the inter-channel dependency feature;

[0021] S25. Fuse the local spatial structure features and the inter-channel dependency features to obtain an output feature map.

[0022] Furthermore, in step S21, the extracted spatial dimension feature F DW It is expressed as:

[0023]

[0024] In the formula, DW(X) represents depth-wise convolution, X represents the input feature map, represents the weight of the depth-wise convolution, represents the eigenvalue, the subscripts i and j represent the horizontal and vertical coordinates, k represents the size of the convolution kernel, and m and n represent the convolution movement position;

[0025] In step S22, the local spatial structure feature It is expressed as:

[0026]

[0027] In the formula, Tanh()× represents the Tanh activation function;

[0028] In step S23, the channel fusion feature F PW It is expressed as:

[0029] F PW =PW(X)=W pw ×X+b

[0030] Where PW(X) represents channel-by-channel convolution, W pw represents the weight of channel-by-channel convolution, and b represents the offset;

[0031] In step S24, the inter-channel dependency feature It is expressed as:

[0032]

[0033] In the formula, s()× represents the Sigmoid activation function;

[0034] In step S25, the feature map F is output. out It is expressed as:

[0035]

[0036] Furthermore, in step S2, when the improved deep learning segmentation network is quantized, the quantization method of the threshold adaptive strategy based on quantization sensitivity is:

[0037] The K-Means clustering algorithm is used to perform quantitative sensitivity analysis on the improved deep learning segmentation network, divide the sensitivity levels of each layer, and customize the corresponding quantization strategies for the network layers at each sensitivity level;

[0038] Among them, the sensitivity levels include high sensitivity, medium sensitivity and low sensitivity;

[0039] For highly sensitive network layers, maintain FP32 accuracy and avoid quantization;

[0040] For medium-sensitivity network layers, quantization is dynamically selected between FP16 and INT8;

[0041] For low-sensitivity network layers, INT8 is used for quantization.

[0042] Furthermore, in step S2, when the improved deep learning segmentation network is quantized, the quantization method based on Monte Carlo multi-objective optimization is:

[0043] The Monte Carlo search method is used to quantify the configuration and evaluate the performance of the improved deep learning segmentation network through iterative sampling. A gradual adjustment mechanism is introduced in the search process, which allows the probability of accepting low-scoring configurations to be gradually reduced according to adjustable parameters. At the same time, a multi-objective scoring function is set to quantitatively evaluate each sampled configuration.

[0044] Furthermore, the multi-objective scoring function is:

[0045]

[0046] In the formula, IoU(c) represents the segmentation accuracy under quantization configuration c, T(c) represents the inference time, M(c) represents the model size, and T Fp32 represents the inference time when full precision is used, M Fp32 It represents the model size when using full precision, and α, β, and λ represent the weight coefficients that are dynamically adjusted according to actual deployment requirements.

[0047] The beneficial effects of the present invention are:

[0048] (1) The present invention provides a lightweight chip defect detection method suitable for bright and dark field combined image detection tasks, and proposes an improved deep learning segmentation network LightADD-Net. Based on U-Net, LightADD-Net specially designs an adaptive dynamic gating module DP-Gate, which combines the dual-branch structure formed by depthwise convolution and pointwise convolution, and can effectively separate important features and redundant background information. Depthwise convolution focuses on spatial features, so that the model can eliminate detail noise while maintaining spatial resolution and avoid interference from non-defect details.

[0049] (2) The adaptive dynamic gating module DP-Gate in the present invention introduces a channel and space adaptive adjustment mechanism in feature selection. It adaptively enhances the features of specific channels or spatial positions through dynamic gating, suppresses the negative impact of uneven illumination and shadows on defect judgment, and thus enhances the stability of the model under bright and dark field image conditions; the adaptive dynamic gating module DP-Gate also uses different activation functions to enhance the expressiveness of channel and spatial features respectively, so that the expression consistency of features in the entire image is improved, thereby enhancing the adaptability of defect detection in complex images.

[0050] (3) The method of the present invention proposes a threshold adaptive strategy based on quantization sensitivity and a quantization method based on Monte Carlo multi-objective optimization for the constructed improved deep learning segmentation network, forming a robust quantization pipeline that can autonomously configure and optimize the deep learning model to adapt to deployment requirements, ensuring that the high-sensitivity layer maintains its accuracy, while the low-sensitivity layer is actively quantized to achieve a significant reduction in model size and inference latency without sacrificing overall detection performance. This systematic approach not only improves the degree of automation of the quantization process, but also ensures that the quantized model achieves the best balance between resource efficiency and performance through multi-objective optimization and intelligent search strategies, which has important practical value for deploying complex neural networks on resource-constrained hardware platforms. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 A flow chart of the lightweight chip defect detection method for combining bright and dark field images provided by the present invention.

[0052] Figure 2 This is a structural diagram of the improved deep learning segmentation network framework provided by the present invention.

[0053] Figure 3 This is a structural diagram of the adaptive dynamic gating module DP-Gate provided by the present invention. DETAILED DESCRIPTION

[0054] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0055] The embodiment of the present invention provides a lightweight chip defect detection method suitable for combining bright and dark field images, such as Figure 1 As shown, the following steps are included:

[0056] S1. Construct a chip defect dataset, including several chip images and their corresponding defect area masks;

[0057] S2. Build an improved deep learning segmentation network, train it with the chip defect dataset and quantize it to obtain a lightweight defect detection model;

[0058] The improved deep learning segmentation network is a network structure formed by introducing an adaptive dynamic gating module into the deep learning segmentation network; the quantization method includes a threshold adaptive strategy based on quantization sensitivity and a multi-objective optimization based on Monte Carlo;

[0059] S3. Use a lightweight defect detection model to perform defect detection on the image of the chip to be inspected.

[0060] In step S1 of the embodiment of the present invention, a chip defect dataset X is constructed, in which each image x may contain defects of different forms. In the present invention, an improved deep learning segmentation network is constructed and trained to obtain a lightweight defect detection model, so that it can be mapped through the mapping function f q : It can directly mark the defective area in the image, where Y represents the defective area mask set corresponding to the image, and mask Used to clearly mark defective areas in images.

[0061] In step S2 of an embodiment of the present invention, an improved deep learning segmentation network LightADD-Net is constructed, which is a network based on the codec structure of the classic deep learning segmentation network U-Net. The classic U-Net network can effectively fuse spatial information and semantic information through a symmetrical encoder-decoder design. In order to cope with the influence of complex background noise of chip defects, the improved deep learning segmentation network LightADD-Net in the present invention introduces an adaptive dynamic gating module DP-Gate on the basis of U-Net, and enhances effective features while suppressing irrelevant information through adaptive filtering of channels and spatial features.

[0062] In the embodiment of the present invention, Figure 2 As shown, the improved deep learning segmentation network includes an encoder, a bottleneck layer and a decoder, wherein the bottleneck layer is located between the encoder and the decoder, and the features extracted by the encoder are directly transmitted to the corresponding layer of the decoder through a jump connection between the encoder and the decoder, thereby improving the accuracy of the model in the process of detail restoration;

[0063] Among them, the encoder is used to gradually extract features of the input image, and extract the most significant features through maximum pooling operations, while discarding minor features; the bottleneck layer is used to process high-level semantic features with the minimum spatial dimension; the decoder is used to gradually restore the spatial resolution of the image through upsampling, and at the same time combine the high-level resolution features provided by the encoder to generate refined defect detection results.

[0064] In the embodiment of the present invention, in the improved deep learning segmentation network, the bottleneck layer is an adaptive dynamic gating module DP-Gate, such as Figure 3 As shown, it includes depth-wise convolution branches and point-wise convolution branches.

[0065] Based on the above structure, the adaptive dynamic doorway module processes the input feature map as follows:

[0066] S21, in the depth-wise convolution branch, extracting spatial dimension features from the input feature map;

[0067] Among them, the extracted spatial dimension feature F DW It is expressed as:

[0068]

[0069] In the formula, DW(X) represents depth-wise convolution, X represents the input feature map, represents the weight of the depth-wise convolution, represents the eigenvalue, the subscripts i and j represent the horizontal and vertical coordinates, k represents the size of the convolution kernel, and m and n represent the convolution movement position;

[0070] S22, introducing nonlinear mapping to the extracted spatial dimension features through Tanh activation function to obtain local spatial structure features;

[0071] Among them, the local spatial structure characteristics It is expressed as:

[0072]

[0073] In the formula, Tanh()× represents the Tanh activation function;

[0074] S23, in the point-by-point convolution branch, the features of the input feature map in each channel dimension are fused;

[0075] Among them, the channel fusion feature F PW It is expressed as:

[0076] F PW =PW(X)=W pw X+b

[0077] Where PW(X) represents channel-by-channel convolution, W pw represents the weight of channel-by-channel convolution, and b represents the offset;

[0078] S24, activating the channel fusion feature through the Sigmoid activation function to obtain the inter-channel dependency feature;

[0079] Among them, the inter-channel dependency feature It is expressed as:

[0080]

[0081] In the formula, s()× represents the Sigmoid activation function;

[0082] S25, fusing the local spatial structure features and the inter-channel dependency features to obtain an output feature map;

[0083] Among them, the output feature map F out It is expressed as:

[0084]

[0085] In the above process, the depth-wise convolution branch focuses on capturing local spatial structural information, which plays an important role in detecting features such as the shape and edges of defects; while the point-wise convolution branch effectively models the dependencies between channels and improves the feature discrimination ability.

[0086] The adaptive dynamic gate module DP-Gate design provided in this embodiment can simultaneously utilize the feature expressions of the spatial dimension (through the D-point convolution branch W-Conv) and the channel dimension (through the depth-wise convolution branch PW-Conv), and respectively strengthen the spatial structure information and the feature dependency between channels through different activation functions (ReLU and Sigmoid); Tanh activation in the DW-Conv branch helps to extract significant spatial features, while Sigmoid activation in the PW-Conv branch is conducive to learning the soft attention weights between channels. This dual-path feature extraction mechanism significantly improves the model's ability to detect industrial defects, especially in defect recognition tasks under complex backgrounds and uneven lighting conditions.

[0087] In an embodiment of the present invention, an adaptive dynamic gate module DP-Gate is used to construct a bottleneck layer, which further reduces the influence of complex background noise. At the same time, it can be regarded as the information bottleneck of the model, and a mechanism for selectively enhancing or suppressing features by processing high-dimensional features in the minimum spatial dimension to achieve deep abstraction of features. By introducing DP-Gate into the classic U-Net structure, LightADD-Net has achieved optimization in many aspects. First, Depthwise Convolution and Pointwise Convolution significantly reduce the computational cost, so that the model has a higher reasoning speed in high-resolution input scenarios. Secondly, the introduction of DP-Gate enables the model to dynamically adjust the expression of features, thereby improving the accuracy of the segmentation results.

[0088] In an embodiment of the present invention, LightADD-Net can automatically identify chip defects, greatly improving the accuracy and efficiency of detection. However, due to the limitations of equipment resources in semiconductor production environments (such as computing power, memory, and storage space), it becomes challenging to efficiently deploy these deep learning models; to solve this problem, it is crucial to optimize model parameters to strike a balance between performance indicators such as detection accuracy, inference speed, and memory usage. Quantization, as a technology that reduces model weights and activation accuracy, can significantly reduce computing and storage requirements, and is a key method to achieve this balance. A novel quantization method is proposed in the present invention. The framework mainly includes two parts: a threshold adaptive strategy based on quantization sensitivity and a multi-objective optimization based on Monte Carlo search. It can systematically identify the optimal quantization configuration based on detection model sensitivity and performance criteria, thereby achieving efficient and accurate defect detection on resource-constrained devices.

[0089] Specifically, in this embodiment, when the improved deep learning segmentation network is quantized, the quantization method of the threshold adaptive strategy based on quantization sensitivity is:

[0090] The K-Means clustering algorithm is used to perform quantitative sensitivity analysis on the improved deep learning segmentation network, divide the sensitivity levels of each layer, and customize the corresponding quantization strategies for the network layers at each sensitivity level;

[0091] Specifically, each layer is assigned a score in the quantization sensitivity analysis to reflect its sensitivity to quantization errors. Network layers with higher sensitivity levels are more affected by quantization errors and require higher-precision quantization strategies. These scores are used to guide quantization configuration and determine the quantization strategy (such as INT8, FP16, or FP32) adopted for each layer.

[0092] Among them, the sensitivity levels include high sensitivity, medium sensitivity and low sensitivity;

[0093] For highly sensitive network layers, maintain FP32 accuracy and avoid quantization;

[0094] For medium-sensitivity network layers, dynamically select between FP16 and INT8 for quantization to balance accuracy and efficiency;

[0095] For low-sensitivity network layers, INT8 is used for quantization to optimize storage and computing efficiency.

[0096] This automated classification ensures that quantization is applied carefully, minimizing adverse effects on model performance while maximizing efficiency gains.

[0097] In the model quantization process in this embodiment, the quantization configuration space is essentially huge, covering countless combinations of precision settings between different layers. In order to quickly find the best configuration in this high-dimensional space, the present invention is based on Monte Carlo search, combined with a dynamic adjustment mechanism, through multiple random sampling and evaluation, guided by balancing multiple performance objectives, to effectively explore this space.

[0098] Specifically, when quantizing the improved deep learning segmentation network, the quantization method based on Monte Carlo multi-objective optimization is:

[0099] The Monte Carlo search method is used to quantify the configuration and evaluate the performance of the improved deep learning segmentation network through iterative sampling. A gradual adjustment mechanism is introduced in the search process, which allows the probability of accepting low-scoring configurations to be gradually reduced according to adjustable parameters. At the same time, a multi-objective scoring function is set to quantitatively evaluate each sampled configuration.

[0100] Among them, the multi-objective scoring function is:

[0101]

[0102] In the formula, IoU(c) represents the segmentation accuracy under quantization configuration c, T(c) represents the inference time, M(c) represents the model size, and T Fp32 represents the inference time when full precision is used, M Fp32 It represents the model size when using full precision. α, β, and λ represent weight coefficients that are dynamically adjusted according to actual deployment requirements. By adjusting the size of the weight coefficients, different performance aspects can be prioritized according to deployment requirements.

[0103] Through the above-mentioned Monte Carlo-based multi-objective optimization quantitative method, a comprehensive search of the configuration space is promoted, which increases the possibility of finding the global optimal solution.

[0104] In the present invention, a robust quantization pipeline is finally formed based on the above two quantization methods, which can autonomously configure and optimize the improved deep learning segmentation network to adapt to deployment requirements. The quantization framework ensures that the high-sensitivity layer maintains its accuracy, while the low-sensitivity layer is actively quantized to achieve a significant reduction in model size and inference latency without sacrificing overall detection performance. This systematic approach not only improves the automation of the quantization process, but also ensures that the quantized model achieves the best balance between resource efficiency and performance through multi-objective optimization and intelligent search strategies, which has important practical value for deploying complex neural networks on resource-constrained hardware platforms.

[0105] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0106] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A lightweight chip defect detection method suitable for bright and dark field combined images, characterized in that: The following steps are involved: S1. Construct a chip defect dataset, including several chip images and their corresponding defect area masks; S2. Build an improved deep learning segmentation network, train it with the chip defect dataset and quantize it to obtain a lightweight defect detection model; The improved deep learning segmentation network is a network structure formed by introducing an adaptive dynamic gating module into the deep learning segmentation network; the quantization method includes a threshold adaptive strategy based on quantization sensitivity and a multi-objective optimization based on Monte Carlo; S3. Use a lightweight defect detection model to perform defect detection on the image of the chip to be inspected.

2. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 1, characterized in that: In step S2, the improved deep learning segmentation network includes an encoder, a bottleneck layer and a decoder, wherein the bottleneck layer is located between the encoder and the decoder, and the features extracted by the encoder are directly transmitted to the corresponding layer of the decoder through a jump connection between the encoder and the decoder; The encoder is used to gradually extract features from the input image and extract the most significant features through a maximum pooling operation while discarding minor features; The bottleneck layer is used to process high-level semantic features with minimal spatial dimension; The decoder is used to gradually restore the spatial resolution of the image through upsampling, and at the same time combine the high-resolution features provided by the encoder to generate refined defect detection results.

3. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 2, characterized in that: In the step S2, in the improved deep learning segmentation network, the bottleneck layer is an adaptive dynamic gating module, including a depth-by-depth convolution branch and a point-by-point convolution branch.

4. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 3 is characterized in that: The processing method of the adaptive dynamic doorway module for the input feature map is: S21, in the depth-wise convolution branch, extracting spatial dimension features from the input feature map; S22, introducing nonlinear mapping to the extracted spatial dimension features through Tanh activation function to obtain local spatial structure features; S23, in the point-by-point convolution branch, the features of the input feature map in each channel dimension are fused; S24, activating the channel fusion feature through the Sigmoid activation function to obtain the inter-channel dependency feature; S25. Fuse the local spatial structure features and the inter-channel dependency features to obtain an output feature map.

5. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 4 is characterized in that: In step S21, the extracted spatial dimension feature F DW It is expressed as: In the formula, DW(X) represents depth-wise convolution, X represents the input feature map, represents the weight of the depth-wise convolution, represents the eigenvalue, the subscripts i and j represent the horizontal and vertical coordinates, k represents the size of the convolution kernel, and m and n represent the convolution movement position; In step S22, the local spatial structure feature It is expressed as: In the formula, Tanh(×) represents the Tanh activation function; In step S23, the channel fusion feature F PW It is expressed as: F PW =PW(X)=W pw ×X+b Where PW(X) represents channel-by-channel convolution, W pw represents the weight of channel-by-channel convolution, and b represents the offset; In step S24, the inter-channel dependency feature It is expressed as: Where s(×) represents the Sigmoid activation function; In step S25, the feature map F is output. out It is expressed as:

6. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 1, characterized in that: In step S2, when the improved deep learning segmentation network is quantized, the quantization method based on the threshold adaptive strategy of quantization sensitivity is: The K-Means clustering algorithm is used to perform quantitative sensitivity analysis on the improved deep learning segmentation network, divide the sensitivity levels of each layer, and customize the corresponding quantization strategies for the network layers at each sensitivity level; Among them, the sensitivity levels include high sensitivity, medium sensitivity and low sensitivity; For highly sensitive network layers, maintain FP32 accuracy and avoid quantization; For medium-sensitivity network layers, quantization is dynamically selected between FP16 and INT8; For low-sensitivity network layers, INT8 is used for quantization.

7. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 1, characterized in that: In step S2, when the improved deep learning segmentation network is quantized, the quantization method based on Monte Carlo multi-objective optimization is: The Monte Carlo search method is used to quantify the configuration and evaluate the performance of the improved deep learning segmentation network through iterative sampling. A gradual adjustment mechanism is introduced in the search process, which allows the probability of accepting low-scoring configurations to be gradually reduced according to adjustable parameters. At the same time, a multi-objective scoring function is set to quantitatively evaluate each sampled configuration.

8. The lightweight chip defect detection method applicable to bright and dark field combined images according to claim 7, characterized in that: The multi-objective scoring function is: In the formula, IoU(c) represents the segmentation accuracy under quantization configuration c, T(c) represents the inference time, M(c) represents the model size, and T Fp32 represents the inference time when full precision is used, M Fp32 It represents the model size when using full precision, and α, β, and λ represent the weight coefficients that are dynamically adjusted according to actual deployment requirements.

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