Wafer processing method and wafer

Abstract

The invention discloses a wafer processing method and a wafer. The wafer processing method comprises the following steps: carrying out first edge washing operation on the edge of the wafer; removing the first hard mask layer of the wafer; sequentially forming a polluted metal layer and a second hard mask layer on the upper side of the substrate; second edge washing operation is carried out on a second edge area of the wafer, at least part of the second hard mask layer in the second edge area is removed through the second edge washing operation, and the radial distance of the second edge area is at least larger than the radial depth of the mark groove in the edge of the wafer. Therefore, the second edge washing operation is performed on the edge of the wafer after the polluted metal layer and the second hard mask layer are deposited, and the radial distance of the second edge area is at least greater than the radial depth of the marking groove at the edge of the wafer, so that the pit on the substrate can be removed, and the exposure and diffusion of the polluted metal can be prevented in the subsequent process.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wafer processing method and a wafer. Background Art

[0002] Setting a notch on the wafer can help automated equipment identify the position and direction of the wafer. However, if the depth of the notch on the wafer is greater than the edge-washing distance of the mask layer, the chemical solution will splash inward through the notch, resulting in a pit at the notch. After etching, the substrate at that position will form the same pit.

[0003] In the prior art, after the SOC (spin-on-glass) is planarized by spin coating before photolithography, the SOC thickness at the pit is thicker. After photolithography and etching, the metal film is difficult to be completely etched and will remain. If the stress of the remaining film is large, it will fall off, causing scratches when the wafer is mechanically polished. In addition, if the detached film contains contaminated metal, it will cause contamination to the machine in the next process. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a wafer processing method, which can prevent the exposure and diffusion of contaminated metal.

[0005] Another object of the present invention is to provide a wafer.

[0006] According to an embodiment of the present invention, a method for processing a wafer includes: performing a first edge washing operation on a first edge region of the wafer, wherein the wafer includes a substrate and a first hard mask layer arranged on the substrate; removing the first hard mask layer of the wafer; sequentially forming a contaminated metal layer and a second hard mask layer on the upper side of the substrate; performing a second edge washing operation on a second edge region of the wafer, wherein the second edge washing operation at least removes at least a portion of the second hard mask layer in the second edge region, wherein a radial distance of the second edge region is at least greater than a radial depth of a marking groove at an edge of the wafer; removing the contaminated metal layer and the remaining second hard mask layer in the second edge region of the wafer, so that the thickness of the processed wafer adjacent to the center portion is greater than the thickness of the wafer adjacent to the edge portion.

[0007] Therefore, by performing a second edge cleaning operation on the edge of the wafer after depositing the contaminated metal layer and the second hard mask layer, and the radial distance of the second edge area is at least greater than the radial depth of the marking groove at the edge of the wafer, the pits on the substrate can be removed, thereby preventing the exposure and diffusion of contaminated metal in subsequent processes.

[0008] According to some embodiments of the present invention, the radial distance of the second edge region is set to D1, and D1 satisfies the relationship: 2mm<D1<3mm.

[0009] According to some embodiments of the present invention, after the step of removing the contaminated metal layer and the rest of the second hard mask layer in the second edge region of the wafer so that the thickness of the processed wafer adjacent to the center portion is greater than the thickness of the wafer adjacent to the edge portion: the upper surface of the substrate includes a first part, a second part and a third part, the first part corresponds to the second edge region, the second part is higher than the first part, and the third part is connected between the first part and the second part.

[0010] According to some embodiments of the present invention, the step of performing a first edge washing operation on the first edge region of the wafer, wherein the wafer includes a substrate and the first hard mask layer disposed on the substrate, further comprises: the first edge washing operation at least removes a portion of the first hard mask layer in the first edge region of the wafer.

[0011] According to some embodiments of the present invention, the radial distance of the first edge area is at least smaller than the radial depth of the marking groove of the edge of the wafer, and the first edge washing operation is performed on the first edge area of ​​the wafer, and the first edge washing operation at least removes the first hard mask layer in the first edge area of ​​the wafer, wherein the step in which the wafer includes a substrate and the first hard mask layer is arranged on the substrate also includes: the first hard mask layer forms a first pit at the junction corresponding to the marking groove and the first edge area, and the first pit is located on the side of the first hard mask layer away from the substrate.

[0012] According to some embodiments of the present invention, after the step of removing the first hard mask layer from the remaining area of ​​the wafer, the step includes: forming a second pit on the substrate, wherein the first pit and the second pit correspond to each other in the up and down directions.

[0013] According to some embodiments of the present invention, the distance from the first portion to the bottom surface of the substrate is at least less than or equal to the distance from the bottom surface of the second pit to the bottom surface of the substrate.

[0014] According to some embodiments of the present invention, the step of sequentially forming a contaminated metal layer and a second hard mask layer on the upper side of the substrate also includes: the contaminated metal layer is at least partially recessed into the second pit to form a third pit; and the second hard mask layer at least partially fills the third pit.

[0015] According to some embodiments of the present invention, a second edge washing operation is performed on the second edge region of the wafer, and the second edge washing operation at least removes at least a portion of the second hard mask layer in the second edge region, wherein the radial distance of the second edge region is at least greater than the radial depth of the marking groove of the edge of the wafer, and the step includes: the second edge washing operation removes the second anti-reflective layer of the second hard mask layer in the second edge region, wherein the second hard mask layer includes a second spin-coated carbon layer, a second low-temperature oxide layer and the second anti-reflective layer, the contaminated metal layer is arranged on the upper side of the substrate, the second spin-coated carbon layer is arranged on the upper side of the contaminated metal layer, the second low-temperature oxide layer is arranged on the upper side of the second spin-coated carbon layer, and the second anti-reflective layer is arranged on the upper side of the second low-temperature oxide layer.

[0016] According to some embodiments of the present invention, after the step of performing a first edge cleaning operation on the edge of the wafer, the step further includes: a radial distance of the first edge area is greater than a radial depth of the marking groove of the edge of the wafer.

[0017] According to some embodiments of the present invention, the radial distance of the first edge region is set to D2, and the radial distance of the second edge region is set to D1, and D1 and D2 satisfy the relationship: D1≥D2.

[0018] According to some embodiments of the present invention, D2 and D1 satisfy the relationship: 2.5 mm≤D1≤3 mm, 2 mm≤D2≤2.5 mm.

[0019] According to some embodiments of the present invention, the first edge washing operation is performed on the first edge region of the wafer, and the first edge washing operation at least removes the first hard mask layer in the first edge region of the wafer, wherein the step in which the wafer includes a substrate and the first hard mask layer arranged on the substrate also includes: the first edge washing operation removes the first spin-coated carbon layer and the first anti-reflective layer in the first hard mask layer corresponding to the first edge region, wherein the first hard mask layer includes the first spin-coated carbon layer, the first low-temperature oxide layer and the first anti-reflective layer, the first spin-coated carbon layer is arranged on the upper side of the substrate, the first low-temperature oxide layer is arranged on the upper side of the first spin-coated carbon layer, and the first anti-reflective layer is arranged on the upper side of the first low-temperature oxide layer.

[0020] According to some embodiments of the present invention, the step of removing the first hard mask layer from the remaining area of ​​the wafer includes: the upper surface of the substrate includes a fourth part, a fifth part and a sixth part, the fourth part corresponds to the first edge area, the fifth part is higher than the fourth part, and the sixth part is connected between the fourth part and the fifth part.

[0021] The wafer according to the embodiment of the present invention is applicable to the wafer processing method described above.

[0022] According to the wafer of the embodiment of the present invention, the thickness of the wafer near the center portion is greater than the thickness of the wafer near the edge portion.

[0023] According to some embodiments of the present invention, the thickness of the wafer gradually increases in a direction radially extending from the edge of the wafer toward the center of the wafer.

[0024] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 is a partial flow chart of a wafer processing method according to an embodiment of the present invention; Figure 2 is a partial flow chart of a wafer processing method according to an embodiment of the present invention; Figure 3 is a partial flow chart of a wafer processing method according to an embodiment of the present invention; Figure 4 is a partial flow chart of a wafer processing method according to an embodiment of the present invention; Figure 5 is a partial flow chart of a wafer processing method according to an embodiment of the present invention; Figure 6 is a partial schematic diagram of a wafer processing method according to an embodiment of the present invention; Figure 7 is a partial flow chart of a wafer processing method according to other embodiments of the present invention; Figure 8 is a partial schematic diagram of a wafer manufacturing method according to some other embodiments of the present invention; Fig. 9 is a partial flow chart of a wafer processing method according to other embodiments of the present invention; Fig.10 It is a partial process of a wafer processing method according to other embodiments of the present invention; Fig.11 It is a partial process of a wafer processing method according to other embodiments of the present invention; Fig.12 It is a partial process of a wafer processing method according to other embodiments of the present invention; Fig.13is a partial schematic diagram of a wafer manufacturing method according to some other embodiments of the present invention.

[0026] Reference numerals: 100. Liquid spray gun; 10. Wafer; 11. Substrate; 111. Second pit; 112. First part; 113. Second part; 114. Third part; 115. Fourth part; 116. Fifth part; 117. Sixth part; 12. First hard mask layer; 121. First pit; 122. First spin-on carbon layer; 123. First low temperature oxide layer; 124. First anti-reflective layer; 13. Contaminated metal layer; 131. Third pit; 14. Second hard mask layer; 141. Second spin-on carbon layer; 142. Second low temperature oxide layer; 143. Second anti-reflective layer; 15. Photoresist; 20. Mark the groove; 30. First edge region; 40. Second edge region. DETAILED DESCRIPTION

[0027] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0028] Reference below Figure 1-Figure 13 A method for processing the wafer 10 according to an embodiment of the present invention is described, and the method for processing the wafer 10 can be applied to the wafer 10 .

[0029] Combination Figure 1-Figure 13 As shown, the processing method of the wafer 10 according to the embodiment of the present invention may mainly include the following steps: Performing a first edge cleaning operation on a first edge region 30 of a wafer 10, wherein the wafer 10 includes a substrate 11 and a first hard mask layer 12 disposed on the substrate 11; removing the first hard mask layer 12 of the wafer 10; A contaminated metal layer 13 and a second hard mask layer 14 are sequentially formed on the upper side of the substrate 11; Performing a second edge cleaning operation on the second edge region 40 of the wafer 10, wherein the second edge cleaning operation removes at least a portion of the second hard mask layer 14 in the second edge region 40, wherein the radial distance of the second edge region 40 is at least greater than the radial depth of the mark groove 20 at the edge of the wafer 10; The contaminated metal layer 13 and the remaining second hard mask layer 14 in the second edge region 40 of the wafer 10 are removed so that the thickness of the processed wafer 10 near the center portion is greater than the thickness of the wafer 10 near the edge portion.

[0030] Specifically, in the method for processing the wafer 10 , a first edge cleaning operation is first performed on the wafer 10 having the first hard mask layer 12 disposed on the substrate 11 to remove the first hard mask layer 12 on the wafer 10 and retain the substrate 11 .

[0031] Furthermore, after removing the first hard mask layer 12 on the wafer 10, a contaminated metal layer 13 and a second hard mask layer 14 are sequentially formed on the upper side of the substrate 11, and then a second edge washing operation is performed on the edge of the wafer 10. The second edge washing operation can remove at least a portion of the second hard mask layer 14 within the second edge area 40.

[0032] Among them, during the first edge washing operation and the second edge washing operation, the chemical liquid flows out from the chemical liquid spray gun 100, the first edge area 30 is the chemical liquid infiltration area from the edge of the wafer 10 to the center of the wafer 10, and the second edge area 40 is the chemical liquid infiltration area from the edge of the wafer 10 to the center of the wafer 10.

[0033] In an embodiment of the present invention, Figure 6 , Figure 8 and Fig.13 As shown, a marking groove 20 is provided at the edge of the wafer 10 , which can facilitate the determination of the position and direction of the wafer 10 in the processing method of the wafer 10 .

[0034] Furthermore, during the edge cleaning operation, the liquid medicine will splash into the marking groove 20 when passing through the marking groove 20, which will cause a pit to form on the wafer 10 near the marking groove 20, and the substrate 11 at this position will form the same pit after etching.

[0035] In the prior art, after the SOC (spin-on carbon) spin-coating planarization before photolithography, the spin-on carbon layer at the pits is thicker. In this way, after photolithography and etching, the metal film is difficult to be completely etched and will remain. If the stress of the residual film is large, it will fall off, causing the wafer to be scratched during mechanical grinding. In addition, if the detached film contains contaminated metal, it will cause contamination to the machine in the next process.

[0036] In an embodiment of the present invention, when a second edge washing operation is set, the radial distance of the second edge area 40 is at least greater than the radial depth of the marking groove 20 at the edge of the wafer 10, and the second edge washing operation is performed on the second edge area 40. During the second edge washing operation, at least a portion of the second hard mask layer 14 in the second edge area 40 is removed, so that the thickness of the wafer 10 in the second edge area 40 can be reduced.

[0037] Furthermore, after the second edge washing operation is performed on the wafer 10, the contaminated metal layer 13 in the second edge area 40 of the wafer 10 and the remaining second hard mask layer 14 on the wafer 10 are removed by a secondary etching operation. The processed wafer 10 is in a state where the thickness of the adjacent center part is greater than the thickness of the adjacent edge part. In this way, the pit located at the junction of the second edge area 40 and the marking groove 20 on the wafer 10 can be removed.

[0038] Therefore, the embodiment of the present invention performs a second edge washing operation on the edge of the wafer 10 after depositing the contaminated metal layer 13 and the second hard mask layer 14, and the radial distance of the second edge region 40 is at least greater than the radial depth of the marking groove 20 at the edge of the wafer 10, so that the pits on the substrate 11 can be removed, thereby preventing the exposure and diffusion of the contaminated metal in the subsequent process.

[0039] Combination Figure 6 As shown, the radial distance of the second edge region 40 is set to D1, and D1 satisfies the relationship: 2 mm < D1 < 3 mm.

[0040] According to some embodiments of the present invention, the radial distance of the second edge region 40 is greater than 2 mm.

[0041] Furthermore, the radial distance of the second edge region 40 cannot be too small. If the radial distance of the second edge region 40 is set too small, when the liquid medicine spray gun 100 passes through the marking groove 20, the liquid medicine will be splashed into the marking groove 20, and a pit will be formed at the position of the wafer 10 near the marking groove 20, thereby causing the risk of contaminated metal exposure in the subsequent process of the wafer 10. In this way, the radial distance of the second edge region 40 needs to be set to be greater than the first parameter value. The first parameter value includes but is not limited to 1.9 mm, 2.0 mm and 2.1 mm.

[0042] According to some other embodiments of the present invention, the radial distance of the second edge region 40 is less than 3 mm.

[0043] Furthermore, the radial distance of the second edge region 40 cannot be too large. If the radial distance of the second edge region 40 is set too large, the area of ​​the second hard mask layer 14 on the substrate 11 will be reduced, which may affect the integrity of the pattern transfer and reduce the product yield of the wafer 10. In this way, the radial distance of the second edge region 40 needs to be set to be less than the second parameter value. The second parameter value includes but is not limited to 2.9 mm, 3.0 mm and 3.1 mm.

[0044] According to some further embodiments of the present invention, the radial distance of the second edge area 40 is set to be greater than 2mm and less than 3mm. By so setting, the radial distance of the second edge area 40 can exceed the radial depth of the marking groove 20 by 1mm to 2mm. This can not only prevent pits from appearing at the edge of the wafer 10 near the marking groove 20, but also avoid contamination of the wafer 10 in subsequent processes and machines, but also ensure the integrity of the pattern transfer and the product yield of the wafer 10.

[0045] Combination Figure 5 and Fig.12 As shown, after the step of removing the contaminated metal layer 13 and the remaining second hard mask layer 14 in the second edge area 40 of the wafer 10 so that the thickness of the processed wafer 10 adjacent to the center portion is greater than the thickness of the wafer 10 adjacent to the edge portion: the upper surface of the substrate 11 includes a first portion 112, a second portion 113 and a third portion 114, the first portion 112 corresponds to the second edge area 40, the second portion 113 is higher than the first portion 112, and the third portion 114 is connected between the first portion 112 and the second portion 113.

[0046] Specifically, in an embodiment of the present invention, the wafer 10 is subjected to a secondary etching after the second edge washing operation. During the secondary etching operation, the contaminated metal layer 13 and the remaining second hard mask layer 14 in the second edge region 40 of the wafer 10 are removed. The thickness of the processed wafer 10 adjacent to the center is greater than the thickness of the wafer 10 adjacent to the edge. At this time, the upper surface of the substrate 11 includes a first part 112, a second part 113 and a third part 114.

[0047] Among them, the second part 113 is higher than the first part 112, and the first part 112 corresponds to the second edge area 40, and the third part 114 is connected between the first part 112 and the second part 113, so that the contaminated metal layer 13 in the second pit 111 in the second edge area 40 can be completely etched to prevent the contaminated metal from causing contamination in subsequent processes and machines.

[0048] According to some embodiments of the present invention, a first edge cleaning operation is performed on a first edge region 30 of a wafer 10, wherein the step of the wafer 10 including a substrate 11 and a first hard mask layer 12 disposed on the substrate 11 further includes: The first edge cleaning operation removes at least a portion of the first hard mask layer 12 in the first edge region 30 of the wafer 10 .

[0049] Specifically, the first edge cleaning operation is the edge cleaning process of the first anti-reflection layer 124 in the first hard mask layer 12. During the first edge cleaning operation, at least the first anti-reflection layer 124 on the first hard mask layer 12 in the first edge region 30 is washed away. After the first edge cleaning operation, the wafer 10 is etched once, and the etching operation stops at the substrate 11. Because the first anti-reflection layer 124 in the first edge region 30 has been removed, the etching rate in the first edge region 30 is faster than the etching rate outside the first edge region 30 in the etching operation, so that the first hard mask layer 12 in the first edge region 30 can be ensured to be completely etched.

[0050] In the embodiment of the present invention, the material of the substrate 11 includes but is not limited to any one of silicon, tungsten, titanium, tantalum, ruthenium, silicon nitride, titanium nitride and tetraethyl orthosilicate.

[0051] According to some embodiments of the present invention, Figure 1 As shown, the radial distance of the first edge region 30 is at least less than the radial depth of the mark groove 20 at the edge of the wafer 10, and the first edge washing operation is performed on the first edge region 30 of the wafer 10, and the first edge washing operation at least removes the first hard mask layer 12 in the first edge region 30 of the wafer 10, wherein the step of the wafer 10 including the substrate 11 and the first hard mask layer 12 disposed on the substrate 11 also includes: The first hard mask layer 12 forms a first pit 121 at the junction of the corresponding mark groove 20 and the first edge region 30 . The first pit 121 is located on a side of the first hard mask layer 12 facing away from the substrate 11 .

[0052] Specifically, in some embodiments of the present invention, when the first edge washing operation is performed on the first edge region 30, the radial distance that the chemical liquid infiltrates along the edge of the wafer 10 toward the center can be at least less than the radial depth of the marking groove 20. In this way, in the first edge washing operation, the chemical liquid can remove the first hard mask layer 12 in the first edge region 30. At this time, the chemical liquid may splash into the marking groove 20 and form a first pit 121 in the first hard mask layer 12 at the junction of the corresponding marking groove 20 and the first edge region 30.

[0053] In an embodiment of the present invention, Figure 2 and Figure 3 As shown, the step of removing the first hard mask layer 12 from the remaining area of ​​the wafer 10 includes: A second pit 111 is formed on the substrate 11 , wherein the first pit 121 and the second pit 111 correspond to each other in the up-down direction.

[0054] Specifically, after the first hard mask layer 12 forms a first pit 121 at the junction of the corresponding marking groove 20 and the first edge area 30, the first hard mask layer 12 in the remaining area of ​​the wafer 10 is continuously removed. Through the etching process, a second pit 111 is formed on the substrate 11 at a position corresponding to the upper and lower positions of the first pit 121. At this time, the upper surface of the substrate 11 is uneven.

[0055] In an embodiment of the present invention, Figure 2 and Figure 5 As shown, the distance from the first portion 112 to the bottom surface of the substrate 11 is at least less than or equal to the distance from the bottom surface of the second pit 111 to the bottom surface of the substrate 11. Specifically, the first portion 112 is the surface position of the second pit 111 formed on the substrate 11 after the wafer 10 has undergone a secondary etching operation corresponding to a first edge washing operation, so that the secondary etching can at least etch to the bottom surface of the second pit 111. With such a configuration, it can be ensured that the contaminated metal layer 13 in the second pit 111 is completely etched, so that there will be no metal residue on the upper surface of the substrate 11, thereby ensuring that the subsequent processes and machines for manufacturing the wafer 10 are not contaminated.

[0056] In an embodiment of the present invention, Figure 3 and Figure 4 As shown, the step of sequentially forming the contaminated metal layer 13 and the second hard mask layer 14 on the upper side of the substrate 11 further includes: The contaminated metal layer 13 is at least partially recessed toward the second recess 111 to form a third recess 131; The second hard mask layer 14 at least partially fills the third pit 131 .

[0057] Specifically, a contaminated metal layer 13 is deposited on the upper surface of the substrate 11 . The contaminated metal layer 13 is a necessary structure of the wafer 10 , and the contaminated metal is different from the metal included in the machine and the robot arm in the subsequent process of the processing method of the wafer 10 .

[0058] Because there is a second pit 111 on the upper surface of the substrate 11, after the contaminated metal layer 13 is deposited, the position of the contaminated metal layer 13 corresponding to the second pit 111 will be at least partially recessed into the second pit 111, thereby forming a third pit 131 on the contaminated metal layer 13. At this time, the upper surface of the wafer 10 is uneven.

[0059] Furthermore, the second hard mask layer 14 is continuously disposed on the upper surface of the contaminated metal layer 13 , and no pit is formed on the upper surface of the second hard mask layer, and the second hard mask layer 14 at least partially fills the third pit 131 .

[0060] In an embodiment of the present invention, Figure 4 and Figure 6As shown, the second edge cleaning operation is performed on the second edge region 40 of the wafer 10, and the second edge cleaning operation at least removes at least a portion of the second hard mask layer 14 in the second edge region 40, wherein the radial distance of the second edge region 40 is at least greater than the radial depth of the mark groove 20 at the edge of the wafer 10. The steps include: The second edge washing operation removes the second anti-reflective layer 143 of the second hard mask layer 14 in the second edge area 40, wherein the second hard mask layer 14 includes a second spin-on carbon layer 141, a second low-temperature oxide layer 142 and a second anti-reflective layer 143, the contaminated metal layer 13 is arranged on the upper side of the substrate 11, the second spin-on carbon layer 141 is arranged on the upper side of the contaminated metal layer 13, the second low-temperature oxide layer 142 is arranged on the upper side of the second spin-on carbon layer 141, and the second anti-reflective layer 143 is arranged on the upper side of the second low-temperature oxide layer 142.

[0061] Before the second edge cleaning operation, a photoresist 15 is selectively deposited on the second anti-reflection layer 143 .

[0062] Specifically, the second edge cleaning operation removes the second anti-reflection layer 143 and the photoresist 15 in the portion of the second hard mask layer 14 corresponding to the second pit 111 of the substrate 11 in the up-down direction. After the second edge cleaning operation, the structure of the portion of the second hard mask layer 14 corresponding to the second pit 111 of the substrate 11 in the up-down direction includes the second low-temperature oxide layer 142, the second spin-on carbon layer 141 and the contaminated metal layer 13, the structure of the region of the second hard mask layer 14 in the up-down direction away from the second pit 111 of the substrate 11 and toward the center direction of the wafer 10 includes the second anti-reflection layer 143, the second low-temperature oxide layer 142, the second spin-on carbon layer 141 and the contaminated metal layer 13, and the second pit 111 on the substrate 11 includes at least the contaminated metal layer 13 and / or the second spin-on carbon layer 141.

[0063] In an embodiment of the present invention, Figure 4 As shown, the size of the portion of the wafer 10 in the second edge area 40 after the second edge washing operation in the up-down direction is smaller than the size of the portion of the wafer 10 away from the second edge area 40 and toward the center area of ​​the wafer 10 after the second edge washing operation. Thus, during the etching process after the second edge washing operation, the etching rate in the second edge area 40 will be greater than the etching rate outside the second edge area 40.

[0064] In this way, the wafer 10 of the embodiment of the present invention is subjected to a second etching after the second edge washing operation, so that the contaminated metal layer 13 and / or the second spin-coated carbon layer 141 in the second pit 111 can be completely etched, and the upper surface of the first part 112 is made flush with the bottom of the second pit 111. Therefore, the processing method of the wafer 10 of the embodiment of the present invention can ensure that after the etching operation of the wafer 10, there is no contaminated metal residue on the substrate 11, and there are no pits on the upper surface of the substrate 11.

[0065] According to other embodiments of the present invention, Figure 7 and Fig.13 , after the step of performing the first edge cleaning operation on the edge of the wafer 10, the method further includes: The radial distance of the first edge area 30 is greater than the radial depth of the marking groove 20 at the edge of the wafer 10. The radial distance of the first edge area 30 is set to D2, and the radial distance of the second edge area 40 is set to D1. D1 and D2 satisfy the relationship: D1≥D2.

[0066] Specifically, in an embodiment of the present invention, the radial distance of the first edge area 30 during the first edge washing operation is set not to exceed the second edge area 40 in the second edge washing operation. In this way, the radial distance of the first edge area 30 during the first edge washing operation can be increased. In this way, during the first edge washing operation, the range of the liquid infiltration from the edge of the wafer 10 to the center of the wafer 10 can exceed the radial depth of the mark groove 20, which can prevent the liquid from splashing into the mark groove 20 during the first edge washing operation. In this way, the first hard mask layer 12 can be prevented from forming a first pit 121 at the junction of the corresponding mark groove 20 and the first edge area 30, thereby avoiding leaving a second pit 111 on the substrate 11 after an etching operation. In this way, it can be avoided that contaminated metal is left on the upper surface of the wafer 10 that is finally formed, thereby avoiding contamination of the machine in the subsequent process of the wafer 10, or the phenomenon of metal film falling off.

[0067] In an embodiment of the present invention, Figure 8 and Fig.13 As shown, D1 and D2 satisfy the relationship: 2.5mm≤D1≤3mm, 2mm≤D2≤2.5mm.

[0068] According to some embodiments of the present invention, the radial distance of the second edge region 40 is not less than 2.5 mm.

[0069] Furthermore, the radial distance of the second edge region 40 cannot be too small. If the radial distance of the second edge region 40 is set too small, when the liquid medicine spray gun 100 passes through the marking groove 20, the liquid medicine will be splashed into the marking groove 20, and the second edge region 40 will form a pit at the junction of the corresponding marking groove 20 and the second edge region 40, which will easily cause contaminated metal residues on the wafer 10, and the wafer 10 will be at risk of contaminated metal exposure in subsequent processes. In this way, the radial distance of the second edge region 40 needs to be set to be not less than the fifth parameter value. Among them, the fifth parameter value includes but is not limited to 2.4mm, 2.5mm and 2.6mm.

[0070] According to some other embodiments of the present invention, the radial distance of the second edge region 40 is not more than 3 mm.

[0071] Furthermore, the radial distance of the second edge region 40 cannot be too large. If the radial distance of the second edge region 40 is set too large, the area of ​​the second hard mask layer 14 on the substrate 11 will be reduced, which may cause incomplete pattern transfer and reduce the product yield of the wafer 10. In this way, the radial distance of the second edge region 40 needs to be set to be less than the sixth parameter value. The sixth parameter value includes but is not limited to 2.9 mm, 3.0 mm and 3.1 mm.

[0072] According to some further embodiments of the present invention, the radial distance of the second edge area 40 is set to be no less than 2.5 mm and no more than 3 mm. With such a setting, the radial distance of the second edge area 40 can exceed the radial depth of the marking groove 20 by 1 mm to 2 mm, which can not only prevent pits from appearing on the edge of the wafer 10 and avoid contamination in subsequent processes and machines during the manufacture of the wafer 10, but also ensure the integrity of the pattern transfer and the product yield of the wafer 10.

[0073] According to some embodiments of the present invention, the radial distance of the first edge region 30 is not less than 2 mm.

[0074] Furthermore, the radial distance of the first edge region 30 cannot be too small. If the radial distance of the first edge region 30 is set too small, when the liquid medicine spray gun 100 passes through the marking groove 20, the liquid medicine will be splashed into the marking groove 20, and the first edge region 30 will form a first pit 121 at the junction of the corresponding marking groove 20 and the first edge region 30, and then the substrate 11 will have a second pit 111 before the second edge washing operation, which is likely to cause contaminated metal residues on the wafer 10. In this way, the radial distance of the first edge region 30 needs to be set to be not less than the third parameter value. The third parameter value includes but is not limited to 1.9mm, 2.0mm and 2.1mm.

[0075] According to some other embodiments of the present invention, the radial distance of the first edge region 30 is not more than 2.5 mm.

[0076] Furthermore, the radial distance of the first edge region 30 cannot be too large. If the radial distance of the first edge region 30 is set too large, the area of ​​the first hard mask layer 12 on the substrate 11 will be reduced, which may cause incomplete pattern transfer and reduce the product yield of the wafer 10. In this way, the radial distance of the first edge region 30 needs to be set to be less than the fourth parameter value. The fourth parameter value includes but is not limited to 2.4 mm, 2.5 mm and 2.6 mm.

[0077] According to some further embodiments of the present invention, the radial distance of the first edge region 30 is set to be no less than 2 mm and no more than 2.5 mm. This setting can not only prevent pits from appearing on the edge of the wafer 10 and avoid contamination of contaminated metal in subsequent processes and machines, but also ensure the integrity of the pattern transfer and the product yield of the wafer 10.

[0078] In an embodiment of the present invention, Figure 7 and Figure 8 As shown, a first edge cleaning operation is performed on the first edge region 30 of the wafer 10, and the first edge cleaning operation at least removes the first hard mask layer 12 in the first edge region 30 of the wafer 10, wherein the step of the wafer 10 including the substrate 11 and the first hard mask layer 12 disposed on the substrate 11 further includes: The first edge washing operation removes portions of the first spin-coated carbon layer 122 and the first anti-reflective layer 124 in the first hard mask layer 12 corresponding to the first edge area 30, wherein the first hard mask layer 12 includes a first spin-coated carbon layer 122, a first low-temperature oxide layer 123 and a first anti-reflective layer 124, the first spin-coated carbon layer 122 is arranged on the upper side of the substrate 11, the first low-temperature oxide layer 123 is arranged on the upper side of the first spin-coated carbon layer 122, and the first anti-reflective layer 124 is arranged on the upper side of the first low-temperature oxide layer 123.

[0079] Before the first edge cleaning operation, a photoresist 15 is selectively deposited on the first anti-reflection layer 124 .

[0080] Specifically, when the radial distance of the first edge region 30 is greater than the radial depth of the marking groove 20 at the edge of the wafer 10, the first edge washing operation can be used to remove the first edge region 30 corresponding to the first spin-coated carbon layer 122 and the first anti-reflection layer 124 in the first hard mask layer 12, wherein the wafer 10 includes a substrate 11 and a first hard mask layer 12, the first hard mask layer 12 is arranged on the substrate 11, the first hard mask layer 12 includes a first spin-coated carbon layer 122, a first low-temperature oxide layer 123 and a first anti-reflection layer 124, the first low-temperature oxide layer 123 is arranged on the upper side of the first spin-coated carbon layer 122, and the first anti-reflection layer 124 is arranged on the upper side of the first low-temperature oxide layer 123.

[0081] Such a configuration can reduce the depth of etching required in the up and down directions of the first edge region 30 of the wafer 10, and thus increase the etching amount of the first edge region 30 of the wafer 10 in one etching process, so that the thickness of the processed wafer 10 near the center is greater than the thickness of the wafer 10 near the edge. This can prevent the retention of contaminated metal caused by pits on the upper surface of the first edge region 30 of the wafer 10, thereby reducing the risk of metal film falling off or metal contamination of the machine in the subsequent process of wafer 10.

[0082] In an embodiment of the present invention, Fig. 9 and Fig.10 As shown, the step of removing the first hard mask layer 12 from the remaining area of ​​the wafer 10 includes: The upper surface of the substrate 11 includes a fourth portion 115 , a fifth portion 116 and a sixth portion 117 . The fourth portion 115 corresponds to the first edge region 30 . The fifth portion 116 is higher than the fourth portion 115 . The sixth portion 117 is connected between the fourth portion 115 and the fifth portion 116 .

[0083] Specifically, in the embodiment of the present invention, after the first edge cleaning operation, the wafer 10 is etched once to transfer the pattern to the substrate 11. After the first etching, the upper surface of the substrate 11 is composed of the fourth portion 115, the fifth portion 116 and the sixth portion 117, wherein the height of the fifth portion 116 in the vertical direction is higher than the height of the fourth portion 115 in the vertical direction, and the sixth portion 117 is connected between the fifth portion 116 and the fourth portion 115, so that pits can be avoided in the first edge region 30, and contaminated metals in subsequent processes can be prevented from staying on the upper surface of the substrate 11.

[0084] According to an embodiment of the present invention, the wafer 10 is suitable for a processing method of the wafer 10. In the present invention, by changing the radial distance of the edge washing of the wafer 10 to exceed the radial depth of the mark groove 20 on the wafer 10, part of the hard mask layer in the edge washing area can be removed before the etching operation, so that the contaminated metal layer 13 on the substrate 11 can be completely etched in the subsequent etching process, and after the secondary etching operation is completed, a layer of inorganic medium is deposited on the upper surface of the substrate 11, which can prevent the contaminated metal from causing contamination to the subsequent process and the machine. Among them, the inorganic medium includes but is not limited to silicon nitride and ethyl silicate.

[0085] According to the embodiment of the present invention, the thickness of the wafer 10 near the center portion is greater than the thickness of the wafer 10 near the edge portion. Furthermore, in the embodiment of the present invention, the thickness of the wafer 10 gradually increases in a direction radially extending from the edge of the wafer 10 toward the center of the wafer 10.

[0086] Specifically, the thickness of the wafer 10 gradually increases in the direction radially extending from the edge of the wafer 10 toward the center of the wafer 10, which is caused by the first edge washing operation and the second edge washing operation in the processing method of the wafer 10. Through the first edge washing operation and the second edge washing operation, the etching rate of the area adjacent to the edge of the wafer 10 can be accelerated, thereby increasing the etching amount of the substrate 11 in the area adjacent to the edge of the wafer 10, so as to reduce the thickness of the area adjacent to the edge of the wafer 10 in the up and down directions, and then the pits in the area adjacent to the edge of the wafer 10 can be completely etched, and the contaminated metal in the pits in the area adjacent to the edge of the wafer 10 can be completely etched, thereby effectively preventing the contaminated metal from being retained on the upper surface of the substrate 11 of the wafer 10, and avoiding the risks of metal contamination in the subsequent process of the wafer 10 and scratching the wafer 10 due to the problem of incomplete etching of the contaminated metal.

[0087] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "circumferential", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0088] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0089] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A wafer processing method, characterized in that: include: Performing a first edge cleaning operation on a first edge region (30) of the wafer (10), wherein the wafer (10) comprises a substrate (11) and a first hard mask layer (12) disposed on the substrate (11); removing the first hard mask layer (12) of the wafer (10); forming a contaminated metal layer (13) and a second hard mask layer (14) in sequence on the upper side of the substrate (11); Performing a second edge cleaning operation on a second edge region (40) of the wafer (10), wherein the second edge cleaning operation removes at least a portion of the second hard mask layer (14) in the second edge region (40), wherein a radial distance of the second edge region (40) is at least greater than a radial depth of a marking groove (20) at an edge of the wafer (10); The contaminated metal layer (13) and the remaining second hard mask layer (14) in the second edge region (40) of the wafer (10) are removed so that the thickness of the wafer (10) adjacent to the center after processing is greater than the thickness of the wafer (10) adjacent to the edge.

2. The wafer processing method according to claim 1, characterized in that: The radial distance of the second edge area (40) is set to D1, and D1 satisfies the relationship: 2mm<D1<3mm.

3. The wafer processing method according to claim 1, characterized in that: After the step of removing the contaminated metal layer (13) and the remaining second hard mask layer (14) in the second edge region (40) of the wafer (10) so that the thickness of the wafer (10) adjacent to the center portion after processing is greater than the thickness of the wafer (10) adjacent to the edge portion: The upper surface of the substrate (11) comprises a first portion (112), a second portion (113) and a third portion (114), wherein the first portion (112) corresponds to the second edge region (40), the second portion (113) is higher than the first portion (112), and the third portion (114) is connected between the first portion (112) and the second portion (113).

4. The wafer processing method according to claim 1, characterized in that: The step of performing a first edge cleaning operation on a first edge region (30) of the wafer (10), wherein the wafer (10) comprises a substrate (11) and the first hard mask layer (12) disposed on the substrate (11), further comprises: The first edge cleaning operation removes at least a portion of the first hard mask layer (12) within a first edge region (30) of the wafer (10).

5. The wafer processing method according to any one of claims 1 to 4, characterized in that: The radial distance of the first edge region (30) is at least smaller than the radial depth of the marking groove (20) at the edge of the wafer (10); the first edge cleaning operation is performed on the first edge region (30) of the wafer (10); the first edge cleaning operation at least removes the first hard mask layer (12) in the first edge region (30) of the wafer (10); wherein the wafer (10) comprises a substrate (11) and the first hard mask layer (12) disposed on the substrate (11); and the step further comprises: The first hard mask layer (12) forms a first pit (121) at a junction corresponding to the marking groove (20) and the first edge region (30), and the first pit (121) is located on a side of the first hard mask layer (12) facing away from the substrate (11).

6. The wafer processing method according to claim 5, characterized in that: After the step of removing the first hard mask layer (12) from the remaining area of ​​the wafer (10), the method further comprises: A second pit (111) is formed on the substrate (11), wherein the first pit (121) and the second pit (111) correspond to each other in the up and down direction.

7. The wafer processing method according to claim 6, characterized in that: The distance from the first part (112) to the bottom surface of the substrate (11) is at least less than or equal to the distance from the bottom surface of the second pit (111) to the bottom surface of the substrate (11).

8. The wafer processing method according to claim 6, characterized in that: The step of sequentially forming a contaminated metal layer (13) and a second hard mask layer (14) on the upper side of the substrate (11) further comprises: The contaminated metal layer (13) is at least partially recessed into the second recess (111) to form a third recess (131); The second hard mask layer (14) at least partially fills the third pit (131).

9. The wafer processing method according to claim 5, characterized in that: The step of performing a second edge cleaning operation on the second edge region (40) of the wafer (10), wherein the second edge cleaning operation at least removes at least a portion of the second hard mask layer (14) in the second edge region (40), wherein the radial distance of the second edge region (40) is at least greater than the radial depth of the marking groove (20) at the edge of the wafer (10), comprises: The second edge washing operation removes the second anti-reflection layer (143) of the second hard mask layer (14) in the second edge region (40), wherein the second hard mask layer (14) comprises a second spin-on carbon layer (141), a second low-temperature oxide layer (142) and the second anti-reflection layer (143), the contaminated metal layer (13) is arranged on the upper side of the substrate (11), the second spin-on carbon layer (141) is arranged on the upper side of the contaminated metal layer (13), the second low-temperature oxide layer (142) is arranged on the upper side of the second spin-on carbon layer (141), and the second anti-reflection layer (143) is arranged on the upper side of the second low-temperature oxide layer (142).

10. The wafer processing method according to any one of claims 1 to 4, characterized in that: After the step of performing a first edge cleaning operation on the edge of the wafer (10), the method further comprises: The radial distance of the first edge region (30) is greater than the radial depth of the marking groove (20) at the edge of the wafer (10).

11. The wafer processing method according to claim 10, characterized in that: The radial distance of the first edge region (30) is set to D2, and the radial distance of the second edge region (40) is set to D1, and D1 and D2 satisfy the relationship: D1≥D2.

12. The wafer processing method according to claim 11, characterized in that: D1 and D2 satisfy the relationship: 2.5mm≤D1≤3mm, 2mm≤D2≤2.5mm.

13. The wafer processing method according to claim 10, characterized in that: The step of performing a first edge cleaning operation on the first edge region (30) of the wafer (10), wherein the first edge cleaning operation at least removes the first hard mask layer (12) in the first edge region (30) of the wafer (10), wherein the wafer (10) comprises a substrate (11) and the first hard mask layer (12) disposed on the substrate (11), further comprises: The first edge washing operation removes the first spin-on carbon layer (122) and the first anti-reflection layer (124) in the first hard mask layer (12) corresponding to the first edge region (30), wherein the first hard mask layer (12) comprises the first spin-on carbon layer (122), the first low-temperature oxide layer (123) and the first anti-reflection layer (124), the first spin-on carbon layer (122) is arranged on the upper side of the substrate (11), the first low-temperature oxide layer (123) is arranged on the upper side of the first spin-on carbon layer (122), and the first anti-reflection layer (124) is arranged on the upper side of the first low-temperature oxide layer (123).

14. The wafer processing method according to claim 10, characterized in that: After the step of removing the first hard mask layer (12) from the remaining area of ​​the wafer (10), the method further comprises: The upper surface of the substrate (11) comprises a fourth portion (115), a fifth portion (116) and a sixth portion (117), wherein the fourth portion (115) corresponds to the first edge region (30), the fifth portion (116) is higher than the fourth portion (115), and the sixth portion (117) is connected between the fourth portion (115) and the fifth portion (116).

15. A wafer (100), characterized in that: A method for processing a wafer (10) according to any one of claims 1 to 14.

16. A wafer, characterized in that: The thickness of the wafer (10) adjacent to the center portion is greater than the thickness of the wafer (10) adjacent to the edge portion.

17. The wafer according to claim 16, characterized in that In a direction extending radially from the edge of the wafer (10) toward the center of the wafer (10), the thickness of the wafer (10) gradually increases.

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