Adaptive transition time measurement in asymmetric half bridges

Abstract

An adaptive transition controller for a resonant converter system, the adaptive transition controller comprising: a derivative circuit configured to receive a first signal indicative of a resonant current through an inductor in the resonant converter system and generate a derivative signal indicative of a derivative of the first signal; a peak detector circuit configured to generate a peak signal indicative of a peak of the derivative signal over a time period; an integrator circuit configured to integrate the peak signal to generate an extended signal; and a comparator circuit configured to generate an end transition signal when the spread signal exceeds a second signal indicative of a magnetization current in a magnetization inductance of a transformer in the resonant converter system.

Description

Technical Field

[0001] Various exemplary embodiments disclosed herein relate to adaptive transition time measurement in an asymmetric half-bridge. Background Art

[0002] The USB-C connector standard will be mandatory for charging mobile phones and laptops in the future. The current of the USB-C connector is limited to 5A. In order to obtain higher power, the output voltage is increased to a higher voltage. In the latest standard, the output voltage can be as high as 48V, while the system must still support 5V. In order to support a wide output voltage range, an asymmetric half-bridge converter can be used. Summary of the invention

[0003] A summary of various exemplary embodiments is presented below.

[0004] Various embodiments are directed to an adaptive transition controller for a resonant converter system, the adaptive transition controller comprising: a derivative circuit configured to receive a first signal indicating a resonant current through an inductor in the resonant converter system and generate a derivative signal indicating a derivative of the first signal; a peak detector circuit configured to generate a peak signal indicating a peak value of the derivative signal within a time period; an integrator circuit configured to integrate the peak signal to generate an extended signal; and a comparator circuit configured to generate an end transition signal when the extended signal exceeds a second signal indicating a magnetizing current in a magnetizing inductance of a transformer in the resonant converter system.

[0005] Various embodiments are described, additionally comprising an extension filter connected to the derivative circuit, wherein the extension filter is configured to filter the first signal.

[0006] Various embodiments are described, additionally comprising a signal filter connected to the integration circuit via a first switch, wherein the signal filter is configured to filter the first signal.

[0007] Various embodiments are described wherein the extension filter is a higher order filter than the signal filter.

[0008] Various embodiments are described wherein the integration circuit is configured to begin integrating the peak signal at an extended start time, and the first switch is configured to close at the start of an operation cycle and to open at the extended start time.

[0009] Various embodiments wherein the extended start time is based on a previous transition time during a previous operating cycle of the resonant converter system.

[0010] Various embodiments are described in which the extended start time is based on filtered previous transition times during previous operating cycles of the resonant converter system.

[0011] Various embodiments are described wherein the first switch is connected to a capacitor in the integrator circuit.

[0012] Various embodiments are described in which a capacitor in an integrator circuit holds a voltage based on a first signal when a first switch is closed and holds a voltage based on the first signal plus an integrated derivative signal when the first switch is open.

[0013] Various embodiments are described that further include a derivative filter connected to the derivative circuit, the derivative filter configured to filter the derivative signal; and a derivative comparator configured to generate a derivative greater than zero signal when the derivative signal exceeds zero during a secondary stroke of an operating cycle of the resonant converter system.

[0014] Various embodiments are described in which the integration circuit is configured to begin integrating the peak signal at an extended start time if a derivative greater than zero signal indicates that the derivative signal exceeds zero.

[0015] Various embodiments are described in which the peak detector circuit comprises a reset circuit configured to reset the peak detector circuit.

[0016] Various embodiments are described in which the reset circuit is configured to release the peak detector circuit after the derivative signal reaches a minimum value.

[0017] Various additional embodiments relate to an adaptive transition controller for a resonant converter system, the adaptive transition controller comprising: a subtractor circuit configured to generate a difference signal, the difference signal being a difference between a first signal indicating a current through an inductor in the resonant converter system and a second signal indicating a magnetizing current through a transformer in the resonant converter system; a derivative circuit configured to receive the difference signal and generate a derivative signal indicating a derivative of the difference signal; a peak detector circuit configured to generate a peak signal indicating a peak value of the derivative signal within a time period; an integrator circuit configured to integrate the peak signal to generate an extended signal; and a comparator circuit configured to generate an end transition signal when the extended signal exceeds zero.

[0018] Various embodiments are described wherein an integrating circuit comprises a first switch controlled by a gate high side control signal, wherein the gate high side signal controls a gate of a gate high side transistor in a resonant converter system, and wherein the first switch is configured to close at the beginning of an operation cycle and to open during an operation cycle of the resonant converter system.

[0019] Various embodiments are described wherein the first switch is connected to a capacitor in the integrator circuit.

[0020] Various embodiments are described wherein the peak detector circuit comprises a second switch configured to reset the peak detector circuit.

[0021] Various embodiments are described wherein the second switch is configured to release the peak detector circuit after the derivative signal reaches a minimum value.

[0022] Further various embodiments are directed to a method for controlling an adaptive transition time of a resonant converter system, the method comprising: generating a derivative signal, the derivative signal being a derivative of a received first signal indicative of a resonant current through an inductor in the resonant converter system; generating a peak derivative signal indicative of a peak value of the derivative signal over a time period; integrating the peak derivative signal to generate an extended signal; and comparing the extended signal with a second signal indicative of a magnetizing current through a magnetizing inductance of a transformer in the resonant converter system to generate an end transition signal when the extended signal exceeds the second signal.

[0023] Various embodiments are described, further comprising: filtering a first signal through a first filter before generating a derivative signal; and filtering the first signal through a second filter, wherein integrating the peak derivative signal is based on an output of the second filter, wherein the first filter is a higher order filter than the second filter.

[0024] The foregoing has been summarized in a fairly general way according to the features and technical advantages of the examples disclosed herein so that the following specific embodiments can be better understood. Additional features and advantages will be described below. The disclosed concepts and specific examples can be easily used as the basis for modifying or designing other structures for the same purpose of implementing the present disclosure. Such equivalent constructions do not deviate from the scope of the appended claims. When considered in conjunction with the accompanying drawings, the characteristics of the concepts disclosed herein (both their organization and method of operation) together with the associated advantages will be better understood from the following description. Each of the figures is provided for the purpose of illustration and description and is not intended to limit the limits of the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order that the above-mentioned features of the present disclosure may be understood in detail, a more specific description briefly summarized above may be made by reference to various aspects, some of which are shown in the accompanying drawings. However, it should be noted that the accompanying drawings only show certain typical aspects of the present disclosure and therefore should not be considered to limit the scope of the present disclosure, as the specification may allow for other equally effective aspects. The same reference numerals in different figures may identify the same or similar elements.

[0026] Figure 1A and 1B Two different embodiments of an asymmetrical half-bridge converter are shown.

[0027] Figure 2A Curves showing magnetizing current and resonant current.

[0028] Figure 2B shows the output current.

[0029] Figure 3 The states of the GateHS and GateLS control signals with respect to the magnetizing current and the resonant current are shown.

[0030] Figure 4 A half-bridge converter according to an embodiment is shown.

[0031] Figure 5 The curves of VILm and VILr within a cycle of a half-bridge converter are shown.

[0032] Figure 6 The curves of VILm and VILr within a cycle of a half-bridge converter are shown in the case of ringing.

[0033] Figure 7 An embodiment of an adaptive transition controller is shown.

[0034] Figures 8A-8E Plots showing various signals in an adaptive transition controller.

[0035] Figure 8B The graphs of the signals diff and diff_ext are shown.

[0036] Figure 8C Plots of the der and der_peak signals are shown.

[0037] Fig.8D A curve of the signal neg_not_seen is shown.

[0038] Fig. 8E A curve of the end_trans signal is shown.

[0039] Fig. 9 An adaptive transition controller according to an embodiment is shown.

[0040] Figures 10A-10G Plots showing various signals in an adaptive transition controller.

[0041] Fig. 10B The curves of the signals der and der_max VILr_ext are shown.

[0042] Fig. 10C A curve of the rst_snscur_der signal is shown.

[0043] Fig. 10D A curve of the signal der_gt_zero is shown.

[0044] Fig.10E The curve of the t_trans_gt_75% signal is shown.

[0045] Fig.10F A curve of the timing_snscur_org signal is shown.

[0046] Figure 10G A curve of the end_trans signal is shown.

[0047] Fig.11 An example of a transmission time filter is shown. DETAILED DESCRIPTION

[0048] The various aspects of the present disclosure are described more fully below with reference to the accompanying drawings. However, the present disclosure can be embodied in many different forms and should not be construed as being limited to any specific structure or function presented throughout the present disclosure. In fact, these aspects are provided so that the present disclosure will be thorough and complete, and the scope of the present disclosure will be fully conveyed to those skilled in the art. Based on the teachings herein, those skilled in the art should understand that the scope of the present disclosure is intended to cover any aspect of the disclosure disclosed herein, whether implemented independently of any other aspect of the present disclosure or implemented in combination with it. For example, any number of aspects set forth herein can be used to implement a device or practice method. In addition, the scope of the present disclosure is intended to cover this device or method practiced using other structures, functionality, or structure and functionality other than the various aspects of the present disclosure set forth herein or different from the various aspects of the present disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein can be embodied by one or more elements of the claims.

[0049] Several aspects of a half-bridge converter system will now be presented with reference to various devices and techniques. These devices and techniques will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, algorithms, etc. (collectively referred to as "elements"). These elements may be implemented using hardware, software, or a combination thereof. Whether such elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.

[0050] The USB-C connector standard will be mandatory for charging mobile phones and laptops in the future. The current of the USB-C connector is limited to 5A. In order to obtain higher power, the output voltage is increased to a higher voltage. In the latest standard, the output voltage can be as high as 48V, while the system must still support 5V. In order to support a wide output voltage range, an asymmetric half-bridge converter can be used.

[0051] Figure 1A and 1BTwo different embodiments of an asymmetric half-bridge converter are shown. The half-bridge converter 100 includes a high-side transistor 102, a low-side transistor 104, a capacitor Chb 106, a resonant inductor Lr 108, a magnetic inductor Lm 110, a capacitor Cr112, a diode 114, an output capacitor 116, and a load 118. The half-bridge converter 100 receives inputs GateHS, GateLS, and an output HB. It should be noted that Chb 106 need not be a separate physical capacitor, but this capacitance can be provided by the high-side transistor 102 or the low-side transistor 104. In addition, the inductor Lr 108 and the magnetic inductor Lm 110 can also be a single component, or can be the result of the leakage inductance from Lm. GateHS and GateLS are gate control signals that control the gates of the high-side transistor 102 and the low-side transistor 104, respectively. HB is the output voltage. The input signal is controlled to produce the desired output voltage. Figure 1A and 1B The difference between is the arrangement of the high side transistor 102 , the low side transistor 104 and the output HB to the rest of the circuit. Other configurations of the half bridge converter 100 also exist.

[0052] The half-bridge converter 100 has two main phases. In the first phase, the high-side transistor 102 is turned on and the low-side transistor 104 is turned off to charge the capacitor Cr 112. In the second phase, the high-side transistor 102 is turned off and the low-side transistor 104 is closed, so that the voltage on the capacitor Cr 112 is applied to the magnetic inductor Lm 110 to generate an output voltage applied to the load 118. Figure 1A and 1B Both configurations can be used with the embodiments described herein, but in the following description, the Figure 1A It should be clear that the described embodiment can also be used for GateLS by changing some polarities and swapping the drive of GateHS to GateLS and vice versa. Figure 1B Configuration in .

[0053] Figure 2A 202 shows the magnetizing current and the resonant current. The magnetizing current curve 202 shows the current through the magnetic inductor Lm of the transformer 110. The resonant current curve 204 shows the current through the resonant inductor Lr 108. Figure 2A As shown, the current through the resonant inductor Lr 108 is different from the current through the magnetic inductor Lr of the transformer 110 during the secondary stroke. Figure 2BThe output current is shown. The difference between the resonant current and the magnetizing current multiplied by the transformation ratio of the transformer 110 is the output current of the half-bridge converter 100. The current that can be measured is the resonant current, but the magnetizing current cannot be measured directly. It is desirable to determine when the magnetizing current and the resonant current are the same again (see 206) in order to control the half-bridge converter 100 in an optimal manner.

[0054] Figure 3 The states of the GateHS and GateLS control signals with respect to the magnetizing current and the resonant current are shown. When the GateHS control signal 208 is high and the GateLS signal 210 is low, the magnetizing current and the resonant current are the same and increase linearly. Then, when GateLS is high and GateHS is low, the magnetizing current 202 decreases linearly, but the resonant current 204 decreases significantly, then reaches a minimum, and then begins to increase again.

[0055] It is desirable to cut off GateLS after the ringing of the resonant current ILr because the system has zero current switching (ZCS). During the secondary stroke, the ringing time of the resonant current ILr is This ringing time may have a large spread because the resonant inductor (Lr) is formed by using the leakage inductance of the transformer. Currently, a predefined value is used to cut off GateLS. However, the use of a predefined time does not take into account the tolerance of the leakage inductance, so this paper describes an adaptive mechanism.

[0056] To determine the magnetizing current through transformer 110 , the voltage across transformer 110 may be integrated to determine this current. Figure 4 A half-bridge converter according to an embodiment is shown. A current sensor 402 converts the resonant current into a voltage VILr. This can simply be a resistor. A measurement winding 404 is added to the transformer 110 to measure the voltage across the transformer 110 (note that Lr can be the leakage inductance of the transformer). An integrator 406 integrates the voltage across the transformer to produce a voltage VILm indicative of the magnetizing current. A comparator 408 takes the difference between VILr and VILm to produce Vdet, which can be a digital signal.

[0057] The resonant current Ilr can be directly measured using the current sensor 402 and translated into a voltage and referred to as VILr. The magnetizing current ILm can be obtained by integrating the voltage across the transformer 110. The reconstructed magnetizing current after integration is referred to as VILm. In theory, the end of the resonant current can be detected when VILr becomes equal to VILm, which is indicated by the output V of the difference comparator 408. detIn practice, this is not possible due to errors in the system. As described above, an adaptive mechanism can be used to determine when VILr becomes equal to VILm.

[0058] Figure 5 Graphs of VILm and VILr within a cycle of the half-bridge converter 100 are shown. Figure 5 , it can be seen that it is not possible to detect that VILm 502 and VILr 504 are equal because there is a small offset between VILm and VILr. Therefore, the output of the difference comparator 408 cannot be used to determine the end of the resonant period. For this reason, the positive derivative 506 can be used to expand the signal.

[0059] Figure 6 The curves of VILm and VILr within a cycle of the half-bridge converter 100 are shown in the case of ringing. The curve of VILm 602 is as previously shown. The curve of VILr 604 shows that the value never becomes equal to the value of VILm 602, and the value rings or oscillates over time. Although the value of VILm 602 increases after it reaches a minimum value, the derivative extension 606 can be determined, and the intersection of the derivative extension 606 and the curve VILm 602 indicates the time when the gateLS signal 210 should be cut off. By extending the derivative, the end of the resonance can be determined. This method can also be used during startup. In this case, there is no point where the measurements become equal.

[0060] When the current is positive, the gateLS signal 210 can be cut off because there is always a current path through the body diode of the low-side transistor 104, which is a MOSFET. Therefore, a method of determining when to cut off the gateLS signal 210 may include determining the positive derivative at the zero crossing of VILr and expanding the positive derivative to determine where it crosses the VILm signal. The crossing point indicates when the gateLS signal 210 should be cut off. This is also a better method when the ringing peak of VILr is far away from VILm.

[0061] When there is no diode in parallel with the low-side switch, it is not a problem to turn off the low-side switch when VILr has a zero crossing with a positive derivative. Then, VILr remains at zero until the end of the secondary stroke and all the energy is transferred to the secondary side. In some cases, this improves the behavior.

[0062] As described above, the VILr signal is extended at the moment when the end of resonance can be detected. Determining the VILr extension is easier to implement than detecting the derivative (ie, dvdt change) in the VILr signal, because the derivative is very sensitive to noise.

[0063] Figure 7An embodiment of an adaptive transition controller is shown. The adaptive transition controller 700 includes an adder 702 , a buffer 704 , a derivative circuit 708 , a peak detector 710 , an integrator circuit 712 , and an output comparator 724 .

[0064] Adder 702 or difference circuit takes the difference between input signal VILr and VILm and generates diff signal. Buffer 704 buffers diff signal. Buffered diff signal is input into derivative circuit 708, and described derivative circuit 708 generates der signal indicating the derivative of diff signal. Peak detector 710 receives der signal as input, and outputs peak value der_peak of der signal in a specific time period. Maintain peak output der_peak of peak detector 710 until peak detector 710 is reset for new cycle. der_peak signal is input into integrator circuit 712. Integrator circuit 712 integrates received der_peak value to expand diff value. Diff_ext value is input into output comparator 724 and compared with zero to generate end_trans signal. End_trans signal indicates that adaptive transition controller 700 cuts off low side transistor 104 by driving GateLS signal to low.

[0065] Figures 8A-8E Graphs showing various signals in the adaptive transition controller 700 . Fig. 8A Curves of signals VILm and VILr are shown. Figure 8B The graphs of the signals diff and diff_ext are shown. Figure 8C Plots of the der and der_peak signals are shown. Fig.8D A curve of the signal neg_not_seen is shown. Fig. 8E A curve of the end_trans signal is shown.

[0066] During the beginning of the operating cycle of the adaptive transition controller 700, VILm and VILr have the same linearly increasing value until the start of the secondary stroke 802. During this time, the diff, diff_ext, der, and der_peak signals are zero. The neg_seen_not signal is high. Also, the end_trans signal is low.

[0067] Once the secondary stroke begins at 802, the VILm signal begins to decrease linearly, and the VILr also decreases at a greater rate than the VILm signal. The diff, diff_ext, and der signals decrease. The end_trans signal maintains its value. At time 804, the VILr signal becomes negative, and at this time 804, the neg_seen_not signal goes low. When the neg_seen_not signal goes low, the switch is turned off, so that the capacitor C3 in the peak detector 710 can store the peak value of the der signal and allow the peak detector 710 to begin detecting the peak value of the der signal. Only when the der signal begins to increase after reaching a minimum value, the peak detector 710 begins to generate a peak value.

[0068] At time 806, the diff_ext signal becomes greater than zero, as indicated by the end_trans signal going high, thereby indicating that the GateLS signal should be switched off by going low. At this time 806, the GateLS signal is switched off.

[0069] Then, at time 808, the secondary stroke ends. At this point, signal neg_seen_not goes high to reset peak detector 710 back to zero, which closes switch S2 in peak detector 710. Other signals may be set to effectively reset adaptive transition controller 700, allowing the next cycle to begin.

[0070] In theory, the method described above for the adaptive transition controller 700 works, but when noise is added to the input signal, the circuit seems to be very sensitive to noise. The input to the derivative block should be filtered. The disadvantage of this is that it is desirable to filter the derivative signal, which is sensitive to noise, but it is also desirable to filter the signal itself, resulting in a large delay. A solution to this is to split the input signal using different filters and expansion circuits for signal generation. This circuit will now be described.

[0071] Fig. 9 An adaptive transition controller according to an embodiment is shown. The adaptive transition controller 900 includes a buffer 904, an expansion filter 906, a derivative circuit 908, a peak detector 910, an integrator circuit 912, a signal filter 914, a derivative filter 916, a derivative comparator 918, a resistor 920, a signal switch 922, and an output comparator 924.

[0072] The adaptive transition controller 900 receives an input signal VILr. The buffer 904 receives the input signal VILr, and the output of the buffer 904 is connected to an extension filter 906 and a signal filter 914. The signal filter 914 can be, for example, a first-order low-pass filter (LPF). The extension filter 906 can include a first-order LPF and a second-order LPF connected in series, thereby generating a third-order filter. Because the derivative circuit and the peak detector are very sensitive to noise, this high-order filter is used. In any case, the extension filter 906 is usually of a higher order than the signal filter 914.

[0073] The output of the signal filter 914 is connected to a resistor 920 and then to a signal switch 922. The signal switch 922 is controlled by a control signal timing_snscur_org. The output of the switch is fed into the integrator circuit 912.

[0074] The output of the extended filter 906 is fed into a derivative circuit 908. The derivative circuit can be implemented in various ways as known in the art. The output of the derivative circuit 908 is a signal der indicating the derivative of the filtered input signal VILr. The derivative signal der is fed into an optional derivative filter 916, and the filter output is fed into a derivative comparator 918. The derivative comparator 918 compares the filtered derivative signal der with zero to determine when the value of the derivative is above zero.

[0075] The peak detector 910 receives the der signal and generates a der_peak signal, which is the peak value of the der signal within a time period. The peak detector 910 includes a switch S2, which acts as part of a reset circuit that receives the rst_snscur_der signal, and the reset circuit periodically resets the peak detector according to the operation cycle of the adaptive transition controller 900. The der signal is accumulated on the capacitor C3 to generate and maintain the der_peak signal.

[0076] Integrator circuit 912 receives the der_peak signal and integrates it to generate VILr_ext.

[0077] Output comparator 924 receives and compares the VLIr_ext signal and the VILm signal. When VILr_ext exceeds the VILm signal, output comparator 924 drives the end_trans signal high. The end_trans signal instructs adaptive transition controller 900 to turn off low-side transistor 104 by driving GateLS signal low.

[0078] Figures 10A-10GPlots showing various signals in the adaptive transition controller 900. Various timing lines are shown to illustrate various time periods during the operation of the adaptive transition controller 900. Fig. 10A Graphs of the signals VILm and VILr and an extension of VILr, VILr_ext, are shown. Fig. 10B The curves of the signals der and der_max VILr_ext are shown. Fig. 10C A curve of the rst_snscur_der signal is shown. Fig. 10D A curve of the signal der_gt_zero is shown. Fig.10E The curve of the t_trans_gt_75% signal is shown. Fig.10F A curve of the timing_snscur_org signal is shown. Figure 10G A curve of the end_trans signal is shown.

[0079] During the start of the operating cycle of the adaptive transition controller 800, VILm and VILr have the same linearly increasing value until the start of the secondary stroke 1002. During this time, the der_peak signal is zero and the der signal has a fixed value based on the slope of the VILr signal. During this period, the rst_snscur_der signal is high and der_gt_zero is low. And the t_trans_gt_75% and end_trans signals are low. And the timing_snscur_org signal is high during this period.

[0080] Once the secondary stroke begins at 1002, the VILm signal begins to decrease linearly, and VILr also decreases at a greater rate than the VILm signal. The der signal decreases and reaches a minimum value. The other signals res_snscur_der, der_gt_zero, t_trans_gt_75%, timing_snscur_org, and end_trans maintain their values. At time 1004 (2 μs in this example, but other values ​​are possible), the rst_snscur_der signal goes low to allow the peak detector 910 to begin detecting the peak of the der signal. The der_peak signal is clamped to zero because the peak detector 910 begins to generate peaks only when the der signal increases above zero.

[0081] At time 1006 , the der signal becomes greater than zero, as indicated by the der_gt_zero signal going high, and the der_peak signal follows the der signal.

[0082] At time 1008, which is 75% of the filtered measured transition time, the signal t_trans_gt_75% goes high, indicating that time 1008 has been reached. At this same time 1008, the signal timing_snscur_org goes low. This opens the signal switch 922. When the signal switch 922 is closed, the input signal is placed on the capacitor C1 in the integrator circuit 912 to produce the output signal VILr_ext. Therefore, when the signal switch 922 is closed, the value VILr_ext tracks the value VILr. However, with the signal switch 922 open, the integrator circuit 912 integrates the der_peak signal from the peak detector 910 over the value of the VILr signal on the capacitor C1. Therefore, by integrating the peak derivative value der_peak, the value of VILr_ext is extended from the VILr value at time 1008. In addition, the der signal drops, but the der_peak value maintains the peak value of the der signal to generate the VILr_ext signal.

[0083] When VILr_ext crosses the VILm value at time 1010, the signal end_trans goes high, indicating that the GateLS signal should be turned off by going low. At this time 1010, the GateLS signal will be turned off.

[0084] Then, at time 1012, the secondary stroke ends. At this time, the signal rst_snscur_der goes high to reset the peak detector 910 back to zero. The t_trans_gt_75% signal goes low, and the timing_snscur_org goes high to close the signal switch 922. And the end_trans signal goes low. These signal changes effectively reset the adaptive transition controller 900 to allow the next cycle to begin.

[0085] In the adaptive transition controller 900, care must be taken when to turn on the extension. As long as timing_snscur_org is high, the integrator capacitor C1 is forced by the signal VILr. When timing_snscur_org is low, the signal VILr is disconnected, and the der_peak signal ensures that the signal VILr is extended to the signal VILIr_ext via integration. In one embodiment, the extension path is turned on (i.e., timing_snscur_org becomes low) when the derivative is greater than zero (i.e., when der_gt_zero is high) and the actual transition time is greater than 0.75 times the filtered transition time; and when the der_gt_zero signal remains low and the actual transition time is greater than the filtered transition time. The extension path remains active until the end of the secondary stroke. Other percentages of filtered or unfiltered transition times may also be used. In another embodiment, the extension path is turned on when the actual transition time is greater than the filtered transition time minus the offset time (e.g., 500ns).

[0086] In adaptive transition controller 900, VILr is used instead of the diff signal of adaptive transition controller 700. Adaptive transition controller 900 will also operate with the diff signal as input and make the negative input of the end_trans comparator zero.

[0087] The extended path is switched on using a filtered transition time (t_trans_filter) in the adaptive transition controller 900. This filter can simply be the measured transition time of the previous cycle, but can also be a normal filter or an asymmetric filter that is faster when the time increases than when it decreases. Fig.11 An example of this filter is shown in Fig.11 In this example, R1 and R2 can have the following resistance values:

[0088]

[0089]

[0090] where f c_h =10·10 13 And f c_l =1·10 13 , and at V f = 0 V, the diode is an ideal diode. This filter can also be implemented digitally.

[0091] Typically, the gate of low-side transistor 104 is switched off via GateLS signal when end_trans signal goes high during the secondary stroke.To make the system more insensitive to noise, the following two conditions will be true: end_trans signal is high; and the secondary time is greater than the filtered transition time.

[0092] Note that in the above description, a high logic state and a low logic state are described. Throughout the described embodiments, these states may be swapped to control the circuit.

[0093] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the aspects to the precise forms disclosed. Modifications and variations may be made in light of the above disclosure, or may be acquired from the practice of various aspects.

[0094] As used herein, the term "component" is intended to be broadly interpreted as hardware, firmware, and / or a combination of hardware and software. As used herein, a processor is implemented in hardware, firmware, and / or a combination of hardware and software.

[0095] As used herein, satisfying a threshold value may refer to a value being greater than a threshold value, greater than or equal to a threshold value, less than a threshold value, less than or equal to a threshold value, equal to a threshold value, not equal to a threshold value, and the like, depending on the context. It will be apparent that the systems and / or methods described herein may be implemented in various forms of hardware, firmware, and / or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods does not limit the various aspects. Thus, the operation and behavior of the systems and / or methods are described herein without reference to specific software code - it should be understood that software and hardware may be designed to implement the systems and / or methods based, at least in part, on the description herein.

[0096] As used herein, the term "non-transitory machine-readable storage medium" will be understood to exclude transitory propagating signals but include all forms of volatile and non-volatile memory. When software is implemented on a processor, the combination of software and processor becomes a specific special purpose machine.

[0097] Because the data processing to implement the embodiments described herein is largely comprised of electronic components and circuits known to those skilled in the art, in order to understand and appreciate the basic concepts of the aspects described herein and in order not to confuse or deviate from the teachings of the aspects described herein, the circuit details will not be explained to any greater extent than is deemed necessary as described above.

[0098] Unless otherwise stated, terms such as "first" and "second" are used to arbitrarily distinguish between the elements these terms describe. Therefore, these terms are not necessarily intended to indicate temporal or other prioritization of such elements.

[0099] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative hardware embodying the principles of the various aspects.

[0100] Although each of the embodiments is described above in terms of its structural arrangement, it should be understood that the aspects also encompass the associated methods of using the above-described embodiments.

[0101] Unless otherwise indicated, all numbers used in this specification and claims to express parameter values, etc. should be understood to be modified by the term "about" in all cases. Therefore, unless otherwise indicated, the numerical parameters set forth in this specification and the appended claims are approximate values, which may vary depending on the desired properties that the embodiments of the present disclosure attempt to obtain. As used herein, "about" may be understood by those of ordinary skill in the art and may vary to a certain extent depending on the context in which it is used. If there is a term use that is unclear to those of ordinary skill in the art, "about" may represent up to ±10% of the specific term, taking into account the context in which the term is used.

[0102] Although specific combinations of features are described in the claims and / or disclosed in this specification, these combinations are not intended to limit the disclosure of various aspects. In fact, many of these features can be combined in a manner that is not specifically described in the claims and / or disclosed in the specification. Although each of the listed dependent claims can be directly subordinate to only one claim, the disclosure of various aspects includes each dependent claim in combination with each other claim in the claim set. The phrase "at least one / kind" in the list of reference items refers to any combination of these items, including single members. As an example, "at least one of the following: a, b or c" is intended to cover a, b, c, ab, ac, bc and abc, as well as any combination with multiples of the same element (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc and ccc, or any other ordering of a, b and c).

[0103] Unless so clearly described, the elements, actions or instructions used herein should not be interpreted as critical or necessary. And, as used herein, the article "one" is intended to include one or more items and can be used interchangeably with "one or more". In addition, as used herein, the terms "set" and "group" are intended to include one or more items (e.g., related items, unrelated items, combinations of related items and unrelated items, etc.), and can be used interchangeably with "one or more". In the case of only one item, the phrase "only one" or similar language is used. And, as used herein, the term "having" or similar terms are intended to be open terms. In addition, unless otherwise explicitly stated, the phrase "based on" is intended to mean "based at least in part on".

Claims

1. An adaptive transition controller for a resonant converter system, characterized in that: include: a derivative circuit configured to receive a first signal indicative of a resonant current through an inductor in the resonant converter system and generate a derivative signal indicative of a derivative of the first signal; a peak detector circuit configured to generate a peak signal indicative of a peak value of the derivative signal over a time period; an integrator circuit configured to integrate the peak signal to generate an extended signal; as well as A comparator circuit is configured to generate an end transition signal when the extended signal exceeds a second signal indicative of a magnetizing current in a magnetizing inductance of a transformer in the resonant converter system.

2. The adaptive transition controller according to claim 1, characterized in that: Additionally included is an extension filter connected to the derivative circuit, wherein the extension filter is configured to filter the first signal.

3. The adaptive transition controller according to claim 2, characterized in that: Additionally included is a signal filter connected to the integration circuit via a first switch, wherein the signal filter is configured to filter the first signal.

4. The adaptive transition controller according to claim 3, characterized in that: The extension filter is a higher order filter than the signal filter.

5. The adaptive transition controller according to claim 3, characterized in that The integration circuit is configured to start integrating the peak signal at the extension start time, and The first switch is configured to close at the start of an operation cycle and to open at the extended start time.

6. The adaptive transition controller according to claim 5, characterized in that: The extended start time is based on a previous transition time or a filtered previous transition time during a previous operating cycle of the resonant converter system.

7. The adaptive transition controller according to claim 5, characterized in that: The first switch is connected to a capacitor in the integrator circuit.

8. The adaptive transition controller according to claim 1, characterized in that: Also includes a derivative filter connected to the derivative circuit, the derivative filter being configured to filter the derivative signal; as well as A derivative comparator is configured to generate a derivative greater than zero signal when the derivative signal exceeds zero during a secondary stroke of an operating cycle of the resonant converter system.

9. An adaptive transition controller for a resonant converter system, characterized in that: include: a subtractor circuit configured to generate a difference signal that is a difference between a first signal indicative of a current through an inductor in the resonant converter system and a second signal indicative of a magnetizing current through a transformer in the resonant converter system; a derivative circuit configured to receive the difference signal and generate a derivative signal indicative of a derivative of the difference signal; a peak detector circuit configured to generate a peak signal indicative of a peak value of the derivative signal over a time period; an integrator circuit configured to integrate the peak signal to generate an extended signal; as well as A comparator circuit is configured to generate an end transition signal when the expansion signal exceeds zero.

10. A method for controlling an adaptive transition time of a resonant converter system, characterized in that: include: generating a derivative signal that is a derivative of the received first signal indicative of a resonant current through an inductor in the resonant converter system; generating a peak derivative signal indicative of a peak value of the derivative signal over a time period; integrating the peak derivative signal to generate an extended signal; as well as The expansion signal is compared to a second signal indicative of a magnetizing current through a magnetizing inductance of a transformer in the resonant converter system to generate an end transition signal when the expansion signal exceeds the second signal.

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