Design and packaging method of printed circuit board and controller

Abstract

The invention discloses a design and packaging method of a printed circuit board and a controller, and the method comprises the steps: designing a tombstone device package, which comprises the design of a patch element placement region and the design of a bonding pad, the bonding pad is located in the patch element placement region and is close to the edge of the patch element placement region, and the area of the bonding pad is smaller than 0.5 time of the area of the patch element placement region; a substrate is provided, the substrate is provided with a first face and a second face which are opposite to each other, a heat dissipation bonding pad is arranged on the first face of the substrate, a windowing area is arranged on the second face of the substrate, and the heat dissipation bonding pad is connected with the windowing area through a heat dissipation via hole; the tombstone erecting devices are packaged to avoid the heat dissipation through holes and are distributed in the windowing area; windowing is carried out according to the windowing area and the layout of the tombstone device package, a green oil layer around a bonding pad of the tombstone device package is reserved, and a solder mask area is formed around the bonding pad. According to the design and packaging method of the printed circuit board provided by the invention, the heat dissipation area of the printed circuit board can be increased.

Description

Technical Field

[0001] This application relates to the technical field of printed circuit board manufacturing, and particularly to a design, packaging method and controller of a printed circuit board. Background Art

[0002] With the development of electronic manufacturing technology, the power consumption of components is also increasing continuously, which brings about the problem of device heat dissipation. Taking chips as an example, a large number of chips use heat dissipation pads to solve the heat dissipation problem, and it is required that the heat dissipation pads have vias during the packaging production of printed circuit boards, and the heat is guided to the copper foil with openings on the back through the vias for surface heat dissipation; with the increase of the power consumption of components, the above-mentioned via heat dissipation method can no longer meet the heat dissipation requirements of chips, and technological innovation is urgently needed to solve the heat dissipation problem. Summary of the Invention

[0003] In order to solve the deficiencies of the prior art, the following technical solutions are adopted in this application:

[0004] This application provides a design and packaging method for a printed circuit board. The method includes:

[0005] Design a tombstone device package, including the design of a patch component placement area and a pad. The pad is located in the patch component placement area, is arranged close to the edge of the patch component placement area, and the area of the pad is less than 0.5 times the area of the patch component placement area;

[0006] Provide a substrate with opposite first and second surfaces. A heat dissipation pad is provided on the first surface of the substrate, and an opening area is provided on the second surface of the substrate. The heat dissipation pad is connected to the opening area through a heat dissipation via;

[0007] Arrange the tombstone device package in the opening area avoiding the heat dissipation vias;

[0008] Perform opening according to the layout of the opening area and the tombstone device package, and retain the solder mask layer around the pad of the tombstone device package to form a solder resist area around the pad.

[0009] In summary, the design and packaging method for a printed circuit board provided in this application designs a tombstone device package, arranges the tombstone device package in the opening area avoiding the heat dissipation vias. In the tombstone device package, the pad is arranged close to the edge in the patch component placement area, and the area of the pad is less than 0.5 times the area of the patch component placement area. When the patch component for heat dissipation is arranged in the patch component placement area for reflow soldering, due to the small pad area and the close edge arrangement, during the melting process of the solder paste, the stresses on both ends of the patch component are inconsistent, resulting in the tombstone effect, so that one end of the patch component away from the pad is lifted, thereby effectively increasing the heat dissipation area on the surface of the printed circuit board and improving the heat dissipation performance of the printed circuit board.

[0010] Further, the method further includes:

[0011] Manufacture a solder paste printing stencil, where the opening size of the solder paste printing stencil is the same as the pad size in the tombstone device package;

[0012] Align the solder paste printing stencil with the opening area of the substrate and print the solder paste;

[0013] Mount the surface mount components, and use reflow soldering for reflow curing to fixedly connect the surface mount components to the pads. The surface mount components are configured as heat dissipation devices for heat dissipation.

[0014] Further, the surface mount component placement area is configured as a rectangle, and the pads in the surface mount component placement area are arranged close to the short side of the surface mount component placement area.

[0015] Further, the surface mount components are rectangular;

[0016] Alternatively, the surface mount components are substantially rectangular, and there are defects at positions close to one of the short sides of the surface mount components.

[0017] Further, after welding the surface mount components to the pads in the surface mount component placement area, the included angle between the extension direction of the surface mount components and the second surface of the substrate is greater than 0°.

[0018] Further, a plurality of surface mount component placement areas are arranged in an array within the opening range.

[0019] Further, for the pads in each surface mount component placement area, the pads are arranged close to the same short side of the surface mount component placement area.

[0020] Further, the size of the surface mount component placement area is related to the size of the opening area,

[0021] The length of the surface mount component placement area is less than 0.3 times the length of the opening area and greater than 0.25 times the length of the opening area;

[0022] The width of the surface mount component placement area is less than 0.25 times the width of the opening area and greater than 0.20 times the width of the opening area.

[0023] Further, the ratio of the length of the projection of the surface mount components on the second surface of the substrate to the length of the surface mount component placement area satisfies: greater than or equal to 0.5 and less than or equal to 0.75;

[0024] The ratio of the width of the projection of the surface mount components on the second surface of the substrate to the width of the surface mount component placement area satisfies: greater than or equal to 0.55 and less than or equal to 0.85.

[0025] Further, a copper foil is provided on the second side of the substrate. The copper foil is connected to the heat dissipation pad on the first side of the substrate through a heat dissipation via. By using the window opening process, a window opening is formed in a selected area on the surface of the copper foil.

[0026] The pads in the placement area of the surface mount components are connected to the copper foil within the window opening range.

[0027] Further, the method further includes:

[0028] Providing a basic surface mount component package, where the basic surface mount component package includes pads arranged in a mirror image of each other;

[0029] Setting the dimensional parameters of the basic surface mount component package and deleting the single-sided pads of the basic surface mount component package to form the tombstone device package.

[0030] The present application also provides a controller, which includes a chip, a printed circuit board, and surface mount components; the printed circuit board is obtained at least by the method described above. The chip is located on the first side of the printed circuit board, and the heat sink of the chip is soldered to the heat dissipation pad of the printed circuit board; the surface mount components are located in the window opening area of the printed circuit board to form a tombstone for dissipating heat from the chip.

[0031] Since the controller of the present application includes the design and packaging method of the printed circuit board described in any one of the above technical solutions, it has all the beneficial effects of the design and packaging method of the printed circuit board, which will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a partial structural schematic diagram of the first side of a printed circuit board provided by an embodiment of the present application;

[0033] Figure 2 It is a partial structural schematic diagram of the second side of a printed circuit board provided by an embodiment of the present application;

[0034] Figure 3 It is a partial structural schematic diagram of the second side of a printed circuit board provided by another embodiment of the present application;

[0035] Figure 4 It is a schematic diagram of a tombstone device package provided by an embodiment of the present application;

[0036] Figure 5 It is a schematic diagram of a tombstone device package provided by another embodiment of the present application;

[0037] Figure 6 It is a flow chart of the design and packaging method of a printed circuit board provided by an embodiment of the present application;

[0038] Figure 7It is a flowchart of the encapsulation step in the design and encapsulation method of a printed circuit board provided by an embodiment of the present application;

[0039] Figure 8 It is an effect diagram of tombstoning of a printed circuit board provided by an embodiment of the present application. Specific embodiments

[0040] The present application will be described in detail below in conjunction with the specific embodiments shown in the drawings. However, these embodiments do not limit the present application, and any structural, method, or functional transformation made by those of ordinary skill in the art based on these embodiments is included in the protection scope of the present application.

[0041] To solve the deficiencies of the prior art, the present application provides a printed circuit board, including: a substrate having opposite first and second surfaces, a heat dissipation pad is provided on the first surface of the substrate, a window is provided on the second surface of the substrate, and the heat dissipation pad is connected to the window through a heat dissipation via;

[0042] A plurality of patch element placement areas are provided within the window range. Any patch element placement area is provided with a pad, the area of the pad is less than 0.5 times the area of the patch element placement area, and the pad is disposed close to the edge of the patch element placement area.

[0043] Specifically, the substrate, as the basic structure of the printed circuit board, is usually made of an insulating material, and a conductive layer is covered on the surface of the substrate for electrical connection and heat dissipation. Combining Figure 1 and Figure 2 , the substrate 11 has opposite first and second surfaces 101 and 102. As shown in Figure 1 , a heat dissipation pad 111 is provided on the first surface 101 of the substrate 11. The heat dissipation pad 111 is usually located below a chip or other high-power components, and is used to conduct the heat generated by the components to other parts of the printed circuit board 100.

[0044] As shown in Figure 2 , it shows a schematic diagram of a part of the window area 113 on the second surface 102 of the substrate 11. As an alternative implementation, a copper foil is provided on the second surface 102 of the substrate 11, and the copper foil is connected to the heat dissipation pad 111 on the first surface 101 of the substrate 11 through a heat dissipation via 112 to form a network for heat dissipation of the printed circuit board. By using the windowing process, a window is formed in a selected area on the surface of the copper foil. The window area 113 is connected to the heat dissipation pad 111 on the first surface 101 through the heat dissipation via 112. The heat dissipation via 112 is a metallized hole penetrating the substrate 11, and the heat dissipation via 112 can conduct heat from the heat dissipation pad 111 on the first surface 101 of the substrate 11 to the window area 113 on the second surface 102 of the substrate 11, realizing efficient heat dissipation of the printed circuit board 100.

[0045] As shown inFigure 2 As shown, a plurality of surface mount component placement areas 114 are provided within the windowing range. The pads 115 in the surface mount component placement areas 114 are connected to the copper foil within the windowing range, so that the pads on the second side of the substrate are connected to the heat dissipation network of the printed circuit board. The surface mount component placement areas 114 are used to place surface mount components 116, and the surface mount components 116 are configured as heat dissipation devices for heat dissipation.

[0046] The pads 115 are located at the edges of the surface mount component placement areas 114, creating conditions for the occurrence of the tombstone effect during subsequent soldering of the surface mount components 116. Moreover, the area of the pads 115 is less than 0.5 times the area of the surface mount component placement areas 114. The small area of the pads 115 reduces the contact area between the solder paste and the surface mount components 116 during soldering, helping to form uneven forces during the soldering process and prompting the surface mount components 116 to produce the tombstone effect.

[0047] According to the above description, a printed circuit board provided by the present application, by setting a plurality of surface mount component placement areas 114 at the windowing positions on the second side 102 of the substrate 11, and setting the pads 115 near the edges in each surface mount component placement area 114, the area of the pads 115 being less than 0.5 times the area of the surface mount component placement areas 114. When the surface mount components 116 for heat dissipation are set in the surface mount component placement areas 114 for reflow soldering, due to the small area of the pads 115 and their being set near the edges, the stresses on both ends of the surface mount components 116 are inconsistent during the melting of the solder paste, resulting in the tombstone effect, causing the end of the surface mount component 116 far from the pad 115 to lift, thereby effectively increasing the heat dissipation area on the surface of the printed circuit board 100 and improving the heat dissipation performance of the printed circuit board 100. As Figure 1 shown, taking the example of a chip being soldered on the first side 101 of the substrate 11, the heat dissipation pad 111 is usually located below the chip and is soldered to the heat sink of the chip. It is the heat dissipation pad for this chip. The heat generated by the chip during operation is conducted to the windowing area 113 and the surface mount components 116 through the heat dissipation pad 111, further increasing the heat dissipation area of the chip and being beneficial to the heat dissipation of the chip.

[0048] As Figure 2 shown, as an optional implementation, the surface mount component placement areas 114 are configured as rectangles, and the pads 115 in the surface mount component placement areas 114 are set near the short sides of the surface mount component placement areas 114. Thus, during the reflow soldering process, uneven forces are likely to be formed at the two ends of the surface mount components 116 that are far apart, thereby prompting the surface mount components 116 to produce the tombstone effect, ensuring that the surface mount components 116 can stably form the tombstone state during the soldering process, thereby increasing the heat dissipation area on the surface of the printed circuit board 100, improving the heat dissipation performance of the printed circuit board 100, and being beneficial to the heat dissipation of the devices located on the first side 101.

[0049] As an implementation method, the patch component 116 is welded to the pad 115 in the patch component placement area 114 by a reflow soldering process. After welding, the angle between the extension direction of the patch component 116 and the second surface 102 of the substrate 11 is greater than 0°. Preferably, as Figure 8 As shown, the angle between the extension direction of the patch element 116 and the second surface 102 is approximately 90°.

[0050] Specifically, the patch component 116 is mounted on the printed circuit board 100 and soldered by a reflow soldering process, so that the patch component 116 is fixedly connected to the pad 115. During the reflow soldering process, the uneven stress on both ends of the patch component 116 will produce a tombstone effect, so that the end of the patch component 116 away from the pad 115 is tilted to form a tombstone state, so that a certain angle is formed between the extension direction of the patch component 116 and the second surface 102 of the substrate 11, so that the area of ​​the patch component 116 in contact with the air is increased, the heat dissipation area on the surface of the printed circuit board 100 is increased, and the heat dissipation efficiency is improved.

[0051] like Figure 2 As shown, as an optional implementation method, a plurality of patch component placement areas 114 are arranged in an array within the window range. In this way, a plurality of patch components 116 can be evenly arranged in the heat dissipation area of ​​the printed circuit board 100, maximizing the utilization area of ​​the window area 113, thereby maximizing the heat dissipation area and achieving efficient heat dissipation of the printed circuit board 100.

[0052] As an optional implementation, for the pads 115 in each patch component placement area 114 , the pads 115 are arranged close to the same short side of the patch component placement area 114 .

[0053] Specifically, the solder pad 115 is arranged near the short side of the same side of the patch component placement area 114. All patch components 116 will be subjected to similar force conditions during the welding process. When the tombstone effect occurs, the inclination direction of all patch components 116 is consistent, ensuring that there is sufficient gap between each tombstone patch component 116 to avoid mutual interference between each patch component 116, thereby further improving the heat dissipation efficiency.

[0054] As an optional implementation method, the size of the patch component placement area 114 is related to the size of the window area 113, and the length of the patch component placement area 114 is less than 0.3 times the length of the window area 113, and greater than 0.25 times the length of the window area 113; the width of the patch component placement area 114 is less than 0.25 times the width of the window area 113, and greater than 0.20 times the width of the window area 113.

[0055] For example, Figure 2As shown, the size of the heat dissipation chip in the QFN32 package is 5.80 mm × 5.20 mm. By controlling the length of the surface mount component placement area 114 to be between 0.25 and 0.3 times the length of the opening area 113, and the width of the surface mount component placement area 114 to be between 0.20 and 0.25 times the width of the opening area 113, as Figure 2 shown, a 3×4 array of surface mount components 116 can be obtained. A plurality of surface mount components 116 are evenly distributed within the opening area 113 to form a "tombstone array". This array layout significantly increases the heat dissipation surface area of the printed circuit board 100 and can prevent interference between the surface mount components 116 of each tombstone during heat dissipation.

[0056] As an alternative implementation, as Figure 3 shown, a solder mask area 117 is provided around the solder pad 115 in the surface mount component placement area 114. The solder mask area 117 is used to prevent the molten solder paste from overflowing into the opening area 113 during the soldering process, thereby ensuring the soldering quality and heat dissipation effect.

[0057] As an alternative implementation, the solder mask area 117 is a green solder mask layer reserved when opening the window around the solder pad 115, thereby simplifying the production process of the printed circuit board 100 and reducing the manufacturing cost of the printed circuit board 100.

[0058] As an alternative implementation, the ratio of the length of the projection of the surface mount component 116 on the second side 102 of the substrate 11 to the length of the surface mount component placement area 114 satisfies: greater than or equal to 0.5 and less than or equal to 0.75;

[0059] The ratio of the width of the projection of the surface mount component 116 on the second side 102 of the substrate 11 to the width of the surface mount component placement area 114 satisfies: greater than or equal to 0.55 and less than or equal to 0.85. Through the size design of the surface mount component 116, it is possible to prevent the surface mount component 116 from exceeding the surface mount component placement area 114, ensuring that any surface mount component 116 contacts only a single solder pad 115 area during the mounting of the surface mount component 116 and ensuring the soldering quality of the surface mount component 116.

[0060] Exemplarily, as Figure 4 shown, taking a 0402 package surface mount capacitor and a QFN32 package chip as an example for illustration, the size of the 0402 package surface mount capacitor body is 1.00 mm × 0.50 mm × 0.50 mm, and the size of the surface mount component placement area 114 is not less than the size of the 0402 package surface mount capacitor body, Figure 4The size of the middle surface mount component placement area 114 is 1.60 mm × 0.70 mm. The pad 115 is located in the surface mount component placement area 114. The size of the pad 115 for the tombstone device package is 0.60 mm × 0.55 mm. The surface mount component 116 is mounted on the printed circuit board 100 through the pad 115, and the heat on the printed circuit board 100 can be conducted to the surface mount component 116 through the pad 115.

[0061] As another alternative implementation, the surface mount component 116 is substantially rectangular, and there is a defect at a position close to one of the short sides of the surface mount component 116.

[0062] Specifically, as Figure 5 shown, due to the defect at one of the short sides of the surface mount component 116, the uneven stress condition at both ends of the surface mount component 116 during welding is increased, so as to ensure that the surface mount component 116 can stably form a tombstone state during the welding process, thereby increasing the heat dissipation area on the surface of the printed circuit board 100 and improving the heat dissipation performance of the printed circuit board 100.

[0063] Furthermore, the material of the surface mount component 116 can be selected as a metal material with good thermal conductivity, such as copper or aluminum, to further enhance the heat dissipation effect. By evenly distributing multiple tombstone devices in the open window area 113 of the printed circuit board 100, the tombstone effect of the surface mount component 116 is beneficial to increasing the heat dissipation area on the surface of the printed circuit board 100, thereby improving the heat dissipation performance of the printed circuit board 100 without increasing the production cost.

[0064] This application also provides a design and packaging method for a printed circuit board 100. As Figure 6 shown, the method includes the following steps:

[0065] Step S11, designing the tombstone device package, including the design of the surface mount component placement area 114 and the design of the pad 115. The pad 115 is located in the surface mount component placement area 114, is arranged close to the edge of the surface mount component placement area 114, and the area of the pad 115 is less than 0.5 times the area of the surface mount component placement area 114;

[0066] Step S12, providing a substrate 11. The substrate 11 has a relative first surface 101 and a second surface 102. A heat dissipation pad 111 is provided on the first surface 101 of the substrate 11, and an open window area 113 is provided on the second surface 102 of the substrate 11. The heat dissipation pad 111 and the open window area 113 are connected through a heat dissipation via 112;

[0067] Step S13, distributing the tombstone device package in the open window area 113 while avoiding the heat dissipation via 112;

[0068] Step S14: Perform window opening according to the window opening area 113 and the layout of the chip-on-board device package, and retain the solder mask layer around the pads 115 of the chip-on-board device package to form a solder mask area 117 around the pads 115.

[0069] According to a design and packaging method of a printed circuit board 100 provided by an embodiment of the present application, by designing a chip-on-board device package and arranging the chip-on-board device package in the window opening area 113 avoiding the heat dissipation vias 112, in the chip-on-board device package, the pads 115 are disposed near the edge in the placement area 114 of the surface mount component, and the area of the pads 115 is less than 0.5 times the area of the placement area 114 of the surface mount component. When the surface mount component 116 for heat dissipation is disposed in the placement area 114 for reflow soldering, due to the small area of the pads 115 and the edge setting, the stresses received at both ends of the surface mount component 116 are inconsistent during the melting of the solder paste, resulting in the tombstoning effect, so that one end of the surface mount component 116 away from the pads 115 is lifted, thereby effectively increasing the heat dissipation area on the surface of the printed circuit board 100 and improving the heat dissipation performance of the printed circuit board 100.

[0070] As an optional implementation manner, the design of the chip-on-board device package in step S11 can be obtained by modifying the existing basic surface mount component package.

[0071] Specifically, the basic surface mount component package can be obtained from the package component library. The basic surface mount component package includes pads arranged in a mirror image. The size parameters of the basic surface mount component package can be set according to actual requirements, and the single-sided pads of the basic surface mount component package are deleted, then the chip-on-board device package provided by the embodiment of the present application can be obtained. The design method of this chip-on-board device package is obtained by modifying on the basis of the original basic surface mount component package, and the implementation method is simple.

[0072] As an optional implementation manner, as Figure 7 shown, the method further includes:

[0073] Step S21: Manufacture a solder paste printing stencil, and the window opening size of the solder paste printing stencil is the same as the size of the pads 115 in the chip-on-board device package;

[0074] Step S21: Align the solder paste printing stencil with the window opening area 113 of the substrate 11 and print the solder paste;

[0075] Step S21: Mount the surface mount component 116, and perform reflow soldering and curing by reflow soldering to fixedly connect the surface mount component 116 to the pads 115. The surface mount component 116 is configured as a heat dissipation device for heat dissipation.

[0076] Specifically, assuming that the second surface 102 of the substrate 11 is placed parallel to the horizontal plane, when packaging the surface-mounted component 116, it is only necessary to horizontally place the surface-mounted component 116 at the corresponding position of the pad 115 on the second surface 102 of the substrate 11. Due to the special design of the position of the pad 115 on the printed circuit board 100 in the embodiment of the present application, it is possible to promote the tombstoning phenomenon that occurs to the surface-mounted component 116 during reflow soldering, thereby achieving the purpose of increasing the heat dissipation area of the printed circuit board 100. In this process, the placement method of the surface-mounted component 116 before reflow soldering is simple and can be achieved by existing production line equipment without specially designing the grasping device for the surface-mounted component 116, which can reduce the production cost.

[0077] Exemplarily, the effect after the surface-mounted component 116 passes through the furnace and forms a tombstone is as Figure 8 shown. The original back heat dissipation area is 5.80 mm * 5.20 mm = 29.12 mm². The increased area is the area of 4 long sides of 12 0402 tombstone packages, that is, 1.00 mm * 0.50 mm * 4 * 12 = 24 mm². In this way, without increasing the cost, the back heat dissipation area has increased to nearly twice the original area (182%).

[0078] According to the above description, for a printed circuit board 100 provided by the present application, a tombstone device package is designed, and the tombstone device package is distributed in the window area 113 avoiding the heat dissipation vias 112. By using the tombstoning effect, one end of the surface-mounted component 116 far from the pad 115 is lifted, so that the heat dissipation area on the surface of the printed circuit board 100 can be effectively increased, and the heat dissipation performance of the printed circuit board 100 is improved.

[0079] As an optional implementation manner, the present application further provides a controller, which includes a chip, a printed circuit board, and a surface-mounted component; the printed circuit board is obtained at least by the method provided in the embodiment of the present application. The chip is located on the first surface of the printed circuit board, and the heat sink of the chip is welded to the heat dissipation pad of the printed circuit board; the surface-mounted component is located in the window area of the printed circuit board to form a tombstone for dissipating heat from the chip.

[0080] According to the above description, in the controller provided in the embodiment of the present application, the window area on the second surface of the printed circuit board is provided with surface-mounted components in the form of tombstones, which can better improve the heat dissipation performance of the controller.

[0081] It will be understood that the term "exemplary" as used herein means "serving as an example, instance, or illustration". Any embodiment described as "exemplary" is not necessarily preferred or superior to other embodiments and / or does not preclude the combination of features of other embodiments. It should be understood that certain features of the present application described in the context of separate embodiments for clarity purposes may also be provided in combination in a single embodiment. Conversely, the various features of the present application described in the context of a single embodiment for clarity purposes may also be provided separately or in any suitable combination or as any other described embodiment of the present application. The above-disclosed are only the preferred embodiments of the present application, but they are not intended to limit the scope of the rights of the present application. Those of ordinary skill in the art can understand that: within the spirit and scope of the present application and the appended claims, changes, modifications, substitutions, combinations, and simplifications should all be equivalent replacement methods and still fall within the scope covered by the invention.

Claims

1. A method for designing and packaging a printed circuit board, characterized in that: The method comprises: Designing a monument device package, including designing a patch component placement area and a pad design, wherein the pad is located in the patch component placement area and is arranged close to the edge of the patch component placement area, and the area of ​​the pad is less than 0.5 times the area of ​​the patch component placement area; A substrate is provided, wherein the substrate has a first surface and a second surface opposite to each other, a heat dissipation pad is arranged on the first surface of the substrate, and a window area is arranged on the second surface of the substrate, and the heat dissipation pad and the window area are connected through a heat dissipation via; The tombstone device packages are distributed in the window area away from the heat dissipation vias; The window is opened according to the window opening area and the layout of the tombstone device package, and the green oil layer around the pad of the tombstone device package is retained to form a solder resist area around the pad.

2. The method for designing and packaging a printed circuit board according to claim 1, characterized in that: The method further comprises: Making a solder paste printing stencil, wherein the window size of the solder paste printing stencil is consistent with the pad size in the tombstone device package; Aligning the solder paste printing stencil with the window area of ​​the substrate to print solder paste; The patch component is mounted and reflow curing is adopted to fix the patch component with the pad, and the patch component is configured as a heat dissipation device for heat dissipation.

3. The method for designing and packaging a printed circuit board according to claim 2, characterized in that: The patch component placement area is configured as a rectangle, and the pads in the patch component placement area are arranged close to the short side of the patch component placement area; The patch element is rectangular; Alternatively, the patch element is substantially rectangular, and a defect exists at a position of the patch element close to one of the short sides.

4. The method for designing and packaging a printed circuit board according to claim 3, characterized in that: After the patch component is welded to the pad in the patch component placement area, the angle between the extension direction of the patch component and the second surface of the substrate is greater than 0°.

5. The method for designing and packaging a printed circuit board according to claim 3, characterized in that: A plurality of patch element placement areas are arranged in an array within the range of the window; For the pads in each of the patch component placement areas, the pads are arranged close to the same short side of the patch component placement area.

6. The method for designing and packaging a printed circuit board according to claim 3, characterized in that: The size of the patch element placement area is related to the size of the window area. The length of the patch component placement area is less than 0.3 times the length of the window area and greater than 0.25 times the length of the window area; The width of the patch element placement area is less than 0.25 times the width of the window area and greater than 0.20 times the width of the window area.

7. The method for designing and packaging a printed circuit board according to claim 3, characterized in that: The ratio of the length of the projection of the patch element on the second surface of the substrate to the length of the patch element placement area satisfies: greater than or equal to 0.5, and less than or equal to 0.75; The ratio of the width of the patch element projected on the second surface of the substrate to the width of the patch element placement area satisfies: greater than or equal to 0.55, and less than or equal to 0.

85.

8. The method for designing and packaging a printed circuit board according to claim 1, characterized in that: The second surface of the substrate is provided with a copper sheet, the copper sheet is connected to the heat dissipation pad on the first surface of the substrate through the heat dissipation via, and the window opening process is adopted to form the window opening in the selected area on the surface of the copper sheet; The pad in the patch component placement area is connected to the copper sheet within the window opening range.

9. The method for designing and packaging a printed circuit board according to claim 1, characterized in that: The method further comprises: Providing a basic SMD component package, the basic SMD component package comprising pads arranged in mirror images of each other; The size parameters of the basic patch component package are set, and the single-sided pad of the basic patch component package is deleted to form the tombstone device package.

10. A controller, characterized in that: It comprises a chip, a printed circuit board and a patch component; the printed circuit board is obtained by at least the method described in any one of claims 1 to 9, the chip is located on the first side of the printed circuit board, and the heat sink of the chip is welded to the heat dissipation pad of the printed circuit board; the patch component is located in the window area of ​​the printed circuit board to form a monument for dissipating heat for the chip.

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