Semiconductor electrical property testing method and semiconductor electrical property testing device

Abstract

The invention provides a method and a device for testing electrical characteristics of a semiconductor. The method comprises the following steps: acquiring a semiconductor micro Hall test structure comprising at least one doping element; measuring electrical parameters of the test structure; removing a thin layer with a specific thickness from the test structure by using secondary ion mass spectrometry, and carrying out atomic composition analysis on the removed material; measuring the electrical parameters of the test structure again; and repeating the two steps until the distribution information of the doping concentration of the active doping element and the initial doping element in the test structure is obtained, and calculating the distribution information of the doping efficiency of the test structure according to the distribution information of the doping concentration. According to the application, the electrical characteristics and the doping concentration can be combined, and the distribution of the doping efficiency can be inferred by acquiring the distribution information of the electrical characteristics and the doping concentration of the semiconductor; and a thin layer is controllably removed through a secondary ion mass spectrometry technology, and semiconductor doping contour information with higher precision is obtained.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and particularly to a method for testing semiconductor electrical properties and a device for testing semiconductor electrical properties. Background Art

[0002] The selectively grown semiconductor has electrical properties related to depth and varies with depth. These depth-dependent electrical properties have a great impact on the performance of electronic devices. In the prior art, the Hall effect is usually used to measure and deduce the semiconductor type, the total free carrier density, and the total mobility, and the doping profile of the semiconductor is obtained by etching a cross-section (such as cross-sectional SEM / TEM). However, the electrical properties based on depth cannot be correlated with the doping profile, and thus the influence of the doping profile at different depths on the semiconductor electrical properties cannot be further analyzed. Summary of the Invention

[0003] In view of this, the embodiments of the present application are committed to providing a method for testing semiconductor electrical properties and a device for testing semiconductor electrical properties to solve the problem in the prior art that the electrical properties of a semiconductor cannot be analyzed based on the doping profiles at different depths.

[0004] On the one hand, the present application provides a method for testing semiconductor electrical properties, including: S100, obtaining a semiconductor micro-Hall test structure, where the semiconductor micro-Hall test structure includes at least one doping element; S200, measuring the electrical parameters of the semiconductor micro-Hall test structure and obtaining the doping concentration of the active doping element in the semiconductor micro-Hall test structure; S300, using secondary ion mass spectrometry to remove a thin layer with a specific thickness from the semiconductor micro-Hall test structure, analyzing the atomic composition of the removed material, and obtaining the doping concentration of the initial doping element in the thin layer of the semiconductor micro-Hall test structure; S400, after removing the thin layer with a specific thickness, measuring the electrical parameters of the semiconductor micro-Hall test structure again and obtaining the doping concentration of the active doping element in the semiconductor micro-Hall test structure. The change in the doping concentration of the active doping element in the semiconductor micro-Hall test structure obtained before and after removing the thin layer can be used to obtain the doping concentration of the active doping element in the thin layer of the semiconductor micro-Hall test structure; repeat steps S300 and S400 until the distribution information of the electrical parameters, the doping concentration of the initial doping element, and the doping concentration of the active doping element in the semiconductor micro-Hall test structure in the thickness direction is obtained, and calculate the distribution information of the doping efficiency of the semiconductor micro-Hall test structure according to the distribution information of the doping concentration of the active doping element and the doping concentration of the initial doping element.

[0005] In connection with the first aspect, in certain implementations of the first aspect, the semiconductor micro-Hall test structure includes: a central region located at the intersection of a first axis and a second axis of the semiconductor micro-Hall test structure, the first axis being perpendicular to the second axis; two arms symmetric with respect to the first axis extending from the central region and two arms symmetric with respect to the second axis; and pads located at the ends of the respective arms remote from the central region.

[0006] In connection with the first aspect, in certain implementations of the first aspect, the width of the arm is less than or equal to 2.8 mm.

[0007] In connection with the first aspect, in certain implementations of the first aspect, measuring the electrical parameters of the semiconductor micro-Hall test structure includes: applying a current to two adjacent arms of the semiconductor micro-Hall test structure through the pads, measuring the voltage between two other adjacent arms of the micro-Hall test structure, and calculating the resistivity of the semiconductor micro-Hall test structure; when a magnetic field perpendicular to the plane of the semiconductor micro-Hall test structure is applied, applying a current to two non-adjacent arms of the semiconductor micro-Hall test structure through the pads, and measuring the change in the voltage between two other non-adjacent arms of the semiconductor micro-Hall test structure to obtain the carrier concentration and carrier mobility of the semiconductor micro-Hall test structure.

[0008] In connection with the first aspect, in certain implementations of the first aspect, the semiconductor micro-Hall test structure includes: a central region located at the intersection of a first axis and a second axis of the semiconductor micro-Hall test structure, the first axis being perpendicular to the second axis; two arms symmetric with respect to the first axis extending from the central region and four arms symmetric in pairs with respect to the second axis; and pads located at the ends of the respective arms remote from the central region.

[0009] In connection with the first aspect, in certain implementations of the first aspect, the width of the arm is less than or equal to 0.5 mm.

[0010] In connection with the first aspect, in certain implementations of the first aspect, measuring the electrical parameters of the semiconductor micro-Hall test structure includes: applying a current to two arms symmetric with respect to the first axis through the pads, measuring the voltage between two arms on the same side of the second axis among the other four arms, and calculating the resistivity of the semiconductor micro-Hall test structure; when a magnetic field perpendicular to the plane of the semiconductor micro-Hall test structure is applied, applying a current to two arms symmetric with respect to the first axis through the pads, and measuring the change in the voltage between any two arms symmetric with respect to the second axis among the other four arms to obtain the carrier type, carrier concentration, and carrier mobility.

[0011] In connection with the first aspect, in certain implementations of the first aspect, the semiconductor micro-Hall test structure includes a selectively grown semiconductor structure.

[0012] In combination with the first aspect, in some implementations of the first aspect, the material of the semiconductor micro-Hall test structure includes GaN-based materials.

[0013] In combination with the first aspect, in some implementations of the first aspect, the material of the semiconductor micro-Hall test structure includes P-type GaN, and the doping elements include at least one of Mg element, Zn element, Ca element, Sr element, Ba element, Li element, Na element or K element.

[0014] In combination with the first aspect, in some implementations of the first aspect, the material of the semiconductor micro-Hall test structure includes PN junction materials.

[0015] In combination with the first aspect, in some implementations of the first aspect, the P-type doping elements in the PN junction material include at least one of Mg element, Zn element, Ca element, Sr element, Ba element, Li element, Na element or K element, and the N-type doping elements include at least one of Si element, Ge element, Sn element, Se element or Te element.

[0016] In combination with the first aspect, in some implementations of the first aspect, measuring the electrical parameters of the semiconductor micro-Hall test structure further includes: applying an alternating magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located to measure the electron mobility and hole mobility of the semiconductor micro-Hall test structure.

[0017] In combination with the first aspect, in some implementations of the first aspect, when using secondary ion mass spectrometry to gradually remove thin layers with a specific thickness from the semiconductor micro-Hall test structure, the etching range is a circular area centered on the central region with a maximum diameter less than or equal to 4 mm.

[0018] In combination with the first aspect, in some implementations of the first aspect, the secondary ion mass spectrometry includes: Glow Dischange Spectrometry-Secondary Ion Mass Spectroscopy (GDS-SIMS) or Time of Flight Secondary Ion Mass Spectrometry (TOF-SIMS).

[0019] In combination with the first aspect, in some implementations of the first aspect, when using secondary ion mass spectrometry to gradually remove thin layers with a specific thickness from the semiconductor micro-Hall test structure, the specific thickness is a fixed thickness, and the fixed thickness is less than or equal to 100 nm.

[0020] Second aspect, the present application provides a test device for semiconductor electrical characteristics, including: an acquisition module for acquiring a selectively grown semiconductor micro-Hall test structure, the semiconductor micro-Hall test structure including at least one doping element; an electrical test module for measuring the electrical parameters of the semiconductor micro-Hall test structure and obtaining the doping concentration of the active doping elements in the semiconductor micro-Hall test structure; an element analysis module for removing a thin layer with a specific thickness from the semiconductor micro-Hall test structure by secondary ion mass spectrometry, analyzing the atomic composition of the removed material, and obtaining the doping concentration of the initial doping elements in the semiconductor micro-Hall test structure; a calculation module for calculating the distribution information of the doping efficiency of the semiconductor micro-Hall test structure based on the distribution information of the doping concentration of the active doping elements and the doping concentration of the initial doping elements; wherein, the electrical test module and the element analysis module are respectively used to repeat the execution until the distribution information of the electrical parameters, the doping concentration of the initial doping elements, and the doping concentration of the active doping elements of the semiconductor micro-Hall test structure are obtained.

[0021] The test method and test device for semiconductor electrical characteristics provided by the embodiments of the present application can combine electrical characteristics with doping concentration, infer the distribution of doping efficiency by obtaining the distribution information of semiconductor electrical characteristics and doping concentration; and controllably remove the thin layer by secondary ion mass spectrometry technology, so as to obtain more accurate semiconductor doping profile information. Brief Description of the Drawings

[0022] The embodiments of the present application will be described in more detail below with reference to the drawings. The above and other objects, features, and advantages of the present application will become more obvious. The drawings are used to provide a further understanding of the embodiments of the present application, and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application, and do not constitute a limitation to the present application. In the drawings, the same reference numerals generally represent the same components or steps.

[0023] Figure 1 The flowchart of the test method for semiconductor electrical characteristics provided by an embodiment of the present application is shown.

[0024] Figure 2 The structural schematic diagram of the semiconductor micro-Hall test structure provided by an embodiment of the present application is shown.

[0025] Figure 3 The structural schematic diagram of the semiconductor micro-Hall test structure provided by another embodiment of the present application is shown.

[0026] Figure 4 The flowchart of the test method for semiconductor electrical characteristics provided by another embodiment of the present application is shown.

[0027] Figure 5The figure shows a schematic flowchart of a method for testing the electrical characteristics of a semiconductor provided by another embodiment of the present application.

[0028] Figure 6 The figure shows a schematic flowchart of a method for testing the electrical characteristics of a semiconductor provided by yet another embodiment of the present application.

[0029] Figure 7 The figure shows a schematic structural diagram of a device for testing the electrical characteristics of a semiconductor provided by another embodiment of the present application.

[0030] Figure 8 The figure shows a schematic structural diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0031] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0032] Application Overview

[0033] The basic concept of the present application is to propose a method and a device for testing the electrical characteristics of a semiconductor to solve the problem in the prior art that it is impossible to analyze the electrical characteristics of a semiconductor based on doping profiles at different depths.

[0034] The electrical characteristics of a semiconductor are related to the distribution of the doping depth and doping concentration of the semiconductor. The prior art cannot specifically test the relationship between the doping concentration distribution and the electrical characteristics distribution of a semiconductor thin layer when testing the electrical characteristics of a semiconductor. Because in the prior art, a destructive method is usually adopted, such as using methods like Scanning Electron Microscope (SEM) and Transmission Electron Microscope (TEM) to analyze the doping concentration distribution of a semiconductor thin layer, but electrical activation is not required. Therefore, the electrical parameters and electrical characteristics of the semiconductor related to the doping concentration cannot be accurately obtained.

[0035] Secondary Ion Mass Spectroscopy (SIMS) can detect doping and impurities at very low concentrations and can also provide elemental depth profiles in the range from a few nanometers to tens of micrometers. When ions with a certain energy strike the surface of a solid, it causes secondary emission of surface atoms, molecules, or atomic clusters, i.e., ion sputtering. The sputtered particles are generally mainly neutral, and a part of them carry positive and negative charges, which are the secondary ions. By using a mass analyzer to receive and analyze the secondary ions, the secondary ion mass spectrum is obtained. Secondary ion mass spectrometry has a very high sensitivity.

[0036] The test method for semiconductor electrical characteristics provided by this application includes: obtaining a semiconductor micro-Hall test structure including at least one doping element; measuring the electrical parameters of the semiconductor micro-Hall test structure; using Secondary Ion Mass Spectroscopy (SIMS) to gradually remove a thin layer with a specific thickness from the semiconductor micro-Hall test structure and perform atomic composition analysis on the removed material; measuring the electrical parameters of the semiconductor micro-Hall test structure again; repeating the above two steps until the distribution information of the doping concentrations of the active doping elements and the initial doping elements in the semiconductor micro-Hall test structure is obtained, and calculating the distribution information of the doping efficiency of the semiconductor micro-Hall test structure based on the distribution information of the doping concentrations.

[0037] The various non-limiting embodiments of this application will be specifically introduced below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments of this application. It should be understood that this application is not limited by the example embodiments described here.

[0038] Exemplary Method

[0039] Figure 1 The following shows a schematic flow chart of the semiconductor micro-Hall test method provided by an embodiment of this application. As Figure 1 shown, the semiconductor micro-Hall test method provided by the embodiment of this application includes the following steps.

[0040] Step S100: Obtain a semiconductor micro-Hall test structure, and the semiconductor micro-Hall test structure includes at least one doping element.

[0041] Specifically, the semiconductor micro-Hall test structure is disposed on a substrate. The substrate material can be an insulating material or a high-impedance material with a resistivity higher than a preset threshold, and the threshold can be set according to specific experimental materials, which is not limited in this application. Alternatively, the substrate material can also be a material with an electrical property opposite to that of the semiconductor micro-Hall test structure to be tested. The material of the semiconductor micro-Hall test structure is a material with a doping profile, including GaN-based materials. When the material of the semiconductor micro-Hall test structure is P-type GaN, the doping elements include at least one of Mg, Zn, Ca, Sr, Ba, Li, Na, or K elements. Optionally, the material of the semiconductor micro-Hall test structure includes PN junction materials. In the PN junction materials, the P-type doping elements include at least one of Mg, Zn, Ca, Sr, Ba, Li, Na, or K elements, and the N-type doping elements include at least one of Si, Ge, Sn, Se, or Te elements. The above doping elements all replace gallium in the GaN material to avoid over-doping resulting in the replacement of nitrogen in the GaN material, causing a decrease in the electron concentration in N-type doping or the hole concentration in P-type doping. The material of the semiconductor micro-Hall test structure can also be a compensatingly doped material (a material including both P-type doping and N-type doping). The semiconductor micro-Hall test structure can also be an etched island isolation or trench isolation semiconductor structure, a superjunction device, or a selectively grown semiconductor structure. The semiconductor micro-Hall test structure provided by the embodiments of this application can be prepared from the cutting lines between the die arrays on the wafer, or can be prepared from one die in the die array. Therefore, the semiconductor micro-Hall test structure provided by the embodiments of this application has the same electrical parameter distribution information in depth as the die on the wafer. By testing the parameter distribution of the semiconductor micro-Hall test structure, the parameter distribution of the die on the wafer can be obtained.

[0042] The semiconductor micro-Hall test structure includes: a central region located at the intersection of the first axis and the second axis of the semiconductor micro-Hall test structure, where the first axis and the second axis are perpendicular to each other; two arms symmetric with respect to the first axis extending from the central region and two arms symmetric with respect to the second axis; and pads located at the ends of the arms away from the central region; wherein, the width of the arms is less than or equal to 2.8 mm.

[0043] Exemplarily, Figure 2 For the semiconductor micro-Hall test structure provided by an embodiment of this application, as Figure 2As shown, the semiconductor micro-Hall test structure includes: a central region 10 located at the intersection of the first axis and the second axis of the semiconductor micro-Hall test structure, where the first axis is perpendicular to the second axis; arms 31 and 33 extending from the central region 10 and symmetric with respect to the first axis, and arms 32 and 34 symmetric with respect to the second axis; and pads 21, 22, 23, and 24 located at the ends of the respective arms away from the central region 10. The width of each arm is less than or equal to 2.8 mm.

[0044] According to another embodiment provided by the present application, the semiconductor micro-Hall test structure includes: a central region located at the intersection of the first axis and the second axis of the semiconductor micro-Hall test structure, where the first axis is perpendicular to the second axis; two arms extending from the central region and symmetric with respect to the first axis, and four arms symmetric in pairs with respect to the second axis; and pads located at the ends of the respective arms away from the central region; wherein the width of the arms is less than or equal to 0.5 mm.

[0045] Exemplarily, Figure 3 For the semiconductor micro-Hall test structure provided by another embodiment of the present application, as Figure 3 shown, the semiconductor micro-Hall structure provided by another embodiment of the present application includes: a central region 12 located at the intersection of the first axis and the second axis of the semiconductor micro-Hall test structure, where the first axis is perpendicular to the second axis; two arms extending from the central region 12 and symmetric with respect to the first axis, including arm 51 and arm 52; and four arms symmetric in pairs with respect to the second axis, including arm 53, arm 54, arm 55, and arm 56; and pads 41, 42, 43, 44, 45, and 46 located at the ends of the respective arms away from the central region 12; wherein the width of each arm is less than or equal to 0.5 mm.

[0046] Step S200: Measure the electrical parameters of the semiconductor micro-Hall test structure and obtain the doping concentration of the active doping elements in the semiconductor micro-Hall test structure.

[0047] Specifically, a current and a magnetic field are applied to the semiconductor micro-Hall test structure to measure the resistivity, Hall coefficient, and carrier mobility of the measured semiconductor micro-Hall test structure; the carrier concentration, i.e., the doping concentration, is deduced from the carrier mobility. For example, the doping concentration of Mg ions doped in the P-type GaN material.

[0048] The resistivity of the semiconductor material can be measured by the Van der Pauw method. The Hall coefficient can be obtained by the formula RH = (V H × d) / (I × B), where V H represents the Hall coefficient, d represents the thickness of the measured semiconductor micro-Hall test structure, V H$V_H$ represents the Hall voltage, $I$ represents the current intensity, and $B$ represents the magnetic field intensity. Through this formula, the Hall coefficient can be calculated.

[0049] In addition, the conductivity $\sigma$ can be measured by the Van Der Pauw method, Eddy current Testing method, or microwave reflection method, and further the carrier mobility $\mu$ can be obtained, that is, the carrier mobility $\mu$ is obtained through the conductivity formula $\sigma=\mu / |R_H|$. According to the relevant relationship of the carrier concentration: $n = \sigma / (e\times\mu)$, combining the carrier mobility $\mu$ and conductivity $\sigma$ obtained by the foregoing method, the carrier concentration $n$ can be obtained.

[0050] Step S300: Use secondary ion mass spectrometry to remove a thin layer with a specific thickness from the semiconductor micro-Hall test structure, analyze the atomic composition of the removed material, and obtain the doping concentration of the initial doping elements in the thin layer of the semiconductor micro-Hall test structure.

[0051] Specifically, the semiconductor thin layer can be removed with controllable thickness by secondary ion mass spectrometry. Each time a thin layer is removed, the atomic composition of the removed thin layer is analyzed to obtain the doping concentration of the initial doping elements in the thin layer of the semiconductor micro-Hall test structure.

[0052] Step S400: After removing the thin layer with a specific thickness, measure the electrical parameters of the semiconductor micro-Hall test structure again, and obtain the doping concentration of the active doping elements in the semiconductor micro-Hall test structure. The doping concentration of the active doping elements in the thin layer of the semiconductor micro-Hall test structure can be obtained from the change in the doping concentration of the active doping elements in the semiconductor micro-Hall test structure before and after removing the thin layer.

[0053] After removing each thin layer with a fixed thickness, measure the electrical parameters of the semiconductor micro-Hall test structure again to obtain the doping concentration of the active doping elements in the semiconductor micro-Hall test structure at the current thickness.

[0054] Repeat Step S300 and Step S400 until the distribution information of the electrical parameters, the doping concentration of the initial doping elements, and the doping concentration of the active doping elements in the semiconductor micro-Hall test structure in the thickness direction is obtained, and calculate the distribution information of the doping efficiency of the semiconductor micro-Hall test structure according to the distribution information of the doping concentration of the active doping elements and the doping concentration of the initial doping elements.

[0055] Specifically, according to the above steps, relative to the electrical parameter measurement results before each thin layer removal treatment, the change in the carrier concentration of the semiconductor under test for the current and previous times can be obtained by comparing the change between the current electrical parameter measurement results and the previous electrical parameter measurement results, so as to obtain the carrier concentration of the thin layer to be removed, and based on this, the concentration of the active dopant in the thin layer can be deduced. Further, the concentration of the initially introduced dopant can be calculated in combination with the atomic composition information. Therefore, by calculating the ratio of the concentration of the active dopant to the concentration of the initially introduced dopant, the doping efficiency (percentage of active doping) of the semiconductor under test can be inferred. After repeating the above steps for measurement, the dopant / carrier concentration / mobility distribution in the entire semiconductor micro-Hall test structure can be obtained.

[0056] Optionally, when using secondary ion mass spectrometry to remove a thin layer of a specific thickness from the semiconductor micro-Hall test structure, the specific thickness is a fixed thickness, and the fixed thickness is less than or equal to 100 nm.

[0057] Preferably, the secondary ion mass spectrometry includes glow discharge spectrometry-secondary ion mass spectrometry or time-of-flight secondary ion mass spectrometry.

[0058] The test method for the electrical characteristics of the semiconductor provided by the embodiments of the present application can locally remove the thin layer in a controllable manner through secondary ion mass spectrometry technology, and at the same time analyze the atomic composition of the removed thin layer. By obtaining the information on the electrical characteristics of the semiconductor and the doping concentration distribution, the doping efficiency can be inferred; and since the thickness of the removed thin layer is controllable, more accurate semiconductor doping profile information can be obtained.

[0059] In another embodiment of the present application, according to the measured electrical parameters of the semiconductor micro-Hall test structure and the distribution information of the doping concentration of the semiconductor micro-Hall test structure, the variation relationship between the doping concentration distribution of the semiconductor and the electrical parameters can be obtained.

[0060] Specifically, through the distribution information of the atoms of each layer obtained after removing the thin layer layer by layer and the corresponding electrical parameters, a corresponding relationship curve can be obtained. By analyzing the relationship curve, the relationship between the carrier mobility and the doping concentration distribution at different depths can be obtained. Therefore, by analyzing the relationship between the doping concentration at different depths and the electrical parameters of the semiconductor under test, more accurate data support for the relationship between the doping efficiency and the electrical characteristics can be provided.

[0061] In another embodiment of the present application, when removing a thin layer with a specific thickness from the semiconductor micro-Hall test structure by secondary ion mass spectrometry in step S300, the etching range is a circular area centered on the central region with a maximum diameter less than or equal to 4 mm. The actual etching area of the semiconductor micro-Hall test structure is cross-shaped. Optionally, the widths of the two arms of the cross are the same and equal to the width of any one of the branch arms in the semiconductor micro-Hall test structure.

[0062] The test method for the semiconductor electrical characteristics provided by the embodiment of the present application can effectively reduce the influence of the depth change of the structure except the central region on the test of the electrical characteristics of the semiconductor to be measured by only etching the central region of the semiconductor micro-Hall test structure to be measured.

[0063] Figure 4 The following is a schematic flow chart of the test method for the semiconductor electrical characteristics provided by another embodiment of the present application, which is extended based on Figure 1 the embodiment shown, Figure 4 and the following focuses on Figure 4 the differences between the embodiment shown and Figure 1 the embodiment shown, and the same parts will not be described again.

[0064] When the semiconductor micro-Hall test structure to be measured is as Figure 2 shown, in step S200, measuring the electrical parameters of the semiconductor micro-Hall test structure includes the following steps:

[0065] Step S210: Apply a current to two adjacent branch arms of the semiconductor micro-Hall test structure through the pads, and measure the voltage between the other two adjacent branch arms of the semiconductor micro-Hall test structure to calculate the resistivity of the semiconductor micro-Hall test structure.

[0066] Specifically, any one of the two branch arms symmetric with respect to the first axis and any one of the two branch arms symmetric with respect to the second axis are adjacent. As Figure 2 shown, apply a current I to branch arms 31 and 32 through pads 21 and 22 12 and then measure the voltage V between branch arms 33 and 34 through pads 23 and 24 34 ; apply a current I to branch arms 32 and 33 through pads 22 and 23 23 and then measure the voltage V between branch arms 34 and 31 through pads 24 and 21 41 ; apply a current I to branch arms 33 and 34 through pads 23 and 24 34 and then measure the voltage V between branch arms 31 and 32 through pads 21 and 22 12 ; apply a current I to branch arms 34 and 31 through pads 24 and 2141 After that, the voltage V between the support arms 32 and 33 is measured through the pads 22 and 23 23 ; where I 12 = I 23 = I 34 = I 41 = I. The V 21 , V 32 , V 43 , V 14 are measured in the reverse direction in the same way, and the corresponding current values are: I 21 = I 32 = I 43 = I 14 = I.

[0067] Therefore, the resistivity ρ of the semiconductor micro-Hall test structure to be measured can be obtained by the Van der Pauw method, that is, obtained through the following formula:

[0068] ρ A = (π / ln2)(f A × t s )(V 34 - V 41 + V 12 - V 23 ) / 4I;

[0069] ρ B = (π / ln2)(f B × t s )(V 43 - V 14 + V 21 - V 32 ) / 4I;

[0070] ρ = (ρ A + ρ B ) / 2.

[0071] Where f A = f B = 1, and t s is the thickness of the semiconductor micro-Hall test structure to be measured.

[0072] Step S220: When a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, a current is applied to two non-adjacent support arms of the semiconductor micro-Hall test structure through the pads, and the change in the voltage between the other two non-adjacent support arms of the semiconductor micro-Hall test structure is measured to measure the carrier concentration and Hall mobility of the semiconductor micro-Hall test structure.

[0073] Specifically, two arms that are symmetric with respect to the first axis or two arms that are symmetric with respect to the second axis in this embodiment are two non-adjacent arms. When a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, current is applied to two non-adjacent arms of the semiconductor micro-Hall test structure through pads. For example, current is applied to arm 31 and arm 33 through pad 21 and pad 23, and the change in voltage between the other two non-adjacent arms of the semiconductor micro-Hall test structure is measured. For example, the voltage change between arm 32 and arm 34 is measured through pad 22 and pad 24, so as to measure the carrier concentration and Hall mobility of the semiconductor micro-Hall test structure.

[0074] As described above, after the Hall coefficient RH is measured, the conductivity σ can be measured by the Van Der Pauw method, the Eddy current Testing method, or the microwave reflection method, and then the carrier mobility μ can be further obtained. That is, the carrier mobility μ is obtained through the conductivity formula σ = μ / |RH|. In addition, the relevant relationship for obtaining the carrier concentration is: n = σ / (e×μ); therefore, the carrier concentration n can be obtained accordingly.

[0075] Optionally, the width of the arm is one or several of 1μm, 5μm, 10μm, 100μm, and 200μm. That is, arms with different widths can be designed, such as 1μm, 5μm, 10μm, and wider arms such as 100μm, 200μm. The test method for semiconductor electrical characteristics provided in the embodiments of the present application can obtain semiconductor micro-Hall test structures with different arm widths by changing the arm width. According to the test method provided in the present application, by comparing the measured electrical characteristics of these different structures, the lateral profile information related to the arm width, filling factor / transmittance / loading effect can be inferred. Specifically, since the design of the arm width is related to the lateral profile, and the lateral profile depends on the process conditions of selective area epitaxy and the filling factor / transmittance / loading effect, etc. Therefore, some dummy structures of selective area epitaxy can be added to optimize the lateral profile of selective area epitaxy. Or, using different crystal orientations will also affect the lateral profile of selective area epitaxy.

[0076] Figure 5 The following shows a schematic flowchart of the test method for semiconductor electrical characteristics provided in another embodiment of the present application, which extends from the Figure 1 embodiment shown above and Figure 5 the embodiment shown below. The differences between the Figure 5 embodiment shown below and the Figure 1 embodiment shown above will be described in detail below, and the same parts will not be repeated.

[0077] When the semiconductor micro-Hall test structure to be measured is as Figure 3As shown in the figure, in step S200, the steps for measuring the electrical parameters of the semiconductor micro-Hall test structure are as follows:

[0078] Step S230: Apply a current to two arms that are symmetric with respect to the first axis through the pads, and measure the voltage between two arms on the same side of the second axis among the other four arms to calculate the resistivity of the semiconductor micro-Hall test structure.

[0079] Specifically, apply a current to two arms that are symmetric with respect to the first axis through the pads. For example, apply a current to arms 51 and 52 that are symmetric with respect to the first axis through pads 41 and 42. Measure the voltage between two arms on the same side of the second axis among the other four arms. For example, measure the voltage between arms 53 and 55 through pads 43 and 45 to calculate the resistivity of the semiconductor micro-Hall test structure.

[0080] Step S240: When a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, apply a current to two arms that are symmetric with respect to the first axis through the pads, and measure the change in the voltage between any two arms that are symmetric with respect to the second axis among the other four arms to measure the carrier type, carrier concentration, and carrier mobility.

[0081] Specifically, when a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, apply a current to two arms that are symmetric with respect to the first axis through the pads. For example, apply a current to arms 51 and 52 through pads 41 and 42, and measure any two arms that are symmetric with respect to the second axis among the other four arms. For example, measure the change in the voltage between arms 53 and 54 through pads 43 and 44 to measure the carrier type, carrier concentration, and carrier mobility.

[0082] As can be seen from the foregoing embodiments, the Hall coefficient RH can be measured through the foregoing formula. According to the semiconductor micro-Hall test structure provided in the present application, the conduction type of the semiconductor to be measured can be determined according to the sign of RH, and further the carrier type, carrier concentration, and carrier mobility of the semiconductor to be measured can be deduced.

[0083] Figure 6 The figure shows a schematic flow chart of a method for testing the electrical characteristics of a semiconductor provided in another embodiment of the present application, which is extended based on the Figure 5 embodiment shown, Figure 6 and the following focuses on describing Figure 6 the differences between the embodiment shown Figure 5 and the embodiment shown. The same parts will not be described again.

[0084] When the semiconductor micro-Hall test structure to be measured is as Figure 3 shown, asFigure 6 As shown in the figure, the method for testing the semiconductor electrical characteristics provided by an embodiment of the present application further includes the following steps:

[0085] Step S250: When the material of the semiconductor micro-Hall test structure is a PN junction material, an alternating magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, and the electron mobility and hole mobility of the semiconductor micro-Hall test structure are measured respectively.

[0086] Specifically, as known above, the Hall coefficient can be obtained by the formula RH = (V H × d) / (I × B), where V H represents the Hall coefficient, d represents the thickness of the measured semiconductor micro-Hall test structure, V H represents the Hall voltage, I represents the current intensity, and B represents the magnetic field intensity. The Hall coefficient is calculated by this formula, which represents the strength of the Hall effect. In addition, RH = μ × ρ, that is, the Hall constant RH is equal to the product of the resistivity ρ of the material and the carrier mobility μ. The alternating magnetic field makes the direction of the magnetic field change periodically, and the mobilities of holes and electrons in the carriers corresponding to positive and negative magnetic fields can be measured therefrom.

[0087] The method for testing the semiconductor electrical characteristics provided by the embodiment of the present application can more directly measure the hole mobility and electron mobility of the measured semiconductor.

[0088] Figure 7 The figure shows a schematic structural diagram of a semiconductor electrical characteristic testing device provided by another embodiment of the present application. As Figure 7 shown, the semiconductor electrical characteristic testing device 700 provided by an embodiment of the present application includes: an acquisition module 710, an electrical testing module 720, an element analysis module 730, and a calculation module 740.

[0089] Specifically, an acquisition module 710 is configured to acquire a semiconductor micro-Hall test structure, where the semiconductor micro-Hall test structure includes at least one doping element; an electrical test module 720 is configured to measure electrical parameters of the semiconductor micro-Hall test structure and obtain the doping concentration of the active doping element in the semiconductor micro-Hall test structure; an element analysis module 730 is configured to remove a thin layer with a specific thickness from the semiconductor micro-Hall test structure by secondary ion mass spectrometry, perform atomic composition analysis on the removed material, and obtain the doping concentration of the initial doping element in the thin layer of the semiconductor micro-Hall test structure; a calculation module 740 is configured to calculate the distribution information of the doping efficiency of the semiconductor micro-Hall test structure according to the distribution information of the doping concentration of the active doping element and the doping concentration of the initial doping element; where the electrical test module 720 and the element analysis module 730 are respectively configured to repeatedly execute until the distribution information of the electrical parameters, the doping concentration of the initial doping element, and the doping concentration of the active doping element of the semiconductor micro-Hall test structure is obtained.

[0090] In an embodiment of the present application, the material of the semiconductor micro-Hall test structure is a material with a doping profile, including a GaN-based material or a PN junction material.

[0091] In an embodiment of the present application, the electrical test module 720 is further configured to apply a current to two adjacent arms of the semiconductor micro-Hall test structure through pads, measure the voltage between the other two adjacent arms of the micro-Hall test structure, and calculate the resistivity of the semiconductor micro-Hall test structure; when a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, apply a current to two non-adjacent arms of the semiconductor micro-Hall test structure through pads, and measure the change in the voltage between the other two non-adjacent arms of the semiconductor micro-Hall test structure to measure the carrier concentration and carrier mobility of the semiconductor micro-Hall test structure.

[0092] In an embodiment of the present application, the electrical test module 720 is further configured to apply a current to two arms symmetric with respect to the first axis through pads, measure the voltage between two arms on the same side of the second axis among the other four arms, and calculate the resistivity of the semiconductor micro-Hall test structure; when a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, apply a current to two arms symmetric with respect to the first axis through pads, and measure the change in the voltage between any two arms symmetric with respect to the second axis among the other four arms to measure the carrier type, carrier concentration, and carrier mobility.

[0093] In an embodiment of the present application, the electrical test module 720 is further configured to measure the electron mobility and hole mobility of the semiconductor micro-Hall test structure when an alternating magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied when the material of the semiconductor micro-Hall test structure is a PN junction material.

[0094] In one embodiment of the present application, when the elemental analysis module 730 is used to remove a thin layer with a specific thickness from a semiconductor micro-Hall test structure by secondary ion mass spectrometry, the etching range is a circular area centered on the central region with a maximum diameter less than or equal to 4 mm.

[0095] In one embodiment of the present application, when the elemental analysis module 730 is used to remove a thin layer with a specific thickness from a semiconductor micro-Hall test structure by secondary ion mass spectrometry, the specific thickness is a fixed thickness, and the fixed thickness is less than or equal to 100 nm.

[0096] In one embodiment of the present application, the secondary ion mass spectrometry includes: glow discharge spectroscopy-secondary ion mass spectrometry or time-of-flight secondary ion mass spectrometry.

[0097] The test device for semiconductor electrical characteristics provided by the embodiments of the present application can locally remove a thin layer in a controllable manner by secondary ion mass spectrometry technology, and at the same time analyze the atomic composition of the removed thin layer. By obtaining information on semiconductor electrical characteristics and doping concentration distribution, the doping efficiency can be inferred; and since the thickness of the removed thin layer is controllable, more accurate semiconductor doping profile information can be obtained.

[0098] One embodiment of the present application further provides an electronic device 800 for testing semiconductor electrical characteristics, including one or more processors 810 and a memory 820.

[0099] The processor 810 can be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and can control other components in the electronic device 800 to perform desired functions.

[0100] The memory 820 can include one or more computer program products, and the computer program products can include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory can include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory can include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions can be stored on the computer-readable storage medium, and the processor 810 can run the program instructions to implement the test methods for semiconductor electrical characteristics of the various embodiments of the present application described above and / or other desired functions. Various contents such as doping concentration distribution information can also be stored in the computer-readable storage medium.

[0101] In one example, the electronic device 800 may further include: an input device 830 and an output device 840, and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown).

[0102] The input device 830 may include, for example, a keyboard, a mouse, and so on.

[0103] The output device 840 may output various information to the outside, including atomic composition information and the like. The output device 840 may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, and so on.

[0104] Of course, for simplicity, Figure 8 only some of the components related to the present application in the electronic device 800 are shown, and components such as a bus, an input / output interface, and so on are omitted. In addition, according to specific application scenarios, the electronic device 800 may further include any other appropriate components.

[0105] In addition to the above methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions, and when the computer program instructions are run by a processor, the processor is caused to execute the steps in the image processing method according to various embodiments of the present application described above in this specification.

[0106] The computer program product may be written in any combination of one or more programming languages for programming code to perform the operations of the embodiments of the present application. The programming languages include object-oriented programming languages such as Java, C++, etc., and also include conventional procedural programming languages such as the "C" language or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, executed as an independent software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0107] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A test method for semiconductor electrical properties, characterized in that, it includes: S100. Obtain a semiconductor micro-Hall test structure, and the semiconductor micro-Hall test structure includes at least one doping element; S200. Measure the electrical parameters of the semiconductor micro-Hall test structure and obtain the doping concentration of the active doping elements in the semiconductor micro-Hall test structure; S300. Use secondary ion mass spectrometry to remove a thin layer with a specific thickness from the semiconductor micro-Hall test structure, analyze the atomic composition of the removed material, and obtain the doping concentration of the initial doping elements in the thin layer of the semiconductor micro-Hall test structure; S400. After removing the thin layer with a specific thickness, measure the electrical parameters of the semiconductor micro-Hall test structure again and obtain the doping concentration of the active doping elements in the semiconductor micro-Hall test structure. From the change in the doping concentration of the active doping elements in the semiconductor micro-Hall test structure obtained before and after removing the thin layer, the doping concentration of the active doping elements in the thin layer of the semiconductor micro-Hall test structure can be obtained; Repeat the steps S300 and S400 until the distribution information of the electrical parameters, the doping concentration of the initial doping elements, and the doping concentration of the active doping elements in the semiconductor micro-Hall test structure in the thickness direction is obtained, and calculate the distribution information of the doping efficiency of the semiconductor micro-Hall test structure according to the distribution information of the doping concentration of the active doping elements and the doping concentration of the initial doping elements.

2. The test method according to claim 1, characterized in that, the semiconductor micro-Hall test structure includes: a central region located at the intersection of the first axis and the second axis of the semiconductor micro-Hall test structure, and the first axis is perpendicular to the second axis; two arms symmetric with respect to the first axis extending from the central region and two arms symmetric with respect to the second axis; and bonding pads located at the ends of each arm far from the central region.

3. The test method according to claim 2, characterized in that, the width of the arm is less than or equal to 2.8 mm.

4. The test method according to claim 2, characterized in that, the measurement of the electrical parameters of the semiconductor micro-Hall test structure includes: Applying a current to two adjacent arms of the semiconductor micro-Hall test structure through the bonding pads, and measuring the voltage between the other two adjacent arms of the micro-Hall test structure to calculate the resistivity of the semiconductor micro-Hall test structure; When a magnetic field perpendicular to the plane where the semiconductor micro-Hall test structure is located is applied, applying a current to two non-adjacent arms of the semiconductor micro-Hall test structure through the bonding pads, and measuring the change in the voltage between the other two non-adjacent arms of the semiconductor micro-Hall test structure to measure the carrier concentration and carrier mobility of the semiconductor micro-Hall test structure.

5. The test method according to claim 1, characterized in that, the semiconductor micro-Hall test structure includes: A central region, located at the intersection of a first axis and a second axis of the semiconductor micro-Hall test structure, the first axis and the second axis being perpendicular to each other; Two arms extending from the central region and symmetric with respect to the first axis and four arms symmetric in pairs with respect to the second axis; and Bond pads located at the ends of the respective arms remote from the central region.

6. The test method according to claim 5, characterized in that the width of the arm is less than or equal to 0.5 mm.

7. The test method according to claim 5, characterized in that the measuring the electrical parameters of the semiconductor micro-Hall test structure includes: applying a current to the two arms symmetric with respect to the first axis through the bond pads and measuring the voltage between the two arms located on the same side of the second axis among the other four arms to calculate the resistivity of the semiconductor micro-Hall test structure; when a magnetic field perpendicular to the plane of the semiconductor micro-Hall test structure is applied, applying a current to the two arms symmetric with respect to the first axis through the bond pads and measuring the change in the voltage between any two arms symmetric with respect to the second axis among the other four arms to measure the carrier type, carrier concentration and carrier mobility.

8. The test method according to claim 1, characterized in that the semiconductor micro-Hall test structure includes a selectively grown semiconductor structure.

9. The test method according to claim 1, characterized in that the material of the semiconductor micro-Hall test structure includes a GaN-based material.

10. The test method according to claim 9, characterized in that the material of the semiconductor micro-Hall test structure includes P-type GaN, and the doping elements include at least one of Mg element, Zn element, Ca element, Sr element, Ba element, Li element, Na element or K element.

11. The test method according to claim 1, characterized in that the material of the semiconductor micro-Hall test structure includes a PN junction material.

12. The test method according to claim 11, characterized in that the P-type doping elements in the PN junction material include at least one of Mg element, Zn element, Ca element, Sr element, Ba element, Li element, Na element or K element, and the N-type doping elements include at least one of Si element, Ge element, Sn element, Se element or Te element.

13. The test method according to claim 11, characterized in that the measuring the electrical parameters of the semiconductor micro-Hall test structure further includes: applying an alternating magnetic field perpendicular to the plane of the semiconductor micro-Hall test structure to measure the electron mobility and hole mobility of the semiconductor micro-Hall test structure.

14. The test method according to claim 1, characterized in that in the step of removing a thin layer with a specific thickness layer by layer from the semiconductor micro-Hall test structure by secondary ion mass spectrometry, the etching range is a circular area centered on the central region with a maximum diameter less than or equal to 4 mm.

15. The test method according to claim 1, It is characterized in that in the method of removing a thin layer with a specific thickness from the semiconductor micro-Hall test structure by secondary ion mass spectrometry, the specific thickness is a fixed thickness, and the fixed thickness is less than or equal to 100 nm.

16. The test method according to claim 1, it is characterized in that the secondary ion mass spectrometry includes: glow discharge spectroscopy-secondary ion mass spectrometry or time-of-flight secondary ion mass spectrometry.

17. A test device for semiconductor electrical properties, it is characterized in that it includes: an acquisition module for acquiring a selectively grown semiconductor micro-Hall test structure, the semiconductor micro-Hall test structure including at least one doping element; an electrical test module for measuring the electrical parameters of the semiconductor micro-Hall test structure and obtaining the doping concentration of the active doping elements in the semiconductor micro-Hall test structure; an element analysis module for removing a thin layer with a specific thickness from the semiconductor micro-Hall test structure by secondary ion mass spectrometry, analyzing the atomic composition of the removed material, and obtaining the doping concentration of the initial doping elements in the thin layer of the semiconductor micro-Hall test structure; a calculation module for calculating the distribution information of the doping efficiency of the semiconductor micro-Hall test structure according to the distribution information of the doping concentration of the active doping elements and the doping concentration of the initial doping elements; wherein, the electrical test module and the element analysis module are respectively used to repeatedly execute until the distribution information of the electrical parameters, the doping concentration of the initial doping elements, and the doping concentration of the active doping elements of the semiconductor micro-Hall test structure is obtained.

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