Optical element

Abstract

The invention provides an optical element capable of suppressing light loss. The optical element includes: a substrate having a first region and a second region in a plane; a first waveguide for inputting light; and a second waveguide for outputting light, the second region surrounding the first region, the first waveguide and the second waveguide being optically coupled to the first region, in the first region, the substrate includes a first layer and a second layer stacked in sequence, the second layer being provided with a plurality of holes, and the first layer being provided with a plurality of holes. A depth of the hole is less than 1 / 2 of a thickness of the second layer in the first region, and a depth of the hole is less than 1 / 2 of a thickness of the second layer in the second region in which the substrate does not have the second layer but has the first layer.

Description

Technical Field

[0001] The present invention relates to an optical element. Background Art

[0002] A mosaic-type optical element having a plurality of holes disposed in the plane of a substrate is under development (Non-Patent Document 1, etc.).

[0003] Prior Art Documents Non-Patent Documents Non-Patent Document 1: “Deep Learning Enabled Design of Complex Transmission Matrices for Universal Optical Components” Nicholas J. Dinsdale et.al. ACS Photonics 2021, 8, 283-295 Summary of the Invention Problems to be Solved by the Invention There is known an optical element that can branch light at a specific branching ratio according to the pattern of holes. However, there is a risk of increased light loss due to the holes. Therefore, an object of the present invention is to provide an optical element capable of suppressing light loss.

[0004] Means for Solving the Problems The optical element according to the present invention includes: a substrate having a first region and a second region in the plane; a first waveguide for inputting light; and a second waveguide for outputting light, the second region surrounding the first region, the first waveguide and the second waveguide being optically coupled to the first region, in the first region, the substrate includes a first layer and a second layer stacked in sequence, a plurality of holes are provided in the second layer, the depth of the holes is 1 / 2 or less of the thickness of the second layer, and in the second region, the substrate does not have the second layer but has the first layer.

[0005] Advantages of the Invention According to the present invention, an optical element capable of suppressing light loss can be provided. Description of the Drawings

[0006] Figure 1 It is a plan view showing an optical element according to a first embodiment by way of example.

[0007] Figure 2 It is a schematic plan view of a multiplexer / demultiplexer after magnification.

[0008] Figure 3A It is along Figure 2 a cross-sectional view taken along line A-A.

[0009] Figure 3B is a cross-sectional view along line B-B Figure 2 .

[0010] Figure 3C is a cross-sectional view exemplifying a grating coupler

[0011] Figure 4A is a cross-sectional view exemplifying a method of manufacturing an optical element

[0012] Figure 4B is a cross-sectional view exemplifying a method of manufacturing an optical element

[0013] Figure 5A is a cross-sectional view exemplifying a method of manufacturing an optical element

[0014] Figure 5B is a cross-sectional view exemplifying a method of manufacturing an optical element

[0015] Figure 6 is a cross-sectional view exemplifying a multiplexer / demultiplexer according to a comparative example

[0016] Figure 7A is a top view exemplifying a multiplexer / demultiplexer according to a second embodiment

[0017] Figure 7B is a top view exemplifying a multiplexer / demultiplexer according to a second embodiment

[0018] Figure 7C is a top view exemplifying a multiplexer / demultiplexer according to a second embodiment

[0019] Figure 8A is a diagram exemplifying calculation results of a branching ratio

[0020] Figure 8B is a diagram exemplifying calculation results of a branching ratio

[0021] Figure 8C is a diagram exemplifying calculation results of a branching ratio

[0022] Figure 9 is a diagram exemplifying calculation results of optical loss

[0023] Figure 10A is a top view exemplifying a multiplexer / demultiplexer when the depth of a hole is set to 20 nm

[0024] Figure 10B is a top view exemplifying a multiplexer / demultiplexer when the depth of a hole is set to 20 nm

[0025] Figure 10CIt is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 20 nm as an example.

[0026] Figure 11A It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 70 nm as an example.

[0027] Figure 11B It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 70 nm as an example.

[0028] Figure 11C It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 70 nm as an example.

[0029] Figure 11D It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 70 nm as an example.

[0030] Figure 11E It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 70 nm as an example.

[0031] Figure 12A It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 120 nm as an example.

[0032] Figure 12B It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 120 nm as an example.

[0033] Figure 12C It is a top view of a multiplexer / demultiplexer when the depth of the hole is set to 120 nm as an example.

[0034] Figure 13A It is a diagram showing the calculation results of the branching ratio as an example.

[0035] Figure 13B It is a diagram showing the calculation results of the branching ratio as an example.

[0036] Figure 13C It is a diagram showing the calculation results of the branching ratio as an example.

[0037] Figure 14 It is a diagram showing the calculation results of the optical loss as an example.

[0038] Figure 15 It is a diagram showing the spectrum as an example.

[0039] Figure 16 It is a diagram showing the spectrum as an example.

[0040] Figure 17 It is a diagram showing the spectrum as an example.

[0041] Figure 18It is a diagram showing the calculation result of the branching ratio.

[0042] Figure 19 It represents the calculation result of the optical loss.

[0043] Figure 20A It is a diagram exemplifying the spectrum.

[0044] Figure 20B It is a top view exemplifying the multiplexer / demultiplexer according to the third embodiment.

[0045] Figure 21A It is a diagram exemplifying the spectrum.

[0046] Figure 21B It is a top view exemplifying the multiplexer / demultiplexer according to the third embodiment.

[0047] Figure 22A It is a diagram exemplifying the spectrum.

[0048] Figure 22B It is a top view exemplifying the multiplexer / demultiplexer according to the third embodiment.

[0049] Figure 23 It is a top view exemplifying the mode converter according to the fourth embodiment.

[0050] Figure 24A It is a diagram exemplifying the spectrum.

[0051] Figure 24B It is a top view exemplifying the mode converter according to the fourth embodiment.

[0052] Figure 25A It is a diagram exemplifying the spectrum.

[0053] Figure 25B It is a top view exemplifying the mode converter according to the fourth embodiment.

[0054] Explanation of Reference Numerals 1: Optical element; 10, 12: Substrate; 14: Buried oxide layer; 16: Silicon layer; 17: Platform; 18: Cladding layer; 19: Rib; 20, 22, 24: Waveguide; 26: Grating coupler; 26a: Protrusion; 26b: Recess; 30, 31, 32: Region; 40: Hole; 50, 54: Resist mask; 52: Opening; 100, 110: Multiplexer / demultiplexer; 400: Mode converter. Detailed Description of the Embodiment

[0055] [Description of Embodiments of the Present Invention] First, the contents of the embodiments of the present invention will be listed and described.

[0056] One aspect of the present invention is (1) an optical element, wherein the optical element includes: a substrate having a first region and a second region in a plane; a first waveguide for inputting light; and a second waveguide for outputting light, the second region surrounding the first region, the first waveguide and the second waveguide being optically coupled to the first region, in the first region, the substrate includes a first layer and a second layer stacked in sequence, a plurality of holes are provided in the second layer, the depth of the holes being 1 / 2 or less of the thickness of the second layer, and in the second region, the substrate does not have the second layer but has the first layer. Light loss can be suppressed.

[0057] (2) Alternatively, based on the above (1), the depth of the holes is 1 / 20 or more and 1 / 2 or less of the thickness of the second layer. Light loss can be suppressed.

[0058] (3) Alternatively, based on the above (1) or (2), the depth of the holes is 1 / 5 or more and 2 / 5 or less of the thickness of the second layer. Light loss can be suppressed.

[0059] (4) Alternatively, based on any one of the above (1) to (3), the first layer is formed of silicon oxide and the second layer is formed of silicon. Light loss can be suppressed.

[0060] (5) Alternatively, based on any one of the above (1) to (4), the planar shape of the holes is rectangular. Light loss can be suppressed.

[0061] (6) Alternatively, based on any one of the above (1) to (5), the planar shape of the first region is rectangular. Light can be confined in the rectangular first region and loss can be suppressed.

[0062] (7) Alternatively, based on any one of the above (1) to (6), the optical element includes one first waveguide and a plurality of second waveguides. Light can be branched.

[0063] (8) Alternatively, based on any one of the above (1) to (7), the mode of the light input to the first waveguide is different from the mode of the light output from the second waveguide. The mode of light can be converted.

[0064] (9) Alternatively, based on any one of the above (1) to (8), the optical element includes a grating coupler, the grating coupler being connected to at least one of the first waveguide and the second waveguide, the grating coupler being formed of the second layer and having irregularities provided on the second layer, the depth of the holes being equal to the depth of the irregularities. The holes and the irregularities can be formed simultaneously.

[0065] (10) Alternatively, based on any one of the above (1) to (9), the optical element includes an insulating film that covers the side surface and the upper surface of the first region and the upper surface of the second region. Light can be confined in the second layer of the first region.

[0066] [Details of Embodiments of the Present Invention] Hereinafter, a specific example of an optical element according to an embodiment of the present invention will be described with reference to the drawings. It should be noted that the present invention is not limited to these examples, as shown in the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0067] <First Embodiment> (Optical Element) Figure 1 FIG. 13 is a plan view schematically showing an optical element 1 according to the first embodiment. The optical element 1 includes a substrate 10, a multiplexer / demultiplexer 100, waveguides 20, 22, and 24, and three grating couplers 26. In the plan view, the cladding layer covering the optical element 1 is shown in a perspective view.

[0068] The substrate 10 is, for example, an SOI (Silicon on Insulator) substrate. Two sides of the substrate 10 are parallel to the X-axis direction. The other two sides are parallel to the Y-axis direction. The upper surface of the substrate 10 is parallel to the XY plane. The Z-axis direction is the normal direction of the substrate 10. The X-axis direction, the Y-axis direction, and the Z-axis direction are orthogonal to each other. The length L1 of the substrate 10 in the X-axis direction is, for example, 300 μm. The length L2 of the substrate 10 in the Y-axis direction is, for example, 150 μm.

[0069] The substrate 10 has a region 30 (first region) and a region 32 (second region). The region 30 is located at the center of the substrate 10. The region 32 is located outside the region 30 and surrounds the region 30. The multiplexer / demultiplexer 100 is provided in the region 30.

[0070] The waveguides 20, 22, and 24 are optically coupled to the multiplexer / demultiplexer 100. The waveguide 20 (first waveguide) is connected to one end of the multiplexer / demultiplexer 100. The waveguides 22 and 24 (second waveguides) are connected to the other end of the multiplexer / demultiplexer 100. The grating couplers 26 are connected to the portions of the waveguides 20, 22, and 24 opposite to the multiplexer / demultiplexer 100, respectively. The waveguides 20, 22, 24, and the grating couplers 26 are provided in the region 32. The length La of the grating coupler 26 in the X-axis direction is, for example, 60 μm. The length Lb of the grating coupler 26 in the Y-axis direction is, for example, 30 μm.

[0071] In an example of the present invention, the multiplexer / demultiplexer 100 is a power multiplexer / demultiplexer. A power multiplexer / demultiplexer refers to an element that branches the input light in a certain intensity ratio and outputs it as multiple lights, or combines the input multiple lights and outputs them as one or more lights. In another example of the present invention, the multiplexer / demultiplexer is a mode distributor. A mode distributor refers to an element that, when light with a specific polarization is input, converts a part of the light into light with another polarization in a certain ratio, branches it into light with a specific polarization and light with another polarization, and outputs them. In yet another example of the present invention, the multiplexer / demultiplexer is a mode converter. A mode converter refers to an element that, when light with a specific polarization is input, converts the light into light with another polarization and outputs it.

[0072] (Multiplexer / Demultiplexer) Figure 2 is a schematic top view of the multiplexer / demultiplexer 100 after magnification. The multiplexer / demultiplexer 100 is disposed in the region 30 of the substrate 10. The planar shape of the region 30 is rectangular. The region 32 is located outside the region 30.

[0073] The multiplexer / demultiplexer 100 is a mosaic-type passive optical element. Mosaic-type refers to a structure in which a plurality of holes 40 are arranged two-dimensionally in a plane. The multiplexer / demultiplexer 100 branches and emits the incident light with a specific wavelength, or combines and emits the incident multiple lights with the same wavelength as each other. The planar shape of the multiplexer / demultiplexer 100 is, for example, rectangular. The length L3 of the multiplexer / demultiplexer 100 in the X-axis direction is, for example, 32 μm. The length L4 in the Y-axis direction is, for example, 6 μm.

[0074] The multiplexer / demultiplexer 100 has a plurality of holes 40. The plurality of holes 40 are arranged two-dimensionally in the XY plane and arranged along the X-axis direction and the Y-axis direction. The planar shape of the hole 40 is, for example, rectangular. The length L5 of one side of the hole 40 is, for example, 400 nm. The number and position of the holes 40 are determined according to the characteristics of the multiplexer / demultiplexer 100. The characteristics are, for example, the branching ratio, the mode of the output light, etc.

[0075] Figure 3A is a cross-sectional view along Figure 2 the line A-A. Figure 3B is a cross-sectional view along Figure 2 the line B-B. As Figure 3A and Figure 3B shown, the substrate 10 is an SOI substrate and has a substrate 12, a buried oxide layer 14 (the first layer), and a silicon layer 16 (the second layer).

[0076] As Figure 3AAs shown, a multiplexer / demultiplexer 100 is formed in a region 30 of a substrate 10. A silicon layer 16 is provided in the region 30. A buried oxide layer 14 is stacked on one surface of the substrate 12. The silicon layer 16 is stacked on the surface of the buried oxide layer 14 opposite to the substrate 12. The thickness T1 of a thicker portion in the silicon layer 16 is, for example, 220 nm. A cladding layer 18 (insulating film) is stacked on the surface of the silicon layer 16 opposite to the buried oxide layer 14. The substrate 12 and the silicon layer 16 are formed of silicon (Si). The buried oxide layer 14 and the cladding layer 18 are formed of insulators such as silicon oxide (SiO 2 ). The thickness of the buried oxide layer 14 is, for example, 3 μm. The refractive index of silicon is about 3.46 at a wavelength of 1.55 μm. The refractive index of SiO 2 is about 1.46 at a wavelength of 1.55 μm. The refractive index of the silicon layer 16 is higher than the refractive indices of the buried oxide layer 14 and the cladding layer 18. In the Y-axis direction, in a region 32 adjacent to the region 30, the silicon layer 16 is not provided, but the substrate 12 and the buried oxide layer 14 are provided.

[0077] As Figure 3A shown, a plurality of holes 40 are provided in the silicon layer 16. A portion of the silicon layer 16 where the holes 40 are not provided is defined as a platform 17. The thickness of the silicon layer 16 at the position of the platform 17 is T1. In the Z-axis direction, the holes 40 are recessed with respect to the platform 17. The depth D1 of the holes 40 with respect to the upper surface of the platform 17 is 1 / 2 or less of the thickness T1 of the silicon layer 16. When the thickness T1 is 220 nm, the depth D1 is 110 nm or less, and for example, it can be 50 nm or more and 100 nm or less, or it can be 70 nm.

[0078] The cladding layer 18 covers the upper surface and the side surfaces of the silicon layer 16. The inside of the holes 40 may be filled with the cladding layer 18, or may not be filled with the cladding layer 18 and may contain air. The positions and the number of the holes 40 are determined according to characteristics. The number of the holes 40 is, for example, several tens, several hundreds, or more than a thousand.

[0079] As Figure 3B shown, a waveguide 20 is formed of the silicon layer 16. The cross-sectional shape of the waveguide 20 is rectangular. The width W1 of the waveguide 20 is, for example, 1 μm. The thickness of the waveguide 20 is the same as the thickness of the platform 17 of the silicon layer 16, and is, for example, 220 nm. The upper surface and the side surfaces of the waveguide 20 are covered by the cladding layer 18. The waveguides 22 and 24 have the same structure as the waveguide 20.

[0080] (Grating coupler) Figure 3CFIG. 0 is a cross-sectional view exemplarily showing the grating coupler 26. The grating coupler 26 is provided on the silicon layer 16 and has unevenness. That is, a plurality of convex portions 26a and a plurality of concave portions 26b are alternately arranged. The thickness of the silicon layer 16 in the convex portion 26a is equal to the thickness T1 of the platform 17. The depth D2 from the upper surface of the convex portion 26a to the bottom surface of the concave portion 26b is equal to the depth D1 of the hole 40, for example, 70 nm.

[0081] As Figure 1 shown, three waveguides 20, 22, and 24 are connected to the multiplexer / demultiplexer 100. Light enters the waveguide 20 from the grating coupler 26. As Figure 2 indicated by the arrow in FIG., the light propagates in the waveguide 20 and is input to the multiplexer / demultiplexer 100. The inside of the hole 40 is filled with the cladding layer 18 of SiO 2 . The refractive index of the hole 40 is different from that of the silicon layer 16. The light is scattered and branched in the plane including the substrate 10 and the cladding layer 18. A part of the light is output from the waveguide 22. Another part of the light is output from the waveguide 24. When the branching ratio of the light is set to γ, when light with an intensity of 1 is input to the waveguide 20, the intensity of the light output from the waveguide 24 is γ, and the intensity of the light output from the waveguide 22 is 1−γ. γ is a value of 1 or less. The outgoing light from the waveguides 22 and 24 is output through the grating coupler 26.

[0082] It is only necessary to design the arrangement of the plurality of holes 40 according to the desired branching ratio. It is also possible to design a pattern corresponding to the desired branching ratio by repeatedly performing simulation calculations of the branching ratio while changing the pattern of the hole 40.

[0083] (Manufacturing method) Figures 4A to 5B FIG. 18 is a cross-sectional view exemplarily showing the manufacturing method of the optical element 1, and shows a cross-section corresponding to Figure 3A .

[0084] As Figure 4A shown, a resist is coated on the upper surface of the silicon layer 16, and photolithography is performed using a stepper to form a resist mask 50. According to the designed arrangement of the holes 40, the resist mask 50 is patterned to form an opening 52. The silicon layer 16 is exposed from the opening 52.

[0085] As Figure 4B shown, dry etching is performed to form the holes 40 in the silicon layer 16. The portion of the silicon layer 16 exposed from the opening 52 of the resist mask 50 is etched to form the holes 40. The etching depth is half or less of the thickness of the silicon layer 16, for example, 70 nm. A silicon layer 16 with a thickness of 150 nm remains between the bottom surface of the hole 40 and the upper surface of the buried oxide layer 14. The portion of the silicon layer 16 covered by the resist mask 50 is not etched.

[0086] Although the illustration is omitted, the resist mask 50 also has an opening in the part where the grating coupler 26 is manufactured. The part of the silicon layer 16 exposed from this opening is dry-etched to a depth of, for example, 70 nm. While the hole 40 is manufactured, the recess 26b of the grating coupler 26 is also formed. A waveguide is not formed in this process. After the hole 40 and the recess 26b are manufactured, the resist mask 50 is removed.

[0087] As Figure 5A shown, a resist is coated on the upper surface of the silicon layer 16, and photolithography is performed to form a resist mask 54. The resist mask 54 is rectangular and covers the region 30. In the Y-axis direction, the silicon layer 16 in the region 32 adjacent to the region 30 is exposed from the resist mask 54.

[0088] As Figure 5B shown, dry etching is performed to remove the part of the silicon layer 16 exposed from the resist mask 54. The silicon layer 16 is removed from the region 32 to expose the buried oxide layer 14. The silicon layer 16 remains in the region 30.

[0089] Although the illustration is omitted, the resist mask 54 is also patterned in the part where the waveguide is manufactured. The resist mask 54 covers the part of the silicon layer 16 where the waveguide is formed. After dry etching, a waveguide is formed in the part where the silicon layer 16 remains. After dry etching, the resist mask 54 is removed. The cladding layer 18 is formed. The cladding layer 18 covers the upper surface and the side surfaces of the region 30, the upper surface of the region 32, and the waveguide. The optical element 1 is manufactured through the above processes.

[0090] (Comparative Example) Figure 6 is a cross-sectional view showing an example of the multiplexer / demultiplexer 110 according to the comparative example. The substrate 10 has a region 31. A plurality of holes 40 are provided in the region 31. The depth D3 of the hole 40 is greater than Figure 3A the depth D1 in, and greater than 1 / 2 of the thickness T1 of the silicon layer 16. When the thickness T1 is 220 nm, the depth D3 is, for example, greater than 110 nm. The silicon layer 16 has ribs 19. The ribs 19 protrude outward from the region 31 in the XY plane. The distance from the upper surface of the rib 19 to the upper surface of the platform 17 is, for example, equal to the depth D3.

[0091] The hole 40 in the comparative example is deep, so the optical mode of the waveguide in the multiplexer / demultiplexer 110 is approximately symmetric in the Z-axis direction. However, in the Z-axis direction, about half of the optical mode leaks into the cladding layer 18. The light is strongly scattered by the deep hole 40, and there are silicon ribs 19, so the scattered light leaks out of the multiplexer / demultiplexer 110 in the XY plane. The light loss increases.

[0092] According to the first embodiment, the substrate 10 has a region 30 and a region 32. As Figure 3AAs shown, in region 30, a buried oxide layer 14 and a silicon layer 16 are stacked. As Figure 2 shown, a plurality of holes 40 are provided in the silicon layer 16. The depth D1 of the holes 40 is less than or equal to 1 / 2 of the thickness T1 at the position of the platform 17 of the silicon layer 16. The optical mode is not likely to leak out in the thickness direction. Compared with the scattering based on deep holes, the scattering of light based on the shallow holes 40 is weak. As Figure 3A shown, in the cross-section in the Y-axis direction, in the region 32 near the multiplexer / demultiplexer 100, the substrate 10 does not have the silicon layer 16. In the XY plane, light is strongly confined in the region 30 and is not likely to leak to the outside. Since light is scattered by the shallow holes 40 in the region 30, light loss can be suppressed.

[0093] The scattering based on the shallow holes 40 is weaker than the scattering based on deep holes. According to the first embodiment, since light is confined in the region 30, light is not likely to leak out. The light confined in the region 30 is scattered by the plurality of holes 40, whereby light can be branched at a desired branching ratio.

[0094] The depth D1 of the holes 40 can be 1 / 20 or more and 1 / 2 or less of the thickness T1 of the silicon layer 16, or can be 1 / 5 or more and 2 / 5 or less of the thickness T1. If the thickness T1 is 220 nm, the depth D1 is 11 nm or more, 110 nm or less, 44 nm or more, 88 nm or less, etc. Light loss can be suppressed.

[0095] As Figure 3A shown, the substrate 10 is, for example, an SOI substrate and has a substrate 12, a buried oxide layer 14, and a silicon layer 16. In the region 30, the substrate 12, the buried oxide layer 14, and the silicon layer 16 are stacked in sequence. In the region 32, the substrate 12 and a buried oxide layer 14 of SiO 2 are stacked. Near the multiplexer / demultiplexer 100, the silicon layer 16 is not provided except for the waveguides 20, 22, and 24. Light can be strongly confined in the region 30 and scattered in the multiplexer / demultiplexer 100. Light loss can be suppressed and light can be branched.

[0096] As Figure 2 shown, the planar shape of the region 30 of the substrate 10 is rectangular. The region 32 surrounds the region 30. Light can be confined in the rectangular region 30 to suppress loss. In addition to the rectangle, the region 30 may have a polygonal, circular, or elliptical shape. The substrate 10 may also be a substrate other than the SOI substrate. The layers included in the substrate 10 may also be formed of materials other than SiO 2 and Si. One layer of the substrate 10 is provided in the region 30, and as long as a plurality of holes 40 are provided in the one layer.

[0097] As Figure 2As shown, the planar shape of the hole 40 is rectangular. By arranging a plurality of rectangular holes 40 two-dimensionally, light can be branched. The planar shape of the hole 40 can also be circular, elliptical, polygonal, etc.

[0098] The length L5 of one side of the hole 40 is several hundred nm, for example, 400 nm. If the design value of the branching ratio is the same, even if the size of the hole 40 changes, the positions of the plurality of holes 40 will not change significantly. However, if the hole 40 is too large, the branching ratio may deviate from the design value. If the hole 40 is too small, it is difficult to fabricate it with high precision such as by dry etching. Let the length L5 of the hole 40 be, for example, 50 nm or more and 1000 nm or less. The hole 40 can be fabricated and the branching ratio can be made close to the design value.

[0099] The multiplexer / demultiplexer 100 is a one-input two-output component and has a waveguide 20, a waveguide 22, and a waveguide 24. Light is input from the waveguide 20. The light is scattered by the plurality of holes 40. The light is output from the waveguide 22 and the waveguide 24. Light can be branched at a desired branching ratio. The light input from the waveguide 22 and the waveguide 24 can also be combined and output from the waveguide 20. The number of output waveguides can be one or more than two.

[0100] The mode of the light input to the waveguide 20 can be the same as the mode of the light output from the waveguide 22 and the mode of the light output from the waveguide 24, or can be different from at least one of the output modes.

[0101] As Figure 1 shown, the grating coupler 26 is coupled to the waveguide. The depth D2 of the concave portion 26b of the grating coupler 26 can also be equal to the depth D1 of the hole 40. The hole 40 and the concave portion 26b can be fabricated simultaneously by one etching. The grating coupler 26 can be coupled to all the waveguides, or can be coupled to at least one waveguide. The optical element 1 may not include the grating coupler. The waveguides 20, 22, and 24 may also extend to the end face of the optical element 1, and light is incident on and emitted from the optical element 1 through the end face.

[0102] The cladding layer 18 covers the side surface and the upper surface of the region 30, and covers the upper surface of the region 32. The refractive index of the silicon layer 16 is higher than the refractive indices of the cladding layer 18 and the buried oxide layer 14. Light can be strongly confined in the silicon layer 16 of the region 30, suppressing losses.

[0103] The hole 40 can be a cavity or can be filled with the cladding layer 18. The refractive index of the hole 40 is different from the refractive index of silicon. The refractive index changes in the plane of the substrate 10. Light can be branched.

[0104] <Second Embodiment> (Example where D1 = 70 nm) In the second embodiment, the branching ratio γ is determined to be a specific value, and the multiplexer / demultiplexer is designed according to this branching ratio. Figures 7A to 7C FIG. is a plan view showing the multiplexer / demultiplexer according to the second embodiment. Description of the same structure as that of the first embodiment is omitted.

[0105] The region 30 of the substrate 10 has a silicon layer 16. The region 32 is located outside the region 30 and does not have a silicon layer 16 near the Y-axis direction of the multiplexer / demultiplexer. The length of the silicon layer 16 of the substrate 10 in the X-axis direction is 32 μm, and the length in the Y-axis direction is 6 μm. The silicon layer 16 of the region 30 is divided into pixels of 400 nm × 400 nm. The number of pixels is 15 × 80. A part of the pixels is etched to form holes 40. Another part of the pixels is not etched and forms platforms 17. The designed value of the depth D1 of the holes 40 is 70 nm, and the designed values of the branching ratio γ are 0.2, 0.3, and 0.4. As Figures 7A to 7C shown, the configuration of the plurality of holes 40 is designed according to the branching ratio. The adjacent plurality of holes 40 are continuous to form a recess.

[0106] Figure 7A The multiplexer / demultiplexer is an example in which the branching ratio is set to 0.2. Figure 7B The multiplexer / demultiplexer is an example in which the branching ratio is set to 0.3. Figure 7C The multiplexer / demultiplexer is an example in which the branching ratio is set to 0.4. In Figure 7A the example, when light is input from the waveguide 20 to the multiplexer / demultiplexer, ideally, 80% of the light is output from the waveguide 22, and 20% of the light is output from the waveguide 24. Other multiplexer / demultiplexers also output light according to the branching ratio. These multiplexer / demultiplexers can be applied to Figure 1 the optical element 1.

[0107] On the basis of maintaining the configuration of the holes 40 as the designed configuration, the depth of the holes 40 is changed to 20 nm, 50 nm, 70 nm, 100 nm, and 120 nm, and the branching ratio and the light loss are calculated. The substrate 10 is an SOI substrate, and the thickness of the silicon layer 16 of the part where the holes 40 are not formed is 220 nm. The wavelength of the light is 1550 nm.

[0108] Figures 8A to 8C FIG. is a diagram showing an example of the calculation result of the branching ratio. The horizontal axis represents the depth D1 of the holes 40. The vertical axis represents the splitting ratio (SR). If the branching ratio is set to γ, SR is expressed by the following formula.

[0109] SR = γ / (1 - γ) (1) If γ is 0.2, then SR is 0.25. If γ is 0.3, then SR is approximately 0.43. If γ is 0.4, then SR is approximately 0.67. If the branching ratio γ is the designed value (ideal value), then SR is also the above ideal value. If the branching ratio γ deviates from the ideal value, then SR also becomes a value different from the ideal value. In Figures 8A to 8C the solid line represents the ideal value of the splitting ratio. The dotted line represents the calculation result of SR.

[0110] Figure 8A is the calculation result of the branching ratio when the designed value of the branching ratio γ is set to 0.2. When the depth of the hole 40 is 20 nm, SR exceeds 1. This is because the branching ratio γ deviates from 0.2. In each case where the depth is 50 nm, 70 nm, 100 nm, and 120 nm, SR is close to the ideal value. This is because the branching ratio γ is close to the designed value of 0.2.

[0111] Figure 8B is the calculation result of the branching ratio when the designed value of the branching ratio γ is set to 0.3. When the depth of the hole 40 is 20 nm, SR exceeds 1. When the depth is 50 nm, SR is between 0.6 and 0.7. In each case where the depth is 70 nm, 100 nm, and 120 nm, SR is close to the ideal value. That is, the branching ratio γ is close to the designed value of 0.3.

[0112] Figure 8C is the calculation result of the branching ratio when the designed value of the branching ratio γ is set to 0.4. When the depth of the hole 40 is 20 nm, SR exceeds 1. The closer the depth is to the designed value of 70 nm, the closer SR is to the ideal value. The branching ratio γ is close to the designed value of 0.4.

[0113] Figure 9 is a diagram showing an example of the calculation result of light loss. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the light loss in the multiplexer / demultiplexer. The solid line represents the loss when the designed value of the branching ratio γ is 0.2. The dotted line represents the loss when γ = 0.3. The dashed line represents the loss when γ = 0.4. As Figure 9 shown, for any branching ratio, if the hole 40 is deep, the loss increases. When the depth is 20 nm, 50 nm, and 70 nm, the loss decreases.

[0114] As Figure 9 shown, if the depth of the hole 40 is 100 nm or more, the loss increases. When the depth is 20 nm, the loss can be reduced. However, as Figures 8A to 8C shown, the branching ratio deviates from the ideal value. When the depth is from 50 nm to 70 nm, the branching ratio is close to the ideal value, and the loss can also be suppressed.

[0115] (Redesign) Next, for each depth of the hole 40, the multiplexer / demultiplexer is redesigned, and the branch ratio and loss are calculated. The depth D1 of the hole 40 is set to 20 nm, 50 nm, 70 nm, 100 nm, or 120 nm, and the designed value of the branch ratio γ is set to 0.1, 0.2, 0.3, 0.4, or 0.5. For each depth and each branch ratio, the multiplexer / demultiplexer is designed. That is, the configurations of multiple holes 40 are redesigned so that the branch ratio is as close as possible to the desired branch ratio γ at each depth.

[0116] Figures 10A to 10C FIG. is a top view of the multiplexer / demultiplexer in the case where the depth D1 of the hole 40 is set to 20 nm as an example. Figures 11A to 11E FIG. is a top view of the multiplexer / demultiplexer in the case where the depth D1 of the hole 40 is set to 70 nm as an example. Figures 12A to 12C FIG. is a top view of the multiplexer / demultiplexer in the case where the depth D1 of the hole 40 is set to 120 nm as an example. Figure 11A This is an example where the designed value of the branch ratio γ is set to 0.1. Figure 10A , Figure 11B and Figure 12A This is an example where the designed value of the branch ratio γ is set to 0.2. Figure 10B , Figure 11C and Figure 12B This is an example where the designed value of the branch ratio γ is set to 0.3. Figure 10C , Figure 11D and Figure 12C This is an example where the designed value of the branch ratio γ is set to 0.4. Figure 11E This is an example where the designed value of the branch ratio γ is set to 0.5. Diagrams of the multiplexer / demultiplexer with D1 = 50 nm and D1 = 100 nm are omitted.

[0117] For example, as shown in Figure 10A , Figure 11B and Figure 12A , when comparing with the same branch ratio (γ = 0.2), the shallower the hole 40, the more the number of holes 40, and the deeper the hole 40, the fewer the number. Compared with the shallow hole 40, light is scattered more strongly by the deep hole 40. Therefore, the desired branch ratio is achieved with a smaller number of holes 40. Since the scattering based on the shallow hole 40 is weaker, the desired branch ratio is achieved with a larger number of holes 40.

[0118] Figures 13A to 13C FIG. is a diagram showing an example of the calculation result of the branch ratio. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the splitting ratio (SR). In each figure, the solid line represents the ideal value of the splitting ratio. The dotted line represents the calculation result of SR.

[0119] Figure 13AThese are the calculation results of the branching ratio when the designed value of the branching ratio γ is set to 0.2. At any depth, the calculated SR deviates from the ideal value by about 0.01. Figure 13B These are the calculation results of the branching ratio when the designed value of the branching ratio γ is set to 0.3. The deeper the hole 40, the greater the deviation of the SR from the ideal value. The shallower the hole 40, the closer the SR is to the ideal value. Figure 13C These are the calculation results of the branching ratio when the designed value of the branching ratio γ is set to 0.4. When the depth of the hole 40 is 100 nm and 120 nm, the calculated value of the SR deviates significantly from the ideal value. When the depth is 50 nm, the calculated value of the SR is closest to the ideal value.

[0120] Figure 14 This is a diagram showing an example of the calculation results of light loss. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the light loss in the multiplexer / demultiplexer. The solid line represents the loss when the designed value of the branching ratio γ is 0.2. The dotted line represents the loss when γ = 0.3. The dashed line represents the loss when γ = 0.4. As Figure 14 shown, in the example of γ = 0.2, at any depth, the loss is in the range of 0.6 dB to 0.4 dB. In the examples of γ = 0.3 and γ = 0.4, if the depth is 120 nm, the loss is large. When the depth is from 20 nm to 100 nm, the loss is suppressed.

[0121] As Figure 13B and Figure 13C shown, when the depth D1 is 20 nm, 50 nm, and 70 nm, the branching ratio is close to the ideal value. As Figure 14 shown, when the depth D1 is 120 nm, the loss is large. If the hole 40 is shallow, the loss is suppressed, and when D1 = 70 nm and D1 = 100 nm, the loss is particularly reduced. As Figures 13A to 13C shown, even if the depth D1 is changed to explore the configuration of the hole 40 close to the ideal value, the branching ratio γ does not necessarily match the ideal value. When the depth D1 is around 70 nm, compared with other depths, at any branching ratio, the calculated value of the SR does not deviate significantly from the ideal value. When designing a multiplexer / demultiplexer with multiple branching ratios γ at the same hole depth D1, the depth D1 is preferably around 70 nm.

[0122] (Wavelength Dependence) The wavelength of the light is changed from 1520 nm to 1600 nm, and the characteristics of the multiplexer / demultiplexer are measured and calculated. The depth D1 of the hole 40 is set to 70 nm. The branching ratio γ is set to 0.1, 0.3, and 0.5 to design the multiplexer / demultiplexer.

[0123] Figures 15 to 17It is a diagram exemplifying a spectrum. The horizontal axis represents the wavelength of light. The vertical axis represents the transmittance or reflectance of light. The reflectance, the transmittance from waveguide 22, and the transmittance from waveguide 24 are illustrated. The dashed line represents the calculation result of the transmittance of waveguide 22. The dotted line represents the measurement result of the transmittance of waveguide 22. The dash-dotted line represents the calculation result of the transmittance of waveguide 24. The solid line represents the measurement result of the transmittance of waveguide 24. The thin solid line represents the calculation result of the reflectance. The reflectance refers to the ratio of the light reflected by waveguide 20 when light is input from waveguide 20.

[0124] Figure 15 This is an example where γ = 0.1, showing Figure 11A the spectrum in the multiplexer / demultiplexer. The ratio of transmittances is ideally -0.46 dB∶-10 dB. Figure 16 This is an example where γ = 0.3, showing Figure 11C the spectrum in the multiplexer / demultiplexer. The ratio of transmittances is ideally -1.54 dB∶-5.23 dB. Figure 17 This is an example where γ = 0.5, showing Figure 11E the spectrum in the multiplexer / demultiplexer. The ratio of transmittances is ideally -3 dB∶-3 dB. In Figures 15 to 17 each of these examples, the measurement results of the transmittance are close to the calculation results. It can be seen that in the wavelength range of 1520 nm to 1600 nm, the branching ratio is close to the desired value.

[0125] According to the second embodiment, by designing the number and position of holes 40 according to the branching ratio γ, the desired branching ratio can be obtained. As Figure 9 shown, if the hole 40 becomes deeper, the loss increases. When the depth D1 is 50 nm to 70 nm, the branching ratio is close to the ideal value, and the loss can be suppressed. As Figure 14 shown, when the depth D1 is 120 nm, the loss is large. If the hole 40 is shallow, the loss is suppressed. That is, the depth D1 of the hole 40 is set to be less than or equal to 1 / 2 of the thickness T1 of the thicker part of the silicon layer 16. When the thickness T1 is 220 nm, the depth D1 is set to be, for example, more than 1 / 20 (11 nm or more), more than 1 / 5 (44 nm or more), and less than 2 / 5 (80 nm or less) of T1. The loss of light can be suppressed. As Figures 15 to 17 shown, when the depth D1 is set to 70 nm, the desired branching ratio is achieved in the wavelength range of 1520 nm to 1600 nm.

[0126] <Third Embodiment> The multiplexer / demultiplexer according to the third embodiment is a mode splitter that converts the mode of light and branches the light according to each mode. The description of the same structure as that of the first embodiment or the second embodiment is omitted. The multiplexer / demultiplexer has the same as Figure 2The same structure. The planar shape, the length in the X-axis direction, the length in the Y-axis direction, and the length of one side of the hole 40 of the multiplexer / demultiplexer are the same as those of the multiplexer / demultiplexer 100 in the first embodiment and the second embodiment. The width of the waveguide and the thickness of the silicon layer 16 are the same as those in the first embodiment and the second embodiment. The arrangement of the plurality of holes 40 is different from that in the first embodiment and the second embodiment.

[0127] For example, the mode of the light input to the waveguide 20 is the TE0 mode. The mode of the light output from the waveguide 24 is the TE0 mode. The mode of the light output from the waveguide 22 is the TE1 mode. If the branching ratio is set to γ, when light with an intensity of 1 is input to the waveguide 20, the intensity of the light output from the waveguide 24 is γ, and the intensity of the light output from the waveguide 22 is 1 - γ.

[0128] Figure 18 It is a graph showing the calculation results of the branching ratio. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the splitting ratio (SR). When D1 = 20 nm, 50 nm, 70 nm, 100 nm, and 120 nm, the multiplexer / demultiplexer is designed, and the branching ratio is calculated. The wavelength of the light is 1550 nm. The SR when D1 = 50 nm is farthest from the ideal value. When D1 = 20 nm, 70 nm, 100 nm, and 120 nm, the SR is close to the ideal value.

[0129] Figure 19 It represents the calculation results of the light loss. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the calculation results of the light loss. When D1 = 20 nm, 70 nm, and 120 nm, the loss is calculated. As Figure 19 shown, the shallower the hole 40, the more the loss is suppressed.

[0130] Figure 20A , Figure 21A and Figure 22A are graphs exemplifying the spectrum. The horizontal axis represents the wavelength of the light. The vertical axis represents the transmittance or reflectance of the light. The reflectance, the transmittance from the waveguide 22, and the transmittance from the waveguide 24 are shown. The dashed line represents the calculation result of the transmittance of the waveguide 22. The dash-dotted line represents the measurement result of the transmittance of the waveguide 22. The solid line represents the measurement result of the transmittance of the waveguide 24. The dotted line represents the calculation result of the transmittance of the waveguide 24. The thin solid line represents the calculation result of the reflectance. The depth D1 of the hole 40 is 70 nm. Figure 20B , Figure 21B , Figure 22B is a top view exemplifying the multiplexer / demultiplexer according to the third embodiment.

[0131] Figure 20A and Figure 20B are examples where γ = 0.1. Figure 21A andFigure 21B This is an example where γ = 0.5. Figure 22A And Figure 22B This is an example where γ = 0.9. In Figure 20A , Figure 21A , Figure 22A In each of these examples, the measurement results of the transmittance are close to the calculated results. It can be seen that in the wavelength range of 1520 nm to 1600 nm, the branching ratio is close to the desired value.

[0132] According to the third embodiment, the multiplexer / demultiplexer is a mode splitter that branches light and converts the mode of the light. The mode of the light input to the waveguide 20 is different from the mode of the light output from the waveguide 24. As Figure 19 shown, in the mode splitter, by setting the depth D1 of the hole 40 to be less than or equal to half of the thickness of the silicon layer 16, losses can be suppressed. As Figure 20A , Figure 21A , Figure 22A shown, in the wavelength range of 1520 nm to 1600 nm, the branching ratio can be made close to the desired value. The mode splitter of the third embodiment is designed by changing the configuration and depth of the hole 40 compared with the power splitters of the first and second embodiments, but other parameters are the same. Many identical parameters are used, and a small number of parameters such as the configuration and depth of the hole 40 are determined by design. Thus, different functions such as a power splitter and a mode splitter can be generated.

[0133] <Fourth Embodiment> The fourth embodiment is an example of a mode converter. For the same structure as any one of the first to third embodiments, the description is omitted.

[0134] Figure 23 This is a top view showing an example of the mode converter 400 according to the fourth embodiment. The mode converter 400 has a waveguide 20 and a waveguide 22. The waveguide 20 is an input waveguide. The waveguide 22 is an output waveguide. For example, the TE0 mode is input to the waveguide 20. The mode converter 400 converts the mode of the light into the TE1 mode or the TE2 mode and emits it from the waveguide 22. The length of the mode converter 400 in the X-axis direction is 33.2 μm.

[0135] Figure 24A And Figure 25A These are diagrams showing examples of spectra. The horizontal axis represents the wavelength of the light. The vertical axis represents the transmittance or reflectance of the light. The transmittances and reflectances of the TE0 mode, TE1 mode, and TE2 mode are shown. The depth D1 of the hole 40 is 70 nm. Figure 24B And Figure 25B These are top views showing examples of the mode converter according to the fourth embodiment.

[0136] In Figure 24A , the dotted line represents the measurement result of the transmittance of the TE1 mode (TE1 measurement). The single-dotted line represents the calculation result of the transmittance of the TE1 mode (TE1 calculation). The dashed line represents the calculation result of the transmittance of the TE2 mode (TE2 calculation). The solid line represents the measurement result of the transmittance of the TE0 mode (TE0 measurement). The double-dotted line represents the calculation result of the transmittance of the TE0 mode (TE0 calculation). The thin solid line represents the calculation result of the reflectance. The measurement result of the transmittance of the TE1 mode is close to the calculation result.

[0137] In Figure 25A , the dotted line represents the measurement result of the transmittance of the TE2 mode (TE2 measurement). The others are the same as Figure 24A . The measurement result of the transmittance of the TE2 mode is close to the calculation result.

[0138] According to the fourth embodiment, the light of the TE0 mode is converted into the TE1 mode or the TE2 mode and emitted. As Figure 24A shown, the transmittance of the TE1 mode is higher than that of the TE0 mode and the TE2 mode. As Figure 25A shown, the transmittance of the TE2 mode is higher than that of the TE0 mode and the TE1 mode. By setting the depth of the hole 40 to 70 nm, loss can be suppressed and light of the desired mode can be emitted.

[0139] In the third and fourth embodiments, the input mode may also be a mode other than the TE0 mode. The output mode may also be a mode other than the TE1 mode and the TE2 mode.

[0140] As described above, the embodiments of the present invention have been described in detail, but the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims.

Claims

1. An optical element, wherein: The optical element comprises: A substrate having a first region and a second region in a plane; a first waveguide for inputting light; as well as The second waveguide, for outputting light, The second area surrounds the first area, The first waveguide and the second waveguide are optically coupled to the first region, In the first region, the substrate includes a first layer and a second layer stacked in sequence, A plurality of holes are provided in the second layer, The depth of the hole is less than 1 / 2 of the thickness of the second layer, In the second region, the substrate does not have the second layer but has the first layer.

2. The optical element according to claim 1, wherein The depth of the hole is not less than 1 / 20 and not more than 1 / 2 of the thickness of the second layer.

3. The optical element according to claim 1 or 2, wherein: The depth of the hole is not less than 1 / 5 and not more than 2 / 5 of the thickness of the second layer.

4. The optical element according to claim 1 or 2, wherein: The first layer is formed of silicon oxide, The second layer is formed of silicon.

5. The optical element according to claim 1 or 2, wherein: The plane shape of the hole is a rectangle.

6. The optical element according to claim 1 or 2, wherein: The planar shape of the first region is a rectangle.

7. The optical element according to claim 1 or 2, wherein: The optical element includes one first waveguide and a plurality of second waveguides.

8. The optical element according to claim 1 or 2, wherein: A mode of the light input to the first waveguide is different from a mode of the light output from the second waveguide.

9. The optical element according to claim 1 or 2, wherein: The optical element includes a grating coupler connected to at least one of the first waveguide and the second waveguide. The grating coupler is formed by the second layer and has concavities and convexities provided on the second layer. The depth of the hole is equal to the depth of the concavo-convex.

10. The optical element according to claim 1 or 2, wherein: The optical element includes an insulating film that covers the side surfaces and the upper surface of the first region and covers the upper surface of the second region.

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