Method, device, equipment and program product for handling memory errors

By adding an identifier and migrating data when a recoverable error occurs in a memory page, the problem of recoverable errors evolving into unrecoverable errors in computer systems is solved, ensuring data security and system stability.

CN120144372BActive Publication Date: 2026-01-23FEITENG TECH (GUANGZHOU) CO LTD +1
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Patent Information

Application Number
CN202510231832.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-27
Publication Date
2026-01-23
Estimated Expiration
2045-02-27

AI Technical Summary

Technical Problem

Existing technologies are unable to handle recoverable errors in computer system memory in a timely and effective manner, which may cause them to evolve into unrecoverable errors, resulting in data loss or system crashes.

Method used

When a recoverable error occurs in a memory page, an identifier is added to it, the data type of the stored data is detected, and important data is migrated to an unidentified safe page, while pages with unrecoverable errors are ignored or isolated.

Benefits of technology

It effectively prevents recoverable errors from frequently leading to unrecoverable errors, protects important data, and improves system stability and data security.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a memory error processing method, device, equipment and program product. The method comprises the following steps: adding a first identifier to a first memory page in the case that a recoverable error occurs in the first memory page, wherein the first identifier is used to indicate that the memory page is unreliable; detecting the type of data stored in the first memory page; in the case that the first memory page stores first type data, migrating the data stored in the first memory page to a second memory page which is not added with the first identifier; wherein the content of the first type data is related to the application execution state of the system runtime. The above method can process the recoverable memory error in time and efficiently, and effectively avoids losing important data when the non-recoverable error occurs due to the frequent occurrence of the recoverable error.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and in particular, to a memory error processing method, device, equipment and program product. BACKGROUND

[0002] The memory of a computer system often has some different types of errors, which can be divided into recoverable errors and unrecoverable errors according to the severity of the errors.

[0003] Recoverable errors refer to errors that can be recovered by hardware without any human intervention when the memory has errors, while unrecoverable errors refer to errors that can directly affect the normal operation of the computer system. Unrecoverable errors must be notified to the software for processing.

[0004] Although the occurrence of recoverable errors may not immediately affect the operation of the computer system, it may accumulate to cause unrecoverable errors. Therefore, it is necessary to timely and targetedly process the errors of the computer system. SUMMARY

[0005] Based on the above technical status, the present application proposes a memory error processing method, device, equipment and program product, which can timely and efficiently process recoverable memory errors, and effectively avoid the loss of important data due to the frequent occurrence of recoverable errors.

[0006] The first aspect of the present application proposes a memory error processing method, comprising:

[0007] In the case that a recoverable error occurs in a first memory page, a first identifier is added to the first memory page, and the first identifier is used to indicate that the memory page is unreliable.

[0008] Detect the type of data stored in the first memory page.

[0009] In the case that the first memory page stores first type data, the data stored in the first memory page is migrated to a second memory page which is not added with the first identifier; wherein the content of the first type data is related to the application execution state of the system running time.

[0010] In some implementation manners, migrating the data stored in the first memory page to the second memory page comprises:

[0011] Determining the second memory page which is not added with the first identifier from the idle memory pages, and migrating the data stored in the first memory page to the second memory page.

[0012] Alternatively,

[0013] determining a second memory page from the non-idle memory page, which is not added with the first identifier and stores second type data, and exchanging data stored in the first memory page with data stored in the second memory page; wherein the second type data is irrelevant to application state of the system at runtime.

[0014] In some implementations, before adding the first identifier to the first memory page, the method further comprises:

[0015] determining whether the first memory page carries the first identifier;

[0016] if the first memory page carries the first identifier, ignoring the recoverable error;

[0017] if the first memory page does not carry the first identifier, adding the first identifier to the first memory page.

[0018] In some implementations, the method further comprises:

[0019] ignoring the recoverable error if the first memory page stores second type data; wherein the second type data represents data that can be obtained by parsing a code file.

[0020] In some implementations, the method further comprises:

[0021] when the first memory page is released, locking the first memory page and performing reliability detection on the first memory page; locking the first memory page comprises setting the first memory page to an unusable state, and the reliability detection is used to detect whether the recoverable error occurs again in the first memory page;

[0022] when it is determined that the recoverable error does not occur again in the first memory page, unlocking the first memory page.

[0023] In some implementations, the method further comprises:

[0024] when a non-recoverable error occurs in a third memory page, detecting a type of data stored in the third memory page;

[0025] when the third memory page stores first type data, replacing the third memory page with a fourth memory page which is not added with the first identifier.

[0026] In some implementations, the method further comprises:

[0027] When the third memory page stores the second type of data, the data stored in the third memory page is deleted and the third memory page is isolated; wherein, the content of the second type of data is unrelated to the application state during system operation.

[0028] In some implementations, the method further includes:

[0029] When the available memory is lower than a set threshold, a fifth memory page and a sixth memory page are determined from the memory pages. The fifth memory page stores second type data and is not marked with the first identifier. The sixth memory page carries the first identifier. The second type data represents data that can be obtained by parsing the code file.

[0030] The data stored in the fifth memory page is migrated to the sixth memory page, and the fifth memory page is reclaimed.

[0031] A second aspect of this application provides a memory error handling apparatus, comprising:

[0032] A page marking unit is used to add a first identifier to the first memory page in the event of a recoverable error in the first memory page, wherein the first identifier is used to indicate that the memory page is unreliable;

[0033] The detection unit is used to detect the type of data stored in the first memory page;

[0034] The data migration unit is used to migrate the data stored in the first memory page to a second memory page that has not been marked with the first identifier, when the first type of data is stored in the first memory page; wherein the content of the first type of data is related to the application execution state during system operation.

[0035] A third aspect of this application provides a memory error handling device, comprising:

[0036] Memory and processor;

[0037] The memory is connected to the processor and is used to store programs;

[0038] The processor is configured to implement the memory error handling method described above by running a program in the memory.

[0039] A fourth aspect of this application provides a computer program product including computer program instructions, which, when executed by a processor, cause the processor to perform the aforementioned memory error handling method.

[0040] The memory error handling method proposed in this application adds a first identifier to the first memory page when a recoverable error occurs. This first identifier indicates that the memory page is unreliable. Simultaneously, it detects the type of data stored in the first memory page. If the first memory page stores data of a first type, the data stored in the first memory page is migrated to a second memory page that has not been marked with the first identifier. The content of the first type of data is related to the application execution state during system runtime. This solution adds a first identifier to a memory page when a recoverable error occurs, effectively marking the memory page. This allows the computer system to use the first identifier as a reference when allocating memory pages, avoiding storing important data in that memory page or preventing the reuse of that memory page. Furthermore, when a recoverable error occurs in a memory page, the solution migrates hard-to-access data stored therein to a safe page that has not been marked with the first identifier, thus ensuring the security of the page data and preventing the loss of important data in the event of an unrecoverable error due to frequent recoverable errors. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0042] Figure 1 This is a flowchart illustrating a memory error handling method provided in an embodiment of this application.

[0043] Figure 2 This is a schematic diagram of a memory error processing device provided in an embodiment of this application.

[0044] Figure 3 This is a schematic diagram of the structure of a memory error processing device provided in an embodiment of this application. Detailed Implementation

[0045] Computer system memory often experiences various types of errors, which can be categorized into recoverable and unrecoverable errors based on their severity.

[0046] Recoverable errors are those that the storage hardware can recover from when a memory error occurs, while unrecoverable errors are those that can directly affect the normal operation of the computer system and must be resolved through software processing.

[0047] While recoverable errors may not immediately affect the operation of a computer system, some recoverable errors are precursors to unrecoverable errors. Therefore, it is necessary to address computer system errors promptly and in a targeted manner.

[0048] Typically, unrecoverable errors in a computer system's memory begin after a series of recoverable errors. Therefore, conventional computer memory error handling mechanisms monitor recoverable errors. When a memory block experiences recoverable errors more frequently than a certain threshold, the memory block is isolated to prevent the accumulation of recoverable errors into unrecoverable ones, which could lead to data loss and system crashes.

[0049] However, the above-mentioned approach struggles to determine when to isolate memory blocks experiencing recoverable errors. This is because some memory blocks may experience multiple recoverable errors without becoming unrecoverable, while others may become unrecoverable even with only a few recoverable errors. Furthermore, since the data stored in memory is constantly changing, different data types have varying tolerances for recoverable errors. Therefore, there is no clear standard for determining when to isolate memory blocks experiencing recoverable errors. In practical applications, this approach is not very practical. It frequently fails to isolate memory blocks with recoverable errors in a timely manner, leading to data loss when unrecoverable errors occur in memory pages, or it frequently isolates memory, impacting normal system operation.

[0050] To address the aforementioned technical problems, this application proposes a memory error handling solution. This solution can handle memory page errors more promptly and reasonably, preventing recoverable memory page errors from evolving into unrecoverable errors that lead to memory data loss and affect system operation.

[0051] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0052] For computer systems, the importance of different storage units varies depending on whether the software has fault tolerance mechanisms. For example, when memory units store application code, read-only data, or file cache, even if these memory units suffer unrecoverable errors, the management software can retrieve this data by parsing the code files, or it can reread the relevant content from its original storage location (such as a disk) and write it to the fault-free memory units to ensure that the system can function normally.

[0053] This application embodiment, in conjunction with the aforementioned data characteristics, processes recoverable memory errors, achieving effective handling of recoverable errors while ensuring data security, and minimizing the occurrence of unrecoverable memory errors.

[0054] The technical solutions proposed in this application can be applied to processors, controllers, and other devices in computer systems. Specifically, the technical solutions proposed in this application are implemented by an operating system running on processors, controllers, and other devices in a computer system.

[0055] This application first proposes a method for handling memory errors, see [link to previous document]. Figure 1 As shown, the method includes:

[0056] S101. In the event of a recoverable error occurring in the first memory page, add a first identifier to the first memory page. The first identifier is used to indicate that the memory page is unreliable.

[0057] Specifically, the aforementioned first memory page refers to any memory page in the computer system's memory. When a recoverable error occurs in any memory unit within the first memory page, the memory unit will send an error report to the operating system. This error report records information such as the time of the error and the type of error. Through this error report, the operating system can determine that a recoverable error has occurred in the memory unit of that first memory page.

[0058] When a recoverable error is confirmed to have occurred in a first memory page, a first identifier indicating that the memory page is unreliable is added to the first memory page. In this embodiment, when a memory page carries the first identifier, it indicates that a recoverable error has occurred in the memory page, thus making the memory page unreliable; if a memory page does not carry the first identifier, it indicates that a recoverable error has not occurred in the memory page, and the memory page is in a reliable state.

[0059] In some embodiments, when a recoverable error occurs in the first memory page, before adding the first identifier to the first memory page, it is first determined whether the first memory page already carries the first identifier. If the first memory page already carries the first identifier, it can be confirmed that the first memory page has already experienced a recoverable error during the previous system operation and has been marked as unreliable. In this case, the recoverable error that occurred in the first memory page this time can be ignored, and the operation of adding the first identifier to the first memory page is no longer performed.

[0060] If the first memory page does not carry a first identifier, it means that no recoverable error has occurred in the first memory page during the early stages of system operation. In this case, a first identifier is added to the first memory page.

[0061] Adding a first identifier to the first memory page can be achieved by adding a tag to the first memory page, that is, adding a tag containing the first identifier to the first memory page, or by modifying the attributes of the first memory page and adding the first identifier to the attribute information of the first memory page.

[0062] In this embodiment, the memory page marked with the first identifier will be managed by an unreliable memory management task specifically designed to manage unreliable memory. Specific management measures will be described in subsequent embodiments.

[0063] S102. Detect the type of data stored in the first memory page.

[0064] Specifically, after adding a first identifier to the first memory page, the type of data stored in the first memory page is further detected to determine whether it stores first type data or second type data.

[0065] The first type of data mentioned above refers to data whose content is related to the application execution status during computer system operation, such as code execution process data and code execution result data. This data can only be obtained by running code files, and cannot be obtained by static parsing of code files.

[0066] The second type of data mentioned above refers to data whose content is unrelated to the application execution state of the computer system. This data can be obtained by parsing code files; that is, data that can be obtained through static parsing of code files without running the code. Examples include code defined in executable files, read-only data, dynamic linking information, and unmodified file caches. In some cases, this second type of data can also be directly read from its original storage location (such as a disk). For instance, the second type of data can be obtained by pre-parsing the code file, and then stored in a fixed storage location. When this data is needed, it can be read directly from that storage location.

[0067] By identifying the content of the data stored in the first memory page, it can be determined whether it stores first-type data or second-type data. If the first memory page stores code defined in the executable file, read-only data, dynamic linking information, or unmodified file cache, then it can be determined that the first memory page stores second-type data.

[0068] If the first memory page stores data other than code defined in the executable file, read-only data, dynamic linking information, or unmodified file cache, then it can be determined that the first memory page stores data of the first type.

[0069] In this embodiment, if the first memory page stores any type of first-type data, then the data stored in the first memory page is considered to be first-type data. For example, if the first memory page stores any type of data such as code defined in the executable file, read-only data, dynamic linking information, or unmodified file cache, and also stores any one or more types of data that cannot be obtained by parsing the code file, such as code execution process data or code execution result data, then the data stored in the first memory page is considered to be first-type data.

[0070] S103. If the first type of data is stored in the first memory page, the data stored in the first memory page is migrated to the second memory page that has not been marked with the first identifier.

[0071] Specifically, if the processing of steps S101 and S102 confirms that a recoverable error has occurred in the first memory page, and the first memory page stores data of the first type, in order to prevent the first page from experiencing a recoverable error again, which could then evolve into an unrecoverable error and cause the data stored in the first memory page to be lost, this embodiment of the application migrates the data stored in the first memory page to a second memory page that has not been marked with the first identifier, that is, migrates the data stored in the first memory page to a reliable memory page.

[0072] If the processing of steps S101 and S102 confirms that a recoverable error has occurred in the first memory page, but the data stored in the first memory page is second type data, that is, data that can be retrieved even if lost, then this embodiment of the application directly ignores the recoverable error that occurred in the first memory page and simply adds a first identifier to the first memory page through the processing of step S101.

[0073] The memory error handling method proposed in this application adds a first identifier to the first memory page when a recoverable error occurs. This first identifier indicates that the memory page is unreliable. Simultaneously, it detects the type of data stored in the first memory page. If the first memory page stores data of a first type, the data stored in the first memory page is migrated to a second memory page that has not been marked with the first identifier. The content of the first type of data is related to the application execution state during system operation. This solution adds a first identifier to a memory page when a recoverable error occurs, effectively marking the memory page. This allows the computer system to use the first identifier as a reference when allocating memory pages, avoiding storing important data in that memory page or preventing the reuse of that memory page. Furthermore, when a recoverable error occurs in a memory page, the solution migrates the difficult-to-access data (first type of data) stored therein to a secure page that has not been marked with the first identifier, thus ensuring the security of the page data and preventing the loss of important data in the event of an unrecoverable error due to frequent recoverable errors.

[0074] In some embodiments, migrating data stored in a first memory page to a second memory page may involve identifying a second memory page from free memory pages that has not been marked with the first identifier, and migrating the data stored in the first memory page to the second memory page. Alternatively, it may involve identifying a second memory page from non-free memory pages that has not been marked with the first identifier and stores second type data, and swapping the data stored in the first memory page with the data stored in the second memory page.

[0075] Specifically, when it is confirmed that the data stored in the first memory page needs to be migrated, a memory page that has not been marked with the first identifier can be searched from the free memory pages. If a free memory page that has not been marked with the first identifier is found, the free memory page is used as the first memory page, and the data stored in the first memory page is migrated to the second memory page through the memory page migration mechanism provided by the operating system.

[0076] Alternatively, a memory page that hasn't been marked with the first identifier and stores second-type data can be found among non-free memory pages. This means finding a memory page that hasn't been marked with the first identifier and stores non-critical data (which can be obtained by parsing the code file or read from its original storage location) and designating it as the second memory page. Then, the data stored in the first and second memory pages are swapped, and the page table and page management information are updated, allowing the original users of the second and first memory pages to exchange usage rights. This allows important data stored in the first memory page (data that cannot be obtained by parsing the code file) to be moved to the reliable second memory page, while non-critical data is moved to the unreliable first memory page.

[0077] The above solutions can all transfer important and hard-to-access data to reliable memory pages, thereby avoiding the loss of important data due to unrecoverable errors caused by continuous recoverable errors in unreliable memory pages.

[0078] In some embodiments, a second memory page that has not been marked with the first identifier is first searched among free memory pages. If a second memory page without the first identifier is found, the data stored in the first memory page is migrated to the second memory page. If a second memory page without the first identifier is not found, a second memory page that has not been marked with the first identifier and stores second type data is determined from non-free memory pages, and then the data stored in the first memory page and the data stored in the second memory page are swapped. This minimizes the impact on the use of already allocated memory pages.

[0079] In other embodiments, the above-described memory error handling method further includes:

[0080] When the first memory page marked with the first identifier is released, it is not released immediately, but instead handed over to the unreliable memory management task for management.

[0081] The aforementioned unreliable memory management task is a kernel-mode task created during operating system startup to manage unreliable memory pages.

[0082] When an unreliable memory management task receives the first memory page that has been freed, it does not immediately free the first memory page. Instead, it locks the first memory page, that is, it sets the first memory page to an unusable state. Specifically, it locks the first memory page in memory to prevent it from being reclaimed and moved.

[0083] Then, the unreliable memory management task periodically performs a reliability check on the locked first memory page, specifically checking whether a recoverable error has occurred again on the first memory page.

[0084] If, during a test, it is determined that no more recoverable errors will occur on the first memory page, the unreliable memory management task releases the lock on the first memory page. The unreliable memory management task then releases the first memory page, which becomes ordinary memory and can be reclaimed and moved.

[0085] If, in a certain test, the reliable memory management task determines that a recoverable error will still occur on the first memory page, the unreliable memory management task continues to manage the first memory page, keeping it locked, and periodically checks whether a recoverable error will occur on the first memory page again.

[0086] The above process can prevent unreliable memory pages from being recycled, thus avoiding the risk of storing important data in unreliable memory pages again and compromising the security of important data.

[0087] In another embodiment, the above-described memory error handling method further includes:

[0088] In the event of an unrecoverable error occurring on the third memory page, the type of data stored in the third memory page is detected.

[0089] Specifically, the aforementioned third memory page can be any memory page in the computer system memory. When an unrecoverable error is detected in the third memory page of the computer system memory, such as when an error report indicating an unrecoverable error is received from the third memory page, the type of data stored in that third memory page is further investigated.

[0090] When the third memory page stores data of the first type, the third memory page is replaced with a fourth memory page that has not been marked with the first identifier.

[0091] Among these, the fourth memory page mentioned above is preferably a free memory page. That is, if the data stored in the third memory page where the unrecoverable error occurred is of the first type, such as the dynamic linking information of an executable file stored in the third memory page, then a memory page that has not been marked with the first identifier is searched from the free pages.

[0092] If a memory page that has not been marked with the first identifier is found in the free pages, then that memory page is designated as the fourth memory page.

[0093] For example, if no memory page without the first identifier is found in the free pages, then a memory page without the first identifier and storing second type data is found in the non-free pages, the data in the memory page is cleared, and then the memory page can be used as the fourth memory page.

[0094] After the fourth memory page is determined, it is filled according to the contents of the executable file, and the erroneous third memory page is replaced with the fourth memory page in the memory address mapping relationship so that the computer system can continue to run on the basis of the fourth memory page.

[0095] If the data stored in the third memory page is of type 2, such as unmodified file cache, code defined in an executable file, or read-only data, then the data stored in the third memory page is deleted, and the third memory page is isolated.

[0096] In another embodiment, when an unrecoverable error is detected in a third memory page, it is determined whether the third memory page is managed by the aforementioned unreliable memory management task. If the third memory page is managed by the aforementioned unreliable memory management task, it means that the third memory page has previously experienced a recoverable error and was marked as unreliable memory and managed by the unreliable memory management task. If the third memory page then experiences an unrecoverable error, it indicates that the third memory page has failed and can no longer be used. In this case, the third memory page is isolated for subsequent processing.

[0097] The above solution can promptly transfer data and isolate faulty pages when an unrecoverable error occurs in the computer system's memory, thereby improving the processing efficiency of memory pages that have experienced unrecoverable errors.

[0098] In another embodiment, the above-mentioned method for handling memory errors is also disclosed, further comprising:

[0099] The unreliable memory management task monitors the memory usage of the computer system. When it detects that the available memory of the computer system is lower than a set threshold, it identifies the fifth and sixth memory pages from the used memory pages of the computer system.

[0100] The fifth memory page mentioned above refers to the memory page that stores the second type of data and has not been marked with the first identifier mentioned above, while the sixth memory page mentioned above refers to the memory page that carries the first identifier mentioned above.

[0101] Then, the data stored in the fifth memory page is migrated to the sixth memory page, and the uses of the fifth and sixth memory pages are swapped. The fifth memory page is then reclaimed so that the operating system can continue to use it.

[0102] Because Type II data can be retrieved more quickly and easily after loss, moving it from reliable memory pages to unreliable memory pages allows the computer system to quickly recover the lost data even if an unrecoverable error occurs on the unreliable memory pages, leading to its loss. This process frees up reliable memory pages, expanding the system's available memory and ensuring its normal operation.

[0103] Corresponding to the memory error handling method described above, this application also provides a memory error handling apparatus, see [link to relevant documentation]. Figure 2 As shown, the device includes:

[0104] Page marking unit 100 is used to add a first identifier to the first memory page in the event of a recoverable error in the first memory page, the first identifier being used to indicate that the memory page is unreliable;

[0105] Detection unit 110 is used to detect the type of data stored in the first memory page;

[0106] The data migration unit 120 is used to migrate the data stored in the first memory page to a second memory page that has not been marked with the first identifier, when the first type of data is stored in the first memory page; wherein the content of the first type of data is related to the application execution state during system operation.

[0107] In some implementations, the data migration unit 120 migrates the data stored in the first memory page to the second memory page, including:

[0108] Identify the second memory page from the free memory pages that has not been marked with the first identifier, and migrate the data stored in the first memory page to the second memory page;

[0109] or,

[0110] Identify a second memory page from the non-free memory pages that has not been marked with the first identifier and stores the second type of data, and swap the data stored in the first memory page with the data stored in the second memory page; wherein the content of the second type of data is unrelated to the application state during system operation.

[0111] In some implementations, before adding the first identifier to the first memory page, the page marking unit 100 also determines whether the first memory page carries the first identifier;

[0112] If the first memory page carries the first identifier, then the recoverable error is ignored;

[0113] If the first memory page does not carry the first identifier, then add the first identifier to the first memory page.

[0114] In some implementations, the data migration unit 120 ignores the recoverable error when the second type of data is stored in the first memory page; wherein the second type of data represents data that can be obtained by parsing the code file.

[0115] In some implementations, the apparatus further includes:

[0116] A memory management unit is configured to lock the first memory page when it is released and to perform a reliability test on the first memory page; locking the first memory page includes setting the first memory page to an unusable state, and the reliability test is configured to detect whether the recoverable error occurs again in the first memory page;

[0117] Once it is determined that the recoverable error will no longer occur on the first memory page, the lock on the first memory page is released.

[0118] In some implementations, the detection unit 110 is also used for:

[0119] In the event of an unrecoverable error occurring on the third memory page, the type of data stored in the third memory page is detected;

[0120] The data migration unit 120 is also configured to: replace the third memory page with a fourth memory page that has not been marked with the first identifier when the third memory page stores the first type of data.

[0121] In some implementations, the data migration unit 120 is also used for:

[0122] When the third memory page stores the second type of data, the data stored in the third memory page is deleted and the third memory page is isolated; wherein, the content of the second type of data is unrelated to the application state during system operation.

[0123] In some implementations, the data migration unit 120 is also used for:

[0124] When the available memory is lower than a set threshold, a fifth memory page and a sixth memory page are determined from the memory pages. The fifth memory page stores second type data and is not marked with the first identifier. The sixth memory page carries the first identifier. The second type data represents data that can be obtained by parsing the code file.

[0125] The data stored in the fifth memory page is migrated to the sixth memory page, and the fifth memory page is reclaimed.

[0126] The memory error handling apparatus provided in this embodiment belongs to the same concept as the memory error handling method provided in the above embodiments of this application. It can execute the memory error handling method provided in any of the above embodiments of this application and has the corresponding functional modules and beneficial effects. Technical details not described in detail in this embodiment can be found in the specific processing content of the memory error handling method provided in the above embodiments of this application, and will not be repeated here.

[0127] The functions implemented by each of the above units can be implemented by the same or different processors, and this application embodiment does not limit this.

[0128] It should be understood that the units in the above device can be implemented by a processor calling software. For example, the device includes a processor connected to a memory containing instructions. The processor calls the instructions stored in the memory to implement any of the above methods or to implement the functions of each unit in the device. The processor can be a general-purpose processor, such as a CPU or microprocessor, and the memory can be internal or external to the device. Alternatively, the units in the device can be implemented as hardware circuits. By designing the hardware circuits, some or all of the unit functions can be implemented. The hardware circuits can be understood as one or more processors. For example, in one implementation, the hardware circuit is an ASIC, and the functions of some or all of the above units are implemented by designing the logical relationships between the components within the circuit. In another implementation, the hardware circuit can be implemented using a PLD, such as an FPGA, which can include a large number of logic gates. The connection relationships between the logic gates are configured through configuration files to implement the functions of some or all of the above units. All units in the above device can be implemented entirely by a processor calling software, entirely by hardware circuits, or partially by a processor calling software with the remaining parts implemented by hardware circuits.

[0129] In this application embodiment, a processor is a circuit with signal processing capabilities. In one implementation, the processor can be a circuit with instruction reading and execution capabilities, such as a CPU, microprocessor, GPU, or DSP. In another implementation, the processor can implement certain functions through the logical relationships of hardware circuits. These logical relationships are fixed or reconfigurable. For example, the processor may be a hardware circuit implemented as an ASIC or PLD, such as an FPGA. In a reconfigurable hardware circuit, the process of the processor loading a configuration document and configuring the hardware circuit can be understood as the processor loading instructions to implement the functions of some or all of the above units. Furthermore, it can also be a hardware circuit designed for artificial intelligence, which can be understood as an ASIC, such as an NPU, TPU, or DPU.

[0130] As can be seen, each unit in the above device can be one or more processors (or processing circuits) configured to implement the above methods, such as: CPU, GPU, NPU, TPU, DPU, microprocessor, DSP, ASIC, FPGA, or a combination of at least two of these processor forms.

[0131] Furthermore, the units in the above devices can be integrated in whole or in part, or they can be implemented independently. In one implementation, these units are integrated together and implemented in the form of a System-on-Chip (SoC). The SoC may include at least one processor for implementing any of the above methods or implementing the functions of the units in the device. The at least one processor may be of different types, such as CPU and FPGA, CPU and artificial intelligence processor, CPU and GPU, etc.

[0132] Another embodiment of this application also proposes a memory error handling device, see [link to relevant documentation]. Figure 3 As shown, the device includes:

[0133] Memory 200 and processor 210;

[0134] The memory 200 is connected to the processor 210 and is used to store programs;

[0135] The processor 210 is configured to implement the memory error handling method disclosed in any of the above embodiments by running the program stored in the memory 200.

[0136] Specifically, the aforementioned memory error handling device may also include: a bus, a communication interface 220, an input device 230, and an output device 240.

[0137] The processor 210, memory 200, communication interface 220, input device 230, and output device 240 are interconnected via a bus. Among them:

[0138] A bus can include a pathway for transmitting information between various components of a computer system.

[0139] The processor 210 can be a general-purpose processor, such as a general-purpose central processing unit (CPU), a microprocessor, etc., or an application-specific integrated circuit (ASIC), or one or more integrated circuits used to control the execution of the program of the present invention. It can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0140] Processor 210 may include a main processor, as well as a baseband chip, modem, etc.

[0141] The memory 200 stores a program that executes the technical solution of this invention, and may also store an operating system and other key business functions. Specifically, the program may include program code, which includes computer operation instructions. More specifically, the memory 200 may include read-only memory (ROM), other types of static storage devices capable of storing static information and instructions, random access memory (RAM), other types of dynamic storage devices capable of storing information and instructions, disk storage, flash memory, etc.

[0142] Input device 230 may include a device for receiving user input data and information, such as a keyboard, mouse, camera, scanner, light pen, voice input device, touch screen, pedometer, or gravity sensor.

[0143] Output device 240 may include devices that allow information to be output to a user, such as a display screen, printer, speaker, etc.

[0144] The communication interface 220 may include a device that uses any transceiver to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), Wireless Local Area Network (WLAN), etc.

[0145] The processor 210 executes the program stored in the memory 200 and calls other devices, which can be used to implement the various steps of any memory error handling method provided in the above embodiments of this application.

[0146] This application also proposes a chip including a processor and a data interface. The processor reads and runs a program stored in a memory through the data interface to execute the memory error handling method described in any of the above embodiments. For details of the processing procedure and its beneficial effects, please refer to the embodiments of the memory error handling method described above.

[0147] In addition to the methods and devices described above, embodiments of this application may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the memory error handling methods described in any of the above embodiments of this specification.

[0148] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this application. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0149] Furthermore, embodiments of this application may also be storage media storing a computer program, which is executed by a processor using the steps of the memory error handling method described in any of the above embodiments of this specification.

[0150] For the foregoing method embodiments, in order to simplify the description, they are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, because according to this application, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0151] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For apparatus embodiments, since they are basically similar to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0152] The steps in the methods of the various embodiments of this application can be adjusted, merged, or deleted in order according to actual needs, and the technical features described in each embodiment can be replaced or combined.

[0153] The modules and sub-modules in the various embodiments of the present application's devices and terminals can be merged, divided, and deleted according to actual needs.

[0154] It should be understood that the disclosed terminals, devices, and methods can be implemented in other ways, given the several embodiments provided in this application. For example, the terminal embodiments described above are merely illustrative. For instance, the division of modules or sub-modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple sub-modules or modules may be combined or integrated into another module, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or modules, and may be electrical, mechanical, or other forms.

[0155] The modules or submodules described as separate components may or may not be physically separate. The components that constitute a module or submodule may or may not be physical modules or submodules; that is, they may be located in one place or distributed across multiple network modules or submodules. Some or all of the modules or submodules can be selected to achieve the purpose of this embodiment's solution, depending on actual needs.

[0156] Furthermore, the functional modules or sub-modules in the various embodiments of this application can be integrated into one processing module, or each module or sub-module can exist physically separately, or two or more modules or sub-modules can be integrated into one module. The integrated modules or sub-modules described above can be implemented in hardware or in the form of software functional modules or sub-modules.

[0157] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0158] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software unit executed by a processor, or a combination of both. The software unit can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0159] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0160] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for handling memory errors, characterized in that, include: In the event of a recoverable error in the first memory page, a first identifier is added to the first memory page to indicate that the memory page is unreliable. Detect the type of data stored in the first memory page; When the first type of data is stored in the first memory page, the data stored in the first memory page is migrated to the second memory page that has not been marked with the first identifier; wherein, the content of the first type of data is related to the application execution state during system runtime; When the first memory page is released, the first memory page is locked, and the first memory page is released when it is determined that the recoverable error will no longer occur on the first memory page; When the available memory is lower than a set threshold, the fifth memory page and the sixth memory page are determined from the used memory pages. The fifth memory page stores the second type of data and the fifth memory page is not marked with the first identifier. The sixth memory page carries the first identifier. The second type of data represents data that can be obtained by parsing the code file. The data stored in the fifth memory page is migrated to the sixth memory page, and the fifth memory page is reclaimed.

2. The method according to claim 1, characterized in that, Migrating the data stored in the first memory page to the second memory page includes: Identify the second memory page from the free memory pages that has not been marked with the first identifier, and migrate the data stored in the first memory page to the second memory page; or, Identify a second memory page from the non-free memory pages that has not been marked with the first identifier and stores the second type of data, and swap the data stored in the first memory page with the data stored in the second memory page; wherein the content of the second type of data is unrelated to the application state during system operation.

3. The method according to claim 1, characterized in that, Before adding the first identifier to the first memory page, the method further includes: Determine whether the first memory page carries the first identifier; If the first memory page carries the first identifier, then the recoverable error is ignored; If the first memory page does not carry the first identifier, then add the first identifier to the first memory page.

4. The method according to claim 1, characterized in that, The method further includes: When the second type of data is stored in the first memory page, the recoverable error is ignored; wherein, the second type of data represents data that can be obtained by parsing the code file.

5. The method according to claim 1, characterized in that, When the first memory page is freed, the first memory page is locked, and when it is determined that the recoverable error will no longer occur on the first memory page, the first memory page is freed, including: When the first memory page is released, the first memory page is locked, and a reliability test is performed on the first memory page; locking the first memory page includes setting the first memory page to an unusable state, and the reliability test is used to detect whether the recoverable error occurs again in the first memory page; If it is determined that the recoverable error will no longer occur on the first memory page, the lock on the first memory page is released and the first memory page is freed.

6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: In the event of an unrecoverable error occurring on the third memory page, the type of data stored in the third memory page is detected; When the third memory page stores data of the first type, the third memory page is replaced with a fourth memory page that has not been marked with the first identifier; When the third memory page stores the second type of data, the data stored in the third memory page is deleted and the third memory page is isolated; wherein, the content of the second type of data is unrelated to the application state during system operation.

7. A memory error handling apparatus, characterized in that, include: A page marking unit is used to add a first identifier to the first memory page in the event of a recoverable error in the first memory page, wherein the first identifier is used to indicate that the memory page is unreliable; The detection unit is used to detect the type of data stored in the first memory page; The data migration unit is used to migrate the data stored in the first memory page to a second memory page that has not been marked with the first identifier, when the first type of data is stored in the first memory page; wherein the content of the first type of data is related to the application execution state during system operation; The memory management unit is configured to lock the first memory page when it is released, and release the first memory page when it is determined that the recoverable error no longer occurs on the first memory page; The data migration unit is further configured to, when the available memory is lower than a set threshold, determine a fifth memory page and a sixth memory page from the used memory pages, wherein the fifth memory page stores second type data and the fifth memory page is not marked with the first identifier, and the sixth memory page carries the first identifier, and the second type data represents data that can be obtained by parsing the code file; migrate the data stored in the fifth memory page to the sixth memory page, and reclaim the fifth memory page.

8. A memory error handling device, characterized in that, include: Memory and processor; The memory is connected to the processor and is used to store programs; The processor is configured to implement the memory error handling method as described in any one of claims 1 to 6 by running a program in the memory.

9. A computer program product, characterized in that, It includes computer program instructions that, when executed by a processor, cause the processor to perform the memory error handling method as described in any one of claims 1 to 6.

Citation Information

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