A GaN HEMT device multi-noise source equivalent circuit topology

By using the equivalent circuit topology of GaN HEMT devices with multiple noise sources, the problem of insufficient accuracy of traditional models at high frequencies is solved, enabling more accurate device noise characterization and design guidance, and improving design efficiency.

CN120145971BActive Publication Date: 2025-11-18XIDIAN UNIV +1
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Patent Information

Application Number
CN202510211996.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-25
Publication Date
2025-11-18
Estimated Expiration
2045-02-25

AI Technical Summary

Technical Problem

Traditional GaN HEMT devices suffer from insufficient accuracy in lumped noise models under high-frequency operating conditions, failing to accurately characterize device noise and impacting the precision of integrated circuit design.

Method used

A multi-noise-source equivalent circuit topology for GaN HEMT devices is adopted, which includes a distributed design composed of multiple units. By connecting resistors, capacitors and inductors in series and parallel, noise sources are connected in parallel to characterize multiple noise sources inside the device, forming a more accurate model.

Benefits of technology

At high frequencies, the model more accurately characterizes device noise, guiding device fabrication and circuit design, improving design efficiency, and reducing the number of data optimization iterations and tests.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a GaN HEMT device multi-noise source circuit topology structure. Due to the influence of the distribution effect of device elements under high-frequency working conditions, the noise source of the GaN HEMT device cannot be characterized by a simple lumped noise source, therefore, the gate, the drain and the internal noise source of the GaN HEMT device are multiple. The noise source of the parasitic part is mainly the thermal noise of the parasitic resistance and the equivalent noise sources of the noiseless two-port network at the gate node and the source node, and is no longer simply abstracted as a single noise source, but replaced by multiple noise sources. The multi-noise equivalent circuit model can characterize the noise of the GaN HEMT device under high-frequency working conditions. Since the model characterizes the distribution effect of the device, the parameters of the model are more accurate and have certain physical significance, and the model can better guide the device process design and circuit design.
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Description

TECHNICAL FIELD

[0001] The application relates to the technical field of semiconductor device modeling, in particular to a GaN HEMT device multi-noise source equivalent circuit topology structure. BACKGROUND

[0002] With the development of semiconductor technology, more semiconductor materials are applied to integrated circuits, which has played a great role in promoting the development of electronic information industry. The third generation of semiconductor materials represented by gallium nitride (GaN) and silicon carbide (SiC) has characteristics of wider band gap and higher breakdown field, and has been applied in microwave power devices, communication radars and new energy vehicles. For the noise modeling of GaN HEMT devices, the empirical noise model constructed by deducing the empirical equation and the physical noise model constructed by deducing the physical working mechanism of the device are the mainstream methods of current noise modeling. For the empirical noise model, the key to accurate modeling is the extraction of small signal model parameters and noise source coefficients. The empirical model generally simulates the actual performance of the device through an equivalent circuit, and the accuracy of the model significantly affects the accuracy of integrated circuit design. However, with the working frequency of GaN HEMT entering the millimeter wave frequency band, the non-ideal effect of the device becomes more obvious, so the accuracy of the traditional lumped noise model is not enough. The accuracy of the model significantly affects the accuracy of integrated circuit design. SUMMARY

[0003] The problem to be solved by the application is that in order to overcome the problem of insufficient accuracy of the traditional lumped topology equivalent circuit model of the device under high-frequency working conditions, a GaN HEMT device multi-noise source equivalent circuit topology structure is provided. The structure considers that the non-ideal effect of the device becomes more obvious under high-frequency working conditions, so the parameters of the single noise source cannot accurately represent the device noise, the multi-noise equivalent topology circuit model can represent the noise inside the device under high-frequency working conditions, the parameters of the model are more accurate and have certain physical significance, and the model can better guide device process design and circuit design.

[0004] In order to achieve the above purpose, the technical scheme adopted by the application is:

[0005] A GaN HEMT device multi-noise source equivalent circuit topology structure, comprising one unit five and n units of unit one, unit two, unit three and unit four; the unit one is composed of a resistor Rg and an inductor Lg in series, the unit two is composed of a resistor Rd and an inductor Ld in series, the unit three is composed of a capacitor Cgs and a resistor Rgs in series, and the unit four is composed of a capacitor Cds and a resistor Rds in parallel; the unit five is composed of an inductor Ls and a resistor Rs in series.

[0006] The first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0007] The first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0008] The first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0009] The first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0010] In one embodiment, the GaN HEMT device multi-noise source equivalent circuit topology further comprises:

[0011] n units six;

[0012] The unit six is composed of a capacitor Cgd and a resistor Rgd in series, and the first unit is connected to the current source Ids through a unit six.

[0013] In one embodiment, the first unit is connected to the current source Ids through a unit six, specifically:

[0014] The first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0015] In one embodiment, the first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0016] The first unit is connected to the gate G of the GaN HEMT device, and the second unit is connected to the drain D of the GaN HEMT device.

[0017] In one embodiment, one end of the series structure two is connected with the drain D of the GaN HEMT device, specifically:

[0018] One end of the inductor Ld1 of the first unit two is connected with the drain D as one end of the series structure two, the other end of the inductor Ld1 is connected with the resistor Rd1 of the first unit two, and the other end of the resistor Rdn of the nth unit two is the other end of the series structure two.

[0019] In one embodiment, the source S of the GaN HEMT device is connected with one end of the unit five, specifically:

[0020] One end of the inductor Ls is connected with the source S as one end of the unit five, the other end of the inductor Ls is connected with one end of the resistor Rs, and the other end of the resistor Rs is the other end of the unit five.

[0021] In one embodiment, the other end of each unit one away from the gate G is connected with the other end of the unit five through a unit three, specifically:

[0022] In each unit one, the end close to the gate G is the inductor end, and the end away from the gate G is the resistor end; in the mth unit one, one end of the resistor Rgm is connected with the inductor Lgm, the other end of the resistor Rgm is connected with one end of the mth unit three, and the other end of the mth unit three is connected with the other end of the unit five.

[0023] In one embodiment, the other end of each unit one away from the gate G is connected with the other end of the unit five through a unit three, specifically:

[0024] In the mth unit one, the end away from the gate G is connected with one end of the capacitor Cgsm of the mth unit three, the other end of the capacitor Cgsm is connected with one end of the resistor Rgsm, and the other end of the resistor Rgsm is connected with the other end of the unit five.

[0025] In one embodiment, the other end of each unit two away from the drain D is connected with the other end of the unit five through a unit four, specifically:

[0026] In each unit two, the end close to the drain D is the inductor end, and the end away from the drain D is the resistor end; in the mth unit two, one end of the resistor Rdm is connected with the inductor Ldm, the other end of the resistor Rdm is connected with one end of the mth unit four, and the other end of the mth unit four is connected with the other end of the unit five.

[0027] In one embodiment, the other end of each unit two away from the drain D is connected with the other end of the unit five through a unit four, specifically:

[0028] The one end of the fourth unit of the m-th unit away from the drain D is connected with the one end of the fifth unit, and the other end of the fourth unit of the m-th unit is connected with the fifth unit.

[0029] The beneficial effects of the present application relative to the prior art are that:

[0030] (1) In high frequency state, the non-ideal effect inside the device is significant, the traditional lumped single noise source circuit model is no longer applicable, and the multi-noise source model can more accurately characterize, so that the model better guides the device process design and circuit design.

[0031] (2) The accurate multi-noise source model can quickly verify and improve the design scheme through simulation and optimization tools, reduce data optimization iteration, reduce data test quantity, and improve design efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0032] By carefully reading the invention content and the detailed description of the specific implementation scheme, the professionals in the field will be able to obviously realize the numerous additional advantages and benefits of the present application. The provided drawings are only for the purpose of showing the specific implementation scheme, and should not be regarded as any limitation of the present application. In addition, in all the drawings, the same parts are indicated with consistent reference numerals to maintain consistency and clarity of the description.

[0033] Figure 1 is the distributed equivalent circuit topology structure of GaN HEMT device of the present application.

[0034] Figure 2 is embodiment 1 of the distributed equivalent circuit of GaN HEMT device based on the present application.

[0035] Figure 3 is embodiment 2 of the distributed equivalent circuit of GaN HEMT device based on the present application. DETAILED DESCRIPTION

[0036] In order to make the technical means of the present application easier to understand, the following will be further described in detail in combination with the drawings and examples. It can be understood that the specific examples described herein are only used to explain the related application, and not to limit the application. In addition, it should be noted that only the parts related to the present application are shown in the drawings for the convenience of description. It should be noted that the examples and features in the examples in the present application can be combined with each other without conflict.

[0037] The present application will be further described in detail below in combination with the drawings and specific examples. For the step numbers in the following examples, they are only set for the convenience of description, and the order between the steps is not limited in any way, and the execution order of each step in the examples can be adaptively adjusted according to the understanding of those skilled in the art.

[0038] In view of the problem that the precision of the traditional lumped model is not enough under high frequency, the application provides a GaN HEMT device multi-noise source equivalent circuit topological structure and and the equivalent noise sources of the intrinsic noiseless two-port network at the gate node and the source node and In the application, the noise source is no longer a lumped model, but a plurality of noise sources, that is, the topological structure adopts a distributed design. Figure 1 The topological structure has three electrodes of a gate G, a drain D and a source S. A plurality of units, such as unit one, unit two, unit three, unit four, unit five and unit six, are designed.

[0039] The number of the unit one is n, each unit one is composed of a resistor Rg and an inductor Lg in series, and the unit ones are connected in series to form a series structure one. In the series structure one, from one end to the other end, there are a first unit one, a second unit one,..., and an n-th unit one in sequence. The first unit one is composed of a resistor Rg1 and an inductor Lg1 in series, the second unit one is composed of a resistor Rg2 and an inductor Lg2 in series,..., and the n-th unit one is composed of a resistor Rgn and an inductor Lgn in series.

[0040] Correspondingly, the number of the unit two is n, each unit two is composed of a resistor Rd and an inductor Ld in series, and the unit twos are connected in series to form a series structure two. In the series structure two, from one end to the other end, there are a first unit two, a second unit two,..., and an n-th unit two in sequence. The first unit two is composed of a resistor Rd1 and an inductor Ld1 in series, the second unit two is composed of a resistor Rd2 and an inductor Ld2 in series,..., and the n-th unit two is composed of a resistor Rdn and an inductor Ldn in series.

[0041] Correspondingly, the number of the unit three is n, each unit three is composed of a capacitor Cgs and a resistor Rgs in series. For the convenience of description, the first unit three, the second unit three,..., and the n-th unit three can be defined. The first unit three is composed of a capacitor Cgs1 and a resistor Rgs1 in series, the second unit three is composed of a capacitor Cgs2 and a resistor Rgs2 in series,..., and the n-th unit three is composed of a capacitor Cgsn and a resistor Rgsn in series.

[0042] Correspondingly, the number of the fourth units is n, each of which is composed of a capacitor Cds and a resistor Rds in parallel. For the convenience of description, the first fourth unit, the second fourth unit,..., and the n-th fourth unit can be defined. The first fourth unit is composed of a capacitor Cds1 and a resistor Rds1 in series, the second fourth unit is composed of a capacitor Cds2 and a resistor Rds2 in series,..., and the n-th fourth unit is composed of a capacitor Cdsn and a resistor Rdsn in series.

[0043] The fifth unit is only one, which is composed of an inductor Ls and a resistor Rs in series.

[0044] When necessary, the sixth unit can be added, and the number of the sixth units is also n,

[0045] According to the above structure, the connection relationship of the topology structure of the application can be expressed as:

[0046] The gate G is connected to one end of an inductor Lg1, the other end of the inductor Lg1 is connected to one end of a resistor Rg1, the other end of the resistor Rg1 is connected to one end of each of an inductor Lg2, a capacitor Cgs1 and a capacitor Cgd1 (if necessary), the other end of the capacitor Cgs1 is connected to one end of a resistor Rgs1, the other end of the capacitor Cgd1 is connected to one end of a resistor Rgd1, the other end of the resistor Rgs1 is connected to the other end of a resistor Rs, the other end of the resistor Rgd1 is connected to one end of a current source Ids, one end of a capacitor Cdsn, one end of a resistor Rdsn and the other end of a resistor Rdn. The other end of the inductor Lg2 is connected to one end of a resistor Rg2, the other end of the resistor Rg2 is connected to one end of each of an inductor Lg3, a capacitor Cgd2 and a capacitor Cgs2 (if necessary). The other end of the capacitor Cgd2 is connected to one end of a resistor Rgd2, the other end of the resistor Rgd2 is connected to one end of the current source Ids, one end of the capacitor Cdsn, one end of the resistor Rdsn and the other end of the resistor Rdn respectively. The other end of the capacitor Cgs2 is connected to one end of a resistor Rgs2, the other end of the resistor Rgs2 is connected to the other end of the resistor Rs.

[0047] The drain D is connected to one end of an inductor Ld1, the other end of the inductor Ld1 is connected to one end of a resistor Rd1, the other end of the resistor Rd1 is connected to one end of each of a resistor Rds1, a capacitor Cds1 and an inductor Ld2, the other end of the resistor Rds1 and the capacitor Cds1 is connected to the other end of a resistor Rs. The other end of the inductor Ld2 is connected to a resistor Rd2; the other end of the resistor Rd2 is connected to one end of each of a resistor Rds2, a capacitor Cds2 and an inductor Ld3, the other end of the resistor Rds2 and the capacitor Cds2 is connected to the other end of the resistor Rs.

[0048] The source S is connected to one end of an inductor Ls, the other end of the inductor Ls is connected to one end of a resistor Rs.

[0049] Similarly, the description to Lgn is:

[0050] The other end of the inductor Lgn is connected to one end of the resistor Rgn; the other end of the resistor Rgn is connected to one end of the inductor Lgn, the capacitor Cgdn and the capacitor Cgsn respectively; the other end of the capacitor Cgdn is connected to one end of the resistor Rgdn; the other end of the capacitor Cgsn is connected to one end of the resistor Rgsn; the other end of the resistor Rgsn is connected to the other end of the resistor Rs; the other end of the resistor Rgdn is connected to the current source Ids, the capacitor Cdsn, the resistor Rdsn and the resistor Rdn; the other end of the resistor Rdn is connected to the capacitor Cdsn and the resistor Rdsn; the other end of the capacitor Cdsn and the resistor Rdsn is connected to the resistor Rs.

[0051] In each unit one of the present application, a gate parasitic resistance thermal noise source is connected in parallel to each resistor Rg, that is, the gate parasitic resistance thermal noise source is connected in parallel to Rg1, Rg2,..., Rgn, representing the thermal noise source of the gate resistance parasitism

[0052] In each unit two of the present application, a drain parasitic resistance thermal noise source is connected in parallel to each resistor Rd, that is, the drain parasitic resistance thermal noise source is connected in parallel to Rd1, Rd2,..., Rdn, representing the thermal noise source of the drain resistance parasitism

[0053] In each unit three of the present application, an intrinsic gate node equivalent noise source is connected in parallel, that is, the intrinsic gate node equivalent noise source is connected in parallel to Cgs1 and Rgs1 in series, Cgs2 and Rgs2 in series,..., Cgsn and Rgsn in series; representing the equivalent noise source at the intrinsic gate node

[0054] In each unit four of the present application, an intrinsic drain node equivalent noise source is connected in parallel to each resistor Rds, that is, the intrinsic drain node equivalent noise source is connected in parallel to Rds1, Rds2,..., Rdsn, representing the equivalent noise source at the intrinsic drain node

[0055] In unit five of the present application, a source parasitic resistance thermal noise source is connected in parallel to the resistor Rs

[0056] In the present application, n≥2, according to the gate electrode structure and working frequency of the GaN HEMT device, n selects different values.

[0057] Further, with reference to Figure 2In another embodiment of the present application, the parasitic capacitance of the gate pad Cpgo, the parasitic capacitance of the drain pad Cpdo, the coupling capacitance of the gate pad and the drain pad Cpgdo are added;

[0058] The gate G is connected to one end of the capacitance Cpgo and the capacitance Cpgdo respectively; the source S is connected to one end of the capacitance Cpgo and the capacitance Cpdo respectively; the drain D is connected to one end of the capacitance Cpgdo and the capacitance Cpdo respectively.

[0059] Further, referring to Figure 3 In another embodiment of the present application, the coupling capacitance between the gate and the drain metal Cpgdi, the coupling capacitance between the gate and the source metal Cpgi and the coupling capacitance between the drain and the source metal Cpdi are added;

[0060] The coupling capacitance between the gate and the drain metal Cpgdi is represented by Cpgdi1, Cpgdi2…Cpgdin;

[0061] The coupling capacitance between the gate and the source metal Cpgi is represented by Cpgi1, Cpgi2…Cpgin;

[0062] The coupling capacitance between the drain and the source metal Cpdi is represented by Cpdi1, Cpdi2…Cpdin;

[0063] a) One end of the inductor Lg1 is connected to one end of the capacitance Cpgi1 and the capacitance Cpgdi1 respectively;

[0064] One end of the inductor Lg2 is connected to one end of the capacitance Cpgi2 and the capacitance Cpgdi2 respectively;

[0065] One end of the inductor Ld1 is connected to one end of the capacitance Cpdi1 and the other end of the capacitance Cpgdi1;

[0066] One end of the inductor Ld2 is connected to one end of the capacitance Cpdi2 and the other end of the capacitance Cpgdi2;

[0067] Similar steps a) are described to Lgn;

[0068] One end of the inductor Lgn is connected to one end of the capacitance Cpgin and the capacitance Cpgdin respectively;

[0069] One end of the inductor Ldn is connected to one end of the capacitance Cpdin and the other end of the capacitance Cpgdin;

[0070] The other end of the capacitance Cpgi1, Cpgi2…Cpgin is connected to the other end of the inductor Ls;

[0071] The other end of the capacitance Cpdi1, Cpdi2…Cpdin is connected to the other end of the inductor Ls;

[0072] wherein n≥2, n is selected to be different values depending on the gate electrode structure and the operating frequency of the GaN HEMT device.

[0073] It should be noted that the various structural schematic diagrams shown in the drawings are drawn according to embodiments of the present application, and are not made according to actual proportions, some details are enlarged in order to express more clearly, and some details can be omitted to simplify the display. Parasitic part of noise source parasitic resistance of heat source noise and and the equivalent noise source of the intrinsic noiseless two-port network at the gate node and the source node and It is no longer a lumped model, but is characterized by multiple noise sources.

[0074] The above description is only one specific example of the present application, and does not constitute any limitation on the present application. Obviously, for those skilled in the art, after understanding the content and principles of the present application, various modifications and changes in form and details can be made without departing from the principles and structures of the present application, as long as the scope of the technical solutions in the specification is met. However, these modifications and changes based on the idea of the present application are still within the protection scope of the present application.

Claims

1. A multi-noise source equivalent circuit model for a GaN HEMT device, characterized in that, It includes a unit five and units one, two, three, and four, each with a quantity of n; unit one is composed of a resistor Rg and an inductor Lg connected in series, unit two is composed of a resistor Rd and an inductor Ld connected in series, unit three is composed of a capacitor Cgs and a resistor Rgs connected in series, unit four is composed of a capacitor Cds and a resistor Rds connected in parallel, and unit five is composed of an inductor Ls and a resistor Rs connected in series; Each unit 1 forms a series structure 1, and each unit 2 forms a series structure 2. One end of the series structure 1 is connected to the gate G of the GaNHEMT device, and one end of the series structure 2 is connected to the drain D of the GaN HEMT device. The source S of the GaNHEMT device is connected to one end of the unit 5. The end of each unit 1 that is away from the gate G is connected to a unit 3, and the end of each unit 2 that is away from the drain D is connected to a unit 4, and both are connected to the other end of the unit 5. The end of each unit away from the gate G and the other end of the series structure are connected to one end of the current source Ids, and the other end of the current source Ids is connected to the other end of the unit. In each unit one, each resistor Rg is connected in parallel with a gate parasitic resistance thermal noise source; in each unit two, each resistor Rd is connected in parallel with a drain parasitic resistance thermal noise source; in each unit three, each resistor is connected in parallel with an intrinsic gate node equivalent noise source; in each unit four, each resistor Rds is connected in parallel with an intrinsic drain node equivalent noise source; and in the unit five, resistor Rs is connected in parallel with a source parasitic resistance thermal noise source.

2. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, characterized in that, Also includes: n units six; The sixth unit is composed of a capacitor Cgd and a resistor Rgd connected in series. The end of each unit away from the gate G is connected to one end of the current source Ids through a sixth unit.

3. The GaN HEMT device multi-noise source equivalent circuit model according to claim 2, characterized in that, The end of each unit away from the gate G is connected to one end of the current source Ids via a unit six, specifically: The end of the m-th unit away from the gate G is connected to one end of the capacitor Cgdm of the m-th unit. The other end of the capacitor Cgdm is connected to one end of the resistor Rgdm. The other end of the resistor Rgdm is connected to one end of the current source Ids, where 1≤m≤n.

4. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, One end of the series structure is connected to the gate G of the GaN HEMT device, specifically: One end of the inductor Lg1 of the first unit is connected to the gate G as one end of the series structure, and the other end of the inductor Lg1 is connected to the resistor Rg1 of the first unit. The other end of the resistor Rgn of the nth unit is the other end of the series structure.

5. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, One end of the second series structure is connected to the drain D of the GaN HEMT device, specifically: One end of the inductor Ld1 of the first unit 2 serves as one end of the series structure 2 and is connected to the drain D. The other end of the inductor Ld1 is connected to the resistor Rd1 of the first unit 2, and the other end of the resistor Rdn of the nth unit 2 serves as the other end of the series structure 2.

6. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, The source S of the GaN HEMT device is connected to one end of unit five, specifically: One end of the inductor Ls serves as one end of the fifth unit and is connected to the source S. The other end of the inductor Ls is connected to one end of the resistor Rs, and the other end of the resistor Rs serves as the other end of the fifth unit.

7. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, The end of each unit 1 furthest from the gate G is connected to the other end of unit 5 via a unit 3, specifically: In each unit 1, the end closer to the gate G is the inductor end, and the end farther from the gate G is the resistor end; in the m-th unit 1, one end of the resistor Rgm is connected to the inductor Lgm, and the other end is connected to one end of the m-th unit 3, and the other end of the m-th unit 3 is connected to the other end of the unit 5.

8. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, The end of each unit 1 furthest from the gate G is connected to the other end of unit 5 via a unit 3, specifically: The end of the m-th unit away from the gate G is connected to one end of the capacitor Cgsm of the m-th unit. The other end of the capacitor Cgsm is connected to one end of the resistor Rgsm. The other end of the resistor Rgsm is connected to the other end of the unit.

9. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, The end of each unit two that is furthest from the drain D is connected to the other end of unit five through a unit four, specifically: In each of the second units, the end closer to the drain D is the inductor end, and the end farther from the drain D is the resistor end; in the m-th second unit, one end of the resistor Rdm is connected to the inductor Ldm, and the other end is connected to one end of the m-th fourth unit, and the other end of the m-th fourth unit is connected to the other end of the fifth unit.

10. The GaN HEMT device multi-noise source equivalent circuit model according to claim 1, 2, or 3, characterized in that, The end of each unit two that is furthest from the drain D is connected to the other end of unit five through a unit four, specifically: The end of the m-th unit 2 furthest from the drain D is connected to one end of the m-th unit 4, and the other end of the m-th unit 4 is connected to the other end of the unit 5.

Citation Information

Patent Citations

  • Method for establishing GaN HEMT (high-electron-mobility transistor) noise model

    CN106294976A

  • GaN HEMT transistor small signal model modeling method

    CN114330192A