Wafer surface topography imaging method, device, equipment, medium and product
In wafer surface morphology image imaging, each pixel point is collected multiple times and the signals within the target period are screened out, which solves the problem of detector signal tailing and achieves more accurate wafer surface morphology imaging.
Patent Information
- Application Number
- CN202510256232.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-05
- Publication Date
- 2025-06-13
AI Technical Summary
The detector's signal has a long tailing phenomenon, which causes the signal of the previous pixel point to affect the signal of the current pixel point, and thus makes the generated image unable to accurately reflect the morphology of the wafer surface.
During the signal acquisition period, each pixel point is collected multiple times, and the second voltage signal in the target period is selected, which is the period after the preset time in the signal acquisition period.
By discarding the affected signal and using the unaffected second half of the signal, the accuracy of the signal is improved and the morphological characteristics of the wafer surface can be more realistically reflected.
Smart Images
Figure CN120149185A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of integrated circuit technology, and particularly relates to a method, device, equipment, medium and product for imaging the surface topography image of a wafer. Background Art
[0002] Scanning electron microscopes are applied to the yield detection in the semiconductor industry. By hitting an electron beam on the surface of a wafer, electron signals such as secondary electrons (SE) and backscattered electrons (BSE) will be generated. In practical applications, the detector will sequentially collect the SE and BSE of each pixel on the wafer sample. For each pixel, during its signal acquisition period, the detector will continuously collect the electron signal and output a voltage signal. The waveform generator collects the voltage signal output by the detector at a fixed frequency. This voltage signal can reflect the contrast of each pixel, so imaging can be performed based on the voltage signal to reflect the topography and electrical defects of the wafer surface.
[0003] However, the signal of the detector is not instantaneous and has a long tail. Thus, the voltage signal of the previous pixel will affect the voltage signal of the current pixel, and further cause the signals of each pixel to be inaccurate, and the generated image cannot accurately reflect the surface topography of the wafer. Summary of the Invention
[0004] Embodiments of this application provide a method, device, equipment, medium and product for imaging the surface topography image of a wafer, which can accurately reflect the surface topography of the wafer.
[0005] On the one hand, embodiments of this application provide a method for imaging the surface topography image of a wafer, including:
[0006] During the signal acquisition period corresponding to each pixel on the wafer sample, collect the first voltage signal of the corresponding pixel multiple times;
[0007] Among the first voltage signals corresponding to each pixel, screen out the second voltage signal in the target period; the target period is the period after a preset duration in the signal acquisition period;
[0008] Generate a grayscale image of the wafer sample based on the second voltage signal.
[0009] On the other hand, before screening out the second voltage signal in the target period among the first voltage signals corresponding to each pixel, the method further includes:
[0010] Obtain multiple test voltage signals corresponding to each pixel;
[0011] Determine the preset duration based on the test voltage signal.
[0012] On the other hand, the determining the preset duration based on the test voltage signal includes:
[0013] Generate a corresponding waveform image based on the test voltage signal;
[0014] Determine the preset duration based on the waveform image.
[0015] On the other hand, the determining the preset duration based on the test voltage signal includes:
[0016] Generate a grayscale image of the test sample based on the test voltage signal;
[0017] Determine the preset duration based on the image parameters of the grayscale image.
[0018] On the other hand, before collecting the first voltage signal multiple times for corresponding pixel points during the signal collection period corresponding to each pixel point on the wafer sample, the method further includes:
[0019] Obtain the signal collection frequency of the waveform generator; the waveform generator is used to collect the first voltage signal;
[0020] Determine the signal collection period based on the signal collection frequency.
[0021] On the other hand, after determining the signal collection period based on the signal collection frequency, the method further includes:
[0022] Determine the preset duration based on the signal collection frequency and the signal collection period.
[0023] On yet another aspect, an imaging device for wafer surface topography images provided by an embodiment of the present application includes:
[0024] A collection module, configured to collect the first voltage signal multiple times for corresponding pixel points during the signal collection period corresponding to each pixel point on the wafer sample;
[0025] A screening module, configured to screen out the second voltage signal within the target period from the first voltage signals corresponding to each pixel point; the target period is the period after the preset duration in the signal collection period;
[0026] A generation module, configured to generate the grayscale image of the wafer sample based on the second voltage signal.
[0027] On yet another aspect, an imaging device for wafer surface topography images provided by an embodiment of the present application includes: a processor and a memory storing computer program instructions;
[0028] When the processor executes the computer program instructions, the method for imaging the surface topography image of the wafer as described above is implemented.
[0029] In another aspect, an embodiment of the present application provides a computer-readable storage medium, on which computer program instructions are stored. When the computer program instructions are executed by a processor, the method for imaging the surface topography image of the wafer as described above is implemented.
[0030] In another aspect, an embodiment of the present application provides a computer program product. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device is enabled to execute the method for imaging the surface topography image of the wafer as described above.
[0031] In the method for imaging the surface topography image of the wafer provided by the embodiment of the present application, the detector scans corresponding pixel points during the signal acquisition period corresponding to each pixel point on the wafer sample, continuously acquires electronic signals and outputs voltage signals, and the waveform generator can acquire the first voltage signal output by the detector at a certain frequency. Since the signal of the detector is not instantaneous and there is a trailing phenomenon, the signal of the previous pixel point will affect the signal of the next pixel point; therefore, the present application will screen out the second voltage signals in the target period from multiple first voltage signals; and then generate a grayscale image. Since the target period is the period after a preset duration in the signal acquisition period, the signal during this period is less affected or even not affected by the previous pixel point. It can be seen that in this implementation manner, when acquiring signals, the signals at the front of the signal acquisition period are discarded, and only the latter half of the signals that are not affected are used, so that the signals used are more accurate, and thus the more real topographic features of the wafer can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.
[0033] Figure 1 is a schematic diagram of the working principle of a scanning electron microscope;
[0034] Figure 2 is a schematic diagram of the waveform generated by the waveform generator;
[0035] Figure 3 is a schematic diagram of the normalized response signal of the detector;
[0036] Figure 4 is a schematic diagram of the response voltage lasting for 20 ns;
[0037] Figure 5 Schematic diagram of the input voltage of the detector under a continuous signal;
[0038] Figure 6 Schematic diagram of the actual surface contrast ratio of four given pixel points;
[0039] Figure 7 Schematic diagram of the voltage signal output by the detector when the signal acquisition period of each pixel point is 5 ns;
[0040] Figure 8 Schematic diagram of the voltage signal output by the detector when the signal acquisition period of each pixel point is 40 ns;
[0041] Figure 9 Schematic diagram of the voltage signal output by the detector when the signal acquisition period of each pixel point is 80 ns;
[0042] Figure 10 Shows a schematic flow chart of a method for imaging the surface topography image of a wafer provided by an embodiment of the present application;
[0043] Figure 11 Schematic diagram of the voltage signal output by the detector when the signal acquisition period of each pixel point is 20 ns under this solution;
[0044] Figure 12 Shows a schematic structural diagram of a device for imaging the surface topography image of a wafer provided by an embodiment of the present application;
[0045] Figure 13 Shows a schematic hardware structure diagram of a device for imaging the surface topography image of a wafer provided by an embodiment of the present application. Detailed implementation manners
[0046] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without some of these specific details. The following description of the embodiments is only intended to provide a better understanding of the present application by showing examples of the present application.
[0047] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising..." does not exclude the presence of additional identical elements in the process, method, article or device comprising such element.
[0048] With the continuous development of technology and information technology, people's lives have become increasingly convenient. Among them, integrated circuits play an important role. An integrated circuit is a microelectronic device or component. Using a certain process, transistors, resistors, capacitors, inductors and other components required in a circuit are interconnected with wiring and fabricated on a small piece or a few small pieces of semiconductor wafers or dielectric substrates, and then encapsulated in a package to form a micro-structure with the required circuit functions.
[0049] The processing process of semiconductors is very complex, involving multiple procedures, and it is necessary to monitor electrical properties, dimensions, defects, etc. at all times. The commonly used method at present is to obtain the image of the surface of the wafer sample through a scanning electron microscope, and then analyze the surface characteristics of the wafer sample.
[0050] When a scanning electron microscope images the surface topography of a wafer, electrons with a certain energy hit each pixel point on the surface of the wafer in turn, thereby generating SE and BSE, etc. By collecting SE and BSE of each pixel point through a detector, the contrast of each pixel point can be calculated to generate a grayscale image, so as to reflect the topography and electrical defects of the wafer surface.
[0051] During the imaging process, the deflector is controlled by a waveform generator for scanning, and then the signal is collected by a detector. Since the pulse period of the detector is relatively long, the signal output of the signal collection of the previous pixel point will affect the signal of the current pixel point, and then affect the contrast of the surface topography, resulting in the inability to truly restore the surface characteristics of the wafer sample. The specific analysis is as follows:
[0052] When a scanning electron microscope performs imaging, a scanning signal is generated by a waveform generator, then the signal is amplified by an amplifier, and finally the voltage signal is applied to the deflector in the electron microscope column to form an electron beam bombarding the surface of the wafer sample.
[0053] The electron beam scans a rectangle (corresponding to one pixel) on the surface of the wafer under the action of the electric field or magnetic field of the deflector. SE and BSE are generated at each pixel. The wafer sample includes multiple pixels. By horizontally or vertically moving the wafer sample, each pixel can be scanned in turn.
[0054] Figure 1 It is a schematic diagram of the working principle of a scanning electron microscope. As Figure 1 shown, it includes an electron beam 101, a wafer sample 102, electrons 103, a deflector 104, a detector 105, a preamplifier 106, a main amplifier 107, and a waveform generator 108. The electron beam 101 bombards the surface of the wafer sample 102 under the action of the deflector 104, generating electrons 103, namely SE and BSE. Subsequently, under the action of the electromagnetic field, these electrons 103 are collected by the detector 105. After the detector 105 collects the electron signal, it outputs a corresponding voltage signal. The voltage signal output by the detector 105 is amplified by the preamplifier 106 and the main amplifier 107, and then the voltage signal is collected by the waveform generator 108. The waveform generator collects the voltage signal at a fixed frequency. For each pixel, multiple voltage signals are usually collected. Finally, these voltage signals are processed by software to form a grayscale image.
[0055] Figure 2 It is a schematic diagram of the waveform generated by the waveform generator. As Figure 2 shown, the waveform generated by the waveform generator is sawtooth-shaped. Currently, a DC source is used in the scanning electron microscope. Under the action of the waveform generator, a continuous signal output will be generated when moving between two pixels. Since the signal of the detector is not instantaneous, there is a long tail.
[0056] Figure 3 It is a schematic diagram of the normalized response signal of the detector. The response time of the detector to receive the signal is related to its own pulse period. As Figure 3 shown, the pulse period of the commonly used PN junction detector is about 40 ns at present. Taking this as an example, assuming that the signal acquisition frequency of the waveform generator is 200 MHz, the corresponding signal acquisition time interval is 5 ns. However, the response time of the detector to receive the signal is as long as 40 ns. Therefore, during the scanning, the signal detected and collected by the detector should be the superposition of all signals.
[0057] Figure 4 It is a schematic diagram of the response voltage lasting for 20 ns. As Figure 4 shown, taking the 20 ns duration as an example, within the 20 ns time period, the voltage signal is continuously detected by the detector and a response voltage is generated. Figure 5 It is a schematic diagram of the input voltage of the detector under a continuous signal. As Figure 5As shown, the voltage signal output by the detector is the sum of all signals within this time period. The longer the duration, the greater the voltage output.
[0058] Figure 6 It is a schematic diagram of the actual surface contrast ratio of four given pixel points. For a wafer sample, its surface topography is manifested through contrast signals, such as Figure 6 As shown, in the order from left to right, the actual surface contrast ratio relationship of the four pixel points is 1:1:2:1.
[0059] The detector is used to scan the above four pixel points in sequence and output the corresponding voltage signals. Figure 7 It is a schematic diagram of the voltage signal output by the detector when the signal acquisition period for each pixel point is 5 ns. As Figure 7 shown, the waveform generator collects data from the voltage signal output by the detector. Assuming that the waveform generator sequentially collects signals from the above four pixel points at the highest frequency (set to 200 MHz), that is, collects the voltage signal every 5 ns. Let the signal acquisition time points of the four pixel points be 5 ns, 10 ns, 15 ns, and 20 ns respectively. The corresponding values are 1.47, 6.17, 10.54, and 14.68 (the unit of the voltage data in this application is mV).
[0060] Normalizing with the second pixel point as the standard, the contrast ratio relationship of the four pixel points is: 0.238:1:1.708:2.379. This is not the same as the actual ratio relationship and cannot truly display the topography of the wafer sample. This is because the response time of the detector is relatively long, causing the subsequent pixel points to be affected by the previous pixel points. Considering the reason of less collected data volume, generally, in order to ensure the accuracy of the result, the duration of the signal acquisition period for each pixel point can be increased to 40 ns, that is, multiple voltage signals will be collected for each pixel point and their average value will be obtained to characterize the contrast of this pixel point.
[0061] Figure 8 It is a schematic diagram of the voltage signal output by the detector when the signal acquisition period for each pixel point is 40 ns. As Figure 8 shown, assuming that the waveform generator still collects signals at the highest frequency (set to 200 MHz), then for each pixel point, 8 voltage signals (5 ns, 10 ns, 15 ns... 35 ns, 40 ns) will be collected, and then the average value of each voltage signal will be obtained. The contrast values of the four pixel points are 8.45, 10.24, 18.68, and 12.03 respectively. Normalizing in the same above way, the ratio relationship of the four pixel points is 0.825:1:1.824:1.175.
[0062] Although increasing the number of voltage signals for each pixel can generally reflect the undulations of the surface topography of the wafer sample, it still cannot accurately reflect the proportional relationship of the topography. In addition, due to the increased time interval between each pixel, the acquisition time for each picture will also increase. Taking a 1K*1K picture as an example, the acquisition time corresponding to a 5ns time interval is about 5.24ms. After the time interval increases, the acquisition time for a single photo increases to 42.94ms. The duration has increased by 7 times.
[0063] Figure 9 Schematic diagram of the voltage signal output by the detector when the signal acquisition period for each pixel is 80ns. As Figure 9 shown, when the time interval increases to 80ns, the contrast values corresponding to the four pixels are: 9.34, 10.237, 19.58, 11.13, and the proportional relationship is 0.912:1:1.913:1.087. Compared with 40ns, it is closer to the true pixel proportional relationship, but the acquisition time in this case will increase to 85.88ms. It can be seen that in this way, reflecting more real topographic features comes at the cost of time.
[0064] In summary, since the signal of the detector is not instantaneous and there is a long tail, if the signal directly collected by the detector is used for imaging, the accuracy of the final image will be poor. Although increasing the signal acquisition period for each pixel can improve the accuracy of the voltage value to a certain extent, this method not only has little effect, but also increases the acquisition duration, which will seriously affect the detection efficiency in the semiconductor field.
[0065] Through the analysis of the working principle of the detector in this application, it is found that when it sequentially collects signals for each pixel, the signal of the previous pixel mainly affects the first half of the signal of the current pixel. Therefore, this application proposes a solution, which can improve the accuracy of the final result by discarding the affected signals (that is, the signals at the front in the signal acquisition period of each pixel).
[0066] Based on this, the embodiments of this application provide a method, device, equipment, medium and product for imaging the surface topography image of a wafer. First, the method for imaging the surface topography image of a wafer provided by the embodiments of this application will be introduced below. Figure 10 The flowchart of the method for imaging the surface topography image of a wafer provided by an embodiment of this application is shown. As Figure 10 shown, the method includes the following steps:
[0067] S1001: During the signal acquisition period corresponding to each pixel on the wafer sample, collect the first voltage signal for the corresponding pixel multiple times.
[0068] As described above, the detector sequentially collects SE and BSE of each pixel on the wafer sample. For each pixel, during its signal acquisition period, the detector continuously collects electronic signals and outputs voltage signals. The waveform generator can collect the first voltage signal output by the detector at a fixed frequency.
[0069] In order to collect more signal amounts to achieve a higher signal-to-noise ratio, the detector usually scans for a longer time on each pixel. The waveform generator sequentially collects the first voltage signal of the pixel multiple times during the signal acquisition period corresponding to each pixel.
[0070] As an alternative implementation, if the signal acquisition frequency of the waveform generator is 200 MHz, the signal acquisition period corresponding to each pixel can be set as an integer multiple of 5 ns. The waveform generator collects the voltage signal of the pixel multiple times during the signal acquisition period corresponding to each pixel to obtain multiple first voltage signals.
[0071] S1002: From the first voltage signals corresponding to each pixel, screen out the second voltage signals within the target period.
[0072] The target period is the period after the preset duration in the signal acquisition period; in practical applications, the specific division of the target period is not limited, and the division scheme can be selected according to requirements. As an alternative implementation, if the signal acquisition periods of each pixel are the same, the same division method can be sampled to obtain the same preset duration. The target period can be all the periods after the preset duration in the signal acquisition period.
[0073] As an alternative implementation, when the signal of the previous pixel has a greater impact on the signal of the current pixel, a longer preset duration can be set, that is, more first voltage signals are discarded. When the signal of the previous pixel has a smaller impact on the signal of the current pixel, a shorter preset duration can be set, that is, more first voltage signals are retained.
[0074] Through the above analysis, it can be seen that the signal of the previous pixel mainly affects the signal of the first half of the current pixel. Also, since the target period is the period after the preset duration in each signal acquisition period, the second voltage signal within the target period is the voltage signal with less influence or no influence. When imaging, using the second voltage signal within the target period can ensure the accuracy of the final result.
[0075] S1003: Generate a grayscale image of the wafer sample based on the second voltage signal.
[0076] Finally, based on the selected second voltage signals, the contrast corresponding to each pixel can be obtained, and then a grayscale image can be generated based on the obtained pixel contrasts.
[0077] As an alternative implementation, taking the duration of the signal acquisition period for each pixel as 40 ns as an example, according to the signal acquisition frequency of the waveform generator, 8 data points (first voltage signals) will be acquired. From the above analysis, it can be seen that the first few data points will be affected by the output signal of the previous pixel. If the first few affected points are discarded and only the subsequent data points are averaged, then a contrast value consistent with the surface characteristics of the wafer sample will be obtained.
[0078] Still taking the above four pixels as an example, assuming the duration of the signal acquisition period is 40 ns and the waveform generator acquires voltage signals every 5 ns, the contrast values obtained by averaging the 8 data points collected for each pixel are 8.45, 10.24, 18.68, and 12.03 respectively.
[0079] Since there is no influence from other pixels before the first pixel, its contrast value is the lowest. Since the contrast of the second pixel is the same as that of the first pixel, the eight data points collected are the same, all being 10.24.
[0080] The actual value of the third pixel should be twice that of the first two, but since the first few data points of the third pixel are affected by the second pixel, the value of the third pixel is thus pulled down. The 8 data points collected for the third pixel are: 11.7, 16.4, 19.3, 20.22, 20.43, 20.47, 20.47, 20.47. If the first four points are discarded, then the contrast of the third pixel is 20.46, which is closer to the true value compared to the average value of 18.68 obtained from the 8 data points.
[0081] Similarly, the first few data values of the fourth pixel are increased due to the influence of the third pixel. The values of the fourth pixel are: 19.00, 14.3, 11.41, 10.49, 10.28, 10.24, 10.24, 10.24. If the first four points are discarded, then the contrasts of these four pixels are: 10.22, 10.24, 20.46, 10.25.
[0082] When the duration of the signal acquisition period is 40 ns, after discarding the first four pixels and normalizing with the second pixel as the standard, the proportional relationship is: 0.998:1:1.998:1.001. When the duration of the signal acquisition period is 40 ns, the proportional relationship before discarding the data points is: 0.825:1:1.825:1.175.
[0083] When the duration of the signal acquisition period is 80 ns, the proportional relationships before the data points that are not discarded are: 0.913, 1, 1.913, 1.087. It can be seen that when the duration of the signal acquisition period is 40 ns, the contrast proportional relationship obtained after discarding the first few disturbed data points is more real, and even more accurate than the 80 ns acquisition interval that takes twice as long.
[0084] Figure 11 This is a schematic diagram of the voltage signal output by the detector during the signal acquisition period of 20 ns for each pixel point in this solution. As Figure 11 shown, in order to further reduce the detection time, the duration of the signal acquisition period is reduced to 20 ns. The number of data points corresponding to each pixel point is 4. Without discarding, the contrast corresponding to the four pixel points is: 6.67, 10.22, 16.91, 13.78, and the proportional relationship is 0.652:1:1.654:1.349, seriously deviating from the true characteristics of the morphology. If the first 2 points are selected to be discarded. Then the corresponding contrast will be: 4.76, 5.12, 9.88, 5.47, and the proportional relationship is 0.93, 1, 1.93, 1.07.
[0085] It can be seen that by discarding the disturbed data points, the morphological characteristics of the wafer sample can be restored more accurately. In addition, the scanning time interval can be shortened to 20 ns or even lower. This solution can efficiently and accurately restore the morphological characteristics of the wafer sample.
[0086] A method for imaging the surface morphology of a wafer provided by an embodiment of the present application. The detector will scan the corresponding pixel points on the wafer sample during the signal acquisition period corresponding to each pixel point, and will continuously collect electronic signals and output voltage signals. The first voltage signal output by the detector can be collected by a waveform generator at a certain frequency. Since the signal of the detector is not instantaneous and there is a tailing phenomenon, the signal of the previous pixel point will affect the signal of the next pixel point; therefore, the present application will screen out the second voltage signals in the target period from multiple first voltage signals; and then generate a grayscale image. Since the target period is the period after a preset duration in the signal acquisition period, the signals during this period are less affected or even not affected by the previous pixel point. It can be seen that in this implementation manner, when collecting signals, the signals at the front of the signal acquisition period are discarded, and only the latter half of the signals that are not affected are used, so that the signals used are more accurate, and thus the more real morphological characteristics of the wafer can be obtained.
[0087] As described above, if the influence of the signal of the previous pixel on the signal of the current pixel is different, the number of first voltage signals to be discarded needs to be adjusted accordingly. This is because if the number of first voltage signals to be discarded is insufficient, the first voltage signals affected by the previous pixel will be retained, resulting in inaccurate final results. If the number of first voltage signals to be discarded is excessive, the number of second voltage signals available for calculation may be too small, also leading to inaccurate final results. And if the number of first voltage signals for each pixel collected is increased, the overall detection time will become longer.
[0088] In the case where the signal of the previous pixel has a greater influence on the signal of the current pixel, a longer preset duration can be set, that is, more first voltage signals are discarded. In the case where the signal of the previous pixel has a smaller influence on the signal of the current pixel, a shorter preset duration can be set, that is, more first voltage signals are retained. It can be seen that the preset duration in each signal acquisition period needs to be accurately determined.
[0089] In practical applications, due to production process limitations, when different detectors perform scanning, the influence of the signal of the previous pixel on the signal of the current pixel is different. When the same detector scans different wafer samples, the differences can be ignored. Therefore, before using a certain scanning electron microscope for detection for the first time, the corresponding preset duration can be determined in advance, and the set parameters, that is, the fixed preset duration, can be directly used in subsequent detections of different wafer samples.
[0090] As an alternative implementation, before screening out the second voltage signals within the target period among the first voltage signals corresponding to each pixel, multiple test voltage signals corresponding to each pixel on the test sample collected by the waveform generator can be obtained; then based on the test voltage signals, the preset duration is determined.
[0091] In this implementation, before using the detector for scanning for the first time, an accurate preset duration is determined through a wafer sample for testing, thereby ensuring the accuracy of the imaging of this scanning electron microscope.
[0092] This application does not limit how to determine the preset duration based on the test voltage signals. In practical applications, generally, the user judges the degree of signal influence between each pixel based on experience, and then determines the number of first voltage signals to be discarded, that is, determines the preset duration sum in each signal acquisition period.
[0093] As a feasible implementation, corresponding waveform images can be generated based on the test voltage signals, and then the preset duration can be determined based on the waveform images.
[0094] A feasible method is provided here to display a waveform image to the user. Based on experience, the user can determine the signal influence degree between each pixel point under this detector according to the waveform image, and then determine the preset duration. In addition to judging the signal influence degree between each pixel point through the user's experience, the processor can also automatically determine the preset duration according to the waveform image, avoiding situations such as misoperation or misjudgment that may be caused by manual division.
[0095] In this implementation method, by generating a waveform image of the test voltage signal, the affected time period can be quickly and accurately determined. The user can analyze the waveform image based on experience and quickly and accurately determine the affected time period, and then determine the preset duration.
[0096] In practical applications, in addition to analyzing through the waveform image of the test voltage signal, analysis can also be performed according to the grayscale image generated from the test voltage signal. As a feasible implementation method, a grayscale image of the test sample can be generated based on the test voltage signal; then, based on the image parameters of the grayscale image, the preset duration can be determined. The image parameters can include image quality, resolution, signal-to-noise ratio, and sharpness, etc. According to these image parameters, the signal influence degree between each pixel point can be determined, and then the preset duration can be accurately determined.
[0097] Similarly, as a feasible implementation method, a grayscale image can be displayed to the user. Based on experience, the user can determine the signal influence degree between each pixel point under this detector according to the grayscale image, and then determine the preset duration. In addition to the judgment through the user's experience, the processor can also automatically judge the preset duration according to the waveform image, avoiding situations such as misoperation or misjudgment that may be caused by manual division.
[0098] In this implementation method, a grayscale image of the test sample is generated based on the test voltage signal, and then the influence degree of the previous pixel point on the current pixel point can be accurately determined according to the image parameters of the grayscale image, and then the preset duration can be accurately determined.
[0099] In practical applications, the duration of the signal acquisition period for each pixel point needs to be set reasonably. If the duration of the signal acquisition period is too long, it will lead to an increase in the time consumed for the entire detection process; if the duration of the signal acquisition period is too short, it may lead to insufficient voltage signals being obtained, affecting the accuracy of the final imaging result.
[0100] Therefore, before obtaining multiple first voltage signals of each pixel on the wafer sample collected by the detector through the waveform generator, the specific duration of the signal acquisition period of each pixel can be determined first. As a feasible implementation, the signal acquisition frequency of the waveform generator can be obtained, and then the duration of the signal acquisition period can be determined based on the signal acquisition frequency. For example, assume that the signal acquisition frequency of the waveform generator is 200 MHz, that is, a voltage signal is acquired every 5 ns. Then the signal acquisition period can be set to an integer multiple of 5 ns, such as 20 ns, 40 ns, or 60 ns, etc.
[0101] In practical applications, for different detector signal acquisition frequencies, different numbers of sampling signals can be obtained within the same length of time period. Therefore, the length of the signal acquisition period can be determined based on the signal acquisition frequency, and then the acquisition time can be reduced on the premise of ensuring that enough signals are acquired.
[0102] As an alternative implementation, the preset duration can be determined based on the signal acquisition frequency and the signal acquisition period. Because after determining the duration of the signal acquisition period based on the signal acquisition frequency, that is, determining the duration for the detector to scan each pixel, and knowing the time interval for the waveform generator to acquire voltage signals through the signal acquisition frequency, on the premise of determining the degree of influence between each pixel, then based on this information, the preset duration can be accurately determined.
[0103] In this implementation, through the signal acquisition frequency of the detector, it can be determined how often the detector acquires a voltage signal, and then based on the length of the signal acquisition period, it can be determined how many times the detector acquires signals within a signal acquisition period. Through the number of signals corresponding to each pixel, it can be determined how many sampling points need to be discarded, and then the preset duration can be accurately determined.
[0104] To solve the above technical problems, an embodiment of the present application further provides a wafer surface topography image imaging device. Figure 12 The structural schematic diagram of the wafer surface topography image imaging device provided by the embodiment of the present application is shown. As Figure 12 shown, the device includes the following modules:
[0105] An acquisition module 1201, configured to acquire multiple first voltage signals of corresponding pixels within the signal acquisition periods corresponding to each pixel on the wafer sample;
[0106] A screening module 1202, configured to screen out second voltage signals within a target period from the first voltage signals corresponding to each pixel; the target period is the period after the preset duration within the signal acquisition period;
[0107] A generation module 1203, configured to generate a grayscale image of the wafer sample based on the second voltage signals.
[0108] In some embodiments, the wafer surface topography image imaging device further includes: an acquisition module, configured to acquire a plurality of test voltage signals corresponding to each pixel point before screening out the second voltage signals within a target period from the first voltage signals corresponding to each pixel point.
[0109] A determination module, configured to determine a preset duration based on the test voltage signals.
[0110] In some embodiments, the determination module is specifically configured to:
[0111] Generate a corresponding waveform image based on the test voltage signals;
[0112] Determine the preset duration based on the waveform image.
[0113] In some embodiments, the determination module is specifically configured to:
[0114] Generate a grayscale image of the test sample based on the test voltage signals;
[0115] Determine the preset duration based on the image parameters of the grayscale image.
[0116] The acquisition module is further configured to acquire the signal acquisition frequency of the waveform generator before collecting the first voltage signals of each pixel point on the wafer sample multiple times within the signal acquisition period corresponding to each pixel point.
[0117] The determination module is further configured to determine the signal acquisition period based on the signal acquisition frequency.
[0118] The determination module is further configured to determine the preset duration based on the signal acquisition frequency and the signal acquisition period after determining the signal acquisition period based on the signal acquisition frequency.
[0119] The device provided in the embodiments of the present application is the same as the method in the above embodiments, so the two have the same embodiments and beneficial effects, which will not be elaborated here.
[0120] Figure 13 FIG. shows a schematic hardware structure diagram of a wafer surface topography image imaging device provided in an embodiment of the present application. As Figure 13 shown, the wafer surface topography image imaging device may include a processor 1301 and a memory 1302 storing computer program instructions.
[0121] Specifically, the above-mentioned processor 1301 may include a Central Processing Unit (CPU), or an Application Specific Integrated Circuit (ASIC), or may be configured as one or more integrated circuits for implementing the embodiments of the present application.
[0122] The memory 1302 may include a mass storage for data or instructions. By way of example and not limitation, the memory 1302 may include a Hard Disk Drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. In a suitable case, the memory 1302 may include removable or non-removable (or fixed) media. In a suitable case, the memory 1302 may be internal or external to the integrated gateway disaster recovery device. In a specific embodiment, the memory 1302 is a non-volatile solid-state memory.
[0123] The memory 1302 may include a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk storage media device, an optical storage media device, a flash memory device, an electrical, optical, or other physical / tangible memory storage device. Thus, generally, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to one aspect of the present disclosure.
[0124] The processor 1301 reads and executes the computer program instructions stored in the memory 1302 to implement any one of the wafer surface topography image imaging methods in the above embodiments.
[0125] In one example, the wafer surface topography image imaging device may further include a communication interface 1303 and a bus 1304. The processor 1301, the memory 1302, and the communication interface 1303 are connected through the bus 1304 to complete communication with each other.
[0126] The communication interface 1303 is mainly used to implement communication between various modules, devices, units, and / or devices in the embodiments of the present application.
[0127] The bus 1304 includes hardware, software, or both, and couples the components of the wafer surface topography image imaging device to each other. By way of example and not limitation, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or other suitable buses, or a combination of two or more of these. Where appropriate, the bus 1304 may include one or more buses. Although the embodiments of the present application describe and illustrate specific buses, the present application contemplates any suitable bus or interconnect.
[0128] In addition, in combination with the wafer surface topography image imaging method in the above embodiments, the embodiments of the present application can be implemented by providing a computer storage medium. Computer program instructions are stored on the computer storage medium; when the computer program instructions are executed by a processor, any one of the wafer surface topography image imaging methods in the above embodiments is implemented.
[0129] The embodiments of the present application also provide a computer program product, including a computer program, which when executed by a processor implements any one of the wafer surface topography image imaging methods in the above embodiments.
[0130] It should be clear that the present application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order between steps after understanding the spirit of the present application.
[0131] The functional blocks shown in the above structural block diagrams can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an ASIC, appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium or transmitted via a data signal carried in a carrier wave on a transmission medium or a communication link. A "machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, compact disc read-only memory (CD-ROM), optical discs, hard disks, fiber optic media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, intranet, etc.
[0132] It should also be noted that in the exemplary embodiments mentioned in the present application, some methods or systems are described based on a series of steps or devices. However, the present application is not limited to the order of the above steps, that is, the steps can be executed in the order mentioned in the embodiments, or different from the order in the embodiments, or several steps can be executed simultaneously.
[0133] As described above with reference to the flowcharts and / or block diagrams of a method, apparatus, device, medium, and product for imaging a wafer surface topography image according to an embodiment of the present disclosure. It should be understood that each block in the flowchart and / or block diagram, and the combination of blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine, such that the instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the functions / actions specified in one or more blocks of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It is also understood that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can also be implemented by dedicated hardware that performs the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.
[0134] The above content is only the specific implementation manner of the present application. Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the above-described systems, modules, and units can refer to the corresponding processes in the foregoing method embodiments and will not be repeated herein. It should be understood that the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present application.
Claims
1. A wafer surface topography imaging method, characterized in that: include: During a signal collection period corresponding to each pixel point on the wafer sample, collecting a first voltage signal for the corresponding pixel point multiple times; Screening out the second voltage signal in the target time period from the first voltage signal corresponding to each pixel point; The target time period is a time period after a preset time length in the signal acquisition time period; Based on the second voltage signal, a grayscale image of the wafer sample is generated.
2. The wafer surface topography imaging method according to claim 1, characterized in that: Before selecting the second voltage signal in the target time period from the first voltage signal corresponding to each pixel point, the method further includes: Acquire multiple test voltage signals corresponding to each pixel point; The preset time duration is determined based on the test voltage signal.
3. The wafer surface topography imaging method according to claim 2, characterized in that: The determining the preset duration based on the test voltage signal includes: Based on the test voltage signal, generating a corresponding waveform image; Based on the waveform image, the preset duration is determined.
4. The wafer surface topography imaging method according to claim 2, characterized in that: The determining the preset duration based on the test voltage signal includes: Based on the test voltage signal, generating a grayscale image of the test sample; The preset time length is determined based on image parameters of the grayscale image.
5. The wafer surface topography imaging method according to any one of claims 1 to 4, characterized in that: Before collecting the first voltage signal for each pixel point multiple times during the signal collection period corresponding to each pixel point on the wafer sample, the method further includes: Acquiring a signal acquisition frequency of a waveform generator; the waveform generator is used to acquire the first voltage signal; The signal collection period is determined based on the signal collection frequency.
6. The wafer surface topography imaging method according to claim 5, characterized in that: After determining the signal acquisition period based on the signal acquisition frequency, the method further includes: The preset duration is determined based on the signal collection frequency and the signal collection period.
7. A wafer surface topography imaging device, characterized in that: include: An acquisition module, used for acquiring a plurality of first voltage signals from corresponding pixel points on the wafer sample within a signal acquisition period corresponding to each pixel point on the wafer sample; A screening module, used for screening out a second voltage signal within a target time period from the first voltage signal corresponding to each pixel point; The target time period is a time period after a preset time length in the signal acquisition time period; A generating module is used to generate a grayscale image of the wafer sample based on the second voltage signal.
8. A wafer surface topography imaging device, characterized in that: include: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the wafer surface topography imaging method as described in any one of claims 1 to 6 is implemented.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the wafer surface topography imaging method according to any one of claims 1 to 6 is implemented.
10. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the wafer surface topography imaging method as described in any one of claims 1 to 6.