Satellite-borne high-frame-frequency linear array TDI panchromatic camera system based on FPGA

By designing a satellite-based high-frame frequency line array TDI full-color camera system based on FPGA in a multi-line array full-color camera system, the multi-line array image data is processed using the digital domain ping-pong TDI module, the problem of low image signal-to-noise ratio is solved, and image enhancement and signal-to-noise ratio are achieved.

CN120151618AActive Publication Date: 2025-06-13HANGZHOU INST FOR ADVANCED STUDY UCAS
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Patent Information

Application Number
CN202510185202.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-19
Publication Date
2025-06-13
Estimated Expiration
2045-02-19

AI Technical Summary

Technical Problem

The existing multi-line array full-color camera system has a low image signal-to-noise ratio under low rail and high resolution applications, and cannot effectively use TDI technology for signal-to-noise ratio enhancement.

Method used

A satellite-based high-frame frequency line array TDI full-color camera system based on FPGA is designed. Through the main control telemetry command module, the detector control module, the digital domain ping-pong TDI module and the image data transmission module, the odd and even frames of the multi-line array image data are respectively TDI processing.

Benefits of technology

By performing TDI processing of odd and even frames on multilinear image data, the problem of TDI processing cannot be performed due to cell intervals is solved, image enhancement is achieved, and the signal-to-noise ratio of image data is improved.

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Abstract

The invention discloses a satellite-borne high-frame-frequency linear array TDI panchromatic camera system based on an FPGA, relates to the technical field of satellite remote sensing, and mainly aims to solve the problem that the signal-to-noise ratio of an image output by a multi-linear array panchromatic camera is low. The method mainly comprises the following steps: sending an analysis result of a remote control instruction to a detector control module through a main control telemetering command module; driving an interval linear array panchromatic detector through a detector control module according to an analysis result of the remote control instruction; acquiring multi-linear-array image data through an interval linear array panchromatic detector, and transmitting the multi-linear-array image data back to a detector control module; carrying out TDI processing on odd number frames and even number frames in the multi-linear array image data through a digital domain ping-pong TDI module to obtain image data after TDI processing; and adding camera auxiliary data to the image data after TDI processing through an image data transmission module, performing packaging processing, and outputting the image data. The method is mainly used for improving the signal-to-noise ratio of an image output by the multi-linear array panchromatic camera.
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Description

Technical Field

[0001] The present invention relates to the technical field of satellite remote sensing, and particularly to an on-board high-frame-rate linear array TDI panchromatic camera system based on FPGA. Background Art

[0002] Remote sensing is an important technical means for obtaining Earth data and change information, and is widely used globally. Since the 1980s, with the continuous development of remote sensing technology, significant changes have occurred in terms of theory, technology, and practical applications. Remote sensing data sources are evolving towards higher spectral resolution, higher spatial resolution, higher temporal resolution, and higher radiometric resolution. At the same time, the processing of information technology has become more mature, and it combines the 3S technology of geographic information system and global positioning system in terms of applications, and is widely used in various fields of the national economy, such as land resource survey and management, crop yield estimation, geological exploration, marine environment monitoring, disaster monitoring, global change research, etc.

[0003] A panchromatic camera is a type of remote sensing detector, which is an image acquisition device for obtaining high-resolution image data. The panchromatic camera obtains an image of a single band, that is, a grayscale image. Therefore, it usually has a very high spatial resolution and can capture surface details, including buildings, roads, vegetation, and landforms. Currently, linear array detectors are usually used to capture the light intensity information within the entire visible spectral range. However, due to the limited pixel dwell time of the satellite under low-orbit and high-resolution application conditions, there are intervals between pixels of some multi-linear array detectors, and the TDI technology cannot be applied to enhance the signal-to-noise ratio, resulting in a relatively low signal-to-noise ratio of the actually generated image. Summary of the Invention

[0004] In view of this, the present invention provides an on-board high-frame-rate linear array TDI panchromatic camera system based on FPGA, and the main purpose is to solve the problem of relatively low signal-to-noise ratio of the images produced by multi-linear array panchromatic cameras.

[0005] According to one aspect of the present invention, there is provided an on-board high-frame-rate linear array TDI panchromatic camera system based on FPGA, including:

[0006] An interleaved linear array panchromatic detector, a main control telemetry command module, a detector control module, a digital domain ping-pong TDI module, and an image data transmission module;

[0007] The main control telemetry command module is configured to receive a remote control instruction and send the parsing result of the remote control instruction to the detector control module;

[0008] The detector control module is used to drive the interleaved linear array panchromatic detector according to the parsing result of the remote control instruction, and send the multi-linear array image data received from the interleaved linear array panchromatic detector to the digital domain ping-pong TDI module, where the parsing result includes an imaging command signal, an integration time, a frame time, a gain configuration, and an image mode;

[0009] The interleaved linear array panchromatic detector is used to collect multi-linear array image data under the drive of the detector control module, and send the multi-linear array image data back to the detector control module;

[0010] The digital domain ping-pong TDI module includes a first multi-stage FIFO and a second multi-stage FIFO;

[0011] The first multi-stage FIFO is used to perform delay accumulation processing on at least two consecutive odd-frame images in the multi-linear array image data to obtain processed odd-frame images;

[0012] The second multi-stage FIFO is used to perform delay accumulation processing on at least two consecutive even-frame images in the multi-linear array image data to obtain processed even-frame images;

[0013] The digital domain ping-pong TDI module is further used to sequentially summarize the processed odd-frame images and the processed even-frame images;

[0014] Among them, the number of accumulated image frames of the output frame images of the first multi-stage FIFO and the second multi-stage FIFO is the same, and the read and write operations of the first multi-stage FIFO and the second multi-stage FIFO are both based on an asynchronous FIFO storage structure;

[0015] The image data transmission module is used to add camera auxiliary data to the image data after TDI processing and perform packaging processing, and output the obtained target image.

[0016] Further, the main control telemetry command module includes a main control telemetry command input module and a main control telemetry command parsing module;

[0017] The main control telemetry command input module is used to forward the received remote control instruction to the main control telemetry command parsing module and the image data transmission module;

[0018] The main control telemetry command parsing module is used to analyze the remote control instruction in the register to generate a single-bit or multi-bit instruction signal, and input the instruction signal into the detector control module through UART;

[0019] The detector control module includes an SPI control module, a power control module, a temperature feedback module, and a detector data transmission module;

[0020] The SPI control module is used to receive the control information output by the remote control instruction parsing module, and according to the instruction signal, configure the register parameters of the line array panchromatic detector at preset intervals of addresses and data. The register parameters include at least one of an exposure mode, an exposure time, an imaging period, and an image data clock;

[0021] The power control module is used to sequentially provide three different working voltages for the line array panchromatic detector according to the instruction signal;

[0022] The temperature feedback module is used to read the value of the internal register of the temperature chip of the line array panchromatic detector in real time through the IIC protocol, obtain the internal temperature parameters of the line array panchromatic detector, and feedback the internal temperature parameters to the master control end through the master control telemetry command module;

[0023] The detector data transmission module is used to transmit the multi-line array image data collected by the line array panchromatic detector to the image data transmission module in a time-sequential consistent manner through a multi-channel high-speed LVDS interface;

[0024] When the remote control instruction indicates parameter update for the line array panchromatic detector, the SPI control module is further used to configure and update the register parameters of the line array panchromatic detector according to the update instruction signal at preset intervals of addresses and data.

[0025] Further, the image data transmission module includes a GTX transmission module, a FIFO data storage module, and an image data processing and packaging module;

[0026] The GTX transmission module is used to receive the image processed by the digital domain TDI and store it in the FIFO data storage module;

[0027] The image data processing and packaging module is used to add camera auxiliary data to the image data processed by the TDI, perform packaging processing on the image data after adding the auxiliary data, and transmit the obtained target image to the master control GTX transmission module;

[0028] The GTX transmission module is further used to output the target image through the GTX interface of the FPGA chip.

[0029] By means of the above technical solutions, the technical solutions provided by the embodiments of the present invention have at least the following advantages:

[0030] The present invention provides a spaceborne high-frame-rate linear TDI panchromatic camera system based on FPGA. In the embodiments of the present invention, the parsing result of the remote control instruction is sent to the detector control module through the main control telemetry command module; the spaced linear panchromatic detector is driven by the detector control module according to the parsing result of the remote control instruction; the spaced linear panchromatic detector collects multi-linear array image data under the drive of the detector control module and sends the multi-linear array image data back to the detector control module; the digital domain ping-pong TDI module performs TDI processing on the odd frames and even frames in the multi-linear array image data respectively to obtain the image data after TDI processing; the image data transmission module is used to add camera auxiliary data and perform packaging processing on the image data after TDI processing and output the obtained target image. By performing TDI processing on the odd frames and even frames of the multi-linear array image data with pixel intervals respectively, the problem that the multi-linear array detector image cannot be subjected to TDI processing due to pixel intervals is solved, and image enhancement of the multi-linear array image data is realized, thereby improving the signal-to-noise ratio of the image data.

[0031] The above description is only an overview of the technical solution of the present invention. In order to be able to understand the technical means of the present invention more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention are specifically given below. Brief Description of the Drawings

[0032] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present invention. And throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0033] Figure 1 A block diagram of a spaceborne high-frame-rate linear TDI panchromatic camera system based on FPGA provided by an embodiment of the present invention is shown;

[0034] Figure 2 A schematic diagram showing the implementation process of a four-stage digital domain TDI algorithm provided by an embodiment of the present invention is shown;

[0035] Figure 3 Another block diagram of a spaceborne high-frame-rate linear TDI panchromatic camera system based on FPGA provided by an embodiment of the present invention is shown;

[0036] Figure 4 A schematic diagram showing the state transition of a camera system provided by an embodiment of the present invention is shown. Detailed Description of the Embodiments

[0037] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.

[0038] Aiming at the problem of low signal-to-noise ratio of the images produced by existing multi-line array panchromatic cameras. An embodiment of the present invention provides a spaceborne high-frame-rate line array TDI panchromatic camera system based on FPGA, as Figure 1 shown. The system includes: an interleaved line array panchromatic detector 10, a main control telemetry command module 20, a detector control module 30, a digital domain ping-pong TDI module 40, and an image data transmission module 50.

[0039] Among them, the main control telemetry command module 20 receives a remote control instruction and sends the parsing result of the remote control instruction to the detector control module 30. The detector control module 30 drives the interleaved line array panchromatic detector 10 according to the parsing result of the remote control instruction and sends the multi-line array image data received from the interleaved line array panchromatic detector 10 to the digital domain ping-pong TDI (Time Delay Integration) module, where the parsing result includes an imaging command signal, an integration time, a frame time, a gain configuration, and an image mode. The interleaved line array panchromatic detector 10 collects multi-line array image data under the drive of the detector control module 30 and sends the multi-line array image data back to the detector control module 30. The digital domain ping-pong TDI module 40 performs TDI processing on the odd frames and even frames in the multi-line array image data respectively to obtain the image data after TDI processing. The image data transmission module 50 adds camera auxiliary data and packet processing to the image data after TDI processing and outputs the obtained target image.

[0040] In the embodiment of the present invention, the interleaved line array panchromatic detector 10 is a spaceborne high-frame-rate line array detector, and there may be intervals between the pixels in the image data collected by it. The main control telemetry command module 20, the detector control module 30, the digital domain ping-pong TDI module 40, and the image data transmission module 50 are software modules built based on FPGA (Field-Programmable Gate Array). They are mainly used to drive the interleaved line array panchromatic detector 10 to perform image acquisition and perform TDI processing on the image data with pixel intervals generated by the detector, so as to solve the problem of pixel intervals while enhancing the image data and improve the continuity of the image data.

[0041] It should be noted that the parsing results of the remote control instructions include imaging command signals, integration time, frame time, gain configuration, and image mode. That is, the operating parameters for the interval linear array panchromatic detector to collect images can be updated in real time according to the content of the remote control instructions. By updating the register parameters of the interval linear array panchromatic detector in real time, rapid parameter adjustment can be achieved according to changes in the external environment, enabling the panchromatic camera to improve its flexibility and real-time performance without changing the bit stream, and quickly matching the requirements of various telemetry imaging tasks. This provides a more reliable and effective panchromatic camera control system for future space exploration.

[0042] Among them, the digital domain ping-pong TDI module includes a first multi-stage FIFO and a second multi-stage FIFO.

[0043] Among them, the first multi-stage FIFO (First In First Out, a data buffer with first-in-first-out order) is used to perform delay accumulation processing on at least two consecutive odd-frame images in the multi-line array image data to obtain processed odd-frame images; the second multi-stage FIFO is used to perform delay accumulation processing on at least two consecutive even-frame images in the multi-line array image data to obtain processed even-frame images; the digital domain ping-pong TDI module is further used to sequentially summarize the processed odd-frame images and the processed even-frame images.

[0044] In the embodiment of the present invention, the digital domain ping-pong TDI module is divided into two parts: a first multi-stage FIFO and a second multi-stage FIFO. These two parts are respectively used to perform TDI processing on odd frames and even frames in the image data to achieve ping-pong processing of the interleaved frames. Taking a four-line array detector as an example, as Figure 2Implementation process of a four - stage digital - domain TDI algorithm. The four inputs of the first multi - stage FIFO are, in sequence, the odd - frame images collected by the first to fourth linear arrays; the input of the second multi - stage FIFO is, in sequence, the even - frame images collected by the first to fourth linear arrays. Both the first multi - stage FIFO and the second multi - stage FIFO include three - stage FIFOs. Taking the odd - frame as an example, the first - stage TDI output is: the image obtained by delaying the input odd - frame by one clock. The second - stage TDI output is: the result of adding the first - stage TDI output image frame cached in the first - stage FIFO and the input image frame of the second - stage TDI algorithm. The third - stage TDI output is: the result of adding the second - stage TDI output cached in the second - stage FIFO and the input image frame of the third - stage TDI algorithm. The fourth - stage TDI output is: the result of adding the third - stage TDI output cached in the third - stage FIFO and the input image frame of the fourth - stage TDI algorithm. If there are more stages, it can be deduced by analogy. The process of the four - stage digital - domain TDI algorithm on the even - frame side is the same as the implementation process on the odd - frame side described above, so it will not be elaborated here. During the process of sequentially summarizing the odd - frame and the even - frame, according to the set output stage, the first - stage TDI outputs are respectively selected from the fourth - stage TDI outputs on the even - frame side and the odd - frame side and combined in the input time sequence to obtain the finally output image. Among them, the set output stages corresponding to the even - frame side and the odd - frame side are the same. For example, if the third - stage TDI output is selected as the even - frame image output on the even - frame side, then the third - stage TDI output also needs to be selected as the odd - frame image output on the odd - frame side. That is, the number of image frames accumulated by the output frame image of the first multi - stage FIFO and the output frame image of the second multi - stage FIFO is the same.

[0045] The image acquisition of the detector is carried out during movement, that is, the objects collected by different linear arrays are different at the same moment. Taking the sequential scanning of areas A, B, C, D, E... by a four-linear-array detector as an example: when linear array 1 acquires the image of area A, linear array 2 has not acquired the effective area yet. When linear array 1 acquires the image of area B, linear array 2 acquires the image of area A, and linear arrays 3 and 4 have not acquired the effective area yet. And so on. When linear array 1 acquires the image of area E, linear array 2 acquires the image of area C, linear array 3 acquires the image of area B, and linear array 4 acquires the image of area A. At this time, there is image data corresponding to area A in the image data of linear arrays 1 to 4. Performing TDI processing on the images of area A corresponding to these 4 linear arrays can achieve noise reduction and image enhancement of the image of area A, thereby improving the signal-to-noise ratio of the image. Since a multi-linear-array detector usually includes multiple independent linear-array detectors, each linear-array detector has its own pixel array, and there is a frame pixel interval between every two pixel arrays. And the TDI technology requires the charge to be accurately transferred and accumulated between consecutive pixel rows. By dividing the images in different pixel arrays into odd-frame images and even-frame images, the pixel interval between the pixel arrays is removed, making the image continuous on one side of the odd-frame image or the even-frame image, thus meeting the TDI processing requirements.

[0046] It should be noted that the above only takes the digital-domain ping-pong TDI processing process of a four-linear-array detector as an example. Of course, this digital-domain ping-pong TDI module can also be applied to multi-linear-array detectors with any number of linear arrays, and the embodiments of the present invention do not make specific limitations in this regard. By dividing the digital-domain ping-pong TDI module into two parts, digital-domain TDI processing is performed on the odd frames and even frames of the image respectively, that is, ping-pong processing is performed on the interleaved-frame images, and finally the images generated after the respective TDI processing are sequentially summarized. The TDI processing of the digital domain of the images generated by the interleaved linear-array panchromatic detector is realized. By adopting the top-level ping-pong strategy for image data scheduling, the non-interleaved digital-domain TDI algorithm can be directly instantiated for image processing. It can effectively reduce the code complexity and the resource utilization of the FPGA, and is more conducive to improving the code development efficiency and enhancing the system adaptability. Thereby greatly improving the code flexibility and adaptability of the spaceborne panchromatic camera, and providing efficient and reliable system support for space exploration tasks.

[0047] In the embodiments of the present invention, the read and write operations of the first multi-stage FIFO and the second multi-stage FIFO are both based on the asynchronous FIFO storage structure. Based on the asynchronous FIFO storage structure for data read and write operations, through rate matching calculations, the read and write data bandwidth can be satisfied. Using FIFO instead of DDR cache can effectively reduce power consumption and code complexity while meeting the bandwidth requirements.

[0048] In one embodiment of the present invention, for further illustration and limitation, asFigure 3 As shown, the master control telemetry command module includes a remote control instruction input module and a remote control instruction parsing module.

[0049] Among them, the remote control instruction input module is used to forward the received remote control instruction to the remote control instruction parsing module and the image data transmission module; the remote control instruction parsing module is used to analyze the remote control instruction in the register to generate a single-bit or multi-bit instruction signal, and input the instruction signal into the detector control module through UART.

[0050] In the embodiment of the present invention, the instruction signal is a signal generated according to the parsing result of the remote control instruction, including but not limited to an imaging command signal, integration time, frame time, gain configuration, and image mode. The configuration parameters of the master control for the line array panchromatic detector are transmitted to the detector control module through the instruction signal, so that the detector control module stores the parameters in the register of the line array panchromatic detector, enabling the line array panchromatic detector to perform image acquisition according to the configuration of the master control. The master control telemetry command module is also used to receive the temperature signal carrying the internal temperature parameter of the detector, and transmit the remote control instruction and related auxiliary information to the image data transmission module.

[0051] Among them, the detector control module includes an SPI control module, a power supply control module, a temperature feedback module, and a detector data transmission module. The SPI (Serial Peripheral Interface) control module is used to receive the control information output by the remote control instruction parsing module, and configure the register parameters of the line array panchromatic detector according to the instruction signal and a preset number of addresses and data; the power supply control module is used to sequentially provide three different working voltages for the line array panchromatic detector according to the instruction signal; the temperature feedback module is used to read the value of the internal register of the temperature chip of the line array panchromatic detector in real time through the IIC (Inter-Integrated Circuit) protocol to obtain the internal temperature parameter of the line array panchromatic detector, and use the internal temperature parameter as the telemetry status to feedback to the master control end through the master control telemetry command module; the detector data transmission module is used to transmit the multi-line array image data collected by the line array panchromatic detector to the image data transmission module in a time-sequential manner through a multi-channel high-speed LVDS interface. After actual test verification, the image data transmission rate of this system can reach 2.5 Gb / s.

[0052] In the embodiment of the present invention, the SPI control module configures the detector register parameters with a preset number of addresses and a preset number of data by sending an SPI drive signal and a detector imaging signal to the detector. The preset number can be 8 bits, that is, the detector register parameters are configured with 8-bit addresses and 8-bit data, or it can be customized according to application requirements, and the embodiment of the present invention does not make specific limitations. Among them, the register parameters include at least one of an exposure mode, an exposure time, an imaging period, and an image data clock. The power control module controls the working voltage of the detector by sending a detector power-on signal to the detector and provides three different working voltages according to the corresponding sequence of relevant instructions. The temperature feedback module reads the value of the internal register of the temperature chip through the IIC protocol to obtain the internal temperature of the detector and feeds it back to the main control through the main control telemetry command module. The detector data transmission module transmits the multi-line array image data collected by the spaced linear array panchromatic detector to the image data transmission module. The detector data transmission module performs data transmission and reception through a multi-channel high-speed LVDS (Low-Voltage Differential Signaling) interface and maintains consistent timing during the image data transmission process.

[0053] It should be noted that in order to ensure consistent timing during the image data transmission process, that is, the clock phase and data phase of the sending end and the receiving end are precisely aligned. It is necessary to perform clock phase and data phase alignment training in advance to find the optimal sampling clock phase, or optimize the LVDS interface parameters until the optimal combination of transmission parameters is found to ensure consistent timing during the image data transmission process.

[0054] In the embodiment of the present invention, when the remote control instruction indicates parameter update of the spaced linear array panchromatic detector, the SPI control module is further configured to configure and update the register parameters of the spaced linear array panchromatic detector according to the update instruction signal with a preset number of addresses and data. By adjusting and updating the imaging parameters of the detector in real time, the panchromatic camera can quickly match the requirements of various telemetry imaging tasks without changing the bit stream. Among them, the remote control instruction indicating parameter update of the spaced linear array panchromatic detector can be triggered by manual input based on an interactive interface or triggered by monitoring data of the external environment of the camera, and the present invention example does not make specific limitations.

[0055] Among them, the image data transmission module includes a GTX transmission module, a FIFO data storage module, and an image data processing and packaging module. The GTX transmission module is used to receive the image processed by the digital domain TDI and store it in the FIFO data storage module; the image data processing and packaging module is used to add camera auxiliary data to the image data after TDI processing, perform packaging processing on the image data after adding the auxiliary data, and transmit the obtained target image to the main control GTX transmission module; the GTX transmission module is further used to output the target image through the GTX interface of the FPGA chip. The camera auxiliary data may include a synchronization header, packet length, packet type, device description, frame number, line number, etc.

[0056] In an application example, in order to clearly distinguish the working states and facilitate the control of the camera state, four working states are adopted: an initial state, a waiting for imaging state, a parameter configuration state, and an imaging state. As Figure 4 shown in a schematic diagram of the state transition of a camera system. The initial state corresponds to the process in which the built-in FPGA software is loaded through the program, the built-in FPGA software is in the initial state, waiting for the global reset signal to be pulled high, powering on and initializing the configuration of the panchromatic camera, and entering the waiting for imaging state. The waiting for imaging state corresponds to the process in which the FPGA waits for and parses the serial port instructions, parses the imaging control command and enters the imaging state, parses the imaging configuration signal and enters the parameter configuration state, and parses the telemetry signal and returns the state through the serial port. The parameter configuration state corresponds to the process of obtaining parameters by receiving serial port instructions and completing the parameter update of the integration time, imaging gain, imaging period, and image type. The imaging state corresponds to the process in which the panchromatic camera starts imaging, the FPGA acquires the image data, and transmits the acquired image data to the transmission channel. In the imaging state, the system does not respond to the imaging control command and the imaging configuration command.

[0057] The present invention provides a spaceborne high-frame-rate linear array TDI panchromatic camera system based on FPGA. In the embodiment of the present invention, the parsing result of the remote control instruction is sent to the detector control module through the main control telemetry command module; the spaced linear array panchromatic detector is driven by the detector control module according to the parsing result of the remote control instruction; the spaced linear array panchromatic detector collects multi-linear array image data under the drive of the detector control module and returns the multi-linear array image data to the detector control module; the digital domain ping-pong TDI module performs TDI processing on the odd frames and even frames in the multi-linear array image data respectively to obtain the image data after TDI processing; the image data transmission module is used to add camera auxiliary data and perform packaging processing on the image data after TDI processing and output the obtained target image. By performing TDI processing on the odd frames and even frames of the multi-linear array image data with pixel intervals respectively, the problem that the multi-linear array detector image cannot be subjected to TDI processing due to pixel intervals is solved, and image enhancement of the multi-linear array image data is realized, thereby improving the signal-to-noise ratio of the image data.

[0058] Obviously, those skilled in the art should understand that the above-mentioned modules or steps of the present invention can be implemented by a general-purpose computing device. They can be concentrated on a single computing device or distributed on a network composed of multiple computing devices. Optionally, they can be implemented by program codes executable by the computing device, so that they can be stored in a storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a different order than here, or they can be separately made into individual integrated circuit modules, or multiple modules or steps among them can be made into a single integrated circuit module to implement. Thus, the present invention is not limited to any specific combination of hardware and software.

[0059] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A satellite-borne high frame rate linear array TDI panchromatic camera system based on FPGA, characterized in that: include: Interval linear array full-color detector, main control telemetry command module, detector control module, digital domain ping-pong TDI module and image data transmission module; The master control telemetry command module is used to receive remote control instructions and send the parsing results of the remote control instructions to the detector control module; The detector control module is used to drive the spaced linear array panchromatic detector according to the analysis result of the remote control command, and send the multi-line array image data received from the spaced linear array panchromatic detector to the digital domain ping-pong TDI module, wherein the analysis result includes an imaging command signal, an integration time, a frame time, a gain configuration and an image mode; The spaced linear array full-color detector is used to collect multi-line array image data under the drive of the detector control module, and transmit the multi-line array image data back to the detector control module; The digital domain ping-pong TDI module includes a first multi-stage FIFO and a second multi-stage FIFO; The first multi-stage FIFO is used to perform delayed accumulation processing on at least two consecutive odd-numbered frame images in the multi-line array image data to obtain processed odd-numbered frame images; The second multi-stage FIFO is used to perform delayed accumulation processing on at least two consecutive even-numbered frame images in the multi-line array image data to obtain processed even-numbered frame images; The digital domain ping-pong TDI module is further used to sequentially aggregate the processed odd-numbered frame images and the processed even-numbered frame images to obtain image data processed by TDI; Wherein, the output frame images of the first multi-stage FIFO and the output frame images of the second multi-stage FIFO have the same number of accumulated image frames; Wherein, the read and write operations of the first multi-stage FIFO and the second multi-stage FIFO are both based on an asynchronous FIFO storage structure; The image data transmission module is used to add camera auxiliary data and package the image data after TDI processing, and output the obtained target image.

2. The system according to claim 1, characterized in that The master control telemetry command module includes a master control telemetry command input module and a master control telemetry command parsing module; The master control telemetry command input module is used to forward the received remote control command to the master control telemetry command parsing module and the image data transmission module; The master control telemetry command parsing module is used to generate a single-bit or multi-bit command signal by analyzing the remote control command in the register, and input the command signal to the detector control module through UART; The detector control module includes an SPI control module, a power control module, a temperature feedback module and a detector data transmission module; The SPI control module is used to receive the control information output by the main control telemetry command parsing module, and configure the register parameters of the interval linear array full-color detector according to a preset number of addresses and data according to the command signal, wherein the register parameters include at least one of the exposure mode, exposure time, imaging cycle and image data clock; The power control module is used to sequentially provide three different operating voltages to the spaced linear array full-color detector according to the command signal; The temperature feedback module is used to read the value of the internal register of the temperature chip of the interval linear array full-color detector in real time through the IIC protocol, obtain the internal temperature parameters of the interval linear array full-color detector, and feed back the internal temperature parameters to the main control end through the main control telemetry command module; The detector data transmission module is used to transmit the multi-line array image data collected by the interval line array full-color detector to the image data transmission module in a consistent time sequence through a multi-channel high-speed LVDS interface; When the remote control command instructs to update the parameters of the spaced linear array full-color detector, the SPI control module is also used to configure and update the register parameters of the spaced linear array full-color detector according to a preset number of addresses and data based on the update command signal.

3. The system according to claim 1, characterized in that The image data transmission module includes a GTX transmission module, a FIFO data storage module and an image data processing and packaging module; The GTX transmission module is used to receive the image processed by the digital domain TDI and store it in the FIFO data storage module; The image data processing and packaging module is used to add camera auxiliary data to the image data processed by the TDI, package the image data after the auxiliary data is added, and transmit the obtained target image to the master control GTX transmission module; The GTX transmission module is also used to output the target image through the GTX interface of the FPGA chip.

Citation Information

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