Tracker circuit

Abstract

A tracker circuit (1) is provided with: an output switching circuit (30) configured so as to selectively output at least one of a plurality of discrete voltages to a power amplifier (2A); and a filter circuit (40, 41, 42, or 43) connected between the output switching circuit (30) and the power amplifier (2A), the filter circuit (40, 41, 42, or 43) including: an inductor (L1) connected between the output switching circuit (30) and the power amplifier (2A); a capacitor (C1) connected between a ground and a path connecting the inductor (L1) and the power amplifier (2A); and a switch (SW1) connected between the output switching circuit (30) and the power amplifier (2A) without passing through the inductor (L1).

Description

Technical Field

[0001] The present invention relates to a tracker circuit. Background Art

[0002] In recent years, by applying tracking technology to a power amplifier circuit, an improvement in power added efficiency has been achieved. A tracker circuit for digital envelope tracking (ET: Envelope Tracking) for supplying a power supply voltage that changes over time to a plurality of discrete levels (hereinafter, referred to as a plurality of discrete voltages) is disclosed in Patent Document 1. In addition, a tracker circuit for symbol power tracking (SPT: Symbol Power Tracking) for supplying a plurality of discrete voltages is disclosed in Patent Document 2.

[0003] Patent Document 1: U.S. Patent No. 8,829,993 Specification

[0004] Patent Document 2: U.S. Patent No. 10,686,407 Specification

[0005] In a tracker circuit that supplies such a plurality of discrete voltages, there is a case where a filter circuit such as a pulse shaping filter or a transition shaping filter is used to attenuate noise included in the plurality of discrete voltages (for example, refer to Patent Document 1).

[0006] However, in the prior art, there is a case where it is difficult to sufficiently attenuate the noise included in the plurality of discrete voltages. Summary of the Invention

[0007] Accordingly, the present invention provides a tracker circuit capable of attenuating noise included in a plurality of discrete voltages.

[0008] A tracker circuit according to one aspect of the present invention includes: an output switch circuit configured to selectively output at least one of a plurality of discrete voltages to a power amplifier; and a filter circuit connected between the output switch circuit and the power amplifier, the filter circuit including: a first inductor connected between the output switch circuit and the power amplifier; a first capacitor connected between a path connecting the first inductor and the power amplifier and a ground line; and a first switch connected between the output switch circuit and the power amplifier without passing through the first inductor.

[0009] A tracker circuit according to one embodiment of the present invention includes: an external connection terminal connected to a power amplifier; an output switch circuit configured to selectively output at least one of a plurality of discrete voltages to the external connection terminal; and a filter circuit connected between the output switch circuit and the external connection terminal. The filter circuit includes: a first inductor connected between the output switch circuit and the external connection terminal; a first capacitor connected between a path connecting the first inductor and the external connection terminal and the ground; and a first switch connected between the output switch circuit and the external connection terminal. One end of the first switch is connected to one end of the first inductor, and the other end of the first switch is connected to the other end of the first inductor.

[0010] According to the tracker circuit of one embodiment of the present invention, noise included in a plurality of discrete voltages can be attenuated. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1A It is a diagram showing an example of the transition of the power supply voltage in the average power tracking (APT) mode.

[0012] Figure 1B It is a diagram showing an example of the transition of the power supply voltage in the analog ET mode.

[0013] Figure 1C It is a diagram showing an example of the transition of the power supply voltage in the digital ET mode.

[0014] Figure 2 It is a circuit configuration diagram of the communication device according to Embodiment 1.

[0015] Figure 3 It is a circuit configuration diagram of the pre-regulator circuit, the switched-capacitor circuit, and the output switch circuit according to Embodiment 1.

[0016] Figure 4 It is a circuit configuration diagram of the filter circuit according to the first mode of Embodiment 1.

[0017] Figure 5 It is a circuit configuration diagram of the filter circuit according to the second mode of Embodiment 1.

[0018] Figure 6 It is a circuit configuration diagram of the filter circuit according to the third mode of Embodiment 1.

[0019] Figure 7 It is a circuit configuration diagram of the filter circuit according to the fourth mode of Embodiment 1.

[0020] Figure 8 It is a circuit configuration diagram of the digital control circuit according to Embodiment 1.

[0021] Figure 9 It is a top view of the tracker module of Embodiment 1.

[0022] Figure 10 It is a top view of the tracker module of Embodiment 1.

[0023] Figure 11 It is a cross-sectional view of the tracker module of Embodiment 1.

[0024] Figure 12 It is a circuit structure diagram of the communication device of Embodiment 2.

[0025] Figure 13 It is a circuit structure diagram of the communication device of Embodiment 3.

[0026] Figure 14 It is a circuit structure diagram of the communication device of Embodiment 4.

[0027] Figure 15 It is a circuit structure diagram of the filter circuit of Embodiment 4. Detailed Embodiments

[0028] (Process to the present invention)

[0029] When supplying a plurality of discrete voltages to a power amplifier, noise increases due to discrete changes in voltage levels. In particular, in the case of using a digital ET mode or the like where the discrete change in voltage level is relatively fast, the increase in noise becomes significant.

[0030] Therefore, when the high-frequency signal amplified by the power amplifier is a transmission signal in a frequency division duplex (FDD: Frequency Division Duplex) band, in order to avoid intermodulation distortion (IMD: Intermodulation Distortion) between the noise and the transmission signal (for example, a distortion component generated at a frequency obtained by adding the frequency of the noise to the frequency of the transmission signal) from interfering with the received signal, there is a case of using a filter for attenuating the noise of the differential frequency between the transmission channel frequency and the reception channel frequency. At this time, since the differential frequency between the transmission channel frequency and the reception channel frequency varies depending on the FDD band, there is a case of using a switch for switching the filter in order to correspond to a plurality of FDD bands.

[0031] However, the inventors have found a problem that the characteristics of the filter deteriorate due to the switch. In particular, it has been found that when a switch is connected between an LC series circuit shunt-connected to the voltage supply path and the voltage supply path, the Q value (quality factor: quality factor) of the filter deteriorates.

[0032] Therefore, hereinafter, based on the embodiments, a tracker circuit that can effectively attenuate the noise included in multiple discrete voltages by suppressing the deterioration of filter characteristics caused by switches will be described in detail. In addition, all the embodiments described below show general or specific examples. The numerical values, shapes, materials, components, arrangements of components, connection methods, etc. shown in the following embodiments are examples and do not limit the present invention.

[0033] In addition, each figure is a schematic diagram appropriately emphasized, omitted, or adjusted in ratio for showing the present invention, and is not necessarily strictly illustrated. There are cases where it is different from the actual shape, positional relationship, and ratio. In each figure, substantially the same structure may be given the same reference numeral, and repeated descriptions may be omitted or simplified.

[0034] In the following figures, the x-axis and the y-axis are axes orthogonal to each other in a plane parallel to the main surface of the module substrate. Specifically, when the module substrate has a rectangular shape in a top view, the x-axis is parallel to the first side of the module substrate, and the y-axis is parallel to the second side of the module substrate orthogonal to the first side. In addition, the z-axis is an axis perpendicular to the main surface of the module substrate, the positive direction thereof represents the upward direction, and the negative direction thereof represents the downward direction.

[0035] In the circuit structure of the present invention, "connection" includes not only the case of directly connecting through connection terminals and / or wiring conductors, but also the case of being electrically connected via other circuit elements. "Direct connection" means directly connecting through connection terminals and / or wiring conductors without passing through other circuit elements. "Connected between A and B" means being connected to both A and B between A and B, and means being serially connected to the path connecting between A and B. "The path connecting between A and B" means a path composed of conductors electrically connecting A and B. "Connected in series with the path" means being serially connected to the path, and means being connected between one end and the other end of the path. "Connected in shunt with the path" means being connected between the path and the ground wire.

[0036] In the component arrangement of the present invention, "a component is arranged on the substrate" includes the case where the component is arranged on the main surface of the substrate and the case where the component is arranged inside the substrate. "A component is arranged on the main surface of the substrate" includes not only the case where the component is arranged in contact with the main surface of the substrate, but also the case where the component is arranged above the main surface without contacting the main surface (for example, the component is stacked on other components arranged in contact with the main surface). In addition, "a component is arranged on the main surface of the substrate" may also include the case where the component is arranged in a recess formed on the main surface. "A component is arranged inside the substrate" includes not only the case where the component is encapsulated inside the module substrate, but also the case where although the whole component is arranged between the two main surfaces of the substrate, a part of the component is not covered by the substrate, and the case where only a part of the component is arranged inside the substrate.

[0037] In addition, in the component configuration of the present invention, "top view of the module substrate" means observing an object by orthographically projecting it onto the xy plane from the positive side of the z-axis. "A overlaps B in top view" means that at least a part of the region of A orthographically projected onto the xy plane overlaps at least a part of the region of B orthographically projected onto the xy plane. In addition, "A is disposed between B and C" means that at least one of a plurality of line segments connecting any point in B and any point in C passes through A.

[0038] In addition, in the component configuration of the present invention, "A and B are adjacently disposed" means that A and B are disposed close to each other. Specifically, it means that there are no other circuit components in the space where A and B face each other. In other words, "A and B are adjacently disposed" means that any of the plurality of line segments reaching B from any point on the surface of A facing B along the normal direction of the surface does not pass through circuit components other than A and B. Here, a circuit component means a component including an active element and / or a passive element. In other words, a circuit component includes an active component including a transistor or a diode, etc., and a passive component including an inductor, a transformer, a capacitor, or a resistor, etc., and does not include electromechanical components including terminals, connectors, or wirings.

[0039] In the present invention, a "terminal" means a point where a conductor ends within an element. In addition, when the impedance of the conductor between elements is sufficiently low, the terminal can be interpreted not only as a single point but also as any point on the conductor between elements or the entire conductor.

[0040] In addition, terms indicating the relationship between elements such as "parallel" and "perpendicular", terms indicating the shape of an element such as "rectangle", and numerical ranges do not only represent strict meanings but also include substantially equivalent ranges, such as an error of about a few percent.

[0041] First, as a technique for efficiently amplifying a high-frequency signal, a tracking mode in which a power supply voltage dynamically adjusted according to the passage of time based on a high-frequency signal is supplied to a power amplifier will be described. The tracking mode is a mode in which the power supply voltage applied to the power amplifier circuit is dynamically adjusted. There are several types of tracking modes. However, here, reference is made to Figures 1A to 1C APT mode and ET mode (including analog ET mode and digital ET mode) will be described. In Figures 1A to 1C the horizontal axis represents time and the vertical axis represents voltage. In addition, the thick solid line represents the power supply voltage and the thin solid line (waveform) represents the modulation signal.

[0042] Figure 1AIt is a diagram showing an example of the change in the power supply voltage in the APT mode. In the APT mode, based on the average power, the power supply voltage is changed to a plurality of discrete voltage levels in units of one frame. As a result, the power supply voltage signal forms a rectangular wave.

[0043] A frame refers to the unit that constitutes a high-frequency signal (modulation wave). For example, in 5G NR (5th Generation New Radio) and LTE (Long Term Evolution), a frame contains ten sub-frames, each sub-frame contains a plurality of time slots, and each time slot is composed of a plurality of symbols. The sub-frame length is 1 ms, and the frame length is 10 ms.

[0044] In addition, the mode in which the voltage level is changed in units of one frame or a unit larger than one frame based on the average power is called the APT mode, which is distinguished from the mode in which the voltage level is changed in a unit smaller than one frame (for example, sub-frame, time slot, or symbol). For example, the mode in which the voltage level is changed in units of symbols is called the Symbol Power Tracking (SPT) mode, which is distinguished from the APT mode.

[0045] Figure 1B It is a diagram showing an example of the change in the power supply voltage in the analog ET mode. In the analog ET mode, the envelope of the modulation wave is tracked by continuously changing the power supply voltage based on the envelope signal.

[0046] The envelope signal is a signal representing the envelope of the modulation wave. The envelope value is represented by, for example, the square root of (I 2 +Q 2 ). Here, (I, Q) represents a constellation point. A constellation point refers to a point representing a signal modulated by digital modulation on a constellation diagram. For example, (I, Q) is determined based on transmission information, for example, by a BBIC (Baseband Integrated Circuit).

[0047] Figure 1C It is a diagram showing an example of the change in the power supply voltage in the digital ET mode. In the digital ET mode, the envelope of the modulation wave is tracked by changing the power supply voltage to a plurality of discrete voltage levels within one frame based on the envelope signal. As a result, the power supply voltage signal forms a rectangular wave.

[0048] (Embodiment 1)

[0049] Hereinafter, Embodiment 1 will be described. The communication device 7 in this embodiment corresponds to a user terminal (UE: User Equipment) in a cellular network. Typically, it is a mobile phone, a smart phone, a tablet computer, a wearable device, etc. In addition, the communication device 7 can also be an IoT (Internet of Things) sensor device, a medical / health device, a vehicle, an unmanned aerial vehicle (UAV) (so-called drone), or an automated guided vehicle (AGV). Additionally, the communication device 7 can also function as a BS (Base Station) in a cellular network.

[0050] Refer to Figure 2 The circuit structures of the communication device 7 and the tracker circuit 1 in this embodiment will be described. Figure 2 It is a circuit structure diagram of the communication device 7 in this embodiment.

[0051] In addition, Figure 2 It is an exemplary circuit structure, and the communication device 7 and the tracker circuit 1 can be installed using any one of a variety of circuit installations and circuit technologies. Therefore, the descriptions of the communication device 7 and the tracker circuit 1 provided below should not be construed in a limiting manner.

[0052] [1.1 Circuit Structure of Communication Device 7]

[0053] First, refer to Figure 2 The communication device 7 in this embodiment will be described. The communication device 7 includes a tracker circuit 1, a power amplifier 2A, a filter 3A, an RFIC (Radio Frequency Integrated Circuit) 5, and an antenna 6A.

[0054] The tracker circuit 1 can supply multiple discrete voltages V to the power amplifier 2A based on a tracking mode A . As the tracking mode, a digital ET mode or an SPT mode can be used, but it is not limited thereto. As Figure 2 shown, the tracker circuit 1 includes a pre-regulator circuit 10, a switched-capacitor circuit 20, an output switch circuit 30, any one of filter circuits 40 to 43, a DC power supply 50, and a digital control circuit 60.

[0055] The pre-regulator circuit 10 includes a power inductor and a switch. The power inductor is an inductor for boosting and / or bucking a direct current (DC) voltage. The power inductor is connected in series in a DC path. In addition, the power inductor may also be connected (in a parallel configuration) between the DC path and the ground. The pre-regulator circuit 10 can use the power inductor to convert an input voltage into a first voltage. Such a pre-regulator circuit 10 is also sometimes referred to as a magnetic regulator or a DC / DC converter.

[0056] The switched-capacitor circuit 20 includes a plurality of capacitors and a plurality of switches, and can generate a plurality of second voltages each having a plurality of discrete voltage levels as a plurality of discrete voltages based on the first voltage from the pre-regulator circuit 10. The switched-capacitor circuit 20 is also sometimes referred to as a Switched-Capacitor Voltage Balancer.

[0057] The output switch circuit 30 is configured to selectively output at least one of the plurality of second voltages generated by the switched-capacitor circuit 20 to the power amplifier 2A. The output switch circuit 30 is controlled based on a digital control signal.

[0058] The filter circuits 40 to 43 can attenuate noise from the plurality of discrete voltages supplied to the power amplifier 2A. The filter circuits 40 to 43 are also sometimes referred to as pulse shaping filters or transition shaping filters.

[0059] The DC power supply 50 can supply a DC voltage to the pre-regulator circuit 10. As the DC power supply 50, for example, a rechargeable battery can be used, but it is not limited thereto.

[0060] The digital control circuit 60 can control any one of the pre-regulator circuit 10, the switched-capacitor circuit 20, the output switch circuit 30, and the filter circuits 40 to 43 based on a digital control signal from the RFIC 5.

[0061] In addition, the tracker circuit 1 may not include at least one of the pre-regulator circuit 10, the switched-capacitor circuit 20, the output switch circuit 30, any one of the filter circuits 40 to 43, the DC power supply 50, and the digital control circuit 60. For example, the tracker circuit 1 may not include the DC power supply 50. Additionally, any combination of any one of the pre-regulator circuit 10, the switched-capacitor circuit 20, the output switch circuit 30, and the filter circuits 40 to 43 may be integrated into a single circuit. Further, the tracker circuit 1 may include a plurality of voltage supply circuits as in Patent Document 2 instead of the pre-regulator circuit 10 and the switched-capacitor circuit 20. In this case, the output switch circuit 30 may be configured to select at least one of the plurality of voltage supply circuits.

[0062] The power amplifier 2A is connected between the RFIC 5 and the filter 3A. Also, the power amplifier 2A is connected to the tracker circuit 1. The power amplifier 2A can use a plurality of discrete voltages V received from the tracker circuit 1 A to amplify the high-frequency signal RF in the frequency band A received from the RFIC 5 A .

[0063] The filter 3A is connected between the power amplifier 2A and the antenna 6A. The filter 3A is a band-pass filter having a passband including the frequency band A.

[0064] The frequency band A is a frequency band for a communication system constructed using a radio access technology (RAT), and is predefined by a standardization organization or the like (such as 3GPP (registered trademark) (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers)). Examples of the communication system include a 5GNR (5th Generation New Radio) system, an LTE (Long Term Evolution) system, and a WLAN (Wireless Local Area Network) system.

[0065] RFIC5 is an example of a signal processing circuit that processes high-frequency signals. Specifically, RFIC5 performs signal processing on the input transmission signal through up-conversion or the like, and supplies the high-frequency transmission signal generated by performing this signal processing to the power amplifier 2A. In addition, RFIC5 has a control unit that controls the tracker circuit 1. Further, part or all of the functions of the control unit of RFIC5 may be installed outside RFIC5.

[0066] The antenna 6A outputs the transmission signal in band A input from the power amplifier 2A via the filter 3A. In addition, the antenna 6A may not be included in the communication device 7.

[0067] In addition, Figure 2 The circuit structure of the illustrated communication device 7 is an example and is not limited thereto. For example, the communication device 7 may also include a baseband signal processing circuit that performs signal processing using an intermediate frequency band lower than the high-frequency signal RF A lower.

[0068] [1.2 Circuit structure of the tracker circuit 1]

[0069] Next, with reference to Figures 3 to 8 the circuit structures of the pre-regulator circuit 10, the switched-capacitor circuit 20, the output switch circuit 30, the filter circuits 40 to 43, and the digital control circuit 60 included in the tracker circuit 1 will be described. Figure 3 is a circuit structure diagram of the pre-regulator circuit 10, the switched-capacitor circuit 20, and the output switch circuit 30 of the present embodiment. Figures 4 to 7 is a circuit structure diagram of the filter circuits 40 to 43 of the first to fourth modes of the present embodiment. Figure 8 is a circuit structure diagram of the digital control circuit 60 of the present embodiment.

[0070] In addition, Figures 3 to 8 is an example circuit structure, and the pre-regulator circuit 10, the switched-capacitor circuit 20, the output switch circuit 30, the filter circuits 40 to 43, and the digital control circuit 60 can be installed using any one of a variety of circuit installations and circuit technologies. Therefore, the descriptions of the respective circuits provided below should not be construed in a limiting manner.

[0071] [1.2.1 Circuit structure of the switched-capacitor circuit 20]

[0072] First, with reference to Figure 3 , the circuit structure of the switched-capacitor circuit 20 will be described. As Figure 3As shown, the switched capacitor circuit 20 includes capacitors C11 to C16, capacitors C10, C20, C30, and C40, switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. Energy and charge are input from the pre-regulator circuit 10 to the switched capacitor circuit 20 at nodes N1 to N4, and are led out from the switched capacitor circuit 20 to the output switch circuit 30 at nodes N1 to N4.

[0073] Capacitors C11 to C16 each function as a flying capacitor (also known as a cross-coupled capacitor in some cases). In other words, each of the capacitors C11 to C16 is used to boost or buck the first voltage supplied from the pre-regulator circuit 10. More specifically, capacitors C11 to C16 cause charge to move between capacitors C11 to C16 and nodes N1 to N4 to maintain voltages V1 to V4 (voltages with respect to the ground potential) at the four nodes N1 to N4 that satisfy V1:V2:V3:V4 = 1:2:3:4. These voltages V1 to V4 correspond to a plurality of second voltages each having a plurality of discrete voltage levels.

[0074] Capacitor C11 has two electrodes. One of the two electrodes of capacitor C11 is connected to one end of switch S11 and one end of switch S12. The other of the two electrodes of capacitor C11 is connected to one end of switch S21 and one end of switch S22.

[0075] Capacitor C12 has two electrodes. One of the two electrodes of capacitor C12 is connected to one end of switch S21 and one end of switch S22. The other of the two electrodes of capacitor C12 is connected to one end of switch S31 and one end of switch S32.

[0076] Capacitor C13 has two electrodes. One of the two electrodes of capacitor C13 is connected to one end of switch S31 and one end of switch S32. The other of the two electrodes of capacitor C13 is connected to one end of switch S41 and one end of switch S42.

[0077] Capacitor C14 has two electrodes. One of the two electrodes of capacitor C14 is connected to one end of switch S13 and one end of switch S14. The other of the two electrodes of capacitor C14 is connected to one end of switch S23 and one end of switch S24.

[0078] Capacitor C15 has two electrodes. One of the two electrodes of capacitor C15 is connected to one end of switch S23 and one end of switch S24. The other of the two electrodes of capacitor C15 is connected to one end of switch S33 and one end of switch S34.

[0079] Capacitor C16 has two electrodes. One of the two electrodes of capacitor C16 is connected to one end of switch S33 and one end of switch S34. The other of the two electrodes of capacitor C16 is connected to one end of switch S43 and one end of switch S44.

[0080] The groups of capacitors C11 and C14, the groups of capacitors C12 and C15, and the groups of capacitors C13 and C16 can be charged and discharged complementarily by repeating the first stage and the second stage, respectively.

[0081] Specifically, in the first stage, switches S12, S13, S22, S23, S32, S33, S42, and S43 are turned on. Thereby, for example, one of the two electrodes of capacitor C12 is connected to node N3, the other of the two electrodes of capacitor C12 and one of the two electrodes of capacitor C15 are connected to node N2, and the other of the two electrodes of capacitor C15 is connected to node N1.

[0082] On the other hand, in the second stage, switches S11, S14, S21, S24, S31, S34, S41, and S44 are turned on. Thereby, for example, one of the two electrodes of capacitor C15 is connected to node N3, the other of the two electrodes of capacitor C15 and one of the two electrodes of capacitor C12 are connected to node N2, and the other of the two electrodes of capacitor C12 is connected to node N1.

[0083] By repeating such first and second stages, for example, when one side of capacitors C12 and C15 is charged by node N2, the other side of capacitors C12 and C15 can discharge to capacitor C30. In other words, capacitors C12 and C15 can be charged and discharged complementarily.

[0084] The groups of capacitors C11 and C14 and the groups of capacitors C13 and C16 can also be charged and discharged complementarily in the same manner as the group of capacitors C12 and C15 by repeating the first stage and the second stage, respectively.

[0085] Capacitors C10, C20, C30, and C40 each function as a smoothing capacitor. In other words, capacitors C10, C20, C30, and C40 are respectively used for holding and smoothing the voltages V1 to V4 at nodes N1 to N4.

[0086] Capacitor C10 is connected between node N1 and the ground wire. Specifically, one of the two electrodes of capacitor C10 is connected to node N1. On the other hand, the other of the two electrodes of capacitor C10 is connected to the ground wire.

[0087] The capacitor C20 is connected between the nodes N2 and N1. Specifically, one of the two electrodes of the capacitor C20 is connected to the node N2. On the other hand, the other of the two electrodes of the capacitor C20 is connected to the node N1.

[0088] The capacitor C30 is connected between the nodes N3 and N2. Specifically, one of the two electrodes of the capacitor C30 is connected to the node N3. On the other hand, the other of the two electrodes of the capacitor C30 is connected to the node N2.

[0089] The capacitor C40 is connected between the nodes N4 and N3. Specifically, one of the two electrodes of the capacitor C40 is connected to the node N4. On the other hand, the other of the two electrodes of the capacitor C40 is connected to the node N3.

[0090] The switch S11 is connected between one of the two electrodes of the capacitor C11 and the node N3. Specifically, one end of the switch S11 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S11 is connected to the node N3.

[0091] The switch S12 is connected between one of the two electrodes of the capacitor C11 and the node N4. Specifically, one end of the switch S12 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S12 is connected to the node N4.

[0092] The switch S21 is connected between one of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S21 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S21 is connected to the node N2.

[0093] The switch S22 is connected between one of the two electrodes of the capacitor C12 and the node N3. Specifically, one end of the switch S22 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S22 is connected to the node N3.

[0094] The switch S31 is connected between the other of the two electrodes of the capacitor C12 and the node N1. Specifically, one end of the switch S31 is connected to the other of the two electrodes of the capacitor C12 and one of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S31 is connected to the node N1.

[0095] The switch S32 is connected between the other side of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S32 is connected to the other side of the two electrodes of the capacitor C12 and one side of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S32 is connected to the node N2. In other words, the other end of the switch S32 is connected to the other end of the switch S21.

[0096] The switch S41 is connected between the other side of the two electrodes of the capacitor C13 and the ground wire. Specifically, one end of the switch S41 is connected to the other side of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S41 is connected to the ground wire.

[0097] The switch S42 is connected between the other side of the two electrodes of the capacitor C13 and the node N1. Specifically, one end of the switch S42 is connected to the other side of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S42 is connected to the node N1. In other words, the other end of the switch S42 is connected to the other end of the switch S31.

[0098] The switch S13 is connected between one side of the two electrodes of the capacitor C14 and the node N3. Specifically, one end of the switch S13 is connected to one side of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S13 is connected to the node N3. In other words, the other end of the switch S13 is connected to the other end of the switch S11 and the other end of the switch S22.

[0099] The switch S14 is connected between one side of the two electrodes of the capacitor C14 and the node N4. Specifically, one end of the switch S14 is connected to one side of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S14 is connected to the node N4. In other words, the other end of the switch S14 is connected to the other end of the switch S12.

[0100] The switch S23 is connected between one side of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S23 is connected to one side of the two electrodes of the capacitor C15 and the other side of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S23 is connected to the node N2. In other words, the other end of the switch S23 is connected to the other end of the switch S21 and the other end of the switch S32.

[0101] The switch S24 is connected between one side of the two electrodes of the capacitor C15 and the node N3. Specifically, one end of the switch S24 is connected to one side of the two electrodes of the capacitor C15 and the other side of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S24 is connected to the node N3. In other words, the other end of the switch S24 is connected to the other end of the switch S11, the other end of the switch S22, and the other end of the switch S13.

[0102] The switch S33 is connected between the other of the two electrodes of the capacitor C15 and the node N1. Specifically, one end of the switch S33 is connected to the other of the two electrodes of the capacitor C15 and one of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S33 is connected to the node N1. In other words, the other end of the switch S33 is connected to the other end of the switch S31 and the other end of the switch S42.

[0103] The switch S34 is connected between the other of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S34 is connected to the other of the two electrodes of the capacitor C15 and one of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S34 is connected to the node N2. In other words, the other end of the switch S34 is connected to the other end of the switch S21, the other end of the switch S32, and the other end of the switch S23.

[0104] The switch S43 is connected between the other of the two electrodes of the capacitor C16 and the ground. Specifically, one end of the switch S43 is connected to the other of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S43 is connected to the ground.

[0105] The switch S44 is connected between the other of the two electrodes of the capacitor C16 and the node N1. Specifically, one end of the switch S44 is connected to the other of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S44 is connected to the node N1. In other words, the other end of the switch S44 is connected to the other end of the switch S31, the other end of the switch S42, and the other end of the switch S33.

[0106] The switches of the first group including the switches S12, S13, S22, S23, S32, S33, S42, and S43, and the switches of the second group including the switches S11, S14, S21, S24, S31, S34, S41, and S44 are switched on and off complementarily based on the control signal S2. Specifically, in the first stage, the switches of the first group are turned on and the switches of the second group are turned off. On the contrary, in the second stage, the switches of the first group are turned off and the switches of the second group are turned on.

[0107] For example, in one of the first stage and the second stage, charging of capacitors C10 to C40 is performed from capacitors C11 to C13, and in the other of the first stage and the second stage, charging of capacitors C10 to C40 is performed from capacitors C14 to C16. In other words, charging of capacitors C10 to C40 is always performed from capacitors C11 to C13 or capacitors C14 to C16. Therefore, even if current flows at high speed from nodes N1 to N4 to the output switch circuit 30, charge can be replenished to nodes N1 to N4 at high speed, and thus potential fluctuations of nodes N1 to N4 can be suppressed.

[0108] By operating in this way, the switched capacitor circuit 20 can maintain substantially equal voltages across capacitors C10, C20, C30, and C40 respectively. Specifically, at four nodes labeled V1 to V4, voltages V1 to V4 (voltages with respect to the ground potential) that satisfy V1:V2:V3:V4 = 1:2:3:4 are maintained. The voltage levels of voltages V1 to V4 correspond to a plurality of discrete voltage levels that can be supplied to the output switch circuit 30 by the switched capacitor circuit 20.

[0109] In addition, the voltage ratio (V1:V2:V3:V4) is not limited to (1:2:3:4). For example, the voltage ratio (V1:V2:V3:V4) can also be (1:2:4:8).

[0110] In addition, Figure 3 The structure of the shown switched capacitor circuit 20 is an example and is not limited thereto. In Figure 3 , the switched capacitor circuit 20 is configured to be able to supply voltages of four discrete voltage levels, but is not limited thereto. The switched capacitor circuit 20 can also be configured to be able to supply voltages of any number of two or more discrete voltage levels. For example, in the case of supplying voltages of two discrete voltage levels, the switched capacitor circuit 20 only needs to include at least capacitors C12 and C15, and switches S21 to S24 and S31 to S34.

[0111] [1.2.2 Circuit Structure of Output Switch Circuit 30]

[0112] Next, with reference to Figure 3 , the circuit structure of the output switch circuit 30 will be described. The output switch circuit 30 is connected to the digital control circuit 60. As Figure 3 shown, the output switch circuit 30 includes input terminals 131 to 134, switches S51 to S54, and an output terminal 130.

[0113] The output terminal 130 is connected to the input terminal 140 of the filter circuit 41. The output terminal 130 is a terminal for supplying the power supply voltage selected from the voltages V1 to V4 to the power amplifier 2A via any one of the filter circuits 40 to 43.

[0114] The input terminals 131 to 134 are respectively connected to the nodes N4 to N1 of the switched capacitor circuit 20. The input terminals 131 to 134 are terminals for receiving the voltages V4 to V1 from the switched capacitor circuit 20.

[0115] The switch S51 is connected between the input terminal 131 and the output terminal 130. Specifically, the switch S51 has a terminal connected to the input terminal 131 and a terminal connected to the output terminal 130. In this connection structure, the switch S51 can switch the connection and non-connection between the input terminal 131 and the output terminal 130 by switching on and off according to the control signal S3.

[0116] The switch S52 is connected between the input terminal 132 and the output terminal 130. Specifically, the switch S52 has a terminal connected to the input terminal 132 and a terminal connected to the output terminal 130. In this connection structure, the switch S52 can switch the connection and non-connection between the input terminal 132 and the output terminal 130 by switching on and off according to the control signal S3.

[0117] The switch S53 is connected between the input terminal 133 and the output terminal 130. Specifically, the switch S53 has a terminal connected to the input terminal 133 and a terminal connected to the output terminal 130. In this connection structure, the switch S53 can switch the connection and non-connection between the input terminal 133 and the output terminal 130 by switching on and off according to the control signal S3.

[0118] The switch S54 is connected between the input terminal 134 and the output terminal 130. Specifically, the switch S54 has a terminal connected to the input terminal 134 and a terminal connected to the output terminal 130. In this connection structure, the switch S54 can switch the connection and non-connection between the input terminal 134 and the output terminal 130 by switching on and off according to the control signal S3.

[0119] These switches S51 to S54 are controlled to be exclusively turned on. In other words, only any one of the switches S51 to S54 is turned on, and the remaining switches of S51 to S54 are turned off. Thus, the output switch circuit 30 can output one voltage selected from the voltages V1 to V4.

[0120] In addition, Figure 3The structure of the output switching circuit 30 shown is an example and is not limited thereto. In particular, as long as the switches S51 to S54 can selectively connect at least one of the four input terminals 131 to 134 to the output terminal 130, any structure is acceptable. For example, the output switching circuit 30 may also include switches connected between the switches S51 to S53 and the switch S54 and the output terminal 130. Additionally, for example, the output switching circuit 30 may also include switches connected between the switches S51 and S52 and the switches S53 and S54 and the output terminal 130.

[0121] Furthermore, in the case where two discrete voltage levels of voltage are supplied from the switched-capacitor circuit 20, the output switching circuit 30 only needs to include at least two of the switches S51 to S54.

[0122] [1.2.3 Circuit Structure of the Pre-Regulator Circuit 10]

[0123] Next, with reference to Figure 3 , the structure of the pre-regulator circuit 10 will be described. As Figure 3 shown, the pre-regulator circuit 10 includes an input terminal 110, output terminals 111 to 114, inductor connection terminals 115 and 116, switches S61 to S63, S71 and S72, a power inductor L71, and capacitors C61 to C64.

[0124] The input terminal 110 is an input terminal for a DC voltage. In other words, the input terminal 110 is a terminal for receiving an input voltage from the DC power supply 50.

[0125] The output terminal 111 is an output terminal for the voltage V4. In other words, the output terminal 111 is a terminal for supplying the voltage V4 to the switched-capacitor circuit 20. The output terminal 111 is connected to the node N4 of the switched-capacitor circuit 20.

[0126] The output terminal 112 is an output terminal for the voltage V3. In other words, the output terminal 112 is a terminal for supplying the voltage V3 to the switched-capacitor circuit 20. The output terminal 112 is connected to the node N3 of the switched-capacitor circuit 20.

[0127] The output terminal 113 is an output terminal for the voltage V2. In other words, the output terminal 113 is a terminal for supplying the voltage V2 to the switched-capacitor circuit 20. The output terminal 113 is connected to the node N2 of the switched-capacitor circuit 20.

[0128] The output terminal 114 is an output terminal for the voltage V1. In other words, the output terminal 114 is a terminal for supplying the voltage V1 to the switched-capacitor circuit 20. The output terminal 114 is connected to the node N1 of the switched-capacitor circuit 20.

[0129] The inductor connection terminal 115 is connected to one end of the power inductor L71. The inductor connection terminal 116 is connected to the other end of the power inductor L71.

[0130] The switch S71 is connected between the input terminal 110 and one end of the power inductor L71. Specifically, the switch S71 has a terminal connected to the input terminal 110 and a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115. In this connection structure, the switch S71 can switch the connection and non-connection between the input terminal 110 and one end of the power inductor L71 by switching on and off based on the control signal S1.

[0131] The switch S72 is connected between one end of the power inductor L71 and the ground wire. Specifically, the switch S72 has a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115 and a terminal connected to the ground wire. In this connection structure, the switch S72 can switch the connection and non-connection between one end of the power inductor L71 and the ground wire by switching on and off based on the control signal S1.

[0132] The switch S61 is connected between the other end of the power inductor L71 and the output terminal 111. Specifically, the switch S61 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 111. In this connection structure, the switch S61 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 111 by switching on and off based on the control signal S1.

[0133] The switch S62 is connected between the other end of the power inductor L71 and the output terminal 112. Specifically, the switch S62 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 112. In this connection structure, the switch S62 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 112 by switching on and off based on the control signal S1.

[0134] The switch S63 is connected between the other end of the power inductor L71 and the output terminal 113. Specifically, the switch S63 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 113. In this connection structure, the switch S63 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 113 by switching on and off based on the control signal S1.

[0135] One of the two electrodes of capacitor C61 is connected to switch S61 and output terminal 111. The other of the two electrodes of capacitor C61 is connected to switch S62, output terminal 112, and one of the two electrodes of capacitor C62.

[0136] One of the two electrodes of capacitor C62 is connected to switch S62, output terminal 112, and the other of the two electrodes of capacitor C61. The other of the two electrodes of capacitor C62 is connected to the path connecting switch S63, output terminal 113, and one of the two electrodes of capacitor C63.

[0137] One of the two electrodes of capacitor C63 is connected to switch S63, output terminal 113, and the other of the two electrodes of capacitor C62. The other of the two electrodes of capacitor C63 is connected to output terminal 114 and one of the two electrodes of capacitor C64.

[0138] One of the two electrodes of capacitor C64 is connected to output terminal 114 and the other of the two electrodes of capacitor C63. The other of the two electrodes of capacitor C64 is connected to the ground.

[0139] Switches S61 to S63 are controlled to be exclusively turned on. In other words, only any one of switches S61 to S63 is turned on, while the remaining switches of S61 to S63 are turned off. By only turning on any one of switches S61 to S63, the pre-regulator circuit 10 can change the voltage supplied to the switched-capacitor circuit 20 to voltage levels of V2 to V4.

[0140] The pre-regulator circuit 10 configured in this way can supply charge to the switched-capacitor circuit 20 via at least one of output terminals 111 to 113.

[0141] In addition, when the input voltage is converted to a first voltage, the pre-regulator circuit 10 only needs to include at least switches S71 and S72, and power inductor L71.

[0142] [1.2.4 Circuit Structure of Filter Circuit 40]

[0143] Next, with reference to Figure 4 , the circuit structure of the filter circuit 40 in the first mode of the present embodiment will be described.

[0144] As Figure 4 shown, the filter circuit 40 includes inductors L1 and L2, capacitor C1, switch SW1, input terminal 140, and output terminal 141.

[0145] The input terminal 140 is connected to the output terminal 130 of the output switching circuit 30. The input terminal 140 is a terminal for receiving a voltage selected from a plurality of discrete voltages by the output switching circuit 30.

[0146] The output terminal 141 is an external connection terminal of the tracker circuit 1 and is connected to the power amplifier 2A outside the tracker circuit 1. The output terminal 141 is a terminal for supplying a plurality of discrete voltages V that have passed through the filter circuit 41 A to the power amplifier 2A.

[0147] The inductor L1 is an example of a first inductor and is connected between the input terminal 140 and the output terminal 141. In other words, the inductor L1 is connected in series with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the inductor L1 is connected to the input terminal 140, and the other end of the inductor L1 is connected to the output terminal 141.

[0148] The inductor L2 is an example of a second inductor and is connected between the path connecting the inductor L1 and the output terminal 141 and the ground. In other words, the inductor L2 is connected in shunt with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the inductor L2 is connected to the node N42 on the path connecting the inductor L1 and the output terminal 141, and the other end of the inductor L2 is connected to the ground via the capacitor C1. In addition, the inductor L2 may also be connected between the capacitor C1 and the ground and may not be included in the filter circuit 40.

[0149] The capacitor C1 is an example of a first capacitor and is connected between the inductor L2 and the ground. In other words, the capacitor C1 is connected in shunt with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the capacitor C1 is connected to the inductor L2, and the other end of the capacitor C1 is connected to the ground.

[0150] The switch SW1 is an example of a first switch and is connected between the input terminal 140 and the output terminal 141 without passing through the inductor L1. In other words, the switch SW1 is connected in series with the path that bypasses the inductor L1 between the input terminal 140 and the output terminal 141. Specifically, one end of the switch SW1 is connected to the node N41 on the path connecting the input terminal 140 and the inductor L1, and the other end of the switch SW1 is connected to the node N43 on the path connecting the inductor L1 and the output terminal 141.

[0151] In addition, although Figure 4In this case, the switch SW1 and the inductor L1 are connected in parallel, but other circuit elements may also be inserted in the path of the switch SW1 and / or the path of the inductor L1. For example, an inductor may also be connected between the switch SW1 and the node N43 and / or between the switch SW1 and the node N41.

[0152] In addition, although in Figure 4 , the node N43 connecting the other end of the switch SW1 is located between the node N42 connecting the inductor L2 and the output terminal 141, the positional relationship between the nodes N42 and N43 is not limited to this. For example, the node N42 may also be located between the node N43 and the output terminal 141. Additionally, for example, the position of the node N42 may be the same as the position of the node N43.

[0153] The switch SW1 connected in this way is switched between on and off based on the control signal S4. As a result, the filter circuit 40 can switch the on and off of the band-stop filter for removing noise from multiple discrete voltages. For example, by controlling the on and off of the switch SW1, the on and off of the band-stop filter is switched as follows.

[0154] [Table 1]

[0155] SW1 (1) No BEF ON (2) BEF1 OFF

[0156] (1) By closing the switch SW1, the inductor L2 and the capacitor C1 are connected to the input terminal 140 without passing through the inductor L1. As a result, the inductor L2 and the capacitor C1 do not function as a band-stop filter (No BEF).

[0157] (2) By opening the switch SW1, the inductor L2 and the capacitor C1 are connected to the input terminal 140 via the inductor L1. As a result, the inductor L2 and the capacitor C1 function as a band-stop filter (also known as a notch filter in some cases) (BEF1).

[0158] For example, it is possible to control the on and off of such a band-stop filter based on the channel bandwidth (i.e., the modulation bandwidth) of the high-frequency signal RF A . In addition, when the power amplifier 2A can amplify transmission signals in multiple frequency bands, it is also possible to control the on and off of the switch SW1 based on the frequency band of the transmission signal amplified by the power amplifier 2A. Furthermore, the control of the band-stop filter is not limited to the above.

[0159] [1.2.5 Circuit Structure of Filter Circuit 41]

[0160] Next, with reference to Figure 5 , the circuit structure of the filter circuit 41 in the second mode of the present embodiment will be described.

[0161] As Figure 5 shown, the filter circuit 41 includes inductors L1 to L4, capacitors C1 and C2, switches SW1 and SW2, an input terminal 140, and an output terminal 141.

[0162] The inductor L3 is an example of a third inductor and is connected between the inductor L1 and the output terminal 141. In other words, the inductor L3 is connected in series with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the inductor L3 is connected to the inductor L1, and the other end of the inductor L3 is connected to the output terminal 141.

[0163] The inductor L4 is an example of a fourth inductor and is connected between the path connecting the inductor L3 and the output terminal 141 and the ground line. In other words, the inductor L4 is connected in shunt with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the inductor L4 is connected to the node N44 on the path connecting the inductor L3 and the output terminal 141, and the other end of the inductor L4 is connected to the ground line via the capacitor C2. In addition, the inductor L4 may also be connected between the capacitor C2 and the ground line or may not be included in the filter circuit 41.

[0164] The capacitor C2 is an example of a second capacitor and is connected between the inductor L4 and the ground line. In other words, the capacitor C2 is connected in shunt with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the capacitor C2 is connected to the inductor L4, and the other end of the capacitor C2 is connected to the ground line.

[0165] The switch SW2 is an example of a second switch and is connected between the input terminal 140 and the output terminal 141 without passing through the inductors L1 and L3. In other words, the switch SW2 is connected in series with the path that bypasses the inductors L1 and L3 between the input terminal 140 and the output terminal 141. Specifically, one end of the switch SW2 is connected to the node N40 on the path connecting the input terminal 140 and the inductor L1, and the other end of the switch SW2 is connected to the node N45 on the path connecting the inductor L3 and the output terminal 141.

[0166] In addition, although in Figure 5 , the node N43 connecting the other end of the switch SW1 is located between the node N42 connecting the inductor L2 and the inductor L1, the positional relationship between the nodes N42 and N43 is not limited to this. For example, the node N42 may also be located between the node N43 and the inductor L1. Another example is that the position of the node N42 may be the same as the position of the node N43. The positional relationship between the nodes N44 and N45 is also not limited to Figure 5relationship

[0167] The switch SW2 connected in this way, together with the switch SW1, is switched on / off based on the control signal S4. Thus, the filter circuit 41 can function as a variable band-stop filter. For example, by controlling the on / off states of the switches SW1 and SW2, a variable band-stop filter is implemented as follows.

[0168] [Table 2]

[0169] SW1 SW2 (1) No BEF ON / OFF ON (2) BEF2 ON OFF (3) BEF1 + BEF2 OFF OFF

[0170] (1) By closing the switches SW1 and SW2, the inductor L2 and the capacitor C1 are connected to the input terminal 140 without passing through the inductor L1, and the inductor L4 and the capacitor C2 are connected to the input terminal 140 without passing through the inductor L3. Thus, the inductor L2 and the capacitor C1 and the inductor L4 and the capacitor C2 do not function as a band-stop filter (No BEF). In addition, at this time, the switch SW1 may also be opened.

[0171] (2) By closing the switch SW1 and opening the switch SW2, the inductor L2 and the capacitor C1 are connected to the input terminal 140 without passing through the inductor L1, and the inductor L4 and the capacitor C2 are connected to the input terminal 140 via the inductor L3. Thus, the inductor L4 and the capacitor C2 function as a band-stop filter, but the inductor L2 and the capacitor C1 do not function as a band-stop filter (BEF2).

[0172] (3) By opening the switches SW1 and SW2, the inductor L2 and the capacitor C1 are connected to the input terminal 140 via the inductor L1, and the inductor L4 and the capacitor C2 are connected to the input terminal 140 via the inductor L3. Thus, the inductor L2 and the capacitor C1 and the inductor L4 and the capacitor C2 function as band-stop filters (BEF1 + BEF2).

[0173] The control of such a variable band-stop filter is the same as that of the first mode, and can be controlled, for example, based on the channel bandwidth of the high-frequency signal RF A and / or the frequency band, but is not limited thereto.

[0174] [1.2.6 Circuit Structure of Filter Circuit 42]

[0175] Next, with reference to Figure 6 , the circuit structure of the filter circuit 42 of the third mode of the present embodiment will be described.

[0176] As Figure 6As shown, the filter circuit 42 includes inductors L1 to L4, capacitors C1 and C2, switches SW1 to SW3, an input terminal 140, and an output terminal 141.

[0177] The switch SW3 is an example of the third switch and is connected between the inductor L1 and the output terminal 141 without passing through the inductor L3. In other words, the switch SW3 is in series with a path that bypasses the inductor L3 between the input terminal 140 and the output terminal 141. Specifically, one end of the switch SW3 is connected to the node N46 on the path connecting the inductors L1 and L3, and the other end of the switch SW3 is connected to the node N47 on the path connecting the inductor L3 and the output terminal 141.

[0178] In addition, although in Figure 6 , the node N47 connecting the other end of the switch SW3 is located between the node N44 connecting the inductor L4 and the inductor L3, the positional relationship between the nodes N44 and N47 is not limited to this. For example, the node N44 may be located between the node N47 and the inductor L3. Another example is that the position of the node N44 may be the same as the position of the node N47. The positional relationship between the nodes N42 and N47 is not limited to the Figure 6 relationship.

[0179] The switch SW3 connected in this way, together with the switches SW1 and SW2, is switched on / off based on the control signal S4. Thereby, the filter circuit 42 can function as a variable band-stop filter. For example, by controlling the on / off of the switches SW1 to SW3, a variable band-stop filter is implemented as follows.

[0180] [Table 3]

[0181] SW1 SW2 SW3 (1) No BEF ON / OFF ON ON / OFF (2) BEF1 OFF OFF ON (3) BEF2 ON OFF OFF (4) BEF1 + BEF2 OFF OFF OFF

[0182] (1) By closing all of the switches SW1 to SW3, the inductor L2 and the capacitor C1 are connected to the input terminal 140 without passing through the inductor L1, and the inductor L4 and the capacitor C2 are connected to the input terminal 140 without passing through the inductor L3. Thereby, the inductor L2 and the capacitor C1 and the inductor L4 and the capacitor C2 do not function as a band-stop filter (NoBEF). In addition, at this time, the switches SW1 and / or SW3 may also be opened.

[0183] (2) By closing switch SW3 and opening switches SW1 and SW2, inductor L2 and capacitor C1 are connected to input terminal 140 via inductor L1, and inductor L4 and capacitor C2 are connected to input terminal 140 without passing through inductor L3. Thus, inductor L2 and capacitor C1 function as a band-stop filter, but inductor L4 and capacitor C2 do not function as a band-stop filter (BEF1).

[0184] (3) By closing switch SW1 and opening switches SW2 and SW3, inductor L2 and capacitor C1 are connected to input terminal 140 without passing through inductor L1, and inductor L4 and capacitor C2 are connected to input terminal 140 via inductor L3. Thus, inductor L4 and capacitor C2 function as a band-stop filter, but inductor L2 and capacitor C1 do not function as a band-stop filter (BEF2).

[0185] (4) By opening all of switches SW1 - SW3, inductor L2 and capacitor C1 are connected to input terminal 140 via inductor L1, and inductor L4 and capacitor C2 are connected to input terminal 140 via inductor L3. Thus, inductor L2 and capacitor C1, and inductor L4 and capacitor C2 function as band-stop filters (BEF1 + BEF2).

[0186] The control of such a variable band-stop filter is the same as in the first mode, and can be controlled based on, for example, the channel bandwidth of the high-frequency signal RF A and / or frequency band, but is not limited thereto.

[0187] [1.2.7 Circuit Structure of Filter Circuit 43]

[0188] Next, with reference to Figure 7 , the circuit structure of filter circuit 43 in the fourth mode of the present embodiment will be described.

[0189] As Figure 7 shown, filter circuit 43 includes inductors L1 - L5, capacitors C1 and C2, switches SW1, SW2, SW4 and SW5, input terminal 140, and output terminal 141.

[0190] Switch SW4 is an example of the fourth switch and is connected between inductor L3 and output terminal 141. In other words, switch SW4 is connected in series with the path connecting input terminal 140 and output terminal 141. Specifically, one end of switch SW4 is connected to node N48 on the path connecting inductor L3 and output terminal 141, and the other end of switch SW4 is connected to node N44 on the path connecting inductors L4 and L5.

[0191] The switch SW5 is an example of the fifth switch and is connected between the inductor L3 and the output terminal 141 without passing through the switch SW4 and the inductor L5. In other words, the switch SW5 is connected in series with the path connecting the input terminal 140 and the output terminal 141. Specifically, one end of the switch SW5 is connected to the node N48 on the path connecting the inductor L3 and the output terminal 141, and the other end of the switch SW5 is connected to the node N49 on the path connecting the inductor L5 and the output terminal 141.

[0192] The inductor L5 is an example of the fifth inductor and is connected between the switch SW4 and the output terminal 141. In other words, the inductor L5 is connected in series with the path connecting the input terminal 140 and the output terminal 141 via the switch SW4. Also, the inductor L5 is connected between the switch SW5 and the inductor L4. In other words, the inductor L5 is shunt-connected to the path connecting the input terminal 140 and the output terminal 141 via the switch SW5. Specifically, one end of the inductor L5 is connected to the switch SW4 and the inductor L4, and the other end of the inductor L5 is connected to the switch SW5 and the output terminal 141.

[0193] The switches SW4 and SW5 connected in this way, together with the switches SW1 and SW2, are switched on / off based on the control signal S4. Thereby, the filter circuit 43 can function as a variable band-stop filter. For example, by controlling the on / off of the switches SW1, SW2, SW4, and SW5, a variable band-stop filter is realized as follows.

[0194] [Table 4]

[0195] SW1 SW2 SW4 SW5 (1) No BEF ON ON OFF ON (2) BEF2 ON OFF ON OFF (3) BEF3 ON OFF OFF ON (4) BEF1 + BEF2 OFF OFF ON OFF (5) BEF1 + BEF3 OFF OFF OFF ON

[0196] (1) By closing the switches SW1, SW2, and SW5 and opening SW4, the inductors L2 and C1 are connected to the input terminal 140 without passing through the inductor L1, and the inductors L4 and C2 are connected to the input terminal 140 without passing through the inductor L3. Thereby, the inductors L2 and C1, the inductors L4 and C2, and the inductors L4 and L5 and C2 do not function as band-stop filters (No BEF).

[0197] (2) By closing switches SW1 and SW4, and opening switches SW2 and SW5, inductor L2 and capacitor C1 are connected to input terminal 140 without passing through inductor L1, and inductor L4 and capacitor C2 are connected to input terminal 140 via inductor L3. Thus, inductor L4 and capacitor C2 function as a band-stop filter, but inductor L2 and capacitor C1 do not function as a band-stop filter (BEF2).

[0198] (3) By closing switches SW1 and SW5, and opening switches SW2 and SW4, inductor L2 and capacitor C1 are connected to input terminal 140 without passing through inductor L1, and inductor L4, L5, and capacitor C2 are connected to input terminal 140 via inductor L3. Thus, inductor L4, L5, and capacitor C2 function as a band-stop filter, but inductor L2 and capacitor C1 do not function as a band-stop filter (BEF3).

[0199] (4) By closing switch SW4, and opening switches SW1, SW2, and SW5, inductor L2 and capacitor C1 are connected to input terminal 140 via inductor L1, and inductor L4 and capacitor C2 are connected to input terminal 140 via inductor L3. Thus, inductor L2 and capacitor C1, and inductor L4 and capacitor C2 function as band-stop filters (BEF1 + BEF2).

[0200] (5) By closing switch SW5, and opening switches SW1, SW2, and SW4, inductor L2 and capacitor C1 are connected to input terminal 140 via inductor L1, and inductor L4, L5, and capacitor C2 are connected to input terminal 140 via inductor L3. Thus, inductor L2 and capacitor C1, and inductor L4, L5, and capacitor C2 function as band-stop filters (BEF1 + BEF3).

[0201] The control of such a variable band-stop filter is the same as that of the first mode, and can be controlled, for example, based on the channel bandwidth of the high-frequency signal RF A and / or frequency band, but is not limited thereto.

[0202] [1.2.8 Circuit Structure of Digital Control Circuit 60]

[0203] Next, the circuit structure of the digital control circuit 60 will be described. As Figure 8 shown, the digital control circuit 60 includes a first controller 61, a second controller 62, capacitors C81 and C82, and control terminals 601 to 604.

[0204] The first controller 61 can process the source-synchronous digital control signals received from the RFIC 5 via the control terminals 601 and 602 to generate control signals S1, S2, and S4. The control signal S1 is a signal for controlling the on / off of the switches S61 - S63, S71, and S72 included in the pre-regulator circuit 10. The control signal S2 is a signal for controlling the on / off of the switches S11 - S14, S21 - S24, S31 - S34, and S41 - S44 included in the switched-capacitor circuit 20. The control signal S4 is a signal for controlling the on / off of the switches SW1 - SW5 included in the filter circuits 40 - 43.

[0205] In addition, the digital control signals processed in the first controller 61 are not limited to source-synchronous digital control signals. For example, the first controller 61 can also process clock-embedded digital control signals. Additionally, the first controller 61 can also generate a control signal for controlling the output switch circuit 30.

[0206] Also, in this embodiment, a set of clock signals and data signals are used as the digital control signals for the pre-regulator circuit 10, the switched-capacitor circuit 20, and the filter circuits 40 - 43, but it is not limited to this. For example, the sets of clock signals and data signals can be used separately as the digital control signals for the pre-regulator circuit 10, the switched-capacitor circuit 20, and the filter circuits 40 - 43.

[0207] The second controller 62 processes the digital control logic (DCL: Digital Control Logic / Line) signals (DCL1, DCL2) received from the RFIC 5 via the control terminals 603 and 604 to generate the control signal S3. The DCL signals (DCL1, DCL2) are generated by the RFIC 5 based on the envelope signal of the high-frequency signal, etc. The control signal S3 is a signal for controlling the on / off of the switches S51 - S54 included in the output switch circuit 30.

[0208] The DCL signals (DCL1, DCL2) are each one-bit signals. The voltages V1 - V4 are represented by the combination of two one-bit signals respectively. For example, V1, V2, V3, and V4 are represented by "00", "01", "10", and "11" respectively. The voltage levels can also be expressed using Gray code.

[0209] The capacitor C81 is connected between the first controller 61 and the ground. For example, the capacitor C81 is connected between the power supply line supplying power to the first controller 61 and the ground, functioning as a bypass capacitor. The capacitor C82 is connected between the second controller 62 and the ground.

[0210] In addition, although two digital control logic signals are used for the control of the output switch circuit 30 in the present embodiment, the number of digital control logic signals is not limited thereto. For example, one or any number of three or more digital control logic signals may be used according to the number of voltage levels that each output switch circuit 30 can select. In addition, the digital control signal for the control of the output switch circuit 30 is not limited to the digital control logic signal.

[0211] [1.3 Installation Example of the Tracker Circuit 1]

[0212] Next, as an installation example of the tracker circuit 1 configured as described above, refer to Figures 9 to 11 the tracker module 100 will be described. Here, an installation example of the tracker circuit 1 including the filter circuit 43 will be described, but the tracker circuit 1 including any one of the filter circuits 40 to 42 can also be installed in the same manner as the tracker circuit 1 including the filter circuit 43.

[0213] In addition, although the power inductor L71 included in the pre-regulator circuit 10 is not arranged on the module substrate 90 in the present installation example, it is not limited thereto. In other words, the power inductor L71 may also be arranged on the module substrate 90.

[0214] Figure 9 is a top view of the tracker module 100 of the present embodiment. Figure 10 is a top view of the tracker module 100 of the present embodiment, and is a view perspective from the positive side of the z-axis of the main surface 90b side of the module substrate 90. Figure 11 is a cross-sectional view of the tracker module 100 of the present embodiment. Figure 11 The cross-sections of the tracker module 100 in Figure 9 and Figure 10 are cross-sections on the XI-XI line.

[0215] In addition, in Figures 9 to 11 , a part of the wiring connecting a plurality of circuit components arranged on the module substrate 90 is omitted from the illustration. In Figure 9 and Figure 10 , the resin member 91 covering a plurality of circuit components and the surface shielding electrode layer 92 covering the resin member 91 are omitted from the illustration. In Figure 9 , the shaded blocks represent any circuit components that are not necessary in the present invention.

[0216] The tracker module 100 includes in addition to Figure 9In addition to the multiple circuit components of active elements and passive elements included in the pre-regulator circuit 10, the switched-capacitor circuit 20, the output switching circuit 30, the filter circuit 43, and the digital control circuit 60 shown, there are also provided a module substrate 90, a resin member 91, a shielding electrode layer 92, and a plurality of external connection terminals 150.

[0217] The module substrate 90 has main surfaces 90a and 90b facing each other. A ground electrode layer 90e and the like are formed within the module substrate 90 and on the main surface 90a. In addition, Figure 9 and Figure 10 in, the module substrate 90 has a rectangular shape in a plan view, but the shape of the module substrate 90 is not limited thereto.

[0218] As the module substrate 90, for example, a low-temperature co-fired ceramic (LTCC) substrate, a high-temperature co-fired ceramic (HTCC) substrate, a component-embedded substrate, a substrate having a redistribution layer (RDL), or a printed circuit board, etc., having a laminated structure with a plurality of dielectric layers can be used, but it is not limited to these substrates.

[0219] An integrated circuit 80, capacitors C1, C2, C10 to C16, C20, C30, C40, C61 to C64, C81, and C82, inductors L1 to L5, and a resin member 91 are arranged on the main surface 90a.

[0220] The integrated circuit 80 has a PR switch section 80a, an SC switch section 80b, an OS switch section 80c, and an FL switch section 80d. The PR switch section 80a includes switches S61 to S63, S71, and S72. The SC switch section 80b includes switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. The OS switch section 80c includes switches S51 to S54. The FL switch section 80d includes switches SW1, SW2, SW4, and SW5.

[0221] In addition, although in Figure 6In this case, the PR switch section 80a, the SC switch section 80b, the OS switch section 80c, and the FL switch section 80d are included in a single integrated circuit 80, but are not limited thereto. For example, the PR switch section 80a and the SC switch section 80b may be included in one integrated circuit, and the OS switch section 80c and the FL switch section 80d may be included in another integrated circuit. Additionally, for example, the SC switch section 80b, the OS switch section 80c, and the FL switch section 80d may be included in one integrated circuit, and the PR switch section 80a may be included in another integrated circuit. Further, the PR switch section 80a, the OS switch section 80c, and the FL switch section 80d may be included in one integrated circuit, and the SC switch section 80b may be included in another integrated circuit. Additionally, for example, the PR switch section 80a, the SC switch section 80b, the OS switch section 80c, and the FL switch section 80d may be independently included in four integrated circuits.

[0222] In addition, although in Figure 9 the integrated circuit 80 has a rectangular shape when viewed from above the module substrate 90, the shape of the integrated circuit 80 is not limited thereto.

[0223] The integrated circuit 80 may be formed using, for example, CMOS (Complementary Metal Oxide Semiconductor), and specifically, may be manufactured by an SOI (Silicon on Insulator) process. Further, the integrated circuit 80 is not limited to CMOS.

[0224] The capacitors C10 to C16, C20, C30, C40, C61 to C64, C81, and C82 are each mounted as chip capacitors. A chip capacitor refers to a surface mount device (SMD) that constitutes a capacitor. Further, the mounting of the plurality of capacitors is not limited to chip capacitors. For example, a part or all of the plurality of capacitors may be included in an integrated passive device (IPD), or may be included in the integrated circuit 80.

[0225] The inductors L1 to L5 are mounted as chip inductors. A chip inductor refers to an SMD that constitutes an inductor. Further, the mounting of the inductors L1 to L5 is not limited to chip inductors. For example, a part or all of the inductors L1 to L5 may be included in an IPD.

[0226] The plurality of capacitors and inductors thus arranged on the main surface 90a are grouped by circuit and arranged around the integrated circuit 80.

[0227] Specifically, when viewed from above the module substrate 90, the group of capacitors C61 to C64 included in the pre-regulator circuit 10 is arranged in a region on the main surface 90a sandwiched by a straight line along the left side of the integrated circuit 80 and a straight line along the left side of the module substrate 90. Thereby, the group of circuit components included in the pre-regulator circuit 10 is arranged near the PR switch section 80a in the integrated circuit 80.

[0228] When viewed from above the module substrate 90, the group of capacitors C10 to C16, C20, C30, and C40 included in the switched-capacitor circuit 20 is arranged in a region on the main surface 90a sandwiched by a straight line along the upper side of the integrated circuit 80 and a straight line along the upper side of the module substrate 90, and in a region on the main surface 90a sandwiched by a straight line along the right side of the integrated circuit 80 and a straight line along the right side of the module substrate 90. Thereby, the group of circuit components included in the switched-capacitor circuit 20 is arranged near the SC switch section 80b in the integrated circuit 80. In other words, the SC switch section 80b is arranged closer to the switched-capacitor circuit 20 than each of the PR switch section 80a and the OS switch section 80c.

[0229] When viewed from above the module substrate 90, the group of capacitors C1 and C2 and inductors L1 to L5 included in the filter circuit 43 is arranged in a region on the main surface 90a sandwiched by a straight line along the lower side of the integrated circuit 80 and a straight line along the lower side of the module substrate 90. Thereby, the group of circuit components included in the filter circuit 43 is arranged near the FL switch section 80d in the integrated circuit 80. In other words, the FL switch section 80d is arranged closer to the capacitors C1 and C2 and the inductors L1 to L5 of the filter circuit 43 than each of the PR switch section 80a and the SC switch section 80b.

[0230] In particular, in Figure 9 the inductor L1 is arranged adjacent to the integrated circuit 80 on the main surface 90a. And the inductor L2 is arranged adjacent to the inductor L1 on the main surface 90a. Further, the capacitor C1 is arranged adjacent to the inductor L2 on the main surface 90a.

[0231] Similarly, the inductor L3 is arranged adjacent to the integrated circuit 80 on the main surface 90a. And the inductor L4 is arranged adjacent to the inductor L3 on the main surface 90a. Further, the capacitor C2 is arranged adjacent to the inductor L4 on the main surface 90a.

[0232] A plurality of external connection terminals 150 are arranged on the main surface 90b. At least one of the plurality of external connection terminals 150 is connected to Figure 7is connected to the output terminal 141 shown. A plurality of external connection terminals 150 are electrically connected to a plurality of electronic components disposed on the main surface 90a via through-hole conductors or the like formed in the module substrate 90. As the plurality of external connection terminals 150, copper electrodes can be used, but are not limited thereto. For example, solder electrodes can also be used as the plurality of external connection terminals 150.

[0233] The resin member 91 covers at least a part of the main surface 90a and the plurality of electronic components on the main surface 90a. The resin member 91 has a function of ensuring the mechanical strength and reliability such as moisture resistance of the plurality of electronic components on the main surface 90a. In addition, the resin member 91 may not be included in the tracker module 100.

[0234] The shielding electrode layer 92 is, for example, a metal thin film formed by a sputtering method. The shielding electrode layer 92 is formed to cover the surface (upper surface and side surface) of the resin member 91. The shielding electrode layer 92 is connected to the ground wire to suppress external noise from invading the electronic components constituting the tracker module 100 and the noise generated in the tracker module 100 from interfering with other modules or other devices. In addition, the shielding electrode layer 92 may not be included in the tracker module 100.

[0235] In addition, Figures 9 to 11 The structure of the tracker module 100 shown is an example and is not limited thereto. For example, a part of the capacitor and inductor disposed on the main surface 90a can also be formed in the module substrate 90. In addition, a part of the capacitor and inductor disposed on the main surface 90a may not be included in the tracker module 100 and may not be disposed on the module substrate 90.

[0236] [1.4 Effects, etc.]

[0237] As described above, the tracker circuit 1 according to the present embodiment includes: an output switch circuit 30 configured to selectively output at least one of a plurality of discrete voltages to the power amplifier 2A; and filter circuits 40, 41, 42, or 43 connected between the output switch circuit 30 and the power amplifier 2A. The filter circuits 40, 41, 42, or 43 include: an inductor L1 connected between the output switch circuit 30 and the power amplifier 2A; a capacitor C1 connected between the path connecting the inductor L1 and the power amplifier 2A and the ground wire; and a switch SW1 connected between the output switch circuit 30 and the power amplifier 2A without passing through the inductor L1.

[0238] According to another aspect, the tracker circuit 1 of the present embodiment includes: an external connection terminal 150 (output terminal 141) connected to the power amplifier 2A; an output switch circuit 30 configured to selectively output at least one of a plurality of discrete voltages to the external connection terminal 150; and a filter circuit 40 connected between the output switch circuit 30 and the external connection terminal 150. The filter circuit 40 includes: an inductor L1 connected between the output switch circuit 30 and the external connection terminal 150; a capacitor C1 connected between a path connecting the inductor L1 and the external connection terminal 150 and the ground; and a switch SW1 connected between the output switch circuit 30 and the external connection terminal 150. One end of the switch SW1 is connected to one end of the inductor L1, and the other end of the switch SW1 is connected to the other end of the inductor L1.

[0239] Accordingly, the connection and disconnection of the path bypassing the inductor L1 can be switched by the switch SW1. The filter effect brought by the capacitor C1 (and the inductor L2) is introduced through the inductor L1. Therefore, the on / off switching of the filter based on the capacitor C1 (and the inductor L2) can be achieved by the switch SW1. At this time, the switch SW1 is not connected between the path (voltage supply path) connecting the output switch circuit 30 and the external connection terminal 150 (power amplifier 2A) and the capacitor C1. In other words, the switch SW1 is not shunt-connected to the voltage supply path. Therefore, the deterioration of the Q value of the filter caused by the switch SW1 can be suppressed, and the noise included in the plurality of discrete voltages can be effectively attenuated.

[0240] In addition, for example, in the tracker circuit 1 of the present embodiment, the filter circuits 40, 41, 42, or 43 may further include: an inductor L2 connected in series with the capacitor C1 between a path connecting the inductor L1 and the external connection terminal 150 (power amplifier 2A) and the ground.

[0241] Accordingly, the LC series circuit including the capacitor C1 and the inductor L2 is connected between a path connecting the output switch circuit 30 and the external connection terminal 150 (power amplifier 2A) and the ground. Therefore, the characteristics of the filter can be improved, and the noise included in the plurality of discrete voltages can be more effectively attenuated.

[0242] For another example, in the tracker circuit 1 of the present embodiment, the filter circuits 41, 42, or 43 may also include: an inductor L3 connected between the inductor L1 and the power amplifier 2A; a capacitor C2 connected between the path connecting the inductor L3 and the power amplifier 2A and the ground; and a switch SW2 connected between the output switch circuit 30 and the power amplifier 2A without passing through the inductors L1 and L3. The switch SW1 may also be connected between the output switch circuit 30 and the inductor L3 without passing through the inductor L1.

[0243] Alternatively, from another perspective, in the tracker circuit 1 of the present embodiment, the filter circuits 41, 42, or 43 may also include: an inductor L3 connected between the inductor L1 and the external connection terminal 150; a capacitor C2 connected between the path connecting the inductor L3 and the external connection terminal 150 and the ground; and a switch SW2 connected between the output switch circuit 30 and the external connection terminal 150. One end of the switch SW2 may be connected to the path connecting the output switch circuit 30 and the inductor L1, and the other end of the switch SW2 may be connected to the path connecting the inductor L3 and the external connection terminal 150.

[0244] Accordingly, the connection and disconnection of the path bypassing the inductors L1 and L3 can be switched by the switch SW2. The filter effect brought by the capacitor C1 (and the inductor L2) is introduced by the inductor L1, and the filter effect brought by the capacitor C2 (and the inductor L4) is introduced by the inductor L3. Therefore, the on / off switching of the filter based on the capacitor C1 (and the inductor L2) and the capacitor C2 (and the inductor L4) can be achieved by the switch SW2. At this time, the switch SW2 is not connected between the path (voltage supply path) connecting the output switch circuit 30 and the external connection terminal 150 (power amplifier 2A) and the capacitor C1 or C2. In other words, the switch SW2 is not shunt-connected to the voltage supply path. Therefore, the deterioration of the Q value of the filter caused by the switch SW2 can be suppressed, and the noise included in the multiple discrete voltages can be effectively attenuated.

[0245] For another example, in the tracker circuit 1 of the present embodiment, the filter circuits 41, 42, or 43 may also include: an inductor L4 connected in series with the capacitor C2 between the path connecting the inductor L3 and the external connection terminal 150 (power amplifier 2A) and the ground.

[0246] Accordingly, an LC series circuit including a capacitor C2 and an inductor L4 is connected between a path connecting an output switching circuit 30 and an external connection terminal 150 (power amplifier 2A) and the ground line. Therefore, the characteristics of the filter can be improved, and the noise included in multiple discrete voltages can be attenuated more effectively.

[0247] For another example, in the tracker circuit 1 of the present embodiment, the filter circuit 42 may further include a switch SW3 that is connected between the inductor L1 and the power amplifier 2A without passing through the inductor L3.

[0248] From another perspective, in the tracker circuit 1 of the present embodiment, the filter circuit 42 may further include a switch SW3 that is connected between the inductor L1 and the external connection terminal 150, or one end of the switch SW3 may be connected to one end of the inductor L3, and the other end of the switch SW3 may be connected to the other end of the inductor L3.

[0249] Accordingly, the connection and disconnection of the path bypassing the inductor L3 can be switched by the switch SW3. The filter effect brought by the inductor L3 to the capacitor C2 (and the inductor L4) is introduced. Therefore, the on / off switching of the filter based on the capacitor C2 (and the inductor L4) can be realized by the switch SW3. At this time, the switch SW3 is not connected between the path (voltage supply path) connecting the output switching circuit 30 and the external connection terminal 150 (power amplifier 2A) and the capacitor C2. In other words, the switch SW3 is not shunt-connected to the voltage supply path. Therefore, the deterioration of the Q value of the filter caused by the switch SW2 can be suppressed, and the noise included in multiple discrete voltages can be effectively attenuated.

[0250] For another example, in the tracker circuit 1 of the present embodiment, the filter circuit 43 may further include a switch SW4 that is connected between the inductor L3 and the power amplifier 2A; an inductor L5 that is connected between the switch SW4 and the power amplifier 2A; and a switch SW5 that is connected between the inductor L3 and the power amplifier 2A without passing through the switch SW4 and the inductor L5. The capacitor C2 may be connected between the path connecting the switch SW4 and the inductor L5 and the ground line.

[0251] According to another aspect, in the tracker circuit 1 of the present embodiment, the filter circuit 43 may further include: a switch SW4 connected between the inductor L3 and the external connection terminal 150; an inductor L5 connected between the switch SW4 and the external connection terminal 150; and a switch SW5 connected between the inductor L3 and the external connection terminal 150. One end of the switch SW4 may be connected to the inductor L3, the other end of the switch SW4 may be connected to one end of the inductor L5, one end of the switch SW5 may be connected to the inductor L3, the other end of the switch SW5 may be connected to the other end of the inductor L5, and a capacitor C2 may be connected between the path connecting the switch SW4 and the inductor L5 and the ground line.

[0252] Accordingly, by means of the switches SW4 and SW5, it is possible to switch the shunt connection to the power supply path between the LC series circuit including the inductor L4 and the capacitor C2 and the LC series circuit including the inductors L4 and L5 and the capacitor C2. At this time, the inductor L4 and the capacitor C2 can be shared by the two LC series circuits, and the circuit elements of the filter circuit 43 can be reduced.

[0253] Further, for example, in the tracker circuit 1 of the present embodiment, the switch SW1 and the output switch circuit 30 may be included in an integrated circuit 80 disposed on the module substrate 90.

[0254] Accordingly, miniaturization of the tracker module 100 equipped with the tracker circuit 1 can be achieved. In addition, the wiring length between the output switch circuit 30 and any one of the filter circuits 40 to 43 can be shortened, and the resistance loss caused by the wiring can be reduced.

[0255] Further, for example, in the tracker circuit 1 of the present embodiment, the inductor L1 may be disposed adjacent to the integrated circuit 80 on the module substrate 90.

[0256] Accordingly, the wiring length between the inductor L1 and the switch SW1 can be shortened, and the resistance loss caused by the wiring can be reduced.

[0257] Further, for example, in the tracker circuit 1 of the present embodiment, at least one of the capacitor C1 and the inductor L2 may be disposed adjacent to the inductor L1 on the module substrate 90.

[0258] Accordingly, the wiring length between the inductor L1 and the inductor L2 or the capacitor C1 can be shortened, and the characteristics of the filter can be improved.

[0259] (Embodiment 2)

[0260] Next, Embodiment 2 will be described. In this embodiment, it is mainly different from the above-described Embodiment 1 in that multiple discrete voltages can be supplied to two power amplifiers from two output switch circuits respectively. Hereinafter, this embodiment will be described with a focus on the points different from the above-described Embodiment 1 with reference to the accompanying drawings.

[0261] Refer to Figure 12 The circuit structures of the communication device 7A and the tracker circuit 1A of this embodiment will be described. Figure 12 is a circuit structure diagram of the communication device 7A of this embodiment.

[0262] In addition, Figure 12 is an exemplary circuit structure, and the communication device 7A and the tracker circuit 1A can be mounted using any one of a variety of circuit mounting and circuit technologies. Therefore, the descriptions of the communication device 7A and the tracker circuit 1A provided below should not be construed in a limiting sense.

[0263] [2.1 Circuit Structure of Communication Device 7A]

[0264] The communication device 7A includes a tracker circuit 1A, power amplifiers 2A and 2B, filters 3A and 3B, an RFIC 5, and antennas 6A and 6B.

[0265] The tracker circuit 1A can supply multiple discrete voltages V A to the power amplifier 2A and supply multiple discrete voltages V B to the power amplifier 2B based on the tracking mode. As Figure 12 shown, the tracker circuit 1A includes a pre-regulator circuit 10, a switched-capacitor circuit 20, two output switch circuits 30, two filter circuits 43, a DC power supply 50, and a digital control circuit 60. In addition, the number of the output switch circuits 30 and the filter circuits 43 included in the tracker circuit 1A is not limited to two respectively. The number of the output switch circuits 30 and the filter circuits 43 can also be three or more respectively.

[0266] The power amplifier 2B is connected between the RFIC 5 and the filter 3B. And the power amplifier 2B is connected to the tracker circuit 1A. The power amplifier 2B can use the multiple discrete voltages V B received from the tracker circuit 1A to amplify the high-frequency signal RF B in frequency band B received from the RFIC 5.

[0267] The filter 3B is connected between the power amplifier 2B and the antenna 6B. The filter 3B is a band-pass filter having a passband including frequency band B. Frequency band B is the same as frequency band A and is a frequency band for a communication system constructed using RAT, which is predefined by a standardization organization or the like.

[0268] Antenna 6B outputs the transmission signal in frequency band B input from power amplifier 2B via filter 3B. Additionally, antenna 6B may not be included in communication device 7A.

[0269] [2.2 Effects, etc.]

[0270] As described above, the tracker circuit 1A of the present embodiment may also include two output switch circuits 30 and two filter circuits 43.

[0271] Accordingly, different discrete voltages can be supplied to two power amplifiers 2A and 2B simultaneously. At this time, the pre-regulator circuit 10 and the switched-capacitor circuit 20 can be shared for the two power amplifiers 2A and 2B, contributing to a reduction in the number of components and miniaturization of the communication device 7A.

[0272] (Embodiment 3)

[0273] Next, Embodiment 3 will be described. In the present embodiment, it is mainly different from the above-described Embodiment 2 in that multiple discrete voltages can be supplied to three power amplifiers from two output switch circuits. Hereinafter, the present embodiment will be described centering on the points different from Embodiment 2 with reference to the drawings.

[0274] Refer to Figure 13 The circuit structures of communication device 7B and tracker circuit 1B of the present embodiment will be described. Figure 13 This is the circuit structure diagram of communication device 7B of the present embodiment.

[0275] In addition, Figure 13 This is an exemplary circuit structure, and communication device 7B and tracker circuit 1B can be mounted using any one of various circuit mounting and circuit technologies. Therefore, the descriptions of communication device 7B and tracker circuit 1B provided below should not be construed in a limiting sense.

[0276] [3.1 Circuit Structure of Communication Device 7B]

[0277] Communication device 7B includes tracker circuit 1B, power amplifiers 2A to 2C, filters 3A to 3C, RFIC 5, and antennas 6A to 6C.

[0278] Tracker circuit 1B can supply multiple discrete voltages V A to power amplifier 2A, multiple discrete voltages V B to power amplifier 2B, and multiple discrete voltages V C to power amplifier 2C based on the tracking mode. As Figure 13As shown, the tracker circuit 1B includes a pre-regulator circuit 10, a switched-capacitor circuit 20, two output switch circuits 30, two filter circuits 43, a DC power supply 50, a digital control circuit 60, switches SWA and SWB.

[0279] Switch SWA is connected between one of the two filter circuits 43 and the power amplifier 2C. In other words, switch SWA is serially connected to the path connecting one of the two filter circuits 43 and the power amplifier 2C. Specifically, one end of switch SWA is connected to one of the two filter circuits 43, and the other end of switch SWA is connected to the power amplifier 2C. Switch SWA can switch the connection and non-connection between one of the two filter circuits 43 and the power amplifier 2C.

[0280] Switch SWB is connected between the other of the two filter circuits 43 and the power amplifier 2C. In other words, switch SWB is serially connected to the path connecting the other of the two filter circuits 43 and the power amplifier 2C. Specifically, one end of switch SWB is connected to the other of the two filter circuits 43, and the other end of switch SWB is connected to the power amplifier 2C. Switch SWB can switch the connection and non-connection between the other of the two filter circuits 43 and the power amplifier 2C.

[0281] The power amplifier 2C is connected between the RFIC5 and the filter 3C. Also, the power amplifier 2C is connected to the tracker circuit 1B. The power amplifier 2C can use a plurality of discrete voltages V C received from the tracker circuit 1B to amplify the high-frequency signal RF in band C received from the RFIC5 C .

[0282] The filter 3C is connected between the power amplifier 2C and the antenna 6C. The filter 3C is a band-pass filter having a passband including band C. Band C is the same as bands A and B and is a frequency band for a communication system using RAT, which is predefined by a standardization organization or the like.

[0283] The antenna 6C outputs the transmission signal in band C input from the power amplifier 2C via the filter 3C. In addition, the antenna 6C may not be included in the communication device 7B.

[0284] [3.2 Effects, etc.]

[0285] As described above, the tracker circuit 1B of the present embodiment may also include: switch SWA, connected between one of the two filter circuits 43 and the power amplifier 2C; and switch SWB, connected between the other of the two filter circuits 43 and the power amplifier 2C.

[0286] Accordingly, it is possible to switch the combination of the output switch circuit 30 and the filter circuit 40 that supply multiple discrete voltages V to the power amplifier 2C. Therefore, it is possible to switch the combination of two power amplifiers that supply different discrete voltages simultaneously. For example, by turning on the switch SWA and closing the switch SWB, different discrete voltages can be supplied to the power amplifiers 2A and 2C simultaneously. Additionally, for example, by closing the switch SWA and turning on the switch SWB, different discrete voltages can be supplied to the power amplifiers 2B and 2C simultaneously. Additionally, for example, by turning on the switches SWA and SWB, different discrete voltages can be supplied to the power amplifiers 2A and 2B simultaneously. C The combination of the output switch circuit 30 and the filter circuit 40 that supply multiple discrete voltages V to the power amplifier 2C can be switched. Therefore, the combination of two power amplifiers that supply different discrete voltages simultaneously can be switched. For example, by turning on the switch SWA and closing the switch SWB, different discrete voltages can be supplied to the power amplifiers 2A and 2C simultaneously. Additionally, for example, by closing the switch SWA and turning on the switch SWB, different discrete voltages can be supplied to the power amplifiers 2B and 2C simultaneously. Additionally, for example, by turning on the switches SWA and SWB, different discrete voltages can be supplied to the power amplifiers 2A and 2B simultaneously.

[0287] (Embodiment 4)

[0288] Next, Embodiment 4 will be described. In this embodiment, it is mainly different from Embodiment 1 in that multiple discrete voltages can be supplied to two power amplifiers from one output switch circuit. Hereinafter, this embodiment will be described with a focus on the points different from Embodiment 1 with reference to the drawings.

[0289] Refer to Figure 14 and Figure 15 to describe the circuit structures of the communication device 7C and the tracker circuit 1C of this embodiment. Figure 14 is the circuit structure diagram of the communication device 7C of this embodiment. Figure 15 is the circuit structure diagram of the filter circuit 44 of this embodiment.

[0290] In addition, Figure 14 and Figure 15 are exemplary circuit structures, and the communication device 7C and the tracker circuit 1C can be mounted using any one of various circuit mounting and circuit technologies. Therefore, the descriptions of the communication device 7C and the tracker circuit 1C provided below should not be construed in a limiting manner.

[0291] [4.1 Circuit Structure of Communication Device 7C]

[0292] The communication device 7C includes a tracker circuit 1C, power amplifiers 2A and 2B, filters 3A and 3B, an RFIC 5, and antennas 6A and 6B.

[0293] The tracker circuit 1C can supply multiple discrete voltages V to the power amplifier 2A based on the tracking mode A , and supply multiple discrete voltages V to the power amplifier 2B B . As Figure 14 shown, the tracker circuit 1C includes a pre-regulator circuit 10, a switched-capacitor circuit 20, an output switch circuit 30, a filter circuit 44, a DC power supply 50, and a digital control circuit 60.

[0294] [Circuit Structure of 4.2 Filter Circuit 44]

[0295] Next, with reference to Figure 15 , the circuit structure of the filter circuit 44 of this embodiment will be described.

[0296] As Figure 15 shown, the filter circuit 44 includes inductors L1, L2, and L6 to L9, capacitors C1 and C3 to C4, switches SW1 and SW6 to SW8, an input terminal 140, output terminals 141 and 142.

[0297] The output terminal 141 is an external connection terminal of the tracker circuit 1C and is connected to the power amplifier 2A outside the tracker circuit 1C. The output terminal 141 is a terminal for supplying a plurality of discrete voltages V A that have passed through the filter circuit 44 to the power amplifier 2A.

[0298] The output terminal 142 is an external connection terminal of the tracker circuit 1C and is connected to the power amplifier 2B outside the tracker circuit 1C. The output terminal 142 is a terminal for supplying a plurality of discrete voltages V B that have passed through the filter circuit 44 to the power amplifier 2B.

[0299] The inductor L1 is an example of a first inductor and is connected between the input terminal 140 and the output terminals 141 and 142. In other words, the inductor L1 is connected in series to the path connecting the input terminal 140 and the output terminals 141 and 142. Specifically, one end of the inductor L1 is connected to the input terminal 140, and the other end of the inductor L1 is connected to the output terminals 141 and 142.

[0300] The inductor L2 is an example of a second inductor and is connected between the path connecting the inductor L1 and the output terminals 141 and 142 and the ground line. In other words, the inductor L2 is shunt-connected to the path connecting the input terminal 140 and the output terminals 141 and 142. Specifically, one end of the inductor L2 is connected to the path connecting the inductor L1 and the output terminals 141 and 142, and the other end of the inductor L2 is connected to the ground line via the capacitor C1.

[0301] The capacitor C1 is an example of a first capacitor and is connected between the inductor L2 and the ground line. In other words, the capacitor C1 is shunt-connected to the path connecting the input terminal 140 and the output terminals 141 and 142. Specifically, one end of the capacitor C1 is connected to the inductor L2, and the other end of the capacitor C1 is connected to the ground line.

[0302] The switch SW1 is an example of the first switch and is connected between the input terminal 140 and the output terminals 141 and 142 without passing through the inductor L1. In other words, the switch SW1 is serially connected to the path that bypasses the inductor L1 between the input terminal 140 and the output terminals 141 and 142. Specifically, one end of the switch SW1 is connected to the path connecting the input terminal 140 and the inductor L1, and the other end of the switch SW1 is connected to the path connecting the inductor L1 and the output terminals 141 and 142.

[0303] The inductor L6 is connected between the path connecting the inductor L1 and the output terminals 141 and 142 and the ground line. In other words, the inductor L6 is shunt-connected to the path connecting the input terminal 140 and the output terminals 141 and 142. Specifically, one end of the inductor L6 is connected to the path connecting the inductor L1 and the output terminal 141, and the other end of the inductor L6 is connected to the ground line via the capacitor C3.

[0304] The capacitor C3 is connected between the inductor L6 and the ground line. In other words, the capacitor C3 is shunt-connected to the path connecting the input terminal 140 and the output terminals 141 and 142. Specifically, one end of the capacitor C3 is connected to the inductor L6, and the other end of the capacitor C3 is connected to the ground line.

[0305] The inductor L7 is connected between the inductor L1 and the output terminal 142. In other words, the inductor L7 is serially connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the inductor L7 is connected to the inductor L1, and the other end of the inductor L7 is connected to the output terminal 142.

[0306] The switch SW6 is connected between the inductor L1 and the output terminal 142 without passing through the inductor L7. In other words, the switch SW6 is serially connected to the path that bypasses the inductor L7 between the input terminal 140 and the output terminal 142. Specifically, one end of the switch SW6 is connected to the path connecting the inductors L1 and L7, and the other end of the switch SW6 is connected to the path connecting the inductor L7 and the output terminal 142.

[0307] The switch SW7 is connected between the path connecting the inductor L7 and the output terminal 142 and the ground line. In other words, the switch SW7 is shunt-connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the switch SW7 is connected to the path connecting the inductor L7 and the output terminal 142, and the other end of the switch SW7 is connected to the ground line via the inductor L8 and the capacitor C4.

[0308] The inductor L8 is connected between the path connecting the inductor L7 and the output terminal 142 and the ground via the switch SW7. In other words, the inductor L8 can be shunt-connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the inductor L8 is connected to the switch SW7, and the other end of the inductor L8 is connected to the ground via the capacitor C4.

[0309] The capacitor C4 is connected between the inductor L8 and the ground. In other words, the capacitor C4 can be shunt-connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the capacitor C4 is connected to the inductor L8, and the other end of the capacitor C4 is connected to the ground.

[0310] The switch SW8 is connected between the path connecting the inductor L7 and the output terminal 142 and the ground. In other words, the switch SW8 is shunt-connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the switch SW8 is connected to the path connecting the inductor L7 and the output terminal 142, and the other end of the switch SW8 is connected to the ground via the inductor L9 and the capacitor C5.

[0311] The inductor L9 is connected between the path connecting the inductor L7 and the output terminal 142 and the ground via the switch SW8. In other words, the inductor L9 can be shunt-connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the inductor L9 is connected to the switch SW8, and the other end of the inductor L9 is connected to the ground via the capacitor C5.

[0312] The capacitor C5 is connected between the inductor L9 and the ground. In other words, the capacitor C5 can be shunt-connected to the path connecting the input terminal 140 and the output terminal 142. Specifically, one end of the capacitor C5 is connected to the inductor L9, and the other end of the capacitor C5 is connected to the ground.

[0313] [4.3 Effects, etc.]

[0314] As described above, in the tracker circuit 1C of the present embodiment, the switch SW7 can also be connected between the LC series circuit including the inductor L8 and the capacitor C4 and the voltage supply path, and the switch SW8 can also be connected between the LC series circuit including the inductor L9 and the capacitor C5 and the voltage supply path.

[0315] In such a case, it is also possible to switch the connection and non-connection of the path bypassing the inductor L1 by the switch SW1, and the same effects as those of the above-described embodiments can be achieved.

[0316] [Other Embodiments]

[0317] As described above, the tracker circuit of the present invention has been described based on the embodiments, but the tracker circuit of the present invention is not limited to the above embodiments. Other embodiments achieved by combining any of the constituent elements in the above embodiments, modification examples obtained by various modifications conceived by those skilled in the art to the above embodiments without departing from the gist of the present invention, and various devices incorporating the above tracker circuit are also included in the present invention.

[0318] For example, in the circuit structures of the various circuits in the above embodiments, other circuit elements and wirings, etc. may be inserted between the paths connecting the respective circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the power amplifier 2A and the filter 3A.

[0319] In addition, in the above embodiments, a plurality of discrete voltages are supplied from the switched capacitor circuit to the output switching circuit, but it is not limited thereto. For example, a plurality of voltages may be supplied from a plurality of DCDC converters respectively. In addition, when the voltage levels of the plurality of discrete voltages are equally spaced, it is preferable to use a switched capacitor circuit, which is effective for miniaturizing the tracker module.

[0320] In addition, in the above embodiments, four discrete voltages are supplied to the power amplifier, but the number of discrete voltages is not limited to four. For example, as long as the plurality of discrete voltages include at least the voltage corresponding to the maximum output power and the voltage corresponding to the output power with the highest generated frequency, an improvement in power added efficiency can be achieved.

[0321] In addition, in the above Embodiment 1, the plurality of circuit components of the tracker circuit 1 are arranged on the main surface 90a of the module substrate 90, but they may also be arranged on both the main surfaces 90a and 90b. In this case, for example, the integrated circuit 80 may also be arranged on the main surface 90b.

[0322] The present invention can be widely used as a tracker circuit for supplying voltage to a power amplifier in communication devices such as mobile phones.

[0323] Description of Reference Numerals

[0324] 1, 1A, 1B, 1C... Tracker circuits, 2A, 2B, 2C... Power amplifiers, 3A, 3B, 3C... Filters, 5... RFIC, 6A, 6B, 6C... Antennas, 7, 7A, 7B, 7C... Communication devices, 10... Pre-regulator circuit, 20... Switched-capacitor circuit, 30... Output switch circuit, 40, 41, 42, 43, 44... Filter circuits, 50... DC power supply, 60... Digital control circuit, 61... First controller, 62... Second controller, 80... Integrated circuit, 80a... PR switch section, 80b... SC switch section, 80c... OS switch section, 80d... FL switch section, 90... Module substrate, 90a, 90b... Main surfaces, 90e... Ground electrode layer, 91... Resin component, 92... Shield electrode layer, 100... Tracker module, 110, 131, 132, 133, 134, 140... Input terminals, 111, 112, 113, 114, 130, 141, 142... Output terminals, 115, 116... Inductor connection terminals, 150... External connection terminals, 601, 602, 603, 604... Control terminals.

Claims

1. A tracker circuit, wherein, it includes: an output switch circuit configured to selectively output at least one voltage of a plurality of discrete voltages to a power amplifier; and a filter circuit connected between the output switch circuit and the power amplifier, the filter circuit includes: a first inductor connected between the output switch circuit and the power amplifier; a first capacitor connected between a path connecting the first inductor and the power amplifier and a ground line; and a first switch connected between the output switch circuit and the power amplifier without passing through the first inductor.

2. The tracker circuit according to claim 1, wherein, the filter circuit further includes a second inductor, and the second inductor is connected in series with the first capacitor between a path connecting the first inductor and the power amplifier and a ground line.

3. The tracker circuit according to claim 1 or 2, wherein, the filter circuit further includes: a third inductor connected between the first inductor and the power amplifier; a second capacitor connected between a path connecting the third inductor and the power amplifier and a ground line; and a second switch connected between the output switch circuit and the power amplifier without passing through the first inductor and the third inductor, the first switch is connected between the output switch circuit and the third inductor without passing through the first inductor.

4. The tracker circuit according to claim 3, wherein, the filter circuit further includes a fourth inductor, and the fourth inductor is connected in series with the second capacitor between a path connecting the third inductor and the power amplifier and a ground line.

5. The tracker circuit according to claim 3 or 4, wherein, the filter circuit further includes a third switch, and the third switch is connected between the first inductor and the power amplifier without passing through the third inductor.

6. The tracker circuit according to any one of claims 3 to 5, wherein, the filter circuit further includes: a fourth switch connected between the third inductor and the power amplifier; a fifth inductor connected between the fourth switch and the power amplifier; and a fifth switch connected between the third inductor and the power amplifier without passing through the fourth switch and the fifth inductor, the second capacitor is connected between a path connecting the fourth switch and the fifth inductor and a ground line.

7. The tracker circuit according to any one of claims 1 to 6, wherein, the first switch and the output switch circuit are included in an integrated circuit disposed on a module substrate.

8. The tracker circuit according to claim 7, wherein, the first inductor is disposed adjacent to the integrated circuit on the module substrate.

9. The tracker circuit according to claim 2, wherein, the first switch and the output switch circuit are included in an integrated circuit disposed on a module substrate, The above-described first inductor is disposed adjacent to the above-described integrated circuit on the above-described module substrate. At least one of the above-described first capacitor and the above-described second inductor is disposed adjacent to the above-described first inductor on the above-described module substrate.

10. A tracker circuit wherein comprises: an external connection terminal connected to a power amplifier; an output switch circuit configured to selectively output at least one voltage of a plurality of discrete voltages to the external connection terminal; and a filter circuit connected between the output switch circuit and the external connection terminal, the filter circuit including: a first inductor connected between the output switch circuit and the external connection terminal; a first capacitor connected between a path connecting the first inductor and the external connection terminal and a ground line; and a first switch connected between the output switch circuit and the external connection terminal, one end of the first switch being connected to one end of the first inductor, and the other end of the first switch being connected to the other end of the first inductor.

11. The tracker circuit according to claim 10, wherein the filter circuit further includes a second inductor, and the second inductor is connected in series with the first capacitor between a path connecting the first inductor and the external connection terminal and a ground line.

12. The tracker circuit according to claim 10 or 11, wherein the filter circuit further includes: a third inductor connected between the first inductor and the external connection terminal; a second capacitor connected between a path connecting the third inductor and the external connection terminal and a ground line; and a second switch connected between the output switch circuit and the external connection terminal, one end of the second switch being connected to a path connecting the output switch circuit and the first inductor, and the other end of the second switch being connected to a path connecting the third inductor and the external connection terminal.

13. The tracker circuit according to claim 12, wherein the filter circuit further includes a fourth inductor, and the fourth inductor is connected in series with the second capacitor between a path connecting the third inductor and the external connection terminal and a ground line.

14. The tracker circuit according to claim 12 or 13, wherein the filter circuit further includes a third switch connected between the first inductor and the external connection terminal, one end of the third switch being connected to one end of the third inductor, and the other end of the third switch being connected to the other end of the third inductor.

15. The tracker circuit according to any one of claims 12 to 14, wherein the filter circuit further includes: a fourth switch connected between the third inductor and the external connection terminal; a fifth inductor connected between the fourth switch and the external connection terminal; and a fifth switch connected between the third inductor and the external connection terminal, One end of the fourth switch is connected to the third inductor, and the other end of the fourth switch is connected to one end of the fifth inductor. One end of the fifth switch is connected to the third inductor, and the other end of the fifth switch is connected to the other end of the fifth inductor. The second capacitor is connected between the path connecting the fourth switch and the fifth inductor and the ground.

16. The tracker circuit according to any one of claims 10 to 15, wherein, the first switch and the output switch circuit are included in an integrated circuit disposed on the module substrate.

17. The tracker circuit according to claim 16, wherein, the first inductor is disposed adjacent to the integrated circuit on the module substrate.

18. The tracker circuit according to claim 11, wherein, the first switch and the output switch circuit are included in an integrated circuit disposed on the module substrate, the first inductor is disposed adjacent to the integrated circuit on the module substrate, at least one of the first capacitor and the second inductor is disposed adjacent to the first inductor on the module substrate.

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