Methods, apparatus, equipment, and storage media for measuring voltage at differential pins of chips.

Abstract

The present disclosure provides a chip differential pin voltage measurement method, device, equipment and storage medium, by pre-setting the differential mode voltage threshold and common mode voltage threshold, collecting the voltage high-low comparison result of the differential mode voltage of the chip differential pin group and the differential mode voltage threshold, and the voltage high-low comparison result of the common mode voltage of the differential pin group and the common mode voltage threshold, when the voltage high-low comparison result of the differential mode voltage and the differential mode voltage threshold meets the preset differential mode voltage comparison result, and the voltage high-low comparison result of the common mode voltage and the common mode voltage threshold meets the preset common mode voltage comparison result, the differential mode voltage threshold is determined as the actual differential mode voltage, and the common mode voltage threshold is determined as the actual common mode voltage, so that the actual voltage value of each differential pin in the differential pin group can be calculated according to the actual differential mode voltage and the actual common mode voltage, the synchronous voltage measurement of each differential pin of the chip is realized, and the accuracy and reliability of the voltage measurement result are improved.

Description

Technical Field

[0001] This disclosure relates to automated testing techniques, and in particular to a method, apparatus, device, and storage medium for measuring the voltage of differential pins of a chip. Background Technology

[0002] During chip testing, in order to intuitively display the voltage changes at the differential pins of the chip, chip voltage waveform display software can be used to obtain the voltage values ​​at the differential pins of the chip and draw the corresponding voltage waveforms.

[0003] Currently available chip voltage waveform display software typically collects the voltage values ​​of one end of the chip's differential pin group at a fixed frequency. The voltage value of the other end is calculated by symmetrical padding. This measurement method can only ensure the accuracy of the voltage value of one end, while the voltage value of the other end may differ from the actual voltage value. Summary of the Invention

[0004] To address the aforementioned technical problems, this disclosure provides a method, apparatus, device, and storage medium for measuring the voltage of differential pins of a chip.

[0005] One aspect of this disclosure provides a method for measuring the voltage of a chip's differential pins, including:

[0006] Receive voltage sampling data, which includes a comparison result of the differential mode voltage of the differential pin group of the chip under test with the voltage level of the differential mode voltage threshold, and a comparison result of the common mode voltage of the differential pin group with the voltage level of the common mode voltage threshold.

[0007] The voltage sampling data is verified to determine whether the voltage comparison result between the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and to determine whether the voltage comparison result between the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result.

[0008] In response to the voltage sampling data verification being passed, the differential mode voltage threshold is determined as the actual differential mode voltage value of the differential pin group, and the common mode voltage threshold is determined as the actual common mode voltage value of the differential pin group;

[0009] Based on the actual differential voltage value and the actual common-mode voltage value, calculate the actual voltage value of each differential pin in the differential pin group.

[0010] Optionally, the differential-mode voltage threshold includes a differential-mode high voltage threshold and a differential-mode low voltage threshold, and the common-mode voltage threshold includes a common-mode high voltage threshold and a common-mode low voltage threshold;

[0011] The step of determining the differential-mode voltage threshold as the actual differential-mode voltage value of the differential pin group and the common-mode voltage threshold as the actual common-mode voltage value of the differential pin group in response to the voltage sampling data verification passing includes:

[0012] In response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, the differential mode low voltage threshold is determined as the actual differential mode voltage value;

[0013] In response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold, the differential mode high voltage threshold is determined as the actual differential mode voltage value;

[0014] In response to the common-mode voltage being less than or equal to the common-mode low voltage threshold, the common-mode low voltage threshold is determined as the actual common-mode voltage value;

[0015] In response to the common-mode voltage being greater than or equal to the common-mode high voltage threshold, the common-mode high voltage threshold is determined as the actual common-mode voltage value.

[0016] Optionally, the received voltage sampling data includes:

[0017] Receive the voltage sampling data at at least two voltage sampling times;

[0018] The calculation of the actual voltage value of each differential pin in the differential pin group based on the actual differential voltage value and the actual common-mode voltage value includes:

[0019] Based on the actual differential voltage value and the actual common-mode voltage value at the at least two voltage sampling times, calculate the actual voltage value of each differential pin in the differential pin group at the at least two voltage sampling times;

[0020] The method further includes:

[0021] Based on the actual voltage values ​​of each differential pin at the at least two voltage sampling times, a voltage waveform diagram of each differential pin is generated.

[0022] Optionally, the method further includes:

[0023] In response to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold, the differential mode high voltage threshold is lowered and the differential mode low voltage threshold is raised according to a first preset adjustment step size; the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold are sent to reacquire the voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold;

[0024] In response to the common-mode voltage being greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold, the common-mode high voltage threshold is lowered and the common-mode low voltage threshold is raised according to a second preset adjustment step size; the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold are sent to reacquire the voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold.

[0025] Optionally, the method further includes:

[0026] In response to the current voltage sampling time, the differential mode voltage threshold is adjusted, and at the next voltage sampling time, the differential mode voltage threshold is restored to its initial value.

[0027] In response to the current voltage sampling time, the common-mode voltage threshold is adjusted, and at the next voltage sampling time, the common-mode voltage threshold is restored to its initial value.

[0028] Optionally, the method further includes:

[0029] The actual differential voltage value is verified based on the differential voltage verification rules in the configuration file to obtain a first test result of the actual differential voltage value. The first test result includes differential voltage test passed or differential voltage test failed. The differential voltage verification rules include the actual differential voltage value being greater than the target differential voltage value, or the actual differential voltage value being less than the target differential voltage value, or the actual differential voltage value being greater than the target differential voltage value and less than the target differential voltage value.

[0030] The actual common-mode voltage value is verified based on the common-mode voltage verification rules in the configuration file to obtain a second test result of the actual common-mode voltage value. The second test result includes whether the common-mode voltage test passes or fails. The common-mode voltage verification rules include whether the actual common-mode voltage value is greater than the target common-mode high voltage value, or whether the actual common-mode voltage value is less than the target common-mode low voltage value, or whether the actual common-mode voltage value is greater than the target common-mode low voltage value and less than the target common-mode high voltage value.

[0031] Another aspect of this disclosure provides a voltage measurement device for a chip differential pin, comprising:

[0032] The receiving module is used to receive voltage sampling data, which includes a comparison result of the differential mode voltage of the differential pin group of the chip under test with the voltage level of the differential mode voltage threshold, and a comparison result of the common mode voltage of the two differential pin groups with the voltage level of the common mode voltage threshold.

[0033] The verification module is used to verify the voltage sampling data, determine whether the voltage comparison result between the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and determine whether the voltage comparison result between the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result.

[0034] The determination module is used to determine the differential voltage threshold as the actual differential voltage value of the differential pin group and the common mode voltage threshold as the actual common mode voltage value of the differential pin group in response to the voltage sampling data verification passing.

[0035] The calculation module is used to calculate the actual voltage value of each differential pin in the differential pin group based on the actual differential voltage value and the actual common-mode voltage value.

[0036] In another aspect of this disclosure, an electronic device is provided, comprising:

[0037] Memory, used to store computer programs;

[0038] A processor is configured to execute a computer program stored in the memory, wherein, when the computer program is executed, it implements the methods described above.

[0039] In another aspect of this disclosure, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the methods described above.

[0040] In another aspect of this disclosure, a computer program is provided, including computer program instructions that, when executed by a processor, implement the method described above.

[0041] Based on the embodiments of this disclosure, by pre-setting differential-mode voltage threshold and common-mode voltage threshold, and collecting the voltage comparison results of differential-mode voltage and differential-mode voltage threshold of the chip differential pin group, as well as the voltage comparison results of common-mode voltage and common-mode voltage threshold of the differential pin group, when the voltage comparison results of differential-mode voltage and differential-mode voltage threshold satisfy the preset differential-mode voltage comparison result, and the voltage comparison results of common-mode voltage and common-mode voltage threshold satisfy the preset common-mode voltage comparison result, the differential-mode voltage threshold is determined as the actual differential-mode voltage, and the common-mode voltage threshold is determined as the actual common-mode voltage. Thus, the actual voltage value of each differential pin in the differential pin group can be calculated based on the actual differential-mode voltage and the actual common-mode voltage, realizing synchronous voltage measurement of each differential pin of the chip, and improving the accuracy and reliability of voltage measurement results.

[0042] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0043] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0044] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:

[0045] Figure 1 This is a flowchart of an embodiment of the voltage measurement method for the differential pins of the chip disclosed herein;

[0046] Figure 2 A flowchart illustrating another embodiment of the voltage measurement method for the differential pins of the chip disclosed herein;

[0047] Figure 3 A flowchart illustrating another embodiment of the voltage measurement method for the differential pins of the chip disclosed herein;

[0048] Figure 4 This is a schematic diagram of the structure of an embodiment of the voltage measurement device for the differential pins of the chip disclosed herein;

[0049] Figure 5 This is a schematic diagram of another embodiment of the voltage measurement device for the differential pins of the chip disclosed herein;

[0050] Figure 6 This is a schematic diagram of another embodiment of the voltage measurement device for the differential pins of the chip disclosed herein;

[0051] Figure 7 This is a schematic diagram of the structure of an application embodiment of the electronic device disclosed herein. Detailed Implementation

[0052] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present disclosure.

[0053] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this disclosure are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0054] It should also be understood that in the embodiments disclosed herein, "a plurality of" may refer to two or more, and "at least one" may refer to one, two or more.

[0055] It should also be understood that any component, data or structure mentioned in the embodiments of this disclosure can generally be understood as one or more unless expressly defined or given to the contrary in the context.

[0056] Furthermore, the term "and / or" in this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this disclosure generally indicates that the preceding and following related objects have an "or" relationship.

[0057] It should also be understood that the description of the various embodiments in this disclosure emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0058] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0059] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use.

[0060] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0061] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0062] Figure 1 This is a flowchart illustrating a method for measuring the voltage of a chip differential pin, provided as an exemplary embodiment of this disclosure. The method for measuring the voltage of a chip differential pin according to this disclosure can be applied to electronic devices, such as a host computer in a chip testing system.

[0063] like Figure 1 As shown, the method includes the following steps:

[0064] Step 101: Receive voltage sampling data.

[0065] The voltage sampling data includes the comparison results of the differential mode voltage of the differential pin group of the chip under test with the differential mode voltage threshold, and the comparison results of the common mode voltage of the differential pin group with the common mode voltage threshold.

[0066] In this context, the differential pin group of the chip under test (DUT) refers to a group of pins on the DUT used to transmit differential signals. It typically includes two pins: the P-pin and the N-pin. The differential-mode voltage is the voltage difference between the two differential pins in the differential pin group, while the common-mode voltage is the average voltage of the two differential pins in the differential pin group.

[0067] In one possible implementation, the differential pin group of the chip under test (DUT) is connected to a test board, which is responsible for acquiring voltage sampling data and sending the voltage sampling data to the electronic device. Since the test board cannot directly measure the actual voltage value of each differential pin, the method provided in this disclosure can preset differential-mode voltage thresholds and common-mode voltage thresholds, and provide corresponding voltage values ​​to the test unit in the test board. Simultaneously, the test unit is connected to the differential pin group of the DUT, receiving the differential-mode voltage and common-mode voltage of the differential pin group, thereby obtaining a comparison result of the differential-mode voltage and the differential-mode voltage threshold, as well as a comparison result of the common-mode voltage and the common-mode voltage threshold. For example, this test unit can be equipped with a voltage comparator. One input of the comparator is connected to the differential pin group to receive the differential-mode voltage of the differential pin group, and the other input is connected to the power supply circuit to receive an input voltage whose value is a differential-mode voltage threshold. The comparator then outputs the comparison result of the voltage levels at the two inputs; for example, a high voltage signal is output when the differential-mode voltage is higher than the differential-mode voltage threshold, and a low voltage signal is output when the differential-mode voltage is lower than the differential-mode voltage threshold. Correspondingly, another voltage comparator can be used to compare the common-mode voltage with the common-mode voltage threshold.

[0068] Optionally, the host computer can send pre-set differential mode voltage threshold and common mode voltage threshold to the test board. After completing the test, the test board stores the voltage sampling data in memory. After the host computer sends a sampling data acquisition request, the test board sends the voltage sampling data to the host computer.

[0069] Step 102: Verify the voltage sampling data to determine whether the voltage comparison result between the differential mode voltage and the differential mode voltage threshold is the preset differential mode voltage comparison result, and to determine whether the voltage comparison result between the common mode voltage and the common mode voltage threshold is the preset common mode voltage comparison result.

[0070] Since differential voltage typically includes at least two voltage values, high voltage and low voltage, the corresponding differential-mode voltage and common-mode voltage also include at least two cases, high voltage and low voltage. Optionally, differential-mode high voltage threshold and differential-mode low voltage threshold can be set for differential-mode voltage, and common-mode high voltage threshold and common-mode low voltage threshold can be set for common-mode voltage.

[0071] Optionally, for differential-mode voltage, a differential-mode high voltage threshold and a differential-mode low voltage threshold can be set. The corresponding preset differential-mode voltage comparison result is that the differential-mode voltage is less than or equal to the differential-mode low voltage threshold or greater than or equal to the differential-mode high voltage threshold. Alternatively, an upper and lower threshold for differential-mode high voltage, as well as an upper and lower threshold for differential-mode low voltage, can be set. The corresponding preset differential-mode voltage comparison result is that the differential-mode voltage is between the upper and lower thresholds for differential-mode high voltage, or between the upper and lower thresholds for differential-mode low voltage. For common-mode voltage, a common-mode high voltage threshold and a common-mode low voltage threshold can be set. The corresponding preset common-mode voltage comparison result is that the common-mode voltage is less than or equal to the common-mode low voltage threshold or the common-mode voltage is greater than or equal to the common-mode high voltage threshold. Alternatively, a common-mode high voltage upper limit threshold and a common-mode high voltage lower limit threshold, as well as a common-mode low voltage upper limit threshold and a common-mode low voltage lower limit threshold, can be set. The corresponding preset common-mode voltage comparison result is that the common-mode voltage is between the common-mode high voltage upper limit threshold and the common-mode high voltage lower limit threshold, or the common-mode voltage is between the common-mode low voltage upper limit threshold and the common-mode low voltage lower limit threshold.

[0072] Step 103: In response to the successful verification of the voltage sampling data, the differential mode voltage threshold is determined as the actual differential mode voltage value of the differential pin group, and the common mode voltage threshold is determined as the actual common mode voltage value of the differential pin group.

[0073] Optionally, if the voltage sampling data verification passes, the differential-mode voltage threshold can be determined as the actual differential-mode voltage value of the differential pin group, and the common-mode voltage threshold can be determined as the actual common-mode voltage value of the differential pin group. If the voltage sampling data verification fails, the differential-mode voltage threshold and the common-mode voltage threshold can be updated, and sampling and verification can be performed again based on the updated differential-mode voltage threshold and the common-mode voltage threshold until the voltage sampling data verification passes, thereby probing the actual differential-mode voltage value and the actual common-mode voltage value.

[0074] Step 104: Calculate the actual voltage value of each differential pin in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value.

[0075] Optionally, a set of equations can be established based on the relationship between differential-mode voltage, common-mode voltage and the voltage of each differential pin, and then the actual voltage value of each differential pin in the differential pin group can be obtained by solving the equations.

[0076] Schematic representation: A differential pin group includes two differential pins. Assume the actual voltage value of one differential pin is P, and the actual voltage value of the other differential pin is N. P and N are obtained by solving the following system of equations:

[0077]

[0078] Where VDM is the actual differential-mode voltage value and VCM is the actual common-mode voltage value.

[0079] Based on the embodiments of this disclosure, by pre-setting differential-mode voltage threshold and common-mode voltage threshold, and collecting the voltage comparison results of differential-mode voltage and differential-mode voltage threshold of the chip differential pin group, as well as the voltage comparison results of common-mode voltage and common-mode voltage threshold of the differential pin group, when the voltage comparison results of differential-mode voltage and differential-mode voltage threshold satisfy the preset differential-mode voltage comparison result, and the voltage comparison results of common-mode voltage and common-mode voltage threshold satisfy the preset common-mode voltage comparison result, the differential-mode voltage threshold is determined as the actual differential-mode voltage, and the common-mode voltage threshold is determined as the actual common-mode voltage. Thus, the actual voltage value of each differential pin in the differential pin group can be calculated based on the actual differential-mode voltage and the actual common-mode voltage, realizing synchronous voltage measurement of each differential pin of the chip, and improving the accuracy and reliability of voltage measurement results.

[0080] In one possible implementation, the differential-mode voltage threshold includes a differential-mode high voltage threshold and a differential-mode low voltage threshold, and the common-mode voltage threshold includes a common-mode high voltage threshold and a common-mode low voltage threshold. Step 103 above may specifically include the following steps:

[0081] Step 103a: In response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, the differential mode low voltage threshold is determined as the actual differential mode voltage value.

[0082] Step 103b: In response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold, the differential mode high voltage threshold is determined as the actual differential mode voltage value.

[0083] Optionally, the preset differential-mode voltage comparison result is either a differential-mode voltage less than or equal to a differential-mode low voltage threshold or a differential-mode voltage greater than or equal to a differential-mode high voltage threshold. If the differential-mode voltage is less than or equal to the differential-mode low voltage threshold, then it is a differential-mode low voltage, and the differential-mode low voltage threshold can be determined as the actual differential-mode voltage value; if the differential-mode voltage is greater than or equal to the differential-mode high voltage threshold, then it is a differential-mode high voltage, and the differential-mode high voltage threshold can be determined as the actual differential-mode voltage value.

[0084] Step 103c: In response to the common-mode voltage being less than or equal to the common-mode low voltage threshold, the common-mode low voltage threshold is determined as the actual common-mode voltage value.

[0085] Step 103d: In response to the common-mode voltage being greater than or equal to the common-mode high voltage threshold, the common-mode high voltage threshold is determined as the actual common-mode voltage value.

[0086] Optionally, the preset common-mode voltage comparison result is either a common-mode voltage less than or equal to a common-mode low voltage threshold or a common-mode voltage greater than or equal to a common-mode high voltage threshold. If the common-mode voltage is less than or equal to the common-mode low voltage threshold, then it is considered a common-mode low voltage, and the common-mode low voltage threshold can be determined as the actual common-mode voltage value; if the common-mode voltage is greater than or equal to the common-mode high voltage threshold, then it is considered a common-mode high voltage, and the common-mode high voltage threshold can be determined as the actual common-mode voltage value.

[0087] In one possible implementation, the test board can collect voltage sampling data at a preset frequency. The host computer can determine the actual voltage values ​​of each differential pin at multiple moments based on the received voltage sampling data, thereby generating a voltage waveform diagram so that technicians can visually observe the voltage changes of the differential pins. For example... Figure 2 As shown, the voltage measurement method for the differential pins of a chip provided in this embodiment may include the following steps:

[0088] Step 201: Receive voltage sampling data at at least two voltage sampling times.

[0089] Optionally, the test board can collect voltage sampling data at a preset frequency and continuously send the collected voltage sampling data to the host computer.

[0090] Step 202: Verify the voltage sampling data to determine whether the voltage comparison result between the differential mode voltage and the differential mode voltage threshold is the preset differential mode voltage comparison result, and to determine whether the voltage comparison result between the common mode voltage and the common mode voltage threshold is the preset common mode voltage comparison result.

[0091] Step 203: In response to the successful verification of voltage sampling data, the differential mode voltage threshold is determined as the actual differential mode voltage value of the differential pin group, and the common mode voltage threshold is determined as the actual common mode voltage value of the differential pin group.

[0092] The specific implementation methods of steps 202 to 203 can be referred to steps 102 to 103 above, and will not be repeated here in the embodiments of this disclosure.

[0093] Step 204: Based on the actual differential-mode voltage value and the actual common-mode voltage value at at least two voltage sampling times, calculate the actual voltage value of each differential pin in the differential pin group at at least two voltage sampling times.

[0094] Accordingly, for each set of voltage sampling data that has passed verification, the actual differential voltage value and the actual common-mode voltage value are determined respectively, and the actual voltage value of the differential pin is calculated to obtain the actual voltage value of each differential pin at each voltage sampling time.

[0095] Step 205: Generate the voltage waveform diagram of each differential pin based on the actual voltage value of each differential pin at at least two voltage sampling times.

[0096] Optionally, chip voltage waveform display software, such as WaveDrom, TimeGen, and WaveView, can be run on the host computer to draw and display the voltage waveform diagrams of each differential pin.

[0097] Based on the embodiments of this disclosure, by setting multiple voltage sampling times, the actual voltage value of each differential pin at at least two voltage sampling times is determined based on the voltage sampling data received at at least two voltage sampling times, thereby generating a voltage waveform diagram so that technicians can intuitively observe the voltage changes of the differential pins.

[0098] In one possible implementation, if the voltage sampling data fails verification, the differential-mode voltage threshold and common-mode voltage threshold can be continuously adjusted until the voltage sampling data passes verification, thereby probing the actual differential-mode voltage value and the actual common-mode voltage value. The voltage measurement method for the chip differential pins provided in this disclosure embodiment may further include the following steps:

[0099] Step 1: In response to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold, the differential mode high voltage threshold is lowered and the differential mode low voltage threshold is raised according to the first preset adjustment step size; the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold are sent to reacquire voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold.

[0100] According to the preset adjustment step size for the differential mode voltage threshold (hereinafter referred to as the first preset adjustment step size), after lowering the differential mode high voltage threshold and raising the differential mode low voltage threshold, the test board can re-acquire voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold. The host computer continues to execute the above steps 101 and 102, and repeats this process until the voltage sampling data verification is passed, then continues to execute the above step 103.

[0101] To illustrate, assuming the differential mode low voltage of a differential pin group is typically around 1V and the differential mode high voltage is typically around 3V, the differential mode low voltage threshold can be preset to 0.9V and the differential mode high voltage threshold to 3.1V. If the differential mode voltage in the voltage sampling data is less than or equal to the differential mode low voltage threshold, the actual differential mode voltage is determined to be 0.9V. If the differential mode voltage is greater than or equal to the differential mode high voltage threshold, the actual differential mode voltage is determined to be 3.1V. If the differential mode voltage is greater than the differential mode low voltage threshold but less than the differential mode high voltage threshold, the differential mode low voltage threshold is increased by 0.1V, i.e., the updated differential mode low voltage threshold is 1.0V, and the differential mode high voltage threshold is decreased by 0.1V, i.e., the updated differential mode high voltage threshold is 3.0V. By continuously expanding the voltage scanning range (i.e., the range of voltage values ​​less than or equal to 1.0V and greater than or equal to 3.0V), the differential mode low voltage threshold or differential mode high voltage threshold gradually approaches the actual differential mode voltage value until the voltage sampling data is verified and the actual differential mode voltage value can be obtained, without the need to set up a complex voltage measurement circuit.

[0102] Step 2: In response to the common-mode voltage being greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold, the common-mode high voltage threshold is lowered and the common-mode low voltage threshold is raised according to the second preset adjustment step size; the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold are sent to reacquire voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold.

[0103] According to the preset adjustment step size for the common-mode voltage threshold (hereinafter referred to as the second preset adjustment step size), after lowering the common-mode high voltage threshold and raising the common-mode low voltage threshold, the test board can re-acquire voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold. The host computer continues to execute the above steps 101 and 102, and so on until the voltage sampling data verification is passed, then continue to execute the above step 103.

[0104] To illustrate, assuming the common-mode low voltage of the differential pin group is typically around 1V and the common-mode high voltage is typically around 3V, the common-mode low voltage threshold can be preset to 0.9V and the common-mode high voltage threshold to 3.1V. If the common-mode voltage in the voltage sampling data is less than or equal to the common-mode low voltage threshold, the actual common-mode voltage is determined to be 0.9V. If the common-mode voltage is greater than or equal to the common-mode high voltage threshold, the actual common-mode voltage is determined to be 3.1V. If the common-mode voltage is greater than the common-mode low voltage threshold but less than the common-mode high voltage threshold, the common-mode low voltage threshold is increased by 0.1V, i.e., the updated common-mode low voltage threshold is 1.0V, and the common-mode high voltage threshold is decreased by 0.1V, i.e., the updated common-mode high voltage threshold is 3.0V. By continuously expanding the voltage scanning range (i.e., the range of voltage values ​​less than or equal to 1.0V and greater than or equal to 3.0V), the common-mode low voltage threshold or common-mode high voltage threshold gradually approaches the actual common-mode voltage value until the voltage sampling data passes the verification, at which point the actual common-mode voltage value can be obtained without setting up a complex voltage measurement circuit.

[0105] Based on the embodiments of this disclosure, when the voltage sampling data fails the verification, the differential voltage threshold or common mode voltage threshold is continuously adjusted according to a preset step size, and the voltage sampling data and data verification are re-acquired. By continuously expanding the voltage scanning range, the differential voltage threshold and common mode voltage threshold gradually approach the actual differential voltage value and the actual common mode voltage value. The actual voltage value of each differential pin in the differential pin group of the chip can be measured without setting up a complex voltage measurement circuit.

[0106] In one possible implementation, if the differential-mode voltage threshold or common-mode voltage threshold is adjusted due to the voltage sampling data failing verification at the current voltage sampling moment, the differential-mode voltage threshold or common-mode voltage threshold is restored to its initial value at the next voltage sampling moment to continue sampling and verification. This avoids the problem of a large scanning range of the adjusted voltage value due to short-term voltage fluctuations, which could affect the accuracy of subsequent voltage measurements. The voltage measurement method for the differential pins of a chip provided in this disclosure also includes the following steps:

[0107] In response to adjusting the differential-mode voltage threshold at the current voltage sampling time, the differential-mode voltage threshold is restored to its initial value at the next voltage sampling time; in response to adjusting the common-mode voltage threshold at the current voltage sampling time, the common-mode voltage threshold is restored to its initial value at the next voltage sampling time.

[0108] For illustration, the initial value of the differential mode low voltage threshold is 0.9V and the initial value of the differential mode high voltage threshold is 3.1V. If the differential mode low voltage threshold is adjusted to 1.0V and the differential mode high voltage threshold is adjusted to 3.0V at the current voltage sampling time, the differential mode low voltage threshold will be restored to 0.9V and the differential mode high voltage threshold will be restored to 3.1V before collecting voltage sampling data at the next voltage sampling time.

[0109] In one possible implementation, after obtaining the actual differential-mode voltage value and the actual common-mode voltage value, the Pass / Fail result of the differential pin group of the chip under test can be determined based on the target differential-mode voltage value and the target common-mode voltage value preset in the configuration file. The voltage measurement method of the chip differential pins provided in this disclosure embodiment further includes the following steps:

[0110] The actual differential-mode voltage value is verified based on the differential-mode voltage verification rules in the configuration file to obtain a first test result of the actual differential-mode voltage value; the actual common-mode voltage value is verified based on the common-mode voltage verification rules in the configuration file to obtain a second test result of the actual common-mode voltage value.

[0111] The first test result includes either a pass or a failure of the differential mode voltage test. The differential mode voltage verification rules include that the actual differential mode voltage value is greater than the target differential mode high voltage value, or the actual differential mode voltage value is less than the target differential mode low voltage value, or the actual differential mode voltage value is greater than the target differential mode low voltage value and less than the target differential mode high voltage value. The second test result includes either a pass or a failure of the common mode voltage test. The common mode voltage verification rules include that the actual common mode voltage value is greater than the target common mode high voltage value, or the actual common mode voltage value is less than the target common mode low voltage value, or the actual common mode voltage value is greater than the target common mode low voltage value and less than the target common mode high voltage value.

[0112] As an illustration, differential-mode voltage verification rules and common-mode voltage verification rules can be set by configuring the `data` value in the configuration file (Pattern file). For example, a `data` value of H represents a differential-mode voltage verification rule where the actual differential-mode voltage value is greater than the target differential-mode high voltage value; a `data` value of L represents a differential-mode voltage verification rule where the actual differential-mode voltage value is less than the target differential-mode low voltage value; and a `data` value of M represents an actual differential-mode voltage value greater than the target differential-mode low voltage value and less than the target differential-mode high voltage value. Therefore, if the `data` value in the Pattern file is H and the actual differential-mode voltage value is greater than the target differential-mode high voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the `data` value in the Pattern file is L and the actual differential-mode voltage value is less than the target differential-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the `data` value in the Pattern file is M and the actual differential-mode voltage value is less than the target differential-mode high voltage value and greater than the target differential-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. Correspondingly, if the data value in the Pattern file is H and the actual common-mode voltage value is greater than the target common-mode high voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the data value in the Pattern file is L and the actual common-mode voltage value is less than the target common-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail. If the data value in the Pattern file is M and the actual common-mode voltage value is less than the target common-mode high voltage value but greater than the target common-mode low voltage value, the Pass / Fail result is Pass; otherwise, it is Fail.

[0113] In combination with the above method embodiments, Figure 3 A flowchart illustrating differential pin voltage measurement in an electronic device is shown, such as... Figure 3 As shown, the process may include the following steps:

[0114] 1. Set the preset frequency. This preset frequency refers to the frequency at which the test board collects voltage sampling data.

[0115] 2. Set differential-mode voltage threshold and common-mode voltage threshold. Electronic devices can send threshold setting commands carrying differential-mode voltage threshold and common-mode voltage threshold to the test board, enabling the test board to obtain the differential-mode voltage threshold and common-mode voltage threshold through the command.

[0116] 3. Run the test program. After running the test program, the electronic device can send a test request to the test board, causing the test board to collect voltage sampling data.

[0117] 4. Acquire voltage sampling data. Electronic devices can send a sampling data acquisition request to the test board, causing the test board to send voltage sampling data.

[0118] 5. Verify the differential mode voltage. If the differential mode voltage verification passes, proceed to step 7; if the differential mode voltage verification fails, skip step 7 and proceed directly to step 9.

[0119] 6. Verify the common-mode voltage. If the common-mode voltage verification passes, proceed to step 8; if the common-mode voltage verification fails, skip step 8 and proceed directly to step 9.

[0120] There is no strict order of execution between steps 5 and 6. The electronic device can execute step 5 first, or step 6 first, or execute steps 5 and 6 simultaneously.

[0121] 7. Store the actual differential voltage value. If the differential voltage verification passes, the corresponding differential voltage threshold is stored as the actual differential voltage value.

[0122] 8. Store the actual common-mode voltage value. If the common-mode voltage verification passes, the corresponding common-mode voltage threshold is stored as the actual common-mode voltage value.

[0123] 9. Determine if actual differential-mode voltage and actual common-mode voltage exist. If they exist, proceed to step 11; otherwise, proceed to step 10.

[0124] 10. Adjust the differential-mode voltage threshold and / or common-mode voltage threshold. If no actual differential-mode voltage value exists (i.e., differential-mode voltage verification failed), adjust the differential-mode voltage threshold. If no actual common-mode voltage value exists (i.e., common-mode voltage verification failed), adjust the common-mode voltage threshold. After adjustment, return to step 2 and re-acquire voltage sampling data based on the adjusted differential-mode voltage threshold and / or common-mode voltage threshold.

[0125] 11. Calculate the actual voltage value of each differential pin. Based on the stored actual differential-mode voltage value and actual common-mode voltage value of the differential pin group, the actual voltage value of each differential pin in the differential pin group can be calculated, and after obtaining the actual voltage values ​​at at least two voltage sampling times, the voltage waveform diagram of each differential pin can be generated.

[0126] 12. Calculate the pass / fail results for the differential pin group. The differential-mode voltage verification rules and common-mode voltage verification rules can be set by configuring the `data` value in the configuration file (Pattern file). If the differential-mode voltage meets the differential-mode voltage verification rules in the configuration file, the result is pass; otherwise, it is fail. Similarly, if the common-mode voltage meets the common-mode voltage verification rules in the configuration file, the result is pass; otherwise, it is fail.

[0127] Figure 4This illustration shows a structural block diagram of a voltage measurement device for a chip differential pin according to an exemplary embodiment of the present disclosure. The voltage measurement device for the chip differential pin includes:

[0128] The receiving module 401 is used to receive voltage sampling data, which includes the voltage level comparison results of the differential mode voltage of the differential pin group of the chip under test and the voltage level comparison results of the common mode voltage of the two differential pin groups and the voltage level comparison results of the common mode voltage of the two differential pin groups and the common mode voltage threshold.

[0129] The verification module 402 is used to verify the voltage sampling data received by the receiving module 401, and to determine whether the voltage comparison result between the differential mode voltage and the differential mode voltage threshold is a preset differential mode voltage comparison result, and whether the voltage comparison result between the common mode voltage and the common mode voltage threshold is a preset common mode voltage comparison result.

[0130] The determination module 403 is used to determine the differential voltage threshold as the actual differential voltage value of the differential pin group and the common mode voltage threshold as the actual common mode voltage value of the differential pin group in response to the voltage sampling data verification passing.

[0131] The calculation module 404 is used to calculate the actual voltage value of each differential pin in the differential pin group based on the actual differential voltage value and the actual common-mode voltage value determined by the determination module 403.

[0132] Optionally, in one possible implementation, the differential-mode voltage threshold includes a differential-mode high voltage threshold and a differential-mode low voltage threshold, and the common-mode voltage threshold includes a common-mode high voltage threshold and a common-mode low voltage threshold; the aforementioned determining module 403 can also be used for:

[0133] In response to the differential mode voltage being less than or equal to the differential mode low voltage threshold, the differential mode low voltage threshold is determined as the actual differential mode voltage value;

[0134] In response to a differential-mode voltage greater than or equal to a differential-mode high-voltage threshold, the differential-mode high-voltage threshold is determined as the actual differential-mode voltage value;

[0135] In response to a common-mode voltage less than or equal to a common-mode low voltage threshold, the common-mode low voltage threshold is determined as the actual common-mode voltage value;

[0136] In response to a common-mode voltage greater than or equal to a common-mode high voltage threshold, the common-mode high voltage threshold is determined as the actual common-mode voltage value.

[0137] Optionally, in one possible implementation, the receiving module 401 described above can also be used for:

[0138] Receive voltage sampling data at at least two voltage sampling times;

[0139] The aforementioned calculation module 404 can also be used for:

[0140] Based on the actual differential-mode voltage value and the actual common-mode voltage value at at least two voltage sampling times, calculate the actual voltage value of each differential pin in the differential pin group at at least two voltage sampling times;

[0141] The voltage measurement device for the differential pins of the chip may also include:

[0142] The generation module is used to generate voltage waveforms for each differential pin based on the actual voltage values ​​of each differential pin at at least two voltage sampling times.

[0143] Optionally, in one possible implementation, such as Figure 5 As shown, the voltage measurement device for the differential pins of the chip may further include:

[0144] The first adjustment module 501 is used to respond to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold by adjusting the differential mode high voltage threshold and adjusting the differential mode low voltage threshold by a first preset adjustment step size; and to send the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold to reacquire voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold.

[0145] The second adjustment module 502 is used to respond to a common-mode voltage greater than the common-mode low voltage threshold and less than the common-mode high voltage threshold by adjusting the common-mode high voltage threshold and adjusting the common-mode low voltage threshold according to a second preset adjustment step size; and to send the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold to reacquire voltage sampling data based on the adjusted common-mode high voltage threshold and the adjusted common-mode low voltage threshold.

[0146] Optionally, in one possible implementation, such as Figure 6 As shown, the voltage measurement device for the differential pins of the chip may further include:

[0147] The first recovery module 601 is used to adjust the differential mode voltage threshold in response to the current voltage sampling time, and restore the differential mode voltage threshold to the initial value of the differential mode voltage threshold at the next voltage sampling time.

[0148] The second recovery module 602 is used to adjust the common-mode voltage threshold in response to the current voltage sampling time, and restore the common-mode voltage threshold to its initial value at the next voltage sampling time.

[0149] Optionally, in one possible implementation, the voltage measurement device for the differential pins of the chip may further include:

[0150] The first test module is used to verify the actual differential voltage value based on the differential voltage verification rules in the configuration file, and obtain the first test result of the actual differential voltage value. The first test result includes differential voltage test passed or differential voltage test failed. The differential voltage verification rules include the actual differential voltage value being greater than the target differential voltage value, or the actual differential voltage value being less than the target differential voltage value, or the actual differential voltage value being greater than the target differential voltage value and less than the target differential voltage value.

[0151] The second test module is used to verify the actual common-mode voltage value based on the common-mode voltage verification rules in the configuration file, and obtain a second test result of the actual common-mode voltage value. The second test result includes whether the common-mode voltage test is passed or failed. The common-mode voltage verification rules include whether the actual common-mode voltage value is greater than the target common-mode high voltage value, or whether the actual common-mode voltage value is less than the target common-mode low voltage value, or whether the actual common-mode voltage value is greater than the target common-mode low voltage value and less than the target common-mode high voltage value.

[0152] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. For identical, similar, or corresponding parts between embodiments, please refer to the corresponding sections. Since the method, apparatus, and device embodiments are basically corresponding, relevant parts can be referred to accordingly. The methods, apparatus, and devices in the embodiments of this disclosure also correspond to each other in specific implementation and beneficial technical effects; related content can be referred to mutually and will not be repeated here.

[0153] In addition, this disclosure also provides an electronic device, including:

[0154] Memory, used to store computer programs;

[0155] A processor is configured to execute a computer program stored in the memory, and when the computer program is executed, to implement the voltage measurement method for the differential pins of the chip as described in any of the above embodiments of this disclosure.

[0156] Figure 7 This is a schematic diagram illustrating the structure of an application embodiment of the electronic device disclosed herein. Below, reference is made to… Figure 7 This describes an electronic device according to embodiments of the present disclosure. The electronic device may be either or both of a first device and a second device, or a standalone device independent of them, which may communicate with the first device and the second device to receive acquired input signals from them.

[0157] like Figure 7 As shown, the electronic device includes one or more processors and memory.

[0158] A processor can be a central processing unit (CPU) or other form of processing unit with data processing and / or instruction execution capabilities, and can control other components in an electronic device to perform desired functions.

[0159] The memory may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and a processor may execute the program instructions to implement the voltage measurement methods for the differential pins of the chip according to the various embodiments of this disclosure described above, and / or other desired functions.

[0160] In one example, the electronic device may also include input devices and output devices, which are interconnected via a bus system and / or other forms of connection mechanism (not shown).

[0161] In addition, the input device may include, for example, a keyboard, a mouse, etc.

[0162] This output device can output various information to the outside, including determined distance information, direction information, etc. The output device may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0163] Of course, for the sake of simplicity, Figure 7 Only some of the components of the electronic device relevant to this disclosure are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device may include any other suitable components depending on the specific application.

[0164] In addition to the methods and apparatus described above, embodiments of this disclosure may also be computer program products comprising computer program instructions that, when executed by a processor, cause the processor to perform the steps in the methods for measuring the voltage of differential pins of a chip according to various embodiments of this disclosure as described in the foregoing portions of this specification.

[0165] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this disclosure. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on a user's computing device, partially on a user's computing device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0166] Furthermore, embodiments of this disclosure may also be computer-readable storage media storing computer program instructions that, when executed by a processor, cause the processor to perform the steps in the voltage measurement methods for chip differential pins according to various embodiments of this disclosure as described in the foregoing portion of this specification.

[0167] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0168] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as ROM, RAM, magnetic disk, or optical disk.

[0169] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0170] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0171] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0172] The methods and apparatus of this disclosure may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of this disclosure are not limited to the order specifically described above unless otherwise specifically stated. Furthermore, in some embodiments, this disclosure may also be implemented as a program recorded on a recording medium, the program including machine-readable instructions for implementing the methods according to this disclosure. Thus, this disclosure also covers recording media storing programs for performing the methods according to this disclosure.

[0173] It should also be noted that in the apparatus, devices, and methods of this disclosure, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions to this disclosure.

[0174] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0175] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A method of voltage measurement of a chip differential pin, characterized in that, The method comprises the following steps: receiving voltage sampling data, the voltage sampling data comprising voltage high-low comparison results of a differential mode voltage of a differential pin group of a chip to be tested and a differential mode voltage threshold value, and voltage high-low comparison results of a common mode voltage of the differential pin group to a common mode voltage threshold value; verifying the voltage sampling data to determine whether the voltage high-low comparison results of the differential mode voltage to the differential mode voltage threshold value are preset differential mode voltage comparison results, and whether the voltage high-low comparison results of the common mode voltage to the common mode voltage threshold value are preset common mode voltage comparison results, wherein the differential mode voltage threshold value comprises a differential mode high voltage threshold value and a differential mode low voltage threshold value, the common mode voltage threshold value comprises a common mode high voltage threshold value and a common mode low voltage threshold value, the preset differential mode voltage comparison results refer to that the differential mode voltage is less than or equal to the differential mode low voltage threshold value or the differential mode voltage is greater than or equal to the differential mode high voltage threshold value, the preset common mode voltage comparison results refer to that the common mode voltage is less than or equal to the common mode low voltage threshold value or the common mode voltage is greater than or equal to the common mode high voltage threshold value, when the voltage high-low comparison results of the differential mode voltage to the differential mode voltage threshold value are the preset differential mode voltage comparison results, and the voltage high-low comparison results of the common mode voltage to the common mode voltage threshold value are the preset common mode voltage comparison results, it is determined that the voltage sampling data verification is passed; in response to the voltage sampling data verification being passed, determining the differential mode voltage threshold value as an actual differential mode voltage value of the differential pin group, and determining the common mode voltage threshold value as an actual common mode voltage value of the differential pin group; based on the actual differential mode voltage value and the actual common mode voltage value, calculating actual voltage values of differential pins in the differential pin group; the response to the voltage sampling data verification being passed, the determination of the differential mode voltage threshold value as the actual differential mode voltage value of the differential pin group, and the determination of the common mode voltage threshold value as the actual common mode voltage value of the differential pin group, comprises: in response to the differential mode voltage being less than or equal to the differential mode low voltage threshold value, determining the differential mode low voltage threshold value as the actual differential mode voltage value; in response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold value, determining the differential mode high voltage threshold value as the actual differential mode voltage value; in response to the common mode voltage being less than or equal to the common mode low voltage threshold value, determining the common mode low voltage threshold value as the actual common mode voltage value; in response to the common mode voltage being greater than or equal to the common mode high voltage threshold value, determining the common mode high voltage threshold value as the actual common mode voltage value.

2. The method of claim 1, wherein, the receiving of the voltage sampling data comprises: receiving the voltage sampling data at at least two voltage sampling time points; the calculation of the actual voltage values of the differential pins in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value comprises: based on the actual differential mode voltage value and the actual common mode voltage value at the at least two voltage sampling time points, calculating actual voltage values of the differential pins in the differential pin group at the at least two voltage sampling time points, respectively; the method further comprises: Based on actual voltage values of each differential pin at the at least two voltage sampling time points, a voltage waveform diagram of each differential pin is generated.

3. The method of claim 1, wherein, The method further comprises: in response to the differential mode voltage being greater than the differential mode low voltage threshold and less than the differential mode high voltage threshold, adjusting the differential mode high voltage threshold downward and the differential mode low voltage threshold upward by a first preset adjustment step; and sending the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold to reacquire the voltage sampling data based on the adjusted differential mode high voltage threshold and the adjusted differential mode low voltage threshold; in response to the common mode voltage being greater than the common mode low voltage threshold and less than the common mode high voltage threshold, adjusting the common mode high voltage threshold downward and the common mode low voltage threshold upward by a second preset adjustment step; and sending the adjusted common mode high voltage threshold and the adjusted common mode low voltage threshold to reacquire the voltage sampling data based on the adjusted common mode high voltage threshold and the adjusted common mode low voltage threshold.

4. The method of claim 3, wherein, The method further comprises: in response to adjusting the differential mode voltage threshold at the current voltage sampling time point, restoring the differential mode voltage threshold to an initial value of the differential mode voltage threshold at the next voltage sampling time point; in response to adjusting the common mode voltage threshold at the current voltage sampling time point, restoring the common mode voltage threshold to an initial value of the common mode voltage threshold at the next voltage sampling time point.

5. The method according to any one of claims 1 to 4, characterized in that, The method further comprises: verifying the actual differential mode voltage value based on a differential mode voltage verification rule in a configuration file to obtain a first test result of the actual differential mode voltage value, the first test result including a differential mode voltage test pass or a differential mode voltage test fail, the differential mode voltage verification rule including that the actual differential mode voltage value is greater than a target differential mode high voltage value, or the actual differential mode voltage value is less than a target differential mode low voltage value, or the actual differential mode voltage value is greater than the target differential mode low voltage value and less than the target differential mode high voltage value, wherein the first test result is the differential mode voltage test pass when the actual differential mode voltage value satisfies the differential mode voltage verification rule, and the first test result is the differential mode voltage test fail when the actual differential mode voltage value does not satisfy the differential mode voltage verification rule; verifying the actual common mode voltage value based on a common mode voltage verification rule in the configuration file to obtain a second test result of the actual common mode voltage value, the second test result including a common mode voltage test pass or a common mode voltage test fail, the common mode voltage verification rule including that the actual common mode voltage value is greater than a target common mode high voltage value, or the actual common mode voltage value is less than a target common mode low voltage value, or the actual common mode voltage value is greater than the target common mode low voltage value and less than the target common mode high voltage value, wherein the second test result is the common mode voltage test pass when the actual common mode voltage value satisfies the common mode voltage verification rule, and the second test result is the common mode voltage test fail when the actual common mode voltage value does not satisfy the common mode voltage verification rule.

6. A voltage measurement apparatus for a chip differential pin, characterized by, comprises: The receiving module is configured to receive voltage sampling data, wherein the voltage sampling data comprises voltage high-low comparison results of a differential mode voltage of a differential pin group of a chip to be tested and a differential mode voltage threshold value, and voltage high-low comparison results of a common mode voltage of the differential pin group to a common mode voltage threshold value; The checking module is configured to check the voltage sampling data, and determine whether the voltage high-low comparison results of the differential mode voltage to the differential mode voltage threshold value are preset differential mode voltage comparison results, and whether the voltage high-low comparison results of the common mode voltage to the common mode voltage threshold value are preset common mode voltage comparison results, wherein the differential mode voltage threshold value comprises a differential mode high voltage threshold value and a differential mode low voltage threshold value, the common mode voltage threshold value comprises a common mode high voltage threshold value and a common mode low voltage threshold value, the preset differential mode voltage comparison results refer to that the differential mode voltage is less than or equal to the differential mode low voltage threshold value or the differential mode voltage is greater than or equal to the differential mode high voltage threshold value, and the preset common mode voltage comparison results refer to that the common mode voltage is less than or equal to the common mode low voltage threshold value or the common mode voltage is greater than or equal to the common mode high voltage threshold value; when the voltage high-low comparison results of the differential mode voltage to the differential mode voltage threshold value are the preset differential mode voltage comparison results, and the voltage high-low comparison results of the common mode voltage to the common mode voltage threshold value are the preset common mode voltage comparison results, it is determined that the voltage sampling data passes the check. The determining module is configured to, in response to the voltage sampling data passing the check, determine the differential mode voltage threshold value as an actual differential mode voltage value of the differential pin group, and determine the common mode voltage threshold value as an actual common mode voltage value of the differential pin group; the determining module is further configured to, in response to the differential mode voltage being less than or equal to the differential mode low voltage threshold value, determine the differential mode low voltage threshold value as the actual differential mode voltage value; in response to the differential mode voltage being greater than or equal to the differential mode high voltage threshold value, determine the differential mode high voltage threshold value as the actual differential mode voltage value; in response to the common mode voltage being less than or equal to the common mode low voltage threshold value, determine the common mode low voltage threshold value as the actual common mode voltage value; and in response to the common mode voltage being greater than or equal to the common mode high voltage threshold value, determine the common mode high voltage threshold value as the actual common mode voltage value. The calculating module is configured to calculate actual voltage values of differential pins in the differential pin group based on the actual differential mode voltage value and the actual common mode voltage value.

7. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the method in any one of claims 1-5.

8. An electronic device, comprising: The computer program is executed by the processor to implement the method in any one of claims 1-5. The computer program is executed by the processor to implement the method in any one of claims 1-5. ​ 9. A computer program comprising computer program instructions, characterised in that, ​

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