Image processing algorithm verification method and system

Abstract

The invention discloses an image processing algorithm verification method and system, the system comprises a PC and an image processing algorithm verification platform, and the image processing algorithm verification platform comprises a control unit, an ISP processing unit, an image freezing unit, an image display unit and the like. The PC freezes a frame of image in any processing flow of the ISP, the frame of image is processed by an algorithm of any flow of the ISP processing unit and then is accessed to the rest ISP flow to be output to the first image display unit, meanwhile, the image sending unit transmits the frame of image to the PC, and the frame of image is processed by a to-be-verified image processing algorithm and then is looped back to the image processing algorithm verification platform. And an ISP node with the same algorithm as any flow of the ISP processing unit is accessed and then displayed to the second image display unit. According to the method, the algorithm of any flow of the ISP can be subjected to PC verification and then returned to the system to be compared with the original algorithm, the verification result is ensured to be consistent with the actual effect, and the verification result abnormity caused by software and hardware factors is eliminated.

Description

Technical Field

[0001] The present invention relates to the technical field of image processing, and particularly relates to a method and system for verifying an image processing algorithm. Background Art

[0002] Currently, the development of image processing algorithms is usually carried out on a PC for simulation verification, and then selected according to the difficulty of algorithm implementation and platform resources. Usually, many image processing algorithms need to be modified or simplified before they can be deployed on the underlying platform.

[0003] When developing an image processing algorithm, it is necessary to obtain the original image of the image processing platform according to the specific implementation scenario, and perform simulation processing to obtain the processing effect. In the process of image algorithm verification, most of the existing technologies are to verify the feasibility of the algorithm using the corresponding image processing software on a PC, and then simplify and transplant the algorithm to the image processing platform for verification. Since the specific image processing platform may have limited resources, and there may be incompatibility when verifying a single algorithm with other algorithms, the effect cannot be exactly the same as that on the PC. And because the PC monitor may be different from the monitor connected to the specific algorithm implementation platform, the verification effect has a large difference, and the most realistic verification effect and conclusion of the image algorithm cannot be obtained. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to: obtain the image data of each processing flow of the image processing platform in real time, transmit it to the PC for algorithm processing, and be able to loop the image processed by the PC algorithm back into the image processing platform for verification and comparison with the image without PC algorithm processing, so as to obtain the most realistic algorithm verification effect.

[0005] In order to solve the above technical problem, the technical solution adopted by the present invention is:

[0006] An image processing algorithm verification system, the system includes a PC and an image processing algorithm verification platform. After the PC sends a command through a serial communication interface to obtain the image of the image processing algorithm verification platform for algorithm verification, it is then looped back into the image processing algorithm verification platform through a high-speed data transmission interface.

[0007] The image processing algorithm verification platform includes a communication control unit, an ISP processing unit, an image freezing unit, an image display unit, an image receiving unit, and an image sending unit. The image processing algorithm verification platform is mainly used to parse the commands sent by the PC, perform ISP processing on the image, freeze the image, and perform two-way transmission of image data with the PC through a high-speed data transmission interface.

[0008] Furthermore, the communication control unit serves as the control center of the entire system to control each unit of the image processing algorithm verification platform.

[0009] The ISP processing unit mainly implements a series of algorithmic processes for the image and finally sends it to the image display unit for display.

[0010] The image freezing unit mainly implements the interception of images in any process in the ISP processing unit.

[0011] The image display unit mainly implements the display of the final image.

[0012] The image receiving unit mainly receives the image verified by the algorithm and returned by the PC.

[0013] The image sending unit implements the transmission of the image frozen by the image freezing unit to the PC through a high-speed data transmission interface.

[0014] Further, the high-speed transmission interface is at least one of PCIE, HDMI, and USB.

[0015] Further, the ISP processing unit includes at least one of color interpolation, Bayer noise reduction, white balance, detail enhancement, color enhancement, and image denoising.

[0016] The present invention also provides an image processing algorithm verification method, which is applied to an image processing algorithm verification system including a PC and an image processing algorithm verification platform, and includes the following steps:

[0017] S1. The PC sends a command to the image processing algorithm verification platform to obtain an image img_1 in any process of the ISP process;

[0018] S2. After the communication control unit parses the command, it controls the image freezing unit to freeze img_1 to obtain img_2;

[0019] S3. The image sending unit uses the high-speed transmission interface to send img_2 to the PC;

[0020] S4. The image processing algorithm verification platform processes img_2 using the algorithm of any process of the ISP processing unit, accesses the remaining ISP processing units, and then sends it to the first image display unit;

[0021] S5. The PC processes img_2 using the image processing algorithm to be verified to obtain img_3, and img_3 is looped back to the image receiving unit through the high-speed transmission interface;

[0022] S6. The image receiving unit sends img_3 to the image freezing unit for freezing to obtain img_4;

[0023] S7. The image processing algorithm verification platform connects img_4 to the same ISP processing node as img_2. After passing through the remaining ISP processing units, it is connected to the second image display unit.

[0024] S8. Compare the display effects of the first image display unit and the second image display unit to verify the processing effects between the algorithms of any process of the ISP processing unit and the image processing algorithm to be verified.

[0025] Further, the image processing algorithm to be verified is an algorithm to be verified that achieves the same effect as the algorithm of any process of the ISP processing unit.

[0026] Further, the loopback is to pass img_3 through the image receiving unit and then reconnect it to the image processing algorithm verification platform for subsequent ISP processing.

[0027] The beneficial effects of the present invention are as follows: It can verify the algorithms of any process in the ISP processing flow. After verifying the PC algorithm, the image is looped back into the image processing algorithm verification platform and then connected to the same processing node as the original processing algorithm, which can ensure that the algorithm to be verified and the existing algorithm go through exactly the same processing flow. And by outputting through the actual display interface instead of through the PC display, it can ensure that the verification result is consistent with the actual display effect and exclude the abnormal image processing results caused by the image processing platform. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic flowchart of an embodiment of the present invention;

[0029] Figure 2 It is a schematic structural diagram of an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0030] In order to make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the described embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0031] Unless otherwise defined, technical terms or scientific terms used in the present invention shall have the ordinary meanings as understood by those of ordinary skill in the art to which the present invention pertains. The terms "first", "second" and similar terms used in the present invention do not denote any order, quantity or importance, but are only used to distinguish different components. Words such as "comprising" or "including" mean that the elements or items appearing before this word cover the elements or items listed after this word and their equivalents, without excluding other elements or items. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper", "lower", "left", "right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0032] To keep the following description of the embodiments of the present invention clear and concise, detailed descriptions of some known functions and known components are omitted in the present invention.

[0033] The present invention provides an image processing algorithm verification method and system. As Figure 2 shown, the system includes a PC and an image processing algorithm verification platform. After the PC sends a command through a serial communication interface to obtain an image from the image processing algorithm verification platform for algorithm verification, it is then sent back to the image processing algorithm verification platform through a high-speed data transmission interface. Preferably, the high-speed data transmission interface is one of PCIE, HDMI, and USB. The image processing algorithm verification platform is mainly used to parse the commands sent by the PC, the ISP processing unit of the image, freeze the image, and perform two-way transmission of image data with the PC through the high-speed data transmission interface.

[0034] The image processing algorithm verification platform includes a communication control unit, an ISP processing unit, an image freezing unit, an image display unit, an image receiving unit, and an image sending unit. Among them, the communication control unit serves as the control center of the entire system to control each unit of the image processing algorithm verification platform; the ISP processing unit mainly performs a series of algorithmic processes on the image and finally sends it to the image display unit; preferably, the ISP processing unit includes at least one of color interpolation, Bayer noise reduction, white balance, detail enhancement, color enhancement, and image denoising.

[0035] The image freezing unit mainly realizes the interception of the image in any process in the ISP processing unit;

[0036] The image display unit mainly realizes the display of the final image, and the image receiving unit mainly receives the image verified by the algorithm and sent back by the PC;

[0037] The image sending unit is configured to transmit the image frozen by the image freezing unit to the PC through a high-speed data transmission interface.

[0038] As Figure 1 shown, a method for verifying an image processing algorithm provided by the present invention performs algorithm verification processing based on an endoscope image with a resolution of 1080P. The specific steps are as follows:

[0039] S1. The PC sends a command to the image processing algorithm verification platform to obtain an image ccm_img1 that has not undergone color correction processing.

[0040] S2. After parsing the command, the communication control unit controls the image freezing unit to freeze ccm_img1 to obtain ccm_img2.

[0041] S3. The image sending unit uses the USB3.0 interface to send ccm_img2 to the PC.

[0042] S4. The image processing algorithm verification platform processes ccm_img2 through the color correction algorithm of the ISP processing unit, then accesses the remaining ISP processing unit, and sends it to the first image display unit.

[0043] S5. The PC processes ccm_img2 using the color correction algorithm to be verified to obtain ccm_img3, and loops ccm_img3 back to the image receiving unit through the USB3.0 interface.

[0044] S6. The image receiving unit sends ccm_img3 into the image freezing unit for freezing to obtain ccm_img4.

[0045] S7. Connect ccm_img4 to the same processing node as ccm_img2. After passing through the remaining ISP processing unit, it is connected to the second image display unit. Selecting the same ISP processing node ensures that the subsequent processing algorithms of img_4 and img_2 are the same, excluding the influence of the remaining algorithm differences.

[0046] S8. Compare the image display effects of the first display unit and the second display unit to verify the algorithms of any process of the ISP processing unit and the processing effects of the image processing algorithm to be verified.

[0047] The working principle of the present invention is as follows: The PC freezes a frame of image during the ISP processing process through the image freezing unit and outputs it to the image display unit. At the same time, the frame of image is transmitted to the PC through the image sending unit. After the PC processes the algorithm, the image after algorithm processing is sent to the image processing algorithm verification platform. The image processing algorithm verification platform accesses this image into the remaining ISP process and synchronously displays it on the second image display unit for comparison to verify the algorithm effect. The method and system provided by the present invention can verify the algorithms of any process in the ISP processing process. The image after PC algorithm verification is looped back into the image processing algorithm verification platform and then accessed to the same processing node as the original processing algorithm, which can ensure that the algorithm to be verified and the existing algorithm go through exactly the same processing process. And through the actual display interface output instead of through the PC display, it can ensure that the verification result is consistent with the actual display effect and exclude the abnormal image processing results caused by the image processing platform. The above is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent transformation made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical fields, is equally included in the patent protection scope of the present invention.

Claims

1. An image processing algorithm verification system, characterized in that: The system includes a PC and an image processing algorithm verification platform. The PC sends a command through a serial communication interface to obtain an image from the image processing algorithm verification platform for algorithm verification, and then transmits the image back to the image processing algorithm verification platform through a high-speed data transmission interface. The image processing algorithm verification platform includes a communication control unit, an ISP processing unit, an image freezing unit, an image display unit, an image receiving unit, and an image sending unit. The image processing algorithm verification platform is mainly used to parse the commands sent by the PC, the ISP processing unit of the image, the freezing of the image, and to perform bidirectional transmission of image data with the PC through a high-speed data transmission interface.

2. The image processing algorithm verification system according to claim 1, characterized in that: The communication control unit serves as the control center of the entire system to control each unit of the image processing algorithm verification platform. The ISP processing unit mainly implements a series of algorithm processing for the image, and finally sends it to the image display unit for display. The image freezing unit mainly realizes the image capture of any process in the ISP processing unit. The image display unit mainly realizes the display of the final image. The image receiving unit mainly receives the image verified by the algorithm and transmitted back by the PC. The image sending unit transmits the image frozen by the image freezing unit to the PC via a high-speed data transmission interface.

3. The image processing algorithm verification system according to claim 1, characterized in that: The high-speed transmission interface is at least one of PCIE, HDMI, and USB.

4. The image processing algorithm verification system according to claim 1, characterized in that: The ISP processing unit includes at least one of color interpolation, Bayer noise reduction, white balance, detail enhancement, color enhancement, and image denoising.

5. An image processing algorithm verification method, applied to an image processing algorithm verification system including a PC and an image processing algorithm verification platform, characterized in that: The following steps are involved: S1. PC sends a command to the image processing algorithm verification platform to obtain any process image img_1 in the ISP process; S2, after parsing the command, the communication control unit controls the image freezing unit to freeze img_1 to obtain img_2; S3, the image sending unit uses the high-speed transmission interface to send img_2 to the PC; S4, the image processing algorithm verification platform processes img_2 using an algorithm of any process of the ISP processing unit, connects to the remaining ISP processing units and sends it to the first image display unit; S5, PC processes img_2 using the image processing algorithm to be verified to obtain img_3, and img_3 is looped back to the image receiving unit via the high-speed transmission interface; S6, the image receiving unit sends img_3 to the image freezing unit for freezing to obtain img_4; S7, the image processing algorithm verification platform connects img_4 to the same ISP processing node as img_2, and after passing through the remaining ISP processing units, connects to the second image display unit; S8. Compare the display effects of the first image display unit and the second image display unit to verify the processing effect between the algorithm of any process of the ISP processing unit and the image processing algorithm to be verified.

6. The image processing algorithm verification method according to claim 5, characterized in that: The image processing algorithm to be verified is an algorithm to be verified that achieves the same effect as an algorithm of any process of the ISP processing unit.

7. The image processing algorithm verification method according to claim 5, characterized in that: The loopback is to connect img_3 through the image receiving unit and then reconnect it to the image processing algorithm verification platform for subsequent ISP processing.

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