Semi-physical real-time communication simulation system based on MATLAB platform and USRP equipment

Abstract

The invention provides a semi-physical real-time communication simulation system based on an MATLAB platform and USRP equipment, and the system comprises the steps: firstly, generating a digital bit stream signal through a transmitting end software processing unit, and carrying out the modulation and coding of the digital bit stream signal, thereby obtaining a baseband signal; a transmitting end USRP cooperation unit and a receiving end USRP cooperation unit are used for communicating an MATLAB platform and USRP equipment, then a USRP hardware-in-loop simulation unit is used for simulation, and the compatibility and expansibility between a simulation environment and hardware equipment are improved through the MATLAB platform with multiple toolkits and the USRP hardware-in-loop simulation unit of the USRP equipment with a high-performance FPGA and a radio frequency front end. The capability of processing real-time signal transmission in a complex environment is improved; and the receiving end software processing unit receives the baseband signal transmission waveform and then demodulates and decodes the baseband signal transmission waveform to obtain a restored original digital bit stream signal. According to the system, the MATLAB platform and the USRP equipment are combined to cover a complete link from signal generation to signal receiving, efficient simulation verification is achieved, and consumption of computing communication resources is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of hardware-in-the-loop communication simulation, and more specifically, to a hardware-in-the-loop real-time communication simulation system based on the MATLAB platform and USRP devices. Background Art

[0002] With the rapid development of wireless communication technologies, especially the development of emerging technologies such as 5G, 6G, and the Internet of Things, the complexity of communication systems has increased significantly. Emerging communication networks often involve cross-domain verification, such as edge computing, network slicing, and cloud-terminal collaboration. The diversity of service scenarios poses unprecedented challenges to system verification and performance evaluation.

[0003] In traditional pure software simulations, since it is difficult to reflect the real behavior of hardware devices, the simulation results often deviate significantly from the real scenario. Especially when facing complex channel modeling, interference management, and multi-link collaboration tests, pure software simulations are difficult to simulate the real wireless signal transmission characteristics, resulting in insufficient verification accuracy and reliability. In addition, with the improvement of communication hardware performance and the application of new hardware architectures, the requirements for hardware verification in actual communication systems have become more stringent. And with the growth of communication service demands and the rapid iteration of technologies, pure software simulations are difficult to cope with the real-time, variable, and highly dynamic characteristics of communication systems, bringing significant limitations to system R & D.

[0004] Hardware-in-the-loop (HIL) simulation is a testing technology that combines actual hardware with a virtual simulation environment. Also known as hardware-in-the-loop simulation, it refers to the real-time simulation in which some physical objects are connected to the simulation loop of a simulation experiment system. By establishing a real-time closed-loop interaction between the hardware device and the computer simulation model, it can provide a more realistic simulation environment and offer an efficient and accurate verification means for the research and development of wireless communication systems. Specifically, HIL simulation can introduce real hardware devices into the simulation environment in real time to conduct more accurate performance evaluations on the channel modeling, wireless link testing, waveform verification, and protocol stack testing of communication systems. Compared with pure software simulations, HIL technology can more realistically simulate wireless channel conditions, such as signal attenuation, interference, time delay, and multipath effects, etc., thus more accurately verifying the performance of hardware in an actual communication environment. At the same time, through real-time interactive testing, HIL can verify the resource allocation, interference management, and link scheduling strategies of the system in a complex multi-user access environment, ensuring that the system remains stable and efficient in high-load and dynamically changing network scenarios. With the help of tools such as MATLAB and Python, the HIL simulation platform also supports quickly adjusting test parameters and models, improving the efficiency of system debugging and optimization, reducing development costs and test risks, and accelerating the iteration and implementation of new technologies.

[0005] However, there are still some defects in the semi-physical real-time communication simulation system in the current communication field that need to be solved urgently. For example, the compatibility between different hardware and the simulation environment is insufficient, and the system integration is difficult. Due to the differences in interfaces and communication protocols among hardware devices of different manufacturers and models, this may lead to problems in the connection and communication between the simulation system and the hardware devices. In addition, with the continuous development of communication technology, new hardware devices and communication protocols emerge continuously, which also brings greater challenges to the hardware interfaces and compatibility of semi-physical real-time communication simulation. In complex channel modeling and high-dynamic environments, some systems are difficult to achieve strict real-time response. Semi-physical real-time communication simulation needs to improve the simulation accuracy as much as possible on the premise of ensuring real-time performance. However, in actual operation, there is often a certain contradiction between the two. On the one hand, in order to improve the simulation accuracy, complex models and algorithms need to be adopted, but this will increase the computational load of the simulation, thus affecting the real-time performance. On the other hand, in order to ensure real-time performance, the models and algorithms may need to be simplified, but this may reduce the simulation accuracy. At the same time, the scalability of the simulation system is limited and it is difficult to adapt to rapidly changing communication protocols and different hardware interfaces. In addition, real-time simulation has high requirements for computing and communication resources and is prone to performance bottlenecks; the lack of a unified standard in the industry also makes it difficult to directly compare the results of different simulation systems. Summary of the Invention

[0006] To solve the problems of insufficient compatibility and scalability, slow response speed, and high requirements for computing and communication resources in the semi-physical real-time communication simulation system in the current communication field, the present invention proposes a semi-physical real-time communication simulation system based on the MATLAB platform and USRP devices, which improves the compatibility and scalability between the simulation environment and hardware devices, improves the ability to process real-time signal transmission in complex environments, speeds up the response speed, combines MATLAB and USRP, covers the complete link from signal generation to reception, so as to achieve efficient simulation verification and reduce the consumption of computing and communication resources.

[0007] In order to achieve the above technical effects, the technical solution of the present invention is as follows:

[0008] The present application proposes a semi-physical real-time communication simulation system based on the MATLAB platform and USRP devices, including:

[0009] A transmitting-end software processing unit, which is used to generate a digital bit stream signal, encode and modulate the digital bit stream signal to obtain a baseband signal, and output it to the synchronization sequence processing unit;

[0010] A synchronization sequence processing unit, which marks the starting point of the data packet of the baseband signal transmission waveform based on the double-level ZC synchronization sequence to achieve the alignment of the baseband signal in time and frequency;

[0011] The transceiver USRP cooperation unit is used to match the parameters of the MATLAB platform and the USRP device and connect the MATLAB platform and the USRP device;

[0012] The USRP hardware-in-the-loop simulation unit is used to optimize the signal processing performance at the hardware level of the USRP device or conduct channel simulation tests using the built-in FPGA of the USRP device, conduct co-simulation tests between the USRP device and other systems, conduct tests on the actual outdoor communication scenarios of the USRP device and channel data acquisition tests, and conduct normality tests on the interface communication between the MATLAB platform and the USRP device, and output the baseband signal carrying the test results to the de-synchronization sequence processing unit;

[0013] The de-synchronization sequence processing unit is used to perform de-synchronization processing on the received baseband signal, identify the starting point of the data packet and remove the synchronization sequence, and generate the baseband signal transmission waveform;

[0014] The receiving-end software processing unit is used to receive the baseband signal transmission waveform processed by the de-synchronization sequence processing unit, perform waveform demodulation and decoding processing, and obtain the restored original digital bit stream signal.

[0015] In this technical solution, first, the transmitting-end software processing unit generates a digital bit stream signal and obtains a baseband signal through modulation and coding. After connecting the MATLAB platform and the USRP device using the transmitting-end USRP cooperation unit and the receiving-end USRP cooperation unit, the USRP hardware-in-the-loop simulation unit is used for simulation. The USRP hardware-in-the-loop simulation unit of the MATLAB platform with a variety of toolkits and the USRP device with a high-performance FPGA and radio frequency front end improves the compatibility and scalability between the simulation environment and the hardware device, and improves the ability to process real-time signal transmission in complex environments; after receiving the baseband signal transmission waveform, the receiving-end software processing unit obtains the restored original digital bit stream signal through demodulation and decoding. This system combines the MATLAB platform and the USRP device to cover the complete link from signal generation to reception, realizes efficient simulation verification, and reduces the consumption of computing and communication resources.

[0016] Preferably, the process of the synchronization sequence processing unit marking the starting point of the data packet of the transmission waveform based on the two-level ZC synchronization sequence is as follows:

[0017] Define the expression of the two-level ZC synchronization sequence Z(τ) as:

[0018]

[0019] where r is the root index of the ZC synchronization sequence, N is the length of the sequence, and n is the index of the current sequence element;

[0020] Embed the double-layer ZC synchronization sequence Z(τ) at the start, end, and before each transmission time interval of the baseband signal transmission waveform data packet; the double-layer ZC synchronization sequence embedded at the start and end of the baseband signal transmission waveform data packet is the total synchronization ZC sequence, and the total synchronization ZC sequence is used to determine the position of each complete data cycle in the transmission waveform data packet; the double-layer ZC synchronization sequence embedded before each transmission time interval is the frame synchronization ZC sequence, which is used to perform positioning correction on the data of each transmission time interval.

[0021] Preferably, the transmitting end USRP cooperation unit uses the USRP toolkit function in the MATLAB platform of the transmitting end to match the MATLAB platform and the USRP device, so as to realize the mutual communication between the USRP device and the transmitting end MATLAB platform;

[0022] The receiving end USRP cooperation unit uses the USRP toolkit function in the MATLAB platform of the receiving end to match the MATLAB platform and the USRP device, so as to realize the mutual communication between the USRP device and the receiving end MATLAB platform.

[0023] Preferably, it further includes a pure software simulation unit and a performance evaluation unit. The pure software simulation unit is used to assist in simulation and algorithm verification at the software level, add a cascaded channel, and is implemented using a software simulation platform modified based on the existing MATLAB pure software simulation system or a self-built software simulation platform; the performance evaluation unit is used to evaluate the performance of the semi-physical real-time communication simulation system using the restored original digital bit stream signal.

[0024] Preferably, the hardware devices of the USRP hardware-in-the-loop simulation unit include two USRP devices, namely the transmitting end USRP device and the receiving end USRP device; it further includes: a USRP hardware-in-the-loop simulation branch, a multi-device joint simulation branch, a channel data acquisition branch, and a USRP in-loop algorithm test branch; the added cascaded channels are respectively: the cascaded channel between the pure software simulation unit and the USRP hardware-in-the-loop simulation branch, the cascaded channel of the multi-device joint simulation branch, the cascaded channel of the channel data acquisition branch, and the cascaded channel of the USRP in-loop algorithm test branch.

[0025] Preferably, the USRP hardware-in-the-loop simulation unit receives the transmission waveform data packet with the double-layer ZC synchronization sequence Z(τ) added, and judges whether the transmission waveform passes through the simulated channel of the pure software simulation unit according to the simulation settings. If the transmission waveform passes through the simulated channel of the pure software simulation unit, it judges whether to perform channel cascading. If channel cascading is not performed, the USRP device is not enabled, and the signal enters the pure software simulation unit for simulation; the signal after being simulated by the pure software simulation unit is output to the de-synchronization sequence unit;

[0026] If channel concatenation is performed, it is determined whether to perform internal FPGA channel expansion of the USRP.

[0027] Preferably, if the transmission waveform does not pass through the analog channel of the pure software simulation unit, it is determined whether to perform internal FPGA channel expansion of the USRP;

[0028] If internal FPGA channel expansion of the USRP is performed, enter the USRP hardware-in-the-loop simulation branch; the USRP hardware-in-the-loop simulation branch uses the built-in FPGA of the USRP device to optimize the hardware-level signal processing performance or simulate the channel of the USRP device, and then uses the transmitting USRP device as a radio frequency signal output device to output the radio frequency signal to the receiving USRP device;

[0029] If internal FPGA channel expansion of the USRP is not performed, it is determined whether the signal passes through other hardware channels. If so, enter the multi-device joint simulation branch; the multi-device joint simulation branch integrates multiple communication-related devices into the MATLAB platform to evaluate the interoperability and collaboration capabilities of the semi-physical real-time communication simulation system with other systems in a complex environment; the other systems include: channel simulator, base station device, digital twin system; use the transmitting USRP device as a radio frequency signal output device to output the radio frequency signal to the receiving USRP device;

[0030] If it does not pass through other hardware channels, it is determined whether the signal passes through the air interface channel of the USRP device. If so, enter the channel data acquisition branch; the channel data acquisition branch uses the transmitting USRP device and the receiving USRP device to send and receive signals in an actual scenario, and uses the MATLAB platform to send and receive dense pilot or full pilot signals for channel data acquisition; after completing the data acquisition, the semi-physical real-time communication simulation system analyzes the channel environment based on key parameters such as channel impulse response, channel frequency response, and power delay profile to obtain channel data such as path loss and multipath delay distribution;

[0031] If the signal does not pass through the air interface channel of the USRP device, enter the USRP in-loop algorithm test branch; the USRP in-loop algorithm test branch is used to test the normality of the hardware interface communication between the device equipped with the MATLAB platform and the USRP hardware device, and the hardware interface includes the radio frequency ports of the transmitting USRP device and the receiving USRP device; during the test, use a radio frequency coaxial connector to connect the radio frequency ports of the transmitting USRP device and the receiving USRP device for testing;

[0032] The receiving USRP device receives the radio frequency signal after simulation, converts the radio frequency signal into a baseband signal and sends it to the de-synchronization signal unit.

[0033] Preferably, before optimizing the signal processing performance at the hardware level of the USRP device using the built-in FPGA of the USRP device in the USRP hardware-in-the-loop simulation branch, it is necessary to burn the UHD firmware provided by the toolkit into the USRP. The process is as follows:

[0034] Configure the development environment in the computer device, including: installing the UHD driver, the RFNoC development toolchain, and the USRP support package for MATLAB; among them, the UHD driver provides the communication function between the computer and the USRP hardware, the RFNoC framework supports FPGA logic development, and the USRP support package for MATLAB controls the signal transmission and reception of the USRP;

[0035] Design the signal processing module built into the USRP based on requirements, and write register transfer level code or use high-level synthesis tools to design FPGA logic that meets the requirements; after the design is completed, integrate the signal processing module into the RFNoC architecture and connect it to the AXI bus to ensure compatibility with the internal data channels of the USRP; use the Xilinx Vivado toolchain for synthesis and implementation to generate the FPGA bitstream file;

[0036] Replace the default firmware and burn the FPGA bitstream file into the USRP device to replace the default firmware;

[0037] After the firmware burning is completed, conduct tests.

[0038] Preferably, the desynchronization sequence processing unit performs desynchronization processing on the received baseband signal, identifies the start point of the data packet and removes the synchronization sequence. The process of generating the baseband signal transmission waveform is as follows:

[0039] Calculate the autocorrelation function of the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit and the total synchronization ZC sequence. The expression of the autocorrelation function is:

[0040]

[0041] Among them, Z(n) represents the total synchronization ZC sequence added to the transmission waveform data packet in the synchronization sequence processing unit, Y(n + τ) represents the corresponding signal in the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit, and the superscript * represents the complex conjugate operation; when the autocorrelation function R(τ) reaches the maximum value, set the corresponding Y(n + τ) as the total synchronization point S of the complete data cycle of the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit;

[0042] Determine whether the total synchronization ZC sequence synchronization is successful. If not, the data transmission fails and the simulation terminates. If successful, delete the data of the total synchronization ZC sequence length, and then calculate the autocorrelation function of the cyclic block and the frame synchronization ZC sequence in the cyclic block based on the transmission time interval. The expression is:

[0043]

[0044] Wherein, Z1(n) represents the transmission time interval synchronization ZC sequence added to the signal in the synchronization signal unit; when the autocorrelation function R1(τ) reaches the maximum value, the corresponding Y(n+τ) is set as the frame data starting point B in the signal;

[0045] Determine whether the frame synchronization ZC sequence synchronization is successful. If successful, remove the frame synchronization ZC sequence based on the frame data starting point B in the signal, and determine the frame data starting point of each frame of the received data. The process is:

[0046] For the first frame of received data, the starting reference point A of the first frame data is calculated based on the total synchronization point S, and point A is used as the final frame data starting point A' of the first frame of received data; for the second frame and other subsequent frames, the starting reference point A of the current frame data is calculated based on the final frame data starting point A' of the previous frame; it is determined whether the difference between the starting reference point A and the frame data starting point B is less than the CP time domain length, if not, point A is used as the final frame data starting point A' of the current frame; if less, point B is used as the final frame data starting point A' of the current frame;

[0047] If it is determined that the frame synchronization ZC sequence synchronization is unsuccessful, the starting reference point A of the first frame data is calculated based on the total synchronization point S, and point A is used as the final frame data starting point A' of the first frame; for the second frame and other subsequent frames, the final frame data starting point A' of the previous frame is used as the frame data starting point A' of the current frame;

[0048] Based on the frame data starting point of each frame, the frame data is removed and the process of entering the next frame synchronization is started, and the frame data starting point B of the next frame synchronization is recalculated;

[0049] The baseband signal from which all frame synchronization sequences have been released is output to a receiving end software processing unit.

[0050] Preferably, the performance evaluation unit compares the restored original digital bit stream signal with the digital bit stream signal generated by the transmitting end software processing unit to evaluate the performance of the semi-physical real-time communication simulation system, and the process is:

[0051] The performance evaluation unit receives the original digital bit stream signal restored by the receiving end software processing unit;

[0052] Compare the original digital bitstream signal after restoration with the digital bitstream signal generated by the software processing unit at the transmitting end to obtain the bit error rate of the original digital bitstream signal;

[0053] Calculate the amount of signals processed by the hardware-in-the-loop real-time communication system per unit time to obtain the throughput of the hardware-in-the-loop real-time communication system;

[0054] Evaluate the performance of the hardware-in-the-loop real-time communication system by using the bit error rate of the original digital bitstream signal and the throughput of the hardware-in-the-loop real-time communication system.

[0055] Compared with the prior art, the beneficial effects of the technical solution of the present invention are:

[0056] The present invention proposes a hardware-in-the-loop real-time communication simulation system based on the MATLAB platform and USRP devices. First, the software processing unit at the transmitting end generates a digital bitstream signal and obtains a baseband signal through modulation and coding. After the USRP collaborative unit at the transmitting and receiving ends connects the MATLAB platform and the USRP devices, the USRP hardware-in-the-loop simulation unit is used for simulation. The MATLAB platform with various toolkits and the USRP hardware-in-the-loop simulation unit of the USRP device with high-performance FPGA and radio frequency front end improve the compatibility and expandability between the simulation environment and the hardware device, and improve the ability to process real-time signal transmission in complex environments; the software processing unit at the receiving end receives the baseband signal transmission waveform and obtains the original digital bitstream signal after restoration through demodulation and decoding. This system combines the MATLAB platform and USRP devices to cover the complete link from signal generation to reception, realizes efficient simulation verification, and reduces the consumption of computing and communication resources. Description of the Drawings

[0057] Figure 1 It shows the structural diagram of a hardware-in-the-loop real-time communication simulation system based on the MATLAB platform and USRP devices proposed by an embodiment of the present invention;

[0058] Figure 2 It shows the structural diagram of another hardware-in-the-loop real-time communication simulation system based on the MATLAB platform and USRP devices proposed by an embodiment of the present invention;

[0059] Figure 3 It shows the complete flowchart of a hardware-in-the-loop real-time communication simulation system based on the MATLAB platform and USRP devices proposed by an embodiment of the present invention from signal transmission, simulation to reception;

[0060] Figure 4 It shows the flowchart implementation block diagram of the desynchronization sequence proposed by an embodiment of the present invention. Detailed Embodiments

[0061] The drawings are only for illustrative purposes and should not be construed as a limitation of this patent;

[0062] To better illustrate this embodiment, some parts of the drawings are omitted, enlarged or reduced, which do not represent the actual size;

[0063] For those skilled in the art, it is understandable that some well-known content descriptions in the drawings may be omitted.

[0064] The technical solutions of the present invention will be further described below in conjunction with the drawings and embodiments.

[0065] The description of the positional relationship in the drawings is only for illustrative purposes and cannot be construed as a limitation of this patent;

[0066] Embodiment 1

[0067] This embodiment proposes a semi-physical real-time communication simulation system based on the MATLAB platform and USRP devices. The overall block diagram of this system is shown in Figure 1 , and this system includes the following units:

[0068] A transmitting end software processing unit, which is used to generate a digital bit stream signal, encode and modulate the digital bit stream signal to obtain a baseband signal, and output it to the synchronization sequence processing unit;

[0069] A synchronization sequence processing unit, which marks the starting point of the data packet of the baseband signal transmission waveform based on the double-level ZC synchronization sequence, and realizes the alignment of the baseband signal in time and frequency;

[0070] A transceiver USRP cooperation unit, which is used to match the parameters of the MATLAB platform and the USRP device and connect the MATLAB platform and the USRP device;

[0071] A USRP hardware-in-the-loop simulation unit, which is used to optimize the signal processing performance at the hardware level of the USRP device or conduct channel simulation tests, co-simulation tests between the USRP device and other systems, outdoor actual communication scenario tests of the USRP device and channel data acquisition tests, and normalness tests of the interface communication between the MATLAB platform and the USRP device by using the built-in FPGA of the USRP device, and output the baseband signal carrying the test results to the de-synchronization sequence processing unit;

[0072] A de-synchronization sequence processing unit, which is used to perform de-synchronization processing on the received baseband signal, identify the starting point of the data packet and remove the synchronization sequence, and generate the baseband signal transmission waveform;

[0073] A receiving end software processing unit, which is used to receive the baseband signal transmission waveform processed by the de-synchronization sequence processing unit, perform waveform demodulation and decoding processing, and obtain the restored original digital bit stream signal.

[0074] In this embodiment, first, the transmitting - end software processing unit generates a digital bit - stream signal and obtains a base - band signal through modulation and coding. After connecting the MATLAB platform and the USRP device using the transmitting - end USRP cooperation unit and the receiving - end USRP cooperation unit, the USRP hardware - in - the - loop simulation unit is used for simulation. The USRP hardware - in - the - loop simulation unit of the MATLAB platform with various toolkits and the USRP device with a high - performance FPGA and radio - frequency front - end improves the compatibility and scalability between the simulation environment and the hardware device, and improves the ability to process real - time signal transmission in complex environments. The receiving - end software processing unit receives the base - band signal transmission waveform and obtains the restored original digital bit - stream signal through demodulation and decoding. This system combines the MATLAB platform and the USRP device to cover the complete link from signal generation to reception, realizes efficient simulation verification, and reduces the consumption of computing and communication resources.

[0075] Embodiment 2

[0076] As Figure 2 shown, in this embodiment, another hardware - in - the - loop real - time communication simulation system based on the MATLAB platform and the USRP device is proposed. In addition to having the same structure as the hardware - in - the - loop real - time communication simulation system based on the MATLAB platform and the USRP device proposed in Embodiment 1, this system also includes a pure - software simulation unit and a performance - evaluation unit. The pure - software simulation unit is used for assisting simulation and algorithm verification at the software level, adding a serial channel, and is implemented using a software simulation platform modified based on the existing MATLAB pure - software simulation system or a self - built software simulation platform. The performance - evaluation unit is used to evaluate the performance of the hardware - in - the - loop real - time communication simulation system using the restored original digital bit - stream signal.

[0077] Embodiment 3

[0078] In this embodiment, as Figure 3 shown, the transmitting - end software processing unit includes a transport - block generation module, a channel - coding module, a rate - matching module, an interference - adding module, a constellation - mapping module, a layer - mapping module, a precoding module, a resource - grid mapping module, and a waveform - generation module;

[0079] The transport - block generation module is used to generate the original data frame of the digital bit - stream signal, add a redundancy check code to the original data frame to form a transport block, serve as the input signal source, and output the transport block to the channel - coding module;

[0080] The channel - coding module is used to add redundant information to the transport block for error detection and correction, obtain the encoded digital signal, and output it to the rate - matching module;

[0081] A rate matching module, which is used to adjust the bit rate of the encoded digital signal to match the actually available physical resources, obtain the rate-matched digital signal and output it to the interference addition module;

[0082] An interference addition module, which is used to scramble the rate-matched digital signal by using a pseudo-random sequence, scatter the distribution of the rate-matched digital signal in time and frequency, obtain the scrambled digital signal and output it to the constellation mapping module;

[0083] A constellation mapping module, which maps the scrambled digital signal to constellation points, obtains the constellation-mapped digital signal and outputs it to the layer mapping module;

[0084] A layer mapping module, which is used to map the codeword modulation symbols of the signal after constellation mapping to logical channels, obtain the layer signal and output it to the precoding module;

[0085] A precoding module, which is used to perform precoding on the layer signal, obtain the precoded digital signal and output it to the resource grid mapping module;

[0086] A resource grid mapping module, which is used to map the precoded digital signal to a time-frequency resource grid, allocate time, frequency and space resources to the precoded digital signal, obtain the digitally-signal after resource allocation, and output it to the waveform generation module;

[0087] A waveform generation module, which is used to modulate the digitally-signal after resource allocation into the transmission waveform of the baseband signal by using pulse shaping, and output the transmission waveform and the data packet to the synchronization sequence processing unit.

[0088] In this embodiment, the process of the synchronization sequence processing unit marking the starting point of the data packet of the transmission waveform based on the double-level ZC synchronization sequence is as follows:

[0089] Define the expression of the double-level ZC synchronization sequence Z(τ) as:

[0090]

[0091] where r is the root index of the ZC synchronization sequence, N is the length of the sequence, and n is the index of the current sequence element;

[0092] Embed the double-level ZC synchronization sequence Z(τ) into the start, end and before each transmission time interval of the data packet of the baseband signal transmission waveform; the double-level ZC synchronization sequences embedded in the start and end of the data packet of the baseband signal transmission waveform are the total synchronization ZC sequences, and the total synchronization ZC sequences are used to determine the position of each complete data cycle in the transmission waveform data packet; the double-level ZC synchronization sequence embedded before each transmission time interval is the frame synchronization ZC sequence, which is used to perform positioning correction on the data of each transmission time interval.

[0093] In this embodiment, the hardware devices of the USRP hardware-in-the-loop simulation unit include two USRP devices, namely a transmitting-end USRP device and a receiving-end USRP device;

[0094] It further includes: a USRP hardware-in-the-loop simulation branch, a multi-device joint simulation branch, a channel data acquisition branch, and a USRP in-the-loop algorithm test branch;

[0095] The added series channels are respectively: the series channel between the pure software simulation unit and the USRP hardware-in-the-loop simulation branch, the series channel of the multi-device joint simulation branch, the series channel of the channel data acquisition branch, and the series channel of the USRP in-the-loop algorithm test branch;

[0096] The USRP hardware-in-the-loop simulation unit receives the transmission waveform data packet with the double-level ZC synchronization sequence Z(τ) added. It judges whether the transmission waveform passes through the analog channel of the pure software simulation unit according to the simulation settings. If the transmission waveform passes through the analog channel of the pure software simulation unit, it judges whether to perform channel concatenation. If channel concatenation is not performed, the USRP device is not enabled, and the signal enters the pure software simulation unit for simulation; the signal after being simulated by the pure software simulation unit is output to the de-synchronization sequence unit;

[0097] If channel concatenation is performed, it judges whether to perform USRP internal FPGA channel expansion;

[0098] If the transmission waveform does not pass through the analog channel of the pure software simulation unit, it judges whether to perform USRP internal FPGA channel expansion;

[0099] If USRP internal FPGA channel expansion is performed, it enters the USRP hardware-in-the-loop simulation branch; the USRP hardware-in-the-loop simulation branch uses the built-in FPGA of the USRP device to optimize the hardware-level signal processing performance of the USRP device or simulate the channel, and then uses the transmitting-end USRP device as the radio frequency signal output device to output the radio frequency signal to the receiving-end USRP device;

[0100] Specifically, by combining with the RFNoC framework, users can customize FPGA logic modules to achieve high-speed signal processing, such as filtering, modulation / demodulation, and equalization of signals.

[0101] If the internal FPGA channel expansion of the USRP is not performed, it is determined whether the signal passes through other hardware channels. If so, it enters the multi-device joint simulation branch; the multi-device joint simulation branch integrates multiple communication-related devices into the MATLAB platform to evaluate the interoperability and collaboration capabilities of the semi-physical real-time communication simulation system with other systems in a complex environment; the other systems include: a channel simulator, a base station device, and a digital twin system; the transmitting USRP device is used as a radio frequency signal output device to output the radio frequency signal to the receiving USRP device.

[0102] Specifically, taking the joint simulation with a channel simulator as an example, at this time, the radio frequency output / input port of the USRP needs to be connected to the input or output port of the channel simulator through a radio frequency connection cable. The center frequency of signal detection in the channel simulator also needs to be consistent with the center frequency of the USRP radio frequency device. At this time, physical data such as the power and signal-to-interference-plus-noise ratio of the transmitted and received signals can be displayed through the channel simulator interface, and the rich hardware channels built into the channel simulator can be used to simulate the actual channel.

[0103] Similarly, if the base station communication joint debugging is performed between this system and the base station device, the relevant parameters of this system, such as the center frequency, bandwidth, and modulation and coding method, need to be coordinated with the base station device, and the signal transmission and reception tests are carried out through the antenna. When collaborating with other systems that require unified software configuration, such as the digital twin system, it is recommended to connect all control computers to the same network to facilitate the import and export of configurations.

[0104] If it does not pass through other hardware channels, it is determined whether the signal passes through the air interface channel of the USRP device. If so, it enters the channel data acquisition branch; the channel data acquisition branch uses the transmitting USRP device and the receiving USRP device to send and receive signals in the actual scenario, and uses the MATLAB platform to send and receive dense pilots or full pilots to collect channel data; after the data collection is completed, the semi-physical real-time communication simulation system analyzes the channel environment based on key parameters such as the channel impulse response, channel frequency response, and power delay profile to obtain channel data such as path loss and multipath delay distribution.

[0105] Specifically, connecting the transmitting USRP device and the receiving USRP device through an antenna can realize the radio frequency transmission and reception of wireless signals, supporting on-site communication tests and channel data collection; further, connecting two personal computers to a USRP separately and using an outdoor mobile power supply for power supply can realize on-site actual communication scenario tests and collect relevant channel data.

[0106] If the signal does not pass through the air interface channel of the USRP device, it enters the USRP in-loop algorithm test branch; the USRP in-loop algorithm test branch is used to test the normality of the hardware interface communication between the device equipped with the MATLAB platform and the USRP hardware device, and the hardware interface includes the RF port of the transmitting USRP device and the RF port of the receiving USRP device; during the test, the RF coaxial connector is used to connect the RF port of the transmitting USRP device and the RF port of the receiving USRP device for testing.

[0107] In this embodiment, before optimizing the signal processing performance at the hardware level of the USRP device using the built-in FPGA of the USRP device, the UHD firmware provided by the tool kit needs to be burned into the USRP. The process is as follows:

[0108] Configure the development environment in the computer device, including: installing the UHD driver, the RFNoC development tool chain, and the USRP support package for MATLAB; among them, the UHD driver provides the communication function between the computer and the USRP hardware, the RFNoC framework supports FPGA logic development, and the USRP support package for MATLAB controls the signal transmission and reception of the USRP;

[0109] Design the signal processing module built into the USRP based on requirements, and write register transfer level code or use high-level synthesis tools to design FPGA logic that meets the requirements; after the design is completed, integrate the signal processing module into the RFNoC architecture and connect it to the AXI bus to ensure compatibility with the internal data channel of the USRP; use the Xilinx Vivado tool chain for synthesis and implementation to generate the FPGA bitstream file;

[0110] Replace the default firmware, and burn the FPGA bitstream file into the USRP device to replace the default firmware; specifically, the generated firmware file can be copied to the firmware path of the UHD and loaded into the USRP device through the uhd_image_loader tool. During this process, it is necessary to ensure that the FPGA design retains the control signal interfaces required by MATLAB, such as the center frequency, sampling rate, and gain, to ensure the normal control of the USRP by MATLAB.

[0111] After the firmware burning is completed, the system needs to be tested to ensure the normal control of the USRP by MATLAB.

[0112] In this embodiment, the desynchronization sequence processing unit performs desynchronization processing on the received baseband signal, identifies the start point of the data packet and removes the synchronization sequence. For the specific flowchart of removing the synchronization sequence, see Figure 4 The process of generating the baseband signal transmission waveform is as follows:

[0113] Calculate the autocorrelation function of the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit and the total synchronization ZC sequence. The expression of the autocorrelation function is as follows:

[0114]

[0115] where Z(n) represents the total synchronization ZC sequence added to the transmission waveform data packet in the synchronization sequence processing unit, Y(n + τ) represents the corresponding signal in the received signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit, and the superscript * represents the complex conjugate operation; when the autocorrelation function R(τ) reaches the maximum value, set the corresponding Y(n + τ) as the total synchronization point S of the complete data cycle of the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit;

[0116] Judge whether the synchronization of the total synchronization ZC sequence is successful. If it is not successful, the current data transmission fails and the simulation terminates; if it is successful, delete the data of the length of the total synchronization ZC sequence. Subsequently, in the loop block based on the transmission time interval, calculate the autocorrelation function of the loop block and the frame synchronization ZC sequence. The expression is as follows:

[0117]

[0118] where Z1(n) represents the transmission time interval synchronization ZC sequence added to the signal in the synchronization signal unit; when the autocorrelation function R1(τ) reaches the maximum value, set the corresponding Y(n + τ) as the starting point B of the frame data in the signal;

[0119] Judge whether the synchronization of the frame synchronization ZC sequence is successful. If it is successful, based on the starting point B of the frame data in the signal, remove the frame synchronization ZC sequence and determine the starting point of the frame data of each frame of the received data. The process is as follows:

[0120] For the first frame of the received data, calculate the starting reference point A of the first frame data based on the total synchronization point S, and take point A as the final frame data starting point A' of the first frame of the received data; for the second frame and subsequent other frames, calculate the starting reference point A of the current frame data based on the final frame data starting point A' of the previous frame; judge whether the difference between the starting reference point A and the frame data starting point B is less than the CP time domain length. If it is not less than, take point A as the final frame data starting point A' of the current frame; if it is less than, take point B as the final frame data starting point A' of the current frame;

[0121] If it is judged that the synchronization of the frame synchronization ZC sequence is not successful, calculate the starting reference point A of the first frame data based on the total synchronization point S, and take point A as the final frame data starting point A' of the first frame; for the second frame and subsequent other frames, use the final frame data starting point A' of the previous frame as the frame data starting point A' of this frame;

[0122] Remove the frame data based on the starting point of the frame data for each frame and enter the process of the next frame synchronization, and recalculate the starting point B of the frame data for the next frame synchronization.

[0123] Output the baseband signal that has released all frame synchronization sequences to the receiving - end software processing unit.

[0124] Specifically, the receiving - end software processing unit includes a waveform demodulation module, a resource grid demapping module, a channel estimation and equalization extraction module, a layer demapping module, a constellation demapping module, a descrambling module, a rate matching demodulation module, and a channel decoding module that are connected in sequence.

[0125] The waveform demodulation module is used to demodulate the waveform of the baseband signal after desynchronization and output the demodulated digital signal to the resource grid demapping module.

[0126] The resource grid demapping module is used to demap the digital signal from the time - frequency resource grid structure, restore the time, frequency, and spatial resource distribution of the digital signal, obtain the signal after resource grid demapping, and output it to the channel estimation and equalization detection module.

[0127] The channel estimation and equalization extraction module is used to estimate the channel characteristics of the digital signal, use the equalization algorithm to reduce the distortion of the digital signal, extract the effective signal in the signal, and output it to the layer demapping module.

[0128] The layer demapping module is used to restore the multi - layer structure of the physical layer of the signal to a single - layer structure, and restore the signal logic, and output the single - layer signal to the constellation demapping module.

[0129] The constellation demapping module is used to map the constellation points to digital signals and output them to the descrambling module.

[0130] The descrambling module is used to remove the pseudo - random sequence added by the transmitting - end signal processing unit in the digital signal, restore the distribution of the digital signal in time and frequency, and output the descrambled digital signal to the rate matching demodulation module.

[0131] The rate matching demodulation module is used to adjust the bit rate of the descrambled digital signal to be equal to the bit rate of the signal before rate matching by the transmitting - end signal processing unit, and output the digital signal after rate matching demodulation to the channel decoding module.

[0132] The channel decoding module is used to correct the errors of the digital signal after rate matching demodulation, restore the digital signal with errors generated during the transmission process, ensure the integrity of the signal, obtain the restored original digital bit - stream signal, and output it to the performance evaluation unit.

[0133] In this embodiment, the performance evaluation unit compares the restored original digital bit - stream signal with the digital bit - stream signal generated by the transmitting - end software processing unit to evaluate the performance of the hardware - in - the - loop real - time communication simulation system. The process is as follows:

[0134] The performance evaluation unit receives the original digital bitstream signal restored by the receiving - end software processing unit;

[0135] Compare the restored original digital bitstream signal with the digital bitstream signal generated by the transmitting - end software processing unit to obtain the bit error rate of the original digital bitstream signal;

[0136] Calculate the amount of signals processed by the hardware - in - the - loop real - time communication system per unit time to obtain the throughput of the hardware - in - the - loop real - time communication system;

[0137] Evaluate the performance of the hardware - in - the - loop real - time communication system by using the bit error rate of the original digital bitstream signal and the throughput of the hardware - in - the - loop real - time communication system.

[0138] Embodiment 4

[0139] In this embodiment, the specific implementation method of the hardware - in - the - loop real - time communication simulation system based on the MATLAB platform and USRP devices is as follows:

[0140] Hardware preparation includes two personal computers, two USRP X310 series devices, as well as several network cables and SMA radio - frequency coaxial connectors for communication and signal transmission between devices; for the software configuration requirements of personal computers, refer to Table 1.

[0141] Table 1

[0142]

[0143]

[0144] Table 2

[0145]

[0146] In addition, a single USRP Ettus X310 needs to have two Tx or Rx duplex interfaces and two Rx interfaces. When there are two USRP devices, any one can be fixed as the transmitting end and the other as the receiving end to achieve multiple - input multiple - output transmission. At the same time, the transmission modes of multiple - input single - output, single - input multiple - output, and single - input single - output can also be adjusted by configuring parameters.

[0147] If a switch is used to connect personal computers and USRP devices, the switch bandwidth should be at least gigabit to ensure communication performance. To optimize the large - data transmission efficiency, using a 10 - gigabit switch has a better effect.

[0148] In this embodiment, the transceiver USRP cooperation unit uses the USRP toolkit functions in MATLAB to match the MATLAB platform with the USRP device, realizing the mutual communication between USRP devices and the MATLAB platform.

[0149] The process is as follows:

[0150] Directly connect the computer with the MATLAB platform and the USRP device through a network cable, and no adapter can be used in the middle;

[0151] Use the USRP toolkit Communications Toolbox Support Package for USRP Radio in MATLAB to align the parameters of the baseband signal processing module with the parameters of the USRP cooperation module; among them, the key parameters of USRP transceiver should match the signal generation parameters of the pure software emulator, including:

[0152] Center frequency, the center frequency of the transceiver signal matches the center frequency designed during signal generation;

[0153] Transceiver gain, the transceiver gain of USRP should match the transmit power designed during signal generation. If the amplitude of the signal generated by pure software is too large, the transceiver gain can be appropriately reduced;

[0154] Number of antenna ports. If the pure software simulation is in SISO mode, USRP should correspond to it and only enable a pair of transceiver ports. Two devices support up to 2×2 multiple-input multiple-output transmission at most;

[0155] The key parameters of USRP transceiver also match other hardware performances, including: symbol rate limited by transmission rate, transceiver gain affected by the performance of other external devices;

[0156] Set the IP addresses of the computer with the transmitter software processing unit and the computer with the receiver software processing unit in the same IP network segment, but they cannot conflict with the IP addresses of the USRP devices they are respectively connected to;

[0157] Based on the USRP clock frequency and signal bandwidth, set the upsampling and downsampling factors, connect the MATLAB platform and the USRP hardware, and realize the mutual communication between USRP devices and the MATLAB platform;

[0158] In software and hardware cooperation, it should be noted that: after the transmitter USRP device starts to send signals, that is, when the red light of the corresponding transmit port of USRP-A lights up, the receiving USRP device can be used to receive the signals sent over.

[0159] Specifically, the design of the ZC synchronization sequence needs to be adjusted according to the single-input multiple-output and multiple-input multiple-output modes of USRP:

[0160] In the multiple-input multiple-output mode, the signal received by each antenna of the receiving-end USRP device is the superposition of the signals of all transmitting antennas. Therefore, in order to distinguish the signal start points of different antennas, it is necessary to perform differential processing on the data transmitted by each antenna;

[0161] To achieve differential processing of multi-antenna signals, staggered ZC synchronization sequences are adopted; assume there are two antennas A and B, both of which transmit the same data content, but the leading synchronization sequences are different; the specific operations are as follows:

[0162] For antenna A: Insert a ZC sequence with a root of 1 and a length of 127 before the data, and then insert a 0 sequence with a length of 127;

[0163] For antenna B: Insert a 0 sequence with a length of 127 before the data, and then insert a ZC sequence with a root of 2 and a length of 127;

[0164] From the time domain perspective, the two ZC sequences are orthogonal, so interference between signals of different antennas can be avoided.

[0165] In actual implementation, the transmitting end circularly transmits the incoming signal, and the receiving end receives data with a length more than twice the transmitting window length, so as to ensure that a complete periodic signal can be obtained.

[0166] Set to save the received data to a specific folder for convenient debugging.

[0167] After receiving is completed, it is necessary to perform synchronization processing on the data to determine the start point of the complete receiving cycle and the start point of the real data after deleting the synchronization sequence; then send the real data into the pure software emulator to replace the received data of the pure software emulator.

[0168] When modifying on the basis of an existing mature simulation system, it is necessary to deconstruct and optimize the simulation code structure, specifically as follows:

[0169] Main function splitting: Split the original single full-process simulation system into two parts: the transmitting end and the receiving end. The transmitting end and the receiving end are respectively controlled by two USRP devices and run on two independent computers.

[0170] Adjustment of the circular structures at the receiving and transmitting ends: There is a circular structure based on a single parameter in traditional software simulation, but in the process of USRP receiving and transmitting, due to the hardware time consumption and the need to determine the data content before transmission, it is necessary to remove the inappropriate circular logic to improve efficiency.

[0171] Transmitter - end data reconstruction: Merge multiple small data blocks into one data block for transmission to reduce hardware time consumption. The specific operation is to add a data matrix, save all valid data generated during each transmission, and reconstruct it into a matrix in the antenna dimension to adapt to the transmitter - end.

[0172] Receiver - end data replacement: The receiver replaces the desynchronized data according to the transmission time interval, and at the same time imports the replaced data into the simulator to verify the reception accuracy.

[0173] Prioritize downlink testing: Use one USRP as the base station and another USRP as the user - end for downlink simulation. At the same time, since the feedback link support is relatively complex, it is recommended to cancel the feedback link simulation in the initial stage.

[0174] After the split is completed, the correctness of the split and data - processing logic at the transmitter - end and receiver - end can be verified through data sharing or export.

[0175] After the split is completed, the correctness of the split and data - processing logic at the transmitter - end and receiver - end can be verified through data sharing or export.

[0176] Specifically, the USRP in - the - loop algorithm test branch is used to detect the communication situation between the personal computer and the USRP, which involves the part of the transceiver USRP cooperation unit.

[0177] In this branch, the personal computer and the USRP are directly connected by a network cable, and a network - cable adapter cannot be used in the middle. When connecting, the IP addresses of the computers need to be set in the same network segment, and the IP address cannot conflict with the IP address of the USRP. If more than two devices are to be connected to the same network through a switch, a switch with a bandwidth of at least one gigabit or more is required to prevent communication interruption between the personal computer and the USRP.

[0178] Two USRPs are connected through an SMA male RF coaxial connector. The two ends of the connector are respectively connected to the RF output port and RF input port of the transmitter - end and receiver - end. To prevent incorrect transmission power settings and hardware damage caused by excessive power, a signal attenuator can also be connected in series in the wired connection.

[0179] The receiver - end USRP device receives the simulated RF signal, converts the RF signal into a baseband signal and sends it to the desynchronization signal unit.

[0180] Specifically, in the multiple - input multiple - output mode, the desynchronization sequence unit needs to perform correlation calculations on the received signals using ZC sequences with different seeds to distinguish antenna signals. The process is as follows:

[0181] Perform a ZC - sequence correlation operation with a seed of 1 and a length of 127 on the received signal to locate the starting point of the signal of antenna A;

[0182] Perform the ZC sequence correlation operation with a seed of 2 and a length of 127 on the received signal to locate the starting point of the signal of antenna B;

[0183] Since the seeds of the two ZC sequences are different, their correlation peaks will appear at different positions in the received signal. Theoretically, the time-domain distance between the two peak points should be equal to the length of a ZC sequence. Therefore, the orthogonal ZC sequence design can ensure that the signals of different antennas do not interfere with each other at the receiving end.

[0184] Obviously, the above embodiments of the present invention are only examples for clearly explaining the present invention, and are not limitations on the implementation manners of the present invention. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims

1. A semi-physical real-time communication simulation system based on MATLAB platform and USRP device, characterized in that: The system comprises: The transmitting end software processing unit is used to generate a digital bit stream signal, encode and modulate the digital bit stream signal to obtain a baseband signal, and output it to the synchronization sequence processing unit; The synchronization sequence processing unit marks the starting point of the data packet of the baseband signal transmission waveform based on the double-level ZC synchronization sequence, so as to achieve the alignment of the baseband signal in time and frequency; The USRP collaboration unit at the transmitter is used to match the parameters of the MATLAB platform at the transmitter and the USRP device, and connect the MATLAB platform at the transmitter and the USRP device; USRP hardware-in-the-loop simulation unit, which uses the built-in FPGA of the USRP device to optimize the hardware-level signal processing performance of the USRP device or perform channel simulation tests, collaborative simulation tests of the USRP device and other systems, outdoor actual communication scenario tests and channel data acquisition tests of the USRP device, and normality tests of the interface communication between the MATLAB platform and the USRP device, and outputs the baseband signal carrying the test results to the desynchronization sequence processing unit; The receiving-end USRP collaboration unit is used to match the parameters of the receiving-end MATLAB platform and the USRP device, and connect the receiving-end MATLAB platform and the USRP device; A desynchronization sequence processing unit is used to perform desynchronization processing on the received baseband signal, identify the starting point of the data packet and remove the synchronization sequence, and generate a baseband signal transmission waveform; The receiving end software processing unit is used to receive the baseband signal transmission waveform processed by the desynchronization sequence processing unit, perform waveform demodulation and decoding processing, and obtain the restored original digital bit stream signal.

2. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 1, characterized in that: The process of the synchronization sequence processing unit marking the starting point of the data packet of the transmission waveform based on the double-level ZC synchronization sequence is as follows: The expression for defining the dual-layer ZC synchronization sequence Z(τ) is: Where r is the root index of the ZC synchronization sequence, N is the length of the sequence, and n is the index of the current sequence element; The double-layer ZC synchronization sequence Z(τ) is embedded into the beginning, end and before each transmission time interval of the baseband signal transmission waveform data packet; the double-layer ZC synchronization sequence embedded into the beginning and end of the baseband signal transmission waveform data packet is the total synchronization ZC sequence, and the total synchronization ZC sequence is used to determine the position of each complete data cycle in the transmission waveform data packet; the double-layer ZC synchronization sequence embedded before each transmission time interval is the frame synchronization ZC sequence, which is used to perform positioning correction on each transmission time interval data.

3. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 1, characterized in that: The transmitting end USRP collaboration unit uses the USRP toolkit function in the transmitting end MATLAB platform to match the MATLAB platform with the USRP device, thereby realizing mutual communication between the USRP device and the transmitting end MATLAB platform; The receiving-end USRP collaboration unit utilizes the USRP toolkit function in the receiving-end MATLAB platform to match the MATLAB platform with the USRP device, thereby achieving mutual communication between the USRP device and the receiving-end MATLAB platform.

4. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 1, characterized in that: It also includes a pure software simulation unit and a performance evaluation unit. The pure software simulation unit is used to assist in simulation and algorithm verification at the software level, add serial channels, and is implemented using a software simulation platform modified from an existing MATLAB pure software simulation system or a self-built software simulation platform; the performance evaluation unit is used to evaluate the performance of the semi-physical real-time communication simulation system using the restored original digital bit stream signal.

5. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 4, characterized in that: The hardware equipment of the USRP hardware-in-the-loop simulation unit includes two USRP devices, namely a transmitting USRP device and a receiving USRP device; it also includes: a USRP hardware-in-the-loop simulation branch, a multi-device joint simulation branch, a channel data acquisition branch, and a USRP in-the-loop algorithm test branch; the added series channels are: a series channel between the pure software simulation unit and the USRP hardware-in-the-loop simulation branch, a series channel of the multi-device joint simulation branch, a series channel of the channel data acquisition branch, and a series channel of the USRP in-the-loop algorithm test branch.

6. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 5, characterized in that: The USRP hardware-in-the-loop simulation unit receives a transmission waveform data packet to which a double-level ZC synchronization sequence Z(τ) has been added, and determines whether the transmission waveform passes through the simulation channel of the pure software simulation unit according to the simulation settings. If the transmission waveform passes through the simulation channel of the pure software simulation unit, it determines whether to perform channel series connection. If not, the USRP device is not enabled, and the signal enters the pure software simulation unit for simulation; the signal simulated by the pure software simulation unit is output to the desynchronization sequence unit; If the channels are connected in series, determine whether to expand the USRP internal FPGA channel.

7. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 6 is characterized in that: If the transmission waveform does not pass through the simulation channel of the pure software simulation unit, it is determined whether to perform USRP internal FPGA channel expansion; If you want to expand the USRP internal FPGA channel, you will enter the USRP hardware-in-the-loop simulation branch. The USRP hardware-in-the-loop simulation branch uses the built-in FPGA of the USRP device to optimize the hardware-level signal processing performance of the USRP device or simulate the channel, and then uses the transmitting USRP device as the RF signal output device to output the RF signal to the receiving USRP device. If the USRP internal FPGA channel expansion is not performed, it is determined whether the signal passes through other hardware channels. If so, it enters the multi-device joint simulation branch; the multi-device joint simulation branch integrates multiple communication-related devices into the MATLAB platform to evaluate the interoperability and collaboration capabilities of the semi-physical real-time communication simulation system with other systems in a complex environment; The other systems include: a channel simulator, a base station device, and a digital twin system; using a transmitting end USRP device as a radio frequency signal output device to output the radio frequency signal to a receiving end USRP device; If it does not pass through other hardware channels, it is determined whether the signal passes through the air interface channel of the USRP device. If so, it enters the channel data acquisition branch. The channel data acquisition branch uses the transmitting USRP device and the receiving USRP device to send and receive signals in the actual scene, and uses the MATLAB platform to send and receive dense pilot or full pilot signals for channel data acquisition. After completing the data acquisition, the semi-physical real-time communication simulation system analyzes the channel environment based on key parameters such as the channel impulse response, channel frequency response, and power delay distribution, and obtains channel data such as path loss and multipath delay distribution. If the signal does not pass through the air interface channel of the USRP device, it enters the USRP in-the-loop algorithm test branch; the USRP in-the-loop algorithm test branch is used to test the normality of the hardware interface communication between the device equipped with the MATLAB platform and the USRP hardware device, and the hardware interface includes the RF port of the transmitting USRP device and the RF port of the receiving USRP device; during the test, the RF port of the transmitting USRP device and the RF port of the receiving USRP device are connected by an RF coaxial connector for testing; The receiving USRP device receives the simulated RF signal, converts the RF signal into a baseband signal and sends it to the desynchronization signal unit.

8. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 7, characterized in that: Before using the built-in FPGA of the USRP device to optimize the hardware-level signal processing performance of the USRP device, the USRP hardware-in-the-loop simulation branch needs to burn the UHD firmware provided by the toolkit into the USRP. The process is as follows: Configure the development environment in the computer device, including: installing the UHD driver, RFNoC development tool chain, and MATLAB's USRP support package; the UHD driver provides the communication function between the computer and the USRP hardware, the RFNoC framework supports FPGA logic development, and the MATLAB's USRP support package controls the USRP's signal transmission and reception; Design USRP built-in signal processing modules based on requirements, and write register transfer level code or use high-level synthesis tools to design FPGA logic that meets the requirements; after the design is completed, integrate the signal processing module into the RFNoC architecture and connect it to the AXI bus to ensure compatibility with the USRP internal data channel; use the Xilinx Vivado tool chain for synthesis and implementation to generate FPGA bitstream files; Replace the default firmware and burn the FPGA bitstream file into the USRP device to replace the default firmware; After the firmware is burned, test it.

9. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 3, characterized in that: The desynchronization sequence processing unit performs desynchronization processing on the received baseband signal, identifies the starting point of the data packet and removes the synchronization sequence, and generates a baseband signal transmission waveform process as follows: Calculate the autocorrelation function of the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit and the total synchronized ZC sequence. The expression of the autocorrelation function is: Wherein, Z(n) represents the total synchronization ZC sequence added to the transmission waveform data packet in the synchronization sequence processing unit, Y(n+τ) represents the corresponding signal in the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit, and the superscript * represents the complex conjugate operation; when the autocorrelation function R(τ) reaches the maximum value, the corresponding Y(n+τ) is set to be the total synchronization point S of the complete data cycle of the signal processed by the USRP hardware-in-the-loop simulation unit or the pure software simulation unit; Determine whether the total synchronization ZC sequence synchronization is successful. If not, the data transmission fails and the simulation terminates. If successful, delete the data of the total synchronization ZC sequence length, and then calculate the autocorrelation function of the cyclic block and the frame synchronization ZC sequence in the cyclic block based on the transmission time interval. The expression is: Wherein, Z1(n) represents the transmission time interval synchronization ZC sequence added to the signal in the synchronization signal unit; when the autocorrelation function R1(τ) reaches the maximum value, the corresponding Y(n+τ) is set as the frame data starting point B in the signal; Determine whether the frame synchronization ZC sequence synchronization is successful. If successful, remove the frame synchronization ZC sequence based on the frame data starting point B in the signal, and determine the frame data starting point of each frame of the received data. The process is: For the first frame of received data, the starting reference point A of the first frame data is calculated based on the total synchronization point S, and point A is used as the final frame data starting point A' of the first frame of received data; for the second frame and other subsequent frames, the starting reference point A of the current frame data is calculated based on the final frame data starting point A' of the previous frame; it is determined whether the difference between the starting reference point A and the frame data starting point B is less than the CP time domain length, if not, point A is used as the final frame data starting point A' of the current frame; if less, point B is used as the final frame data starting point A' of the current frame; If it is determined that the frame synchronization ZC sequence synchronization is unsuccessful, the starting reference point A of the first frame data is calculated based on the total synchronization point S, and point A is used as the final frame data starting point A' of the first frame; for the second frame and other subsequent frames, the final frame data starting point A' of the previous frame is used as the final frame data starting point A' of the current frame; Based on the final frame data starting point A′ of each frame, the frame data is removed and the next frame synchronization process is entered, and the frame data starting point B of the next frame synchronization is recalculated; The baseband signal from which all frame synchronization sequences have been released is output to a receiving end software processing unit.

10. The semi-physical real-time communication simulation system based on MATLAB platform and USRP device according to claim 9, characterized in that: The performance evaluation unit compares the restored original digital bit stream signal with the digital bit stream signal generated by the transmitting end software processing unit to evaluate the performance of the semi-physical real-time communication simulation system, and the process is: The performance evaluation unit receives the original digital bit stream signal restored by the receiving end software processing unit; Comparing the restored original digital bit stream signal with the digital bit stream signal generated by the transmitting end software processing unit to obtain the bit error rate of the original digital bit stream signal; Calculate the amount of signals processed by the semi-physical real-time communication system per unit time to obtain the throughput of the semi-physical real-time communication system; The performance of the semi-physical real-time communication system is evaluated using the bit error rate of the original digital bit stream signal and the throughput of the semi-physical real-time communication system.

Images