Wafer polishing method, polishing device and processing equipment

Abstract

The present invention provides a wafer polishing method, polishing apparatus, and processing equipment. The wafer polishing method is used to remove a target layer, including a first layer and a second layer having similar friction coefficients. A single polishing process includes a first polishing stage and a second polishing stage. The method comprises: determining a first time; determining a material removal amount and a material removal rate of the wafer in the second polishing stage; calculating a second time; adjusting the first time based on the second time to obtain a third time; polishing the current wafer, performing the first polishing stage based on the third time, and performing the second polishing stage based on the second time, so that the second layer reaches a target thickness. The polishing method of the present invention can improve the chemical mechanical polishing efficiency and polishing accuracy of specific wafers.

Description

Technical Field

[0001] The present invention belongs to the technical field of chemical mechanical polishing and is used for processing semiconductor wafers. Specifically, it relates to a wafer polishing method, a polishing device and a processing equipment. Background Art

[0002] Chemical Mechanical Polish (CMP) equipment is a key process in semiconductor device manufacturing, used to remove excess material layers from the wafer surface and achieve surface flatness. As integrated circuit (IC) process nodes continue to advance, CMP is increasingly used throughout the manufacturing process, addressing diverse polishing requirements for different wafer types.

[0003] In the CMP process, detecting changes in the drive motor torque is used as an endpoint detection (EPD) method to determine when polishing is complete. However, when two films with similar friction coefficients need to be removed by CMP in two polishing stages, the similar friction coefficients of the two films cause the endpoint detection method for detecting changes in the motor torque to fail in the first polishing stage, and the polishing time for the first polishing stage must be set to a fixed value. Controlling the polishing time only in the second polishing stage not only hinders control of polishing accuracy and easily causes wafers to be under- or over-polished, but also causes the polishing time in the second polishing stage to fluctuate drastically, affecting the production efficiency of the CMP equipment and even the entire production line. Furthermore, as the polishing pad wears, the motor torque curve changes, causing the endpoint detection method for detecting changes in the drive motor torque to fail in the second polishing stage, further increasing the risk of wafer under- or over-polishing. Summary of the Invention

[0004] In view of this, the present invention provides a wafer polishing method, a polishing device and a processing equipment, thereby solving or at least alleviating one or more of the above-mentioned problems and other problems existing in the prior art.

[0005] A first aspect of the present invention provides a wafer polishing method, wherein the wafer polishing method is used to remove a target layer, wherein the target layer includes a first layer and a second layer having similar friction coefficients. A single polishing process of the target layer includes a first polishing stage and a second polishing stage, and includes the following steps:

[0006] Determine the first time;

[0007] Determining a material removal amount and a material removal rate of the current wafer in the second polishing stage, and calculating a second time according to the material removal amount and the material removal rate of the current wafer in the second polishing stage;

[0008] Adjusting the first time according to the second time to obtain a third time includes: when the second time falls within a predetermined threshold range, the third time is equal to the first time; when the second time does not fall within the predetermined threshold range, calculating an adjustment value, and determining the third time according to the adjustment value and the first time;

[0009] A first polishing phase is performed according to the third time, and a second polishing phase is performed according to the second time, so that the second layer reaches a target thickness.

[0010] Optionally, determining the first time includes:

[0011] A first predetermined time is determined as the first time, and / or the third time of a previous wafer is determined as the first time, and the first predetermined time falls within the predetermined threshold range.

[0012] Optionally, the wafer polishing method further includes:

[0013] measuring the initial thickness of the second layer of the wafer before the first polishing stage as a thickness before value;

[0014] After the second polishing stage is completed, the remaining thickness of the second layer of the wafer is measured as a post-thickness value.

[0015] Optionally, the first polishing stage removes a portion of the first layer, and the second polishing stage removes a remaining portion of the first layer and a portion of the second layer, and determining a material removal amount and a material removal rate of the wafer in the second polishing stage includes:

[0016] determining a thickness of a remaining portion of the first layer;

[0017] determining a material removal amount of the wafer in the second polishing stage according to the previous thickness value, the thickness of the remaining portion of the first layer and the target thickness; and / or,

[0018] determining a material removal amount of the wafer in a second polishing stage according to the thickness before value, the thickness of the remaining portion of the first layer, and the thickness after value;

[0019] The material removal rate is determined based on the amount of material removed from the wafer during the second polishing stage.

[0020] Optionally, determining the thickness of the remaining portion of the first layer includes:

[0021] After the first polishing stage of the first wafer is completed, measuring the thickness of the remaining portion of the first layer of the first wafer;

[0022] The thickness of the remaining portion of the first layer of the current wafer is determined according to the thickness of the remaining portion of the first layer of the previous wafer.

[0023] Optionally, the first time and the second time of the first wafer are determined by the following steps:

[0024] Determining the first predetermined time as the first time of the first wafer;

[0025] determining a material removal amount of the first wafer in the second polishing stage according to the previous thickness value of the first wafer, the thickness of the remaining portion of the first layer, and the target thickness;

[0026] The second time of the first wafer is determined according to a theoretical removal rate of the first layer, a theoretical removal rate of the second layer, and a material removal amount of the first wafer in the second polishing stage.

[0027] Optionally, determining the second time of the first wafer according to the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage includes:

[0028] The second time of the first wafer is determined according to the thickness of the remaining part of the first layer of the first wafer and the theoretical removal rate of the first layer, as well as the previous thickness value of the first wafer, the target thickness and the theoretical removal rate of the second layer.

[0029] Optionally, the first time and the second time of the current wafer are determined by the following steps, including:

[0030] Determining the third time of the previous wafer as the first time of the current wafer;

[0031] determining a material removal amount of the current wafer in the second polishing stage according to a previous thickness value of the current wafer, a thickness of the remaining portion of the first layer, and the target thickness;

[0032] Calculating an actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the thickness of the remaining portion of the first layer, and the subsequent thickness value;

[0033] Calculating an actual material removal rate of the previous wafer in the second polishing stage according to an actual material removal amount of the previous wafer in the second polishing stage and a polishing time of the previous wafer in the second polishing stage;

[0034] The second time of the current wafer is determined according to the material removal amount of the current wafer in the second polishing stage and the actual material removal rate of the previous wafer in the second polishing stage.

[0035] Optionally, calculating the adjustment value and determining the third time according to the adjustment value and the first time includes:

[0036] calculating a difference between the second time and the first predetermined time;

[0037] determining an adjustment factor associated with one or more of a theoretical removal rate of the first layer, a theoretical removal rate of the second layer, a thickness of the first layer, a thickness of the second layer, a thickness of a remaining portion of the first layer, the target thickness, and a usage time of the polishing pad;

[0038] determining the adjustment value according to the adjustment coefficient and the difference;

[0039] The sum of the adjustment value and the first time is used as the third time.

[0040] Optionally, determining the thickness of the remaining portion of the first layer of the current wafer according to the thickness of the remaining portion of the first layer of the previous wafer includes:

[0041] Correcting the thickness of the remaining portion of the first layer of the previous wafer according to the adjustment value of the previous wafer;

[0042] The thickness of the remaining portion of the first layer of the previous wafer after correction is determined as the thickness of the remaining portion of the first layer of the current wafer.

[0043] Optionally, the calculating the actual material removal amount of the previous wafer in the second polishing stage based on the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer and the subsequent thickness value includes: calculating the actual material removal amount of the previous wafer in the second polishing stage based on the previous thickness value of the previous wafer, the subsequent thickness value and the thickness of the remaining part of the first layer of the previous wafer after correction.

[0044] A second aspect of the present invention provides a wafer polishing device for performing the wafer polishing method according to the first aspect, comprising: a first polishing unit, a second polishing unit, and a measuring unit;

[0045] The first polishing unit includes a first polishing head and a first polishing plate, for performing the first polishing stage;

[0046] The second polishing unit includes a second polishing head and a second polishing plate for performing the second polishing stage;

[0047] The measuring unit includes a measuring device for measuring the thickness before and after values.

[0048] The third aspect of the present invention provides a wafer processing device, comprising a controller, a memory and a wafer polishing device as described in the second aspect, wherein the memory is used to store the thickness before value and the thickness after value measured by the measuring device, and the controller is used to control the wafer polishing device to perform the wafer polishing method as described in the first aspect.

[0049] The wafer polishing method of the present invention has the following technical advantages: It does not use the change in disk torque as the endpoint measurement method, thereby avoiding measurement failure and reducing the risk of under- or over-polishing wafers. Furthermore, by grading and coordinating the polishing times of the two polishing stages, the present invention ensures timely and precise control of the polishing thickness, thereby improving wafer production efficiency and polishing accuracy. This method also avoids the problem of multiple wafers being too thin or too thick, increases system fault tolerance and response time, extends the service life of the polishing pad, and significantly reduces production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0051] Figure 1 It is a structural schematic diagram of a wafer polishing unit.

[0052] Figure 2 It is a flow chart of an embodiment of a wafer polishing method of the present invention.

[0053] Figure 3 yes Figure 1 A schematic flow chart of an embodiment of step S2 of the wafer polishing method.

[0054] Figure 4 yes Figure 1 FIG. 1 is a flow chart of an embodiment of step S3 of the wafer polishing method.

[0055] Figure 5 It is a schematic diagram of the material removal during a single polishing process of the present invention.

[0056] Figure 6 It is a flow chart of another embodiment of a wafer polishing method of the present invention.

[0057] Figure 7 It is a structural schematic diagram of the wafer polishing device 100 of the present invention.

[0058] Figure 8It is a structural diagram of the wafer processing equipment 1000 of the present invention.

[0059] Figure 9 It is a flow chart of another embodiment of a wafer polishing method of the present invention.

[0060] Reference numerals:

[0061] First polishing unit 1; second polishing unit 2; measurement unit 3; wafer buffer position 4;

[0062] Polishing head 10; polishing pad 20; polishing plate 30; polishing liquid supply device 40; dressing device 50;

[0063] Wafer polishing device 100; controller 200; memory 300;

[0064] Wafer processing equipment 1000. DETAILED DESCRIPTION

[0065] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments in the embodiments of the present invention should fall within the scope of protection of the embodiments of the present invention.

[0066] In the description of the present invention, it should be understood that the terms "longitudinal", "transverse", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0067] In addition, in the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "installation", "connection" and "connection" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the internal connection between two components. It can be a direct connection or an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to the specific circumstances.

[0068] Figure 1This is a schematic diagram of the wafer polishing unit in a CMP system. As shown, a polishing pad 20 covers the upper surface of a polishing plate 30. A polishing slurry supply device 40 distributes polishing slurry onto the surface of the polishing pad 20. A dressing device 50 is used to condition the polishing pad to a suitable state for polishing. During polishing, the polishing head 10 presses the wafer's surface to be polished against the rotating polishing pad 20 while rotating and moving. The polishing slurry is distributed between the polishing pad and the wafer, chemically and mechanically removing material from the wafer surface and achieving both global and local planarization.

[0069] When continuous, two-stage polishing of the wafer is required, two Figure 1 The wafer polishing unit shown forms a dual-disc process, allowing the wafer to pass through two wafer polishing units in sequence and apply different polishing conditions to each unit to achieve a specific polishing purpose: in the first polishing unit, polishing is performed at a material removal rate much higher than that of the second polishing unit, removing thicker target layers and improving production efficiency; in the second polishing unit, the material removal rate is lower, ensuring stable and accurate polishing results.

[0070] Taking the production of shallow trench isolation structures as an example, the process generally involves first depositing a silicon nitride layer on the surface of a silicon substrate, etching a shallow trench, and then depositing a silicon dioxide layer. At this point, the silicon dioxide fills the shallow trench in the wafer and covers the surface of the silicon nitride layer. Finally, the wafer passes through two polishing units in sequence to remove excess silicon dioxide and a certain amount of silicon nitride from the wafer surface. This ensures that after polishing, no silicon dioxide remains covering the surface of the silicon nitride layer, while the silicon dioxide remains in the shallow trench. In other words, the polishing process is finally stopped stably on the silicon nitride layer to form shallow trench isolation.

[0071] Due to the similar friction coefficients of the silicon dioxide and silicon nitride layers, the endpoint detection method for measuring the change in motor torque in the first polishing unit fails, so the polishing time can only be set to a fixed value. At the same time, because polishing must stop at the silicon nitride layer, that is, the silicon nitride layer is not completely removed, the endpoint detection method for measuring the change in motor torque in the second polishing unit is not accurate enough to control the polishing time, or the final thickness cannot be adjusted in time, seriously affecting the polishing quality, or causing the polishing time to be too long, which in turn causes the polishing time of the second unit to fluctuate drastically. During continuous production, it cannot adapt to the production rhythm of upstream and downstream, thereby reducing the production efficiency of the CMP equipment and even the entire chip production line. In addition, if the change curve of the motor torque changes with the wear of the polishing pad, the control of the polishing time will directly fail, further increasing the risk of under-polishing or over-polishing of the wafer. As a result, the produced wafers cannot meet the requirements of subsequent processes, resulting in a decrease in yield rate.

[0072] The present invention provides a wafer polishing method for removing a target layer from a wafer surface, wherein the target layer comprises a double-layer film structure, and the first and second layers have similar friction coefficients. The method comprises a first polishing stage and a second polishing stage for polishing the target layer, and is used to continuously polish the wafer so that the polished wafer has a second layer having a target thickness.

[0073] In one embodiment, Figure 2 As shown, the following steps are included:

[0074] S1. Determine the first time;

[0075] S2. Determine the material removal amount and material removal rate of the wafer in the second polishing stage;

[0076] S3. Calculate the second time based on the amount of material removed and the material removal rate of the wafer in the second polishing stage;

[0077] S4. Adjusting the first time according to the second time to obtain a third time, comprising: when the second time falls within a predetermined threshold range, the third time is equal to the first time; when the second time does not fall within the predetermined threshold range, calculating an adjustment value, and determining the third time based on the adjustment value and the first time;

[0078] S5. Perform the first polishing stage according to the third time, and perform the second polishing stage according to the second time, so that the second layer reaches a target thickness.

[0079] The polishing method of this embodiment does not rely on endpoint detection. After calculating and determining the second time, the first time is then adjusted in a linked and graded manner based on the second time. This not only makes the polishing time of the first polishing stage adjustable, ensuring timely and precise control of polishing accuracy, but also maximizes the stability and continuity of the first polishing stage. When removing target layers, including double-layer membrane structures with similar friction coefficients, the polishing process can be stopped once the second layer reaches the target thickness. This method reduces control complexity, achieves high polishing accuracy, and improves production efficiency.

[0080] Optionally, in step S1, the first predetermined time is determined as the first time, or the third time of the previous wafer is determined as the first time. Specifically, the current wafer may be the first wafer or the mth wafer (m>1). For the first wafer, the first time is set to the first predetermined time, which may be an empirical value determined based on actual processing conditions. For the mth wafer, the first time can be set to the first predetermined time, but is preferably set to the third time of the m-1th wafer. This allows the effect of the adjustment to the polishing time of the previous wafer to be maintained when polishing the current wafer, which is beneficial for consistency in wafer production.

[0081] Optional, such as Figure 3 As shown, step S2 and step S3 include the following steps:

[0082] S21. Determine the amount of material removed from the current wafer during the second polishing stage based on the wafer thickness. The amount of material removed represents the volume removed from the wafer during the polishing process. Since the diameter of the wafer is known during processing, the amount of material removed can be determined by measuring the wafer thickness.

[0083] In one embodiment, the wafer polishing method of the present invention further includes measuring the initial thickness of the second layer of the current wafer as a pre-thickness value PreThk before the first polishing stage, and then subtracting the target thickness TarThk of the second layer film after CMP determined by the wafer processing target from the pre-thickness value PreThk. The result obtained is the thickness of the material polished away in the second polishing stage, and the corresponding volume is the material removal amount in the second polishing stage.

[0084] In one embodiment, the wafer polishing method of the present invention further includes measuring the remaining thickness of the second layer of the current wafer after the second polishing stage as a post-thickness value PostThk. When determining the amount of material removed from the previous wafer in the second polishing stage, since the previous wafer has already been polished, i.e., the post-thickness value PostThk has already been measured, the material removal amount calculated by subtracting the post-thickness value PostThk from the pre-thickness value PreThk is the actual amount of material removed from the previous wafer in the second polishing stage, resulting in a more accurate result.

[0085] S22. Determine the actual material removal rate of the previous wafer in the second polishing stage as the material removal rate of the current wafer in the second polishing stage.

[0086] The unit of Material Removal Rate (MRR) is usually expressed as volume unit divided by time unit, which is used to describe the volume of material that can be removed per unit time. The calculation process is the material removal amount divided by the polishing time.

[0087] Specifically, for the first wafer, since there is no previous wafer, the theoretical material removal rate of the second layer can be directly used as the actual material removal rate of the previous wafer in the second polishing stage. The theoretical material removal rate can be obtained by using a model that describes the material removal rate or by measuring and calculating through trial polishing.

[0088] For the mth wafer, since the m-1th wafer has been polished, the actual material removal rate of the m-1th wafer in the second polishing stage can be calculated based on the material removal amount of the m-1th wafer in the second stage or the actual material removal amount and polishing time. This is more accurate than using the theoretical removal rate and can reduce the change in material removal rate due to changes in polishing conditions, which can reduce the inability to calculate the accurate second time in the next step, resulting in a decrease in polishing accuracy.

[0089] S23. Calculate the second time by dividing the material removal amount of the current wafer in the second polishing stage by the material removal rate.

[0090] Optionally, in the polishing recipe for the dual-plate process, corresponding polishing conditions are set to ensure that the polishing times of the first and second polishing stages are approximately the same. This can reduce wafer waiting time during continuous production, thereby improving production efficiency. Therefore, in step S4, a predetermined threshold range can be set based on the polishing time of the first or second polishing stage in the polishing recipe. In this embodiment, the predetermined threshold range is set around the first predetermined time, that is, the first predetermined time falls within the predetermined threshold range. Preferably, the first predetermined time is set to the median of the predetermined threshold range. Furthermore, a trial polishing method is used to determine the polishing time limit for the second polishing stage, and the predetermined threshold range is set based on the polishing time limit. Furthermore, if the second time of the first wafer falls within the predetermined threshold range, the first time of the first wafer is not adjusted. Step S4 adjusts the first time based on the relative magnitude of the second time to the predetermined threshold range. The first time is adjusted only when the second time exceeds the predetermined threshold range, thereby achieving graded and coordinated adjustment of the first and second times.

[0091] When the second time is less than the lower limit of the predetermined threshold range, the wafer is over-polished, and the desired adjustment direction for the polishing time in the second polishing stage is to decrease it. When the second time is greater than the upper limit of the predetermined threshold range, the wafer is under-polished, and the desired adjustment direction for the polishing time in the second polishing stage is to increase it. However, adjusting only the second time not only slows down the response speed but also has an adjustment limit. Therefore, this embodiment reduces the amount of adjustment required for the second time by aligning the adjustment direction of the polishing time in the first polishing stage with the desired adjustment direction of the polishing time in the second polishing stage. This allows for faster control of wafer polishing accuracy and avoids producing substandard wafers after the second time reaches its adjustment limit. The adjustment range for the polishing time in the first polishing stage can be determined based on the difference between the second time and the first predetermined time, as well as the varying degrees of influence of the first and second polishing stages on the polishing process.

[0092] Specifically, such as Figure 4As shown, in step S4, when the second time does not fall within the predetermined threshold range, calculating the adjustment value, and determining the third time according to the adjustment value and the first time, including the following steps:

[0093] S41. Calculate the difference between the second time and the first predetermined time. The first predetermined time is the base time of the first polishing stage. The difference between the second time and the first predetermined time can represent the adjustment direction of the polishing time of the first polishing stage, and partially represent the adjustment range of the polishing time of the first polishing stage.

[0094] S42. Determine an adjustment factor. The adjustment factor is used to measure the different impacts of the first polishing stage and the second polishing stage on the polishing process, thereby partially representing the adjustment range of the polishing time in the first polishing stage. Optionally, the adjustment factor is determined based on the material removal rates of the first and second polishing stages when removing corresponding material layers, so that the adjustment factor can balance the different impacts of the same polishing time on the polishing results between the first and second polishing stages. Preferably, the adjustment factor is an empirical value determined through trial polishing and is associated with one or more of the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, the actual material removal rate of the first polishing stage, the actual material removal rate of the second polishing stage, the thickness of the first layer, the thickness of the second layer, the target thickness, and the usage time of the polishing pad. Furthermore, the adjustment factor is the ratio of the theoretical removal rate of the second layer to the theoretical removal rate of the first layer, or the ratio of the actual material removal rate of the second polishing stage to the actual material removal rate of the first polishing stage. Furthermore, because polishing pads wear over time and are replaced at the end of their service life, the adjustment factor also changes based on the usage time of the polishing pads in each of the first and second polishing stages. In a preferred embodiment, since the first polishing stage causes more severe wear on the polishing pad, the adjustment coefficient can be expressed as a decreasing function of the polishing time. For example, the ratio of the theoretical removal rate of the second layer to the theoretical removal rate of the first layer is multiplied by a gradually decreasing constant in stages according to time as the adjustment coefficient.

[0095] S43. Determine an adjustment value based on the adjustment coefficient and the difference. Optionally, the product or quotient of the adjustment coefficient and the difference is determined as the adjustment value to represent the degree of adjustment desired in the first polishing stage.

[0096] S44. The sum of the adjustment value and the first time is taken as the third time, that is, the third time = the first time + the adjustment value.

[0097] The first predetermined time falls within the predetermined threshold range. When the second time is less than the lower limit of the predetermined threshold range, the wafer is at risk of being over-ground or under-ground. The difference calculated in step S41 is a negative value, and the adjustment value is also a negative value. The third time calculated according to the formula in step S44 is less than the first time, which means that the polishing time of the first polishing stage is reduced. As a result, the amount of material removed in the first polishing stage is reduced, which can reduce the risk of over-ground wafers with a faster response speed and make the thickness of the wafer approach the target thickness faster. When the second time is greater than the upper limit of the predetermined threshold range, the wafer is at risk of being under-ground or under-ground. The difference calculated in step S41 is a positive value, and the adjustment value is also a positive value. The third time calculated according to the formula in step S34 is greater than the first time, which means that the polishing time of the first polishing stage is increased.

[0098] The technical solution of the present invention adjusts the polishing time of the first stage only when the adjustment range of the second time is large, that is, graded adjustment, so as to ensure the stability and continuity of the first polishing stage as much as possible; at the same time, it can automatically adjust the polishing time of the first polishing stage according to the adjustment expectation and adjustment range of the second time, that is, linkage adjustment, so that the wafer reaches the target thickness faster. The faster control response speed significantly reduces the risk of under-polishing or over-polishing wafers, and further improves the polishing accuracy and production efficiency of chemical mechanical polishing.

[0099] In advanced manufacturing processes, in order to meet the requirements of subsequent processes, the first layer must be completely polished off during the polishing process and the polishing must stop stably at the second layer. Figure 5 As shown, a balance between polishing efficiency and polishing effect is achieved by removing the majority of the first layer at a higher material removal rate in the first polishing stage, and then removing the remaining portion of the first layer and a portion of the second layer at a lower material removal rate in the second polishing stage. This means that in the second polishing stage, not only the second layer is removed, but also the remaining offset portion of the first layer is removed. Therefore, when calculating the material removal amount in the second polishing stage, only considering the removal of the second layer will result in errors, affecting the polishing effect.

[0100] In order to eliminate the adverse effects of the above-mentioned errors on the polishing accuracy, in one embodiment, Figure 6 As shown, the first time and the second time of the wafer are determined by the following steps.

[0101] S61. Determine the first predetermined time as the first time of the first wafer.

[0102] S62. Determine the material removal amount of the first wafer in the second polishing stage according to the previous thickness value of the first wafer, the thickness of the remaining portion of the first layer, and the target thickness.

[0103] For the first wafer, the first polishing stage is performed according to the first predetermined time, and the thickness value of the remaining first layer of film is measured after the first polishing stage as the median thickness MidThk of the first wafer. The material removal amount of the first wafer in the second polishing stage = the previous thickness value + the median thickness value - the target thickness.

[0104] S63. Determine a second time for the first wafer according to the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage.

[0105] Optionally, an estimated value of the material removal rate in the second polishing stage is obtained by taking a weighted average of the theoretical removal rate of the first layer and the theoretical removal rate of the second layer, and then the material removal amount of the first wafer in the second polishing stage calculated in S62 is divided by the estimated value of the material removal rate in the second polishing stage to calculate the second time.

[0106] Preferably, the polishing time for the remaining portion of the first layer and the polishing time for the removed portion of the second layer can be calculated separately, and then the two polishing times can be added together to determine the second time for the first wafer. That is, the polishing time for the remaining portion of the first layer is calculated by dividing the median thickness by the theoretical removal rate of the first layer, and the polishing time for the removed portion of the second layer is calculated by dividing the difference between the previous thickness value and the target thickness by the theoretical removal rate of the second layer. The second time is then calculated by summing the polishing time for the remaining portion of the first layer and the polishing time for the removed portion of the second layer.

[0107] S64. Determine the third time of the previous wafer as the first time of the current wafer.

[0108] For the m-th wafer (m>1), the third time of the (m-1)-th wafer is determined as the first time of the m-th wafer.

[0109] S65. Determine the material removal amount of the current wafer in the second polishing stage according to the previous thickness value of the current wafer, the thickness of the remaining portion of the first layer, and the target thickness.

[0110] S66. Calculate the actual material removal amount of the previous wafer in the second polishing stage based on the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer, and the subsequent thickness value.

[0111] For the mth wafer (m>1), when calculating the material removal amount of the current wafer during the second polishing stage and the material removal amount of the previous wafer during the second polishing stage, the material removal amount of the second stage is corrected based on the remaining portion of the first layer of each wafer to calculate the actual material removal amount of the previous wafer during the second polishing stage. Preferably, because measuring the median thickness of each wafer between polishing stages significantly affects production efficiency, the median thickness of the first wafer can be used. Alternatively, the median thickness can be measured every few wafers, and the thickness of the remaining portion of the first layer of the previous wafer and the current wafer can be determined based on the median thickness.

[0112] S67. Calculate the actual material removal rate of the previous wafer in the second polishing stage according to the actual material removal amount of the previous wafer in the second polishing stage and the polishing time of the previous wafer in the second polishing stage.

[0113] When calculating the time material removal rate of the previous wafer, the actual material removal amount of the m-1th wafer in the second polishing stage calculated in step S66 is divided by the actual polishing time used in the second polishing stage of the m-1th wafer to calculate the actual material removal rate of the m-1th wafer in the second polishing stage.

[0114] S68. Determine the second time of the current wafer according to the material removal amount of the current wafer in the second polishing stage and the actual material removal rate of the previous wafer in the second polishing stage.

[0115] The second time of the current wafer is calculated by dividing the material removal amount of the mth wafer in the second polishing stage calculated in step S65 by the actual material removal rate of the m-1th wafer in the second polishing stage calculated in step S67.

[0116] By correcting the material removal amount of the wafer in the second stage in this embodiment, it is ensured that most of the first layer can be quickly removed in the first polishing stage, and the target thickness of the second layer can be stably stopped in the second polishing stage, thereby improving the accuracy of polishing control.

[0117] In one embodiment, in order to further improve the control accuracy, the thickness of the remaining part of the first layer of the previous wafer can be corrected according to the adjustment value of the previous wafer; and then the thickness of the remaining part of the first layer of the previous wafer after correction is determined as the thickness of the remaining part of the first layer of the current wafer.

[0118] Optionally, the adjustment value is used to reduce or increase the first time. This allows calculation of the change in material removal of the first layer during the first polishing phase after the adjustment based on the adjustment value and the theoretical removal rate of the first layer. This, in turn, allows calculation of the change in thickness increase or decrease in the remaining portion of the first layer of the (m-1)th wafer, thereby correcting the thickness of the remaining portion of the first layer of the (m-1)th wafer. Determining the corrected thickness of the remaining portion of the first layer of the (m-1)th wafer as the thickness of the remaining portion of the first layer of the (m-1)th wafer is more accurate than using the median thickness of the first wafer, eliminating the need for repeated measurements of the median thickness and improving polishing accuracy and efficiency. It is understood that when calculating the actual material removal rate of the (m-1)th wafer during the second polishing phase, the corrected thickness of the remaining portion of the first layer of the (m-1)th wafer can be used instead of the pre-correction value, further improving polishing accuracy and efficiency. In wafer processing, improved polishing accuracy means that the wafer is more likely to meet the requirements of subsequent process steps, thereby improving wafer processing yield.

[0119] The present invention also provides a wafer polishing device 100 for performing the wafer polishing method of the present invention. In one embodiment, Figure 6 As shown, the system comprises a first polishing unit 1, a second polishing unit 2, and a measuring unit 3. The first polishing unit 1 includes a first polishing head and a first polishing plate, and is used to perform the first polishing stage; the second polishing unit 2 includes a second polishing head and a second polishing plate, and is used to perform the second polishing stage. It is understood that the first and second polishing plates also include respective polishing liquid supply devices and dressing devices.

[0120] The measuring unit 3 includes a measuring component, which is preferably an optical measuring component, to measure the thickness of the wafer placed on the measuring unit, including a thickness before value, a thickness mid value and a thickness after value.

[0121] When median thickness measurement is not required, the wafer is transported through the wafer polishing apparatus 100 in the following order: measurement unit 3, first polishing unit 1, second polishing unit 2, and measurement unit 3. When median thickness measurement is required, the wafer is transported through the following order: measurement unit 3, first polishing unit 1, measurement unit 3, second polishing unit 2, and measurement unit 3. Optionally, a wafer buffer 4 is provided between any two of the first polishing unit 1, second polishing unit 2, and measurement unit 3 to facilitate wafer transfer between the robot arm, the first polishing head, and the second polishing head.

[0122] The present invention also provides a wafer processing device 1000, such as Figure 7As shown, the wafer processing equipment includes a wafer polishing device 100, a controller 200, and a memory 300. The polishing recipe of the wafer and the thickness of the wafer measured by the measurement unit 3 are stored in the memory 300. The controller 200 is electrically connected to the wafer polishing device 100 and the memory 300, and is used to control the wafer polishing device 100 to perform the wafer polishing method according to any embodiment of the present invention.

[0123] Figure 8 This is a flow chart of a method for polishing a wafer having a shallow trench isolation structure according to another embodiment of the present invention. Figure 8 , specifically describing the wafer polishing device 100, wafer processing equipment 1000 and wafer polishing method of the present invention.

[0124] In this embodiment, the first layer of the wafer to be polished is a silicon dioxide layer, and the second layer is a silicon nitride layer. Because the diameter of the wafer is constant during the processing of the same wafer batch, for simplicity and clarity, the material removal amount is directly expressed in terms of the material thickness removed. The material removal rate represents the material thickness removed per unit time.

[0125] Before wafer polishing begins, a trial polishing process is performed to determine the theoretical material removal rates for the silicon dioxide layer (RR1) and the silicon nitride layer (RR2). The adjustment factor X = RR2 / RR1 is used. Furthermore, given the target thickness TarThk = ThkT, a first predetermined time (Dt) is set, and the predetermined threshold range (Dt∈[T1,T2]) is stored in memory 300 along with the polishing recipe.

[0126] Under the control of the controller 200 , the first wafer is transferred to the measuring unit 3 of the wafer polishing device 100 , and the previous thickness value PreThk1 of the first wafer is measured, that is, the thickness of the silicon nitride layer of the first wafer is PreThk1, and stored in the memory 300 .

[0127] The controller determines the first time of the first wafer as t11=Dt and uses it as the polishing time of the first stage in the polishing recipe, and controls the first polishing head to absorb the first wafer onto the first polishing plate to start the first polishing stage.

[0128] After the first polishing stage, the first wafer is transferred to the measurement unit, where its median thickness, MidThk, is measured. This is the thickness of the remaining silicon dioxide layer on the first wafer after the first polishing stage. This means Offset1 = MidThk. The material removal during the second polishing stage for the first wafer, RRT1, is calculated as PreThk1 + Offset1 - ThkT.

[0129] The controller calculates a second time t21 for the first wafer by dividing the thickness of the remaining portion of the first layer by the theoretical material removal rate of the first layer to calculate the remaining polishing time of the first layer, and by dividing the material removal amount of the second layer by the theoretical material removal rate of the second layer to calculate the polishing time of the second layer. The controller then calculates the second time by summing the remaining polishing time of the first layer and the polishing time of the second layer, i.e., t21 = Offset1 / RR1 + (PreThk1 - ThkT) / RR2. When setting a predetermined threshold range, the calculated second time for the first wafer should fall within the predetermined threshold range, i.e., t21∈[T1, T2], so that the third time t31 = t11.

[0130] The controller uses the second time t21 as the second stage polishing time in the polishing recipe, and controls the second polishing head to absorb the first wafer and start the second polishing stage on the second polishing plate according to the polishing recipe.

[0131] After the second polishing stage is completed, under the control of the controller, the first wafer is transferred to the measuring unit again for thickness measurement, and the measured thickness is the post-thickness value PostThk1 of the first wafer.

[0132] At this point, the polishing process for the first wafer is complete, and the polishing time and measurement value are stored in memory. It will be appreciated that the controller then transfers the second wafer to the measurement unit 3 and begins its polishing process. The polishing process for the mth wafer, starting with the second wafer, is as follows (m > 1).

[0133] When the mth wafer is polished under the control of the controller 200, a polishing process of the m-1th wafer has been completed. The first time t1 of the m-1th wafer is stored in the memory. m-1 , third time t3 m-1 and the second time t2 m-1 ; and thickness value PreThk m-1 , the thickness of the remaining part of the first layer is Offset m-1 , thickness post value PostThk m-1 . It can also be seen that the adjustment value is Δt m-1 =t3 m-1 -t1 m-1 , wherein, when the first time is increased, the adjustment value is a positive value; when the first time is reduced, the adjustment value is a negative value; when the first time is not adjusted, t3 m-1 It is 0.

[0134] The controller sets the first time of the mth wafer to t1 m =t3 m-1 , and the thickness Offset of the remaining portion of the first layer of the m-1th wafer m-1Calibration is performed to determine the thickness Offset of the remaining part of the first layer of the m-th wafer m , specifically Offset m =(1 - Δt m-1 / t1 m-1 ) * Offset m-1 =(2 - t3 m-1 / t\n1 m-1 ) * Offset m-1 .

[0135] Under the control of the controller, the m-th wafer is transferred to the measuring unit 3, and the previous thickness PreThk of the m-th wafer is measured m , and then the controller sequentially executes the following calculation steps:

[0136] Calculate the actual material removal amount of the second polishing stage of the m-th wafer, specifically RRT m =PreThk1 - ThkT + Offset m ;

[0137] Based on the thickness of the remaining part of the first layer of the (m - 1)-th wafer after calibration, calculate the actual material removal amount of the (m - 1)-th wafer, and then according to its second polishing time t2 m-1 Calculate the actual material removal rate of the (m - 1)-th wafer in the second polishing stage, after calibration: RR m-1 =(PreThk m-1 - PostThk m-1 + Offset m ) / t2 m-1 .

[0138] According to the actual material removal amount of the m-th wafer in the second polishing stage and the actual material removal rate of the (m - 1)-th wafer, calculate the second time of the m-th wafer, specifically t2 m =RRT m / RR m-1 .

[0139] Compare the second time t2 m with the predetermined threshold range [T1, T2]. If t2 m ∈[T1, T2], then the first time t1 is not adjusted m ; If t2 m <T1, calculate the adjustment value, and reduce the first time t1 according to the adjustment value m ; If t2 m >T2, calculate the adjustment value, and increase the first time t1 according to the adjustment value m . Specifically, first calculate the second time t2 mThe difference between the first predetermined time Dt and the first predetermined time Dt is calculated, and the adjustment value Δt is determined according to the adjustment coefficient X and the difference. m , the calculation formula is Δt m =(t2 m -Dt)*X. Preferably, the formula t3 m =t1 m +Δt m =t3 m-1 +Δt m Calculating the third time, it can be seen that if t2 m <T1,Δt m is a negative value, the polishing time of the first polishing stage will be reduced; if t2 m >T2,Δt m is a positive value, the polishing time of the first polishing stage will increase.

[0140] The controller controls the wafer polishing device 100 to use the third time and the second time as the polishing time of the first polishing stage and the second polishing stage in the polishing recipe of the mth wafer respectively, and completes a polishing process of the mth wafer on the first polishing plate and the second polishing plate.

[0141] Finally, the controller controls the mth wafer to be transferred to the measuring unit again for thickness measurement. The measured thickness is the post-thickness value PostThk of the mth wafer. m .

[0142] In order to verify the polishing effect of the polishing method of this embodiment, wafers from the same batch were divided into two parts. The wafers in the first part were polished using the wafer polishing method of this embodiment with a target thickness of 700 angstroms (Å), a first predetermined time Dt=100 s, an adjustment coefficient X=25, a lower limit T1=80 of the predetermined threshold range, and an upper limit T2=110 of the predetermined threshold range. The polishing results are shown in Table 1 below.

[0143] Table 1

[0144]

[0145] As shown in Table 1, over-polishing occurred at the N-2th piece. When the second time of the N-2th piece was calculated based on the thickness value, the polishing time of the second polishing stage was automatically adjusted. However, because the second time of the N-2th piece fell within the threshold range, its first time was not adjusted, that is, the third time was equal to the first predetermined time of 100s.

[0146] When calculating the second time of the N-1th piece, the polishing time of the second polishing stage is automatically reduced and adjusted. The second time of the N-1th piece is less than the lower limit of the predetermined threshold range, so the first time is reduced and the third time is calculated to be 99s.

[0147] The over-grinding problem still exists, so the situations of the Nth and N+1th slices are similar. When adjusting to the N+1th slice, the final thickness value is only 2Å away from the target thickness.

[0148] Since the existing polishing method is not suitable for the polishing scenario targeted by this embodiment, for the comparison ratio consisting of the second part of wafers, only the polishing time of the second stage is adjusted, and the value after each adjustment is set to be the same as the second time of the first part of wafers. The polishing results are shown in Table 2 below.

[0149] Table 2

[0150]

[0151] As can be seen, adjusting only the second time results in the final thickness value still being 10Å away from the target thickness by the N+1 wafer, which is five times faster than the polishing method of this embodiment. The control response speed is far slower than that of this embodiment, requiring more wafers to adjust the final thickness value to the same level as in this embodiment, seriously affecting polishing accuracy. It is understandable that while better polishing accuracy can be achieved by significantly reducing the second time, there is a limit to the amount of adjustment that can be made in the second time, and this will cause the gap between the first and second times to widen, still adversely affecting control accuracy and production efficiency.

[0152] It can be seen that the wafer polishing method of the present invention realizes adjusting the polishing time of the first polishing stage and the second polishing stage respectively, and the polishing time of the two stages is linked adjustment and graded adjustment. Linked adjustment can adjust more quickly and control the polishing thickness more accurately, so that the final thickness of the wafer has better consistency, while reducing the total polishing time of the wafer to reach the target thickness, avoiding the situation where only the polishing time of the second polishing stage is adjusted and the polishing thickness cannot be accurately controlled, or the final thickness cannot be adjusted in time, which affects the wafer production efficiency and yield rate. The graded adjustment makes it possible to perform linked adjustment only when the adjustment range is large, thereby ensuring the stability and continuity of the first polishing stage as much as possible, while not significantly increasing the control complexity of the wafer processing equipment, so that the production efficiency of the chemical mechanical polishing is greatly improved while the yield rate of the wafer is also improved and guaranteed.

[0153] At the same time, the wafer polishing method of the present invention does not use the change in the torque of the large disk as the endpoint measurement method, ensuring that the polishing can stably stop at the second layer, and also avoiding measurement failure caused by damage to the polishing pad, reducing the risk of under-polishing or over-polishing the wafer. In addition, because the present invention uses a two-disc process to achieve two polishing stages, the polishing time of the two disks is adjusted in a linked manner. Therefore, when the polishing conditions of one of the polishing disks deteriorate due to the wear of the polishing pad, the two disks can be automatically adjusted in a linked manner, which not only avoids the problem of multiple wafers being too thin or too thick, but also increases the system's fault tolerance and response time, and also extends the service life of the polishing pad, greatly reducing production costs.

[0154] The above implementation methods are only used to illustrate the embodiments of the present invention, and are not intended to limit the embodiments of the present invention. Ordinary technicians in the relevant technical field may make various changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of the present invention, and the scope of patent protection of the embodiments of the present invention should be defined by the claims.

Claims

1. A wafer polishing method, characterized in that: The method comprises a first polishing stage and a second polishing stage for removing a first layer and a second layer with similar friction coefficients, wherein the first polishing stage removes a portion of the first layer, and the second polishing stage removes the remaining portion of the first layer and a portion of the second layer, and comprises the following steps: Determining a first predetermined time as a first time of a first wafer, determining a third time of a previous wafer as a first time of a current wafer, and the first predetermined time falling within a predetermined threshold range; After the first polishing stage of the first wafer is completed, measuring the thickness of the remaining portion of the first layer of the first wafer, determining the thickness of the remaining portion of the first layer of the current wafer based on the thickness of the remaining portion of the first layer of the previous wafer, and determining the material removal amount and material removal rate of the wafer in the second polishing stage based on the thickness of the remaining portion of the first layer; calculating a second time based on the material removal amount and the material removal rate of the wafer in the second polishing stage; Adjusting the first time according to the second time to obtain the third time includes: when the second time falls within a predetermined threshold range, the third time is equal to the first time; when the second time does not fall within the predetermined threshold range, calculating an adjustment value, and determining the third time according to the adjustment value and the first time; performing a first polishing stage according to a third time and performing a second polishing stage according to a second time so that the second layer reaches a target thickness; The calculating the adjustment value and determining the third time according to the adjustment value and the first time includes: calculating a difference between the second time and the first predetermined time; determining an adjustment factor associated with one or more of a theoretical removal rate of the first layer, a theoretical removal rate of the second layer, a thickness of the first layer, a thickness of the second layer, a thickness of a remaining portion of the first layer, a target thickness, and a usage time of the polishing pad; determining an adjustment value based on the adjustment coefficient and the difference; The sum of the adjustment value and the first time is taken as the third time.

2. The wafer polishing method according to claim 1, wherein: Also includes: measuring the initial thickness of the second layer of the wafer before the first polishing stage as a thickness before value; After the second polishing stage is completed, the remaining thickness of the second layer of the wafer is measured as a post-thickness value.

3. The wafer polishing method according to claim 2, wherein The step of determining the material removal amount and material removal rate of the wafer in the second polishing stage according to the thickness of the remaining portion of the first layer comprises: determining a material removal amount of the current wafer in the second polishing stage according to the previous thickness value, the thickness of the remaining portion of the first layer, and the target thickness; determining a material removal amount of the previous wafer in the second polishing stage according to the previous thickness value, the thickness of the remaining portion of the first layer, and the next thickness value; The material removal rate is determined based on the amount of material removed from the wafer during the second polishing stage.

4. The wafer polishing method according to claim 3, wherein: The first time and the second time of the first wafer are determined by the following steps: Determining the first predetermined time as the first time of the first wafer; determining a material removal amount of the first wafer in the second polishing stage according to the previous thickness value of the first wafer, the thickness of the remaining portion of the first layer, and the target thickness; The second time of the first wafer is determined according to a theoretical removal rate of the first layer, a theoretical removal rate of the second layer, and a material removal amount of the first wafer in the second polishing stage.

5. The wafer polishing method according to claim 4, wherein: The determining the second time of the first wafer according to the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage includes: The second time of the first wafer is determined according to the thickness of the remaining part of the first layer of the first wafer and the theoretical removal rate of the first layer, as well as the previous thickness value of the first wafer, the target thickness and the theoretical removal rate of the second layer.

6. The wafer polishing method according to claim 5, wherein: The first time and the second time of the current wafer are determined by the following steps, including: Determining the third time of the previous wafer as the first time of the current wafer; determining a material removal amount of the current wafer in the second polishing stage according to a previous thickness value of the current wafer, a thickness of the remaining portion of the first layer, and the target thickness; Calculating an actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the thickness of the remaining portion of the first layer, and the subsequent thickness value; Calculating an actual material removal rate of the previous wafer in the second polishing stage according to an actual material removal amount of the previous wafer in the second polishing stage and a polishing time of the previous wafer in the second polishing stage; The second time of the current wafer is determined according to the material removal amount of the current wafer in the second polishing stage and the actual material removal rate of the previous wafer in the second polishing stage.

7. The wafer polishing method according to claim 6, wherein: The determining the thickness of the remaining portion of the first layer of the current wafer according to the thickness of the remaining portion of the first layer of the previous wafer includes: Correcting the thickness of the remaining portion of the first layer of the previous wafer according to the adjustment value of the previous wafer; The thickness of the remaining portion of the first layer of the previous wafer after correction is determined as the thickness of the remaining portion of the first layer of the current wafer.

8. The wafer polishing method according to claim 7, wherein: The calculating the actual material removal amount of the previous wafer in the second polishing stage based on the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer and the subsequent thickness value includes: calculating the actual material removal amount of the previous wafer in the second polishing stage based on the previous thickness value of the previous wafer, the subsequent thickness value and the corrected thickness of the remaining part of the first layer of the previous wafer.

9. A wafer polishing device for performing the wafer polishing method according to any one of claims 1 to 8, characterized in that: include: a first polishing unit, a second polishing unit, and a measuring unit; The first polishing unit includes a first polishing head and a first polishing plate, for performing the first polishing stage; The second polishing unit includes a second polishing head and a second polishing plate for performing the second polishing stage; The measuring unit includes a measuring device for measuring an initial thickness of the second layer of the wafer as a pre-thickness value before the first polishing stage, and measuring a remaining thickness of the second layer of the wafer as a post-thickness value after the second polishing stage.

10. A wafer processing device, characterized in that: It includes a controller, a memory and a wafer polishing device as described in claim 9, wherein the memory is used to store the thickness before value and the thickness after value measured by the measuring device, and the controller is used to control the wafer polishing device to perform the wafer polishing method as described in any one of claims 1-8.

Images