Method for controlling a baffle driven by an array of piezoelectric crystals

Abstract

The application discloses a piezoelectric wafer array driven baffle, a baffle control method and a proportional valve. The baffle comprises at least one connecting base plate and a tail base plate. One end of the connecting base plate is provided with a first connecting piece capable of being hinged to a shell of the proportional valve, and the other end is provided with a second connecting piece capable of being hinged to the first connecting piece. The connecting base plates are hinged in sequence. One end of the tail base plate is provided with the first connecting piece, and the tail base plate is hinged to the connecting base plate at the end. Piezoelectric wafers are arranged on opposite sides of the base plate, and the piezoelectric wafers are connected with wires. In the application, the base plate and the piezoelectric wafer are discretized in the axial direction, at least two base plates provided with piezoelectric wafer arrays are formed, the voltage excitation value of the piezoelectric wafer on each base plate is controlled, and the base plate reaches a target horizontal offset amount by using the driving mode of the least base plate quantity. The application has the advantages of good dynamic performance, high reliability, high control precision and long service life.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of hydraulic transmission and control, and particularly relates to a control method of a baffle driven by a piezoelectric wafer array. BACKGROUND

[0002] High-frequency proportional valves have the advantages of good dynamic performance, high control precision and low cost, and are widely used in industrial automation, automobiles, aviation and aerospace and other major equipment fields. The pilot stage of the high-frequency proportional valve generally adopts a proportional spool valve driving, a double-nozzle baffle driving, a high-speed on-off valve driving and other technical solutions. Among them, the proportional spool valve driving technical solution has a structural dead zone and poor dynamic performance, and the high-speed on-off valve driving technical solution has strong vibration and noise. Compared with the above, the double-nozzle baffle driving scheme controls the displacement of the power stage main valve by adjusting the gap value between the baffle and the nozzle, and has the advantages of high control precision and good dynamic performance.

[0003] A double-nozzle baffle electro-hydraulic servo valve armature assembly pressing tool with publication number CN114571406B discloses a clamping jig and a supporting block to meet the shape and position tolerances of various components, and to realize the close cooperation of the armature, the spring tube and the baffle. However, since a torque motor is used as a motor converter, the assembly is inevitably complicated. In addition, during the debugging process, the armature assembly is easily attracted by the magnetic conductor, thereby causing the pole deviation phenomenon. A piezoelectric double-nozzle baffle electro-hydraulic servo valve with publication number CN117090967A discloses the following problems:

[0004] The inertia and motion mass of a single piezoelectric baffle assembly are large. The larger the motion mass of the substrate is, the larger the inertia of the substrate is, and the larger the friction force the substrate is subjected to, resulting in a longer time required for the substrate to deviate to the target position, a slower response speed, and a slow response speed of the substrate. The valve core cannot reach the expected oil pressure within the specified time, and the valve core cannot form the expected oil pressure difference within the specified time, further causing the valve core to move to the target position within the specified time, so that the first working oil passage and the second working oil passage cannot be opened within the specified time, and the oil cannot flow from the first working oil passage or the second working oil passage to the next execution element within the specified time. Therefore, the dynamic performance of the entire valve is low.

[0005] When the ratio of the target deviation to the maximum deviation is too small, the voltage applied to the piezoelectric wafer and the displacement of the substrate have a strong nonlinear relationship. In the traditional scheme, a single baffle has a large deviation range, resulting in poor control precision of the piezoelectric ceramic under small displacement motion conditions.

[0006] When a single piezoelectric ceramic is subjected to voltage breakdown and burns out, it directly causes the electro-hydraulic servo valve and the host computer to stop, and the reliability is poor. SUMMARY

[0007] In view of the deficiencies in the prior art, the present application provides a control method for a baffle driven by a piezoelectric wafer array, which forms at least two sections of substrates provided with the piezoelectric wafer array by binary discretization of the substrates and the piezoelectric wafers in length, controls the horizontal offset of the substrates by adjusting the excitation voltage value applied to the piezoelectric wafer array, further changes the gap value between the substrates and the nozzle spool, and finally causes a pressure difference between the left and right ends of the spool to push the spool to move, thereby having the advantages of high control precision, good dynamic performance, high reliability and the like.

[0008] In order to achieve the above-mentioned purpose, the present application provides a control method for a baffle driven by a piezoelectric wafer array, which can be hinged to the housing of a proportional valve, and the baffle comprises:

[0009] a substrate group comprising at least two substrates hinged in sequence, the substrates being divided into at least one connecting substrate and a tail substrate, the connecting substrate having a first end and a second end, the first end of the connecting substrate being provided with a first connecting piece capable of being hinged to the housing of the proportional valve, the second end of the connecting substrate being provided with a second connecting piece capable of being hinged to the first connecting piece, each connecting substrate being hinged in sequence through the first connecting piece and the second connecting piece, one end of the tail substrate being provided with a first connecting piece, the first connecting piece of the tail substrate being hinged to the second connecting piece of the connecting substrate at the end portion;

[0010] a piezoelectric wafer provided on opposite sides of the substrate, the piezoelectric wafer being connected to a lead wire, and a direct current voltage being applied to the piezoelectric wafer to cause the substrate connected to the piezoelectric wafer to be offset;

[0011] from the side close to the housing of the proportional valve to the side away from the housing of the proportional valve, the substrates in the substrate group are arranged in sequence as: a first substrate, a second substrate, …, a cth substrate, the maximum offset of the first substrate being j, and the maximum offset of the nth substrate being j / 2 n-1 wherein n≤c, the control method comprising the following steps:

[0012] obtaining a required horizontal offset x, if x≤j, calculating the maximum value b1 of n according to the formula x≤j / 2 n-1 , and applying a direct current voltage to the piezoelectric wafers on the first b1 substrates according to the value of the horizontal offset x;

[0013] if j+j / 2≥x>j, calculating the maximum value b2 of n according to the formula x-j≤j / 2 n-1 , and applying a direct current voltage to the piezoelectric wafers on the first substrate and the first b2 substrates according to the value of the horizontal offset x;

[0014] if j+j / 2+…+j / 2 a-1 ≥x>j+j / 2+…+j / 2a-2 According to the formula x-j-j / 2-…-j / 2a-2≤j / 2 n-1 Calculate the maximum value b of n a And according to the value of the horizontal offset x, direct current voltage is applied to the piezoelectric wafer on the first substrate, the second substrate, …, the a-1th substrate, and the bth substrate. a

[0015] Through the above scheme, the substrate and the piezoelectric wafer are discretized in the axial direction, thereby forming at least two sections of the substrate provided with an array of piezoelectric wafers, and the horizontal offset of the substrate is controlled by adjusting the value of the excitation voltage applied to the array of piezoelectric wafers, which has the advantages of high control precision, good dynamic performance, and high reliability.

[0016] Further, in the substrate group, the length of each substrate decreases from the side close to the proportional valve housing to the side away from the proportional valve housing.

[0017] Further, in the substrate group, the lengths of the two adjacent substrates are in a two-to-one relationship.

[0018] Further, the length of the piezoelectric wafer accounts for 5 / 6 to 2 / 3 of the length of the substrate connected thereto. That is, the lengths of the piezoelectric wafers on adjacent substrates are also in a two-to-one relationship.

[0019] Further, the first connecting member includes a clamping groove, and the second connecting member includes a clasp. The clasp is installed in the clamping groove to realize the hinging between the substrate group and the housing and between the substrates, thereby realizing the offset of the substrate when the voltage is applied to the piezoelectric wafer.

[0020] Further, when the voltage of U n is applied to the piezoelectric wafer on the nth substrate, the nth substrate reaches its maximum offset j / 2 n-1 ;

[0021] If x≤j, the step of applying direct current voltage to the piezoelectric wafer on the b1th substrate according to the value of the horizontal offset x includes:

[0022] Applying direct current voltage of to the piezoelectric wafer on the b1th substrate;

[0023] Wherein, represents that when direct current voltage of is applied to the piezoelectric wafer on the b1th substrate, the b1th substrate reaches its maximum offset .

[0024] Further, if j+j / 2≥x>j, applying direct current voltage to the piezoelectric wafer on the first substrate and the b2th substrate according to the value of the horizontal offset x includes: ​

[0025] A DC voltage of value U1 is applied to the piezoelectric wafer on the first substrate;

[0026] A value is applied to the piezoelectric wafer on substrate b2. DC voltage;

[0027] Wherein, U1 represents the maximum offset j of the first substrate when a DC voltage of U1 is applied to the piezoelectric wafer on the first substrate. This represents the value applied to the piezoelectric wafer on substrate b2. When the DC voltage is applied, the maximum offset of the b2 substrate is... .

[0028] Furthermore, if j + j / 2 + ... + j / 2 a-1 ≥x>j+j / 2+…+j / 2 a-2 Based on the value of the horizontal offset x, the first substrate, the second substrate... the (a-1)th substrate and the bth substrate... a Applying a DC voltage to the piezoelectric wafer on the substrate includes:

[0029] Values ​​U1, U2, ... U are applied to the first substrate, the second substrate, ... the (a-1)th substrate, respectively. a-1 DC voltage;

[0030] For the bth a The piezoelectric wafer on the substrate is subjected to a value of DC voltage;

[0031] Among them, U a-1 This represents applying a value U to the piezoelectric wafer on the (a-1)th substrate. a-1 At a DC voltage, the a-1th substrate to its maximum offset ; Representative of b a The piezoelectric wafer on the substrate is subjected to a value of When the DC voltage is , the bth a substrate to its maximum offset .

[0032] By employing the above technical solutions, the beneficial effects of the present invention are as follows:

[0033] The application discretizes the substrate and piezoelectric wafer in the axial direction, and the discretized substrates are not connected by any independent parts, so the moving mass and inertia of the single substrate are significantly reduced compared to the traditional scheme of providing only one baffle. The greater the moving mass of the substrate, the greater the inertia, and the greater the friction. Conversely, the smaller the moving mass of the substrate, the smaller the inertia, and the smaller the friction. Therefore, the time required for each substrate to shift to the target position is shorter, the response speed is faster, the oil pressure of the spool can reach the expected oil pressure faster, and the expected oil pressure difference is formed faster, so that the spool can move to the target position faster, the first working oil passage and the second working oil passage can be opened faster, and the dynamic performance of the entire valve is greatly improved.

[0034] The application outputs target displacement through the cooperative control of multiple piezoelectric wafers. If a piezoelectric wafer fails, the remaining piezoelectric wafers can take over the work, and only the driving voltage amplitude needs to be changed. This has the advantage of high reliability.

[0035] The substrate group of the application is formed by multiple substrates hinged together. The maximum displacement of each substrate decreases from the side close to the housing to the side away from the housing. When the ratio of the target displacement to the maximum displacement is too small, the voltage applied to the piezoelectric wafer and the substrate displacement show a strong nonlinear relationship. Therefore, for the case where the value of the target displacement is too small, the application can achieve precise control through the substrate away from the housing.

[0036] In order to make the above and other objects, features and advantages of the present application more apparent, the following will describe a preferred embodiment in detail, and the accompanying drawings will be described as follows. BRIEF DESCRIPTION OF DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0038] Figure 1 A two-dimensional sectional view of a piezoelectric wafer array driven baffle provided by the embodiment of the present application;

[0039] Figure 2 A two-dimensional sectional view of the housing provided by the embodiment of the present application;

[0040] Figure 3 A two-dimensional sectional view of the substrate provided by the embodiment of the present application;

[0041] Figure 4The gap change schematic diagram between the nozzle and the fourth substrate under the first substrate independent driving working condition provided by the embodiment of the present application is shown in the following figure;

[0042] Figure 5 The gap change schematic diagram between the nozzle and the fourth substrate under the second substrate independent driving working condition provided by the embodiment of the present application is shown in the following figure;

[0043] Figure 6 The gap change schematic diagram between the nozzle and the fourth substrate under the third substrate independent driving working condition provided by the embodiment of the present application is shown in the following figure;

[0044] Figure 7 The gap change schematic diagram between the nozzle and the fourth substrate under the fourth substrate independent driving working condition provided by the embodiment of the present application is shown in the following figure;

[0045] Figure 8 The maximum horizontal offset amount demonstration schematic diagram under the first substrate, the second substrate, the third substrate and the fourth substrate independent driving working condition provided by the embodiment of the present application is shown in the following figure;

[0046] Figure 9 The control method flow chart of how to realize the fourth substrate target offset amount by using the least number of substrates provided by the embodiment of the present application is shown in the following figure.

[0047] The reference signs of the above figures are as follows: 1, housing; 101, kingpin; 2, first substrate; 201, first rectangular buckle; 202, first pin; 3, first left piezoelectric wafer; 4, first right piezoelectric wafer; 5, second substrate; 501, second rectangular buckle; 502, second pin; 6, second left piezoelectric wafer; 7, second right piezoelectric wafer; 8, third substrate; 801, third rectangular buckle; 802, third pin; 9, third left piezoelectric wafer; 10, third right piezoelectric wafer; 11, fourth substrate; 1101, fourth rectangular buckle; 12, fourth left piezoelectric wafer; 13, fourth right piezoelectric wafer; 14, wire bolt; 15, left nozzle spool; 16, right nozzle spool; 17, nozzle valve seat; 18, sleeve; 19, spool; 20, valve body. DETAILED DESCRIPTION

[0048] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0049] It should be noted that in the description of the present application, the terms "first", "second" and the like are only used for descriptive purposes and to distinguish similar objects, and there is no prior and posterior order between them, nor can it be understood as indicating or implying relative importance. In addition, in the description of the present application, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0050] Embodiment: The present embodiment discloses a proportional valve using a baffle driven by a piezoelectric wafer array, comprising:

[0051] The shell 1, as shown in Figure 1 The shell 1 is bolted with a wire bolt 14 on the outside, and the inside of the shell 1 is provided with a main pin shaft 101.

[0052] Combined Figures 1-3 The main pin shaft 101 is rotatably connected with a substrate group, which includes at least two sequentially hinged substrates, and the length of adjacent two substrates is in a two-fold relationship. Each substrate is connected with a piezoelectric wafer on both sides along its width direction. The piezoelectric wafer is connected with the wire through the wire bolt.

[0053] In the present embodiment, the substrate group includes four sequentially hinged substrates, from the side close to the shell to the side away from the shell, which are respectively the first substrate 2, the second substrate 5, the third substrate 8 and the fourth substrate 11.

[0054] Among them, the first substrate 2 is made of a soft material that can be elastically deformed, and a first rectangular buckle 201 is arranged above it, and a first pin shaft 202 is arranged below it. The length of the clamping groove of the first rectangular buckle 201 is equal to the radial length of the main pin shaft 101, and the first rectangular buckle 201 above the first substrate 2 is elastically deformed by extrusion to be connected with the main pin shaft 101. The piezoelectric wafers are fixedly connected on both sides of the first substrate 2 along the width direction by glue, which are respectively the first left piezoelectric wafer 3 and the first right piezoelectric wafer 4. As shown in Figure 1 、 3 The width direction is left-right direction.

[0055] In some possible embodiments, the soft material that can be elastically deformed is made of polyethylene, polypropylene, polyvinyl chloride and the like.

[0056] The second substrate 5 is made of a soft material that can be elastically deformed, and a second rectangular buckle 501 is arranged above it, and a second pin shaft 502 is arranged below it. The length of the clamping groove of the second rectangular buckle 501 is equal to the radial length of the first pin shaft 202 below the first substrate 2, and the second rectangular buckle 501 above the second substrate 3 is elastically deformed by extrusion to be connected with the first pin shaft 202. The piezoelectric wafers are fixedly connected on both sides of the second substrate 5 along the width direction by glue, which are respectively the second left piezoelectric wafer 6 and the second right piezoelectric wafer 7.

[0057] The third substrate 8 is made of soft material which can be elastically deformed, and a third rectangular buckle 801 is arranged above the third substrate 8, and a third pin shaft 802 is arranged below the third substrate 8, the length of the buckle slot of the third rectangular buckle 801 is equal to the radial length of the second pin shaft 502 below the second substrate 5, and the third rectangular buckle 801 above the third substrate 8 is elastically deformed by extrusion to be connected with the second pin shaft 502. The piezoelectric wafer is fixedly connected to the two sides of the third substrate 8 along the width direction by glue, and is respectively a third left piezoelectric wafer 9 and a third right piezoelectric wafer 10.

[0058] The fourth substrate 11 is made of soft material which can be elastically deformed, and a fourth rectangular buckle 1101 is arranged above the fourth substrate 11, and the length of the buckle slot of the fourth rectangular buckle 1101 is equal to the radial length of the third pin shaft 802 below the third substrate 8, and the fourth rectangular buckle 1101 above the fourth substrate 11 is elastically deformed by extrusion to be connected with the third pin shaft 802. The piezoelectric wafer is fixedly connected to the two sides of the fourth substrate 11 along the width direction by glue, and is respectively a fourth left piezoelectric wafer 12 and a fourth right piezoelectric wafer 13.

[0059] The first left piezoelectric wafer 3, the first right piezoelectric wafer 4, the second left piezoelectric wafer 6, the second right piezoelectric wafer 7, the third left piezoelectric wafer 9, the third right piezoelectric wafer 10, the fourth left piezoelectric wafer 12 and the fourth right piezoelectric wafer 13 are respectively connected with wires by the wire bolts 14.

[0060] In some possible embodiments, the substrate group can include two, three or a larger number of substrates.

[0061] The nozzle valve seat 17 is arranged in the shell 1, the movable cavity is arranged in the nozzle valve seat 17, the substrate group is arranged in the movable cavity, the nozzle oil way is arranged in the nozzle valve seat 17, and the nozzle oil way is distributed on the two sides of the substrate group along the width direction.

[0062] The left nozzle valve core 15 and the right nozzle valve core 16 are arranged in the nozzle oil way, the left nozzle valve core 15 and the right nozzle valve core 16 are in interference connection with the nozzle valve seat 17, and the outlets of the left nozzle valve core 15 and the right nozzle valve core 16 are respectively directed to the fourth left piezoelectric wafer 12 and the fourth right piezoelectric wafer 13 on the fourth substrate.

[0063] The valve body 20 is fixed to the shell 1 by bolts, and the nozzle valve seat 17 is compressed between the valve body 20 and the shell 1. The valve body 20 is provided with an oil passage, a first oil inlet channel P1 and a second oil inlet channel P2 communicating with the oil passage, the first oil inlet channel P1 and the second oil inlet channel P2 respectively communicating with the nozzle oil channels on both sides of the substrate group, a first working oil channel A and a second working oil channel B communicating with the oil passage between the first oil inlet channel P1 and the second oil inlet channel P2, and a return oil channel T communicating with the oil passage between the first working oil channel A and the second working oil channel B, the return oil channel T and the movable cavity communicating through the sleeve 18.

[0064] A valve core 19 capable of sliding along the length direction of the oil passage is arranged in the oil passage. The valve core 19 is arranged in the oil passage and has a first partition portion and a second partition portion. The first partition portion separates the first working oil channel A and the second working oil channel B, the return oil channel T and the oil passage. The second partition portion separates the oil passage and the first oil inlet channel P1 and the second oil inlet channel P2. The valve core 19 can slide along the oil passage to make the first oil inlet channel P1 or the second oil inlet channel P2 communicate with the oil passage.

[0065] By controlling the voltage excitation value of the left piezoelectric wafer and the right piezoelectric wafer, the combination of the horizontal offset of the fourth substrate 11 is realized. After the fourth substrate 11 is offset to the specified position, due to the different gap values of the fourth substrate 11 to the left nozzle valve core 15 and the right nozzle valve core 16, a pressure difference is generated at both ends of the valve core 19. At this time, the valve core 19 starts to move to make the first oil inlet channel P1 or the second oil inlet channel P2 communicate with the oil passage, that is, the oil inlet channel communicates with the first working oil channel A or the second working oil channel B.

[0066] The control method of the baffle driven by the piezoelectric wafer array is as follows: from the side close to the shell to the side away from the shell, the substrates in the substrate group are sequentially arranged as: first substrate, second substrate, …, cth substrate. Assuming that the maximum offset of the first substrate is j, then the maximum offset of the nth substrate is j / 2 n-1 , where n≤c, the control method comprises the following steps:

[0067] Obtain the required horizontal offset x. If x≤j, according to the formula x≤j / 2 n-1 , calculate the maximum value b1 of n, and apply a direct current voltage to the piezoelectric wafer on the b1th substrate according to the value of the horizontal offset x;

[0068] If j+j / 2≥x>j, according to the formula x-j≤j / 2 n-1 , calculate the maximum value b2 of n, and apply a direct current voltage to the piezoelectric wafer on the first substrate and the b2th substrate according to the value of the horizontal offset x;

[0069] If j+j / 2+…+j / 2a-1 ≥x>j+j / 2+…+j / 2 a-2 According to the formula xjj / 2-…-j / 2a-2≤j / 2 n-1 Calculate the maximum value b of n. a And based on the value of the horizontal offset x, the first substrate, the second substrate... the (a-1)th substrate and the bth substrate... a A DC voltage is applied to the piezoelectric wafer on the substrate.

[0070] A value U is applied to the piezoelectric wafer on the nth substrate. n When the voltage is applied, the nth substrate reaches its maximum offset j / 2. n-1 ;

[0071] If x ≤ j, the step of applying a DC voltage to the piezoelectric wafer on the b1 substrate according to the value of the horizontal offset x includes:

[0072] A value is applied to the piezoelectric wafer on substrate b1. DC voltage;

[0073] in, This represents the value applied to the piezoelectric wafer on substrate b1. When the DC voltage is applied, the maximum offset of the b1 substrate is... .

[0074] If j + j / 2 ≥ x > j, applying a DC voltage to the piezoelectric wafers on the first substrate and the b2 substrate according to the value of the horizontal offset x includes:

[0075] A DC voltage of value U1 is applied to the piezoelectric wafer on the first substrate;

[0076] A value is applied to the piezoelectric wafer on substrate b2. DC voltage;

[0077] Wherein, U1 represents the maximum offset j of the first substrate when a DC voltage of U1 is applied to the piezoelectric wafer on the first substrate. This represents the value applied to the piezoelectric wafer on substrate b2. When the DC voltage is applied, the maximum offset of the b2 substrate is... .

[0078] If j + j / 2 + ... + j / 2 a-1 ≥x>j+j / 2+…+j / 2 a-2 Based on the value of the horizontal offset x, the first substrate, the second substrate... the (a-1)th substrate and the bth substrate... a Applying a DC voltage to the piezoelectric wafer on the substrate includes:

[0079] Values ​​U1, U2, ... U are applied to the first substrate, the second substrate, ... the (a-1)th substrate, respectively. a-1 DC voltage;

[0080] For the bth a The piezoelectric wafer on the substrate is subjected to a value of DC voltage;

[0081] Among them, U a-1 This represents applying a value U to the piezoelectric wafer on the (a-1)th substrate. a-1 At a DC voltage, the a-1th substrate to its maximum offset ; Representative of b a The piezoelectric wafer on the substrate is subjected to a value of When the DC voltage is , the bth a substrate to its maximum offset .

[0082] In this embodiment, the axial dimension ratio of the first substrate 2, the second substrate 5, the third substrate 8, and the fourth substrate 11 is 8:4:2:1. By controlling the horizontal offset of the four substrates, the gap between the fourth substrate 11 and the left nozzle valve core 15 and the right nozzle valve core 16 is controlled.

[0083] The following description, based on the accompanying drawings, illustrates the change in the gap between the fourth substrate 11 and the left nozzle valve core 15 and the right nozzle valve core 16 when a substrate is driven independently. In this embodiment, the first substrate 2, the second substrate 5, the third substrate 8, and the fourth substrate 11 are all shifted to the right.

[0084] like Figures 4 to 7 As shown, the horizontal center line of the fourth substrate 11 coincides with the nozzle center lines of the left nozzle valve core 15 and the right nozzle valve core 16. The lengths of the first substrate 2, the second substrate 5, the third substrate 8, and the fourth substrate 11 are L1, L2, L3, and L4, respectively. The initial gap between the fourth substrate 11 and the left nozzle valve core 15 and the right nozzle valve core 16 is δ0.

[0085] The first substrate 2 is driven independently. The relationship between its deflection angle θ1 and driving voltage U1 is defined as θ1=f(U1). Then the horizontal offset of the first substrate 2 is x1=L1sin(θ1)=L1sin(f(U1)). At this time, the gap values ​​from the fourth substrate 11 to the left nozzle valve core 15 and the right nozzle valve core 16 are δL=δ0+L1sin(f(U1)) and δR=δ0–L1sin(f(U1)).

[0086] The second substrate 5 is driven independently. The relationship between its deflection angle θ2 and driving voltage U2 is defined as θ2=f(U2). Then the horizontal offset of the second substrate 5 is x2=L2sin(θ2)=L2sin(f(U2)). At this time, the gap values ​​from the fourth substrate 11 to the left nozzle valve core 15 and the right nozzle valve core 16 are δL=δ0+L2sin(f(U2)) and δR=δ0–L2sin(f(U2)).

[0087] The third substrate 8 is driven independently. The relationship between its deflection angle θ3 and driving voltage U3 is defined as θ3=f(U3). Then the horizontal offset of the third substrate 8 is x3=L3sin(θ3)=L3sin(f(U3)). At this time, the gap values ​​from the fourth substrate 11 to the left nozzle valve core 15 and the right nozzle valve core 16 are δL=δ0+L3sin(f(U3)) and δR=δ0–L3sin(f(U3)).

[0088] When the fourth substrate 11 is driven independently, the relationship between its deflection angle θ4 and the driving voltage U4 is defined as θ4=f(U4). Then the horizontal offset of the fourth substrate 11 is x4=L4tan(θ4) / 2=L4tan(f(U4)) / 2. At this time, the gap values ​​between the fourth substrate 11 and the left nozzle valve core 15 and the right nozzle valve core 16 are δL=δ0+L4tan(f(U4)) / 2 and δR=δ0–L4tan(f(U4)) / 2, respectively.

[0089] The baffle control method driven by the above piezoelectric wafer array is as follows:

[0090] The control method is used to achieve closed-loop displacement control of the valve core 19, including how to achieve the target offset of the fourth substrate 11 with the minimum number of substrates.

[0091] like Figure 8 As shown, the lengths of the first substrate 2, the second substrate 5, the third substrate 8, and the fourth substrate 11 are arranged in a binary order, i.e., L1:L2:L3:L4=8:4:2:1. According to similar triangles, when the first substrate 2, the second substrate 5, the third substrate 8, and the fourth substrate 11 are driven independently, their maximum horizontal offsets are arranged in a binary order, i.e., x1max:x2max:x3max:x4max=8:4:2:1, where the horizontal offset range of the first substrate 2 is the largest, and the horizontal offset range of the fourth substrate 11 is the smallest.

[0092] Suppose the first substrate 2, the second substrate 5, the third substrate 8 and the fourth substrate 11 are all rightwardly offset, so that the first left piezoelectric wafer 3, the second left piezoelectric wafer 6, the third left piezoelectric wafer 9 and the fourth left piezoelectric wafer 12 need to be applied with voltage excitation. Suppose the rated working voltages of the first left piezoelectric wafer 3, the second left piezoelectric wafer 6, the third left piezoelectric wafer 9 and the fourth left piezoelectric wafer 12 are U1, U2, U3 and U4 respectively, and under the driving of the rated working voltages, the first substrate 2, the second substrate 5, the third substrate 8 and the fourth substrate 11 respectively reach their maximum offset amounts.

[0093] The control method comprises determining the driving mode with the least number of substrates according to different target horizontal offset amounts x of the fourth substrate 11.

[0094] Suppose the maximum horizontal offset amounts x1max, x2max, x3max and x4max of the first substrate 2, the second substrate 5, the third substrate 8 and the fourth substrate 11 respectively are 8 μm, 4 μm, 2 μm and 1 μm when they are independently driven.

[0095] The control method comprises:

[0096] If the horizontal offset amount x≤8, the maximum value b1 of n is calculated according to the formula x≤8 / 2 n-1 , and a direct current voltage is applied to the piezoelectric wafer on the b1th substrate according to the value of the horizontal offset amount x, specifically:

[0097] If x∈(4,8], then b1=1, a direct current voltage with an amplitude of U1·x / 8 is applied to the first left piezoelectric wafer, and the rest are not applied with voltage;

[0098] If x∈(2,4], then b1=2, a direct current voltage with an amplitude of U2·x / 4 is applied to the second left piezoelectric wafer, and the rest are not applied with voltage;

[0099] If x∈(1,2], then b1=3, a direct current voltage with an amplitude of U3·x / 2 is applied to the third left piezoelectric wafer, and the rest are not applied with voltage;

[0100] If x∈(0,1], then b1=4, a direct current voltage with an amplitude of U4·x is applied to the fourth left piezoelectric wafer, and the rest are not applied with voltage.

[0101] If 12≥x>8, the maximum value b2 of n is calculated according to the formula x-8≤8 / 2 n-1 , and a direct current voltage is applied to the piezoelectric wafer on the first substrate and the b2th substrate according to the value of the horizontal offset amount x, specifically:

[0102] If x∈(10,12], b2=2, a DC voltage is applied to the first left piezoelectric wafer and the second left piezoelectric wafer, with amplitudes of U1 and U2·(x-8) / 4, respectively, and the rest are not applied;

[0103] If x∈(9,10], b2=3, a DC voltage is applied to the first left piezoelectric wafer and the third left piezoelectric wafer, with amplitudes of U1 and U3·m1 / 2, respectively, and the rest are not applied;

[0104] If m1∈(8,9], b2=4, a DC voltage is applied to the first left piezoelectric wafer and the fourth left piezoelectric wafer, with amplitudes of U1 and U4·m1, respectively, and the rest are not applied.

[0105] If 14≥x>12, the maximum value b3 of n is calculated according to the formula x-12≤8 / 2 n-1 , and a DC voltage is applied to the piezoelectric wafers on the first substrate, the second substrate, and the b3th substrate according to the value of the horizontal offset x, specifically:

[0106] If x∈(13,14], b3=3, a DC voltage is applied to the first left piezoelectric wafer, the second left piezoelectric wafer, and the third left piezoelectric wafer, with amplitudes of U1, U2, and U3·(x-12) / 2, respectively, and the fourth left piezoelectric wafer is not applied;

[0107] If x∈(12,13], b3=4, a DC voltage is applied to the first left piezoelectric wafer, the second left piezoelectric wafer, and the fourth left piezoelectric wafer, with amplitudes of U1, U2, and U4·(x-12), respectively, and the third left piezoelectric wafer is not applied.

[0108] If 15≥x>14, a DC voltage is applied to the first left piezoelectric wafer, the second left piezoelectric wafer, the third left piezoelectric wafer, and the fourth left piezoelectric wafer, with amplitudes of U1, U2, U3, and U4·(x-14), respectively;

[0109] According to the above method distance explanation:

[0110] Example 1: The horizontal offset of the fourth substrate 11 is 0.5μm. The control steps are as follows:

[0111] The target horizontal offset x of the fourth substrate 11 is input as 0.5μm;

[0112] It is judged that x=0.5μm≤8, and because x=0.5μm∈(0,1];

[0113] Only the fourth left piezoelectric wafer 12 on the fourth substrate 11 needs to be excited with a voltage of 0.5U4.

[0114] Example 2: The horizontal offset of the fourth substrate 11 is 13.5μm. The control steps are as follows:

[0115] The target horizontal offset x = 13.5 μm of the fourth substrate 11 is inputted;

[0116] It is judged that 14 ≥ x = 13.5 μm > 12, and because x = 13.5 μm ∈ (13, 14];

[0117] The first piezoelectric left wafer 3 on the first substrate 2 is applied with the U1 voltage excitation, the second piezoelectric left wafer 6 on the second substrate 5 is applied with the U2 voltage excitation, the third piezoelectric left wafer 9 on the third substrate 8 is applied with the 0.75U3 voltage excitation, and the fourth piezoelectric left wafer 12 on the fourth substrate 11 is not applied with the voltage excitation.

[0118] Optionally, the baffle control method driven by the piezoelectric wafer array can also be:

[0119] As shown in Figure 9 When the target horizontal offset x of the fourth substrate 11 is inputted, the driving mode with the least number of substrates can be determined according to the following steps:

[0120] Step 1, judge whether the x satisfies the condition instruction of x ∈ (0, 8], if the judgment result is yes, execute step 2, if the judgment result is no, execute step 3.

[0121] Step 2, if x ∈ (4, 8], the first left piezoelectric wafer 3 on the first substrate 2 is applied with the U1·x / 8 voltage excitation, the second left piezoelectric wafer 6 on the second substrate 5, the third left piezoelectric wafer 9 on the third substrate 8, and the fourth left piezoelectric wafer 12 on the fourth substrate 11 are not applied with the voltage excitation;

[0122] If x ∈ (2, 4], the second left piezoelectric wafer 6 on the second substrate 5 is applied with the U2·x / 4 voltage excitation, the first left piezoelectric wafer 3 on the first substrate 2, the third left piezoelectric wafer 9 on the third substrate 8, and the fourth left piezoelectric wafer 12 on the fourth substrate 11 are not applied with the voltage excitation;

[0123] If x ∈ (1, 2], the third left piezoelectric wafer 9 on the third substrate 8 is applied with the U3·x / 2 voltage excitation, the first left piezoelectric wafer 3 on the first substrate 2, the second left piezoelectric wafer 6 on the second substrate 5, and the fourth left piezoelectric wafer 12 on the fourth substrate 11 are not applied with the voltage excitation; if x ∈ (0, 1], the fourth left piezoelectric wafer 12 on the fourth substrate 11 is applied with the U4·x voltage excitation, the first left piezoelectric wafer 3 on the first substrate 2, the second left piezoelectric wafer 6 on the second substrate 5, and the third left piezoelectric wafer 9 on the third substrate 8 are not applied with the voltage excitation.

[0124] Step 3, divide the target horizontal offset x by 8 to calculate the remainder m1, that is, m1 = mod(x, 8).

[0125] Step 4, determine whether m1 satisfies the condition instruction of m1∈(4,8), if the determination result is no, execute step 5, if the determination result is yes, execute step 6.

[0126] Step 5, if m1∈(2,4], then the first left piezoelectric wafer 3 on the first substrate 2 is applied with U1 voltage excitation, the second left piezoelectric wafer 6 on the second substrate 5 is applied with U2·m1 / 4 voltage excitation, and the third left piezoelectric wafer 9 on the third substrate 8 and the fourth left piezoelectric wafer 12 on the fourth substrate 11 are not applied with voltage excitation.

[0127] If m1∈(1,2], then the first left piezoelectric wafer 3 on the first substrate 2 is applied with U1 voltage excitation, the third left piezoelectric wafer 9 on the third substrate 8 is applied with U3·m1 / 2 voltage excitation, and the second left piezoelectric wafer 6 on the second substrate 5 and the fourth left piezoelectric wafer 12 on the fourth substrate 11 are not applied with voltage excitation.

[0128] If m1∈(0,1], then the first left piezoelectric wafer 3 on the first substrate 2 is applied with U1 voltage excitation, the fourth left piezoelectric wafer 12 on the fourth substrate 11 is applied with U4·m1 voltage excitation, and the second left piezoelectric wafer 6 on the second substrate 5 and the third left piezoelectric wafer 9 on the third substrate 8 are not applied with voltage excitation.

[0129] Step 6, calculate the remainder m2 by dividing the remainder m1 by 4, that is, m2=mod(m1,4).

[0130] Step 7, if m2∈(2,4], then the first left piezoelectric wafer 3 on the first substrate 2 is applied with U1 voltage excitation, the second left piezoelectric wafer 6 on the second substrate 5 is applied with U2 voltage excitation, the third left piezoelectric wafer 9 on the third substrate 8 is applied with U3 voltage excitation, and the fourth left piezoelectric wafer 12 on the fourth substrate 11 is applied with U4·(m2–2) voltage excitation.

[0131] If m2∈(1,2], then the first left piezoelectric wafer 3 on the first substrate 2 is applied with U1 voltage excitation, the second left piezoelectric wafer 6 on the second substrate 5 is applied with U2 voltage excitation, the third left piezoelectric wafer 9 on the third substrate 8 is applied with U3·m2 / 2 voltage excitation, and the fourth left piezoelectric wafer 12 on the fourth substrate 11 is not applied with voltage excitation.

[0132] If m2∈(0,1], then the first left piezoelectric wafer 3 on the first substrate 2 is applied with U1 voltage excitation, the second left piezoelectric wafer 6 on the second substrate 5 is applied with U2 voltage excitation, the fourth left piezoelectric wafer 12 on the fourth substrate 11 is applied with U4·m2 voltage excitation, and the third left piezoelectric wafer 9 on the third substrate 8 is not applied with voltage excitation.

[0133] Similarly, if the first substrate 2, the second substrate 5, the third substrate 8 and the fourth substrate 11 are intended to be shifted to the left, the first right piezoelectric wafer 4 on the first substrate 2, the second right piezoelectric wafer 7 on the second substrate 5, the second right piezoelectric wafer 10 on the third substrate 8 and the fourth right piezoelectric wafer 13 on the fourth substrate 11 are excited by the voltage, and the first substrate 2, the second substrate 5, the third substrate 8 and the fourth substrate 11 are shifted to the left.

[0134] Therefore, by controlling the voltage excitation values of the left and right piezoelectric wafers on each substrate, the target horizontal displacement of the fourth substrate 11 is achieved by the driving mode with the least number of substrates, and the fourth substrate 11 moves to the target horizontal displacement, and different pressures are generated at the left and right ends of the spool 19, and the oil inlet on the valve body 20 is communicated with the first working oil passage or the second working oil passage.

[0135] Those skilled in the art can understand that all or part of the processes of the above-mentioned embodiments can be completed by writing computer programs into related hardware, and the programs can be stored in a readable storage medium of the hardware. The readable storage medium includes but is not limited to a single-chip microcomputer and other memories with storage functions.

[0136] The principles and implementation manners of the present application are described in the specific embodiments, and the above-mentioned embodiments are only used to help understand the method of the present application and its core idea; meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation manners and application ranges can be changed, and the above-mentioned description should not be understood as the limitation of the present application.

Claims

1. A control method of a baffle driven by a piezoelectric wafer array, the baffle being hingedly connected to a housing of a proportional valve, the baffle comprising: a substrate group comprising at least two substrates hingedly connected in sequence, the substrates being divided into a tail substrate and at least one connecting substrate, the connecting substrate having a first end and a second end, the first end of the connecting substrate being provided with a first connecting piece hingedly connected to the housing of the proportional valve, the second end of the connecting substrate being provided with a second connecting piece hingedly connected to the first connecting piece, each of the connecting substrates being hingedly connected in sequence through the first connecting piece and the second connecting piece, one end of the tail substrate being provided with a first connecting piece, the first connecting piece of the tail substrate being hingedly connected to the second connecting piece of the connecting substrate at the end; piezoelectric wafers arranged on opposite sides of the substrates, the piezoelectric wafers being connected to wires, and a direct current voltage being applied to the piezoelectric wafers to cause the substrates connected to the piezoelectric wafers to be deflected; the length of each substrate in the substrate group decreasing from the side close to the housing of the proportional valve to the side away from the housing of the proportional valve; the length of each substrate in the substrate group being twice the length of the adjacent substrate; the length of the piezoelectric wafer being 5 / 6 to 2 / 3 of the length of the substrate connected to the piezoelectric wafer; the first connecting piece comprising a clamping groove, and the second connecting piece comprising a clasp; if x≤j, the step of applying a direct current voltage to the piezoelectric wafer on the b1th substrate according to the value of the horizontal deflection x comprising: if j+j / 2≥x>j, the step of applying a direct current voltage to the piezoelectric wafer on the first substrate and the b2th substrate according to the value of the horizontal deflection x comprising: applying a direct current voltage with a value of U1 to the piezoelectric wafer on the first substrate; and applying a direct current voltage with a value of U2 to the piezoelectric wafer on the b2th substrate. ​ ​ Characterized in that, from the side close to the proportional valve shell to the side away from the proportional valve shell, the base plates in the base plate group are arranged in order as: the first base plate, the second base plate, …, the cth base plate, the maximum offset of the first base plate is j, and the maximum offset of the nth base plate is j / 2 n-1 , the control method comprises the following steps: The horizontal offset x of the demand is obtained, if x≤j, the maximum value b1 of n is calculated according to the formula x≤j / 2 n-1 , and a direct current voltage is applied to the piezoelectric wafer on the b1 substrate according to the value of the horizontal offset x. If j + j / 2 ≥ x > j, the maximum value b2 of n is calculated according to the formula x - j ≤ j / 2 n-1 , and a direct current voltage is applied to the piezoelectric wafer on the first substrate and the b2th substrate according to the value of the horizontal offset x. if j + j / 2 +... + j / 2 a-1 ≥ x > j + j / 2 +... + j / 2 a-2 , according to the formula x - j - j / 2 -... - j / 2 a-2 ≤ j / 2 n-1 , calculate the maximum value b of n a , and apply a direct current voltage to the piezoelectric wafer on the first substrate, the second substrate,... the a-1 substrate, and the b a substrate according to the value of the horizontal offset x.

2. The control method of the baffle driven by the piezoelectric wafer array according to claim 1, characterized by, ​ 3. The control method of the baffle driven by the piezoelectric wafer array according to claim 2, characterized by, ​ 4. The control method of the baffle driven by the piezoelectric wafer array according to claim 3, characterized by, ​ 5. The control method of the baffle driven by the piezoelectric wafer array according to claim 1, characterized by, ​ 6. The control method of the baffle driven by the piezoelectric wafer array according to claim 1, characterized by, When a voltage of value U n is applied to the piezoelectric wafer on the nth substrate, the nth substrate reaches its maximum deflection j / 2 n-1 ; ​ a direct current voltage of value is applied to the piezoelectric wafer on the b1 substrate; wherein represents the maximum deflection of the b1 substrate when a DC voltage with a value of is applied to the piezoelectric wafer on the b1 substrate .

7. The control method of the piezoelectric wafer array driven baffle according to claim 6, characterized by, ​ ​ A DC voltage of value is applied to the piezoelectric wafer on the b2 substrate; wherein U1 represents the maximum deflection j of the first substrate when a DC voltage of value U1 is applied to the piezoelectric wafer on the first substrate, wherein Ub2 represents the maximum deflection j of the b2 substrate when a DC voltage of value Ub2 is applied to the piezoelectric wafer on the b2 substrate, wherein Ub2 represents the maximum deflection j of the b2 substrate when a DC voltage of value Ub2 is applied to the piezoelectric wafer on the b2 substrate,​ 8. The control method of the baffle driven by the piezoelectric wafer array according to claim 7, characterized by, if j + j / 2 +... + j / 2 a-1 ≥ x > j + j / 2 +... + j / 2 a-2 applying a direct current voltage to the piezoelectric wafer on the first substrate, the second substrate,... the (a-1)th substrate, and the (b a th substrate according to the value of the horizontal offset x includes: Values ​​U1, U2, ... U are applied to the first substrate, the second substrate, ... the (a-1)th substrate, respectively. a-1 DC voltage; to the b a piezoelectric wafer on the substrate is applied a direct current voltage having a value of V. Among them, U a-1 This represents applying a value U to the piezoelectric wafer on the (a-1)th substrate. a-1 At a DC voltage, the a-1th substrate to its maximum offset ; Representative of b a The piezoelectric wafer on the substrate is subjected to a value of When the DC voltage is , the bth a substrate to its maximum offset .

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