High-density storage server and operation method thereof

Abstract

The invention discloses a high-density storage server and an operation method thereof. The high-density storage server comprises a case, and the interior of the case comprises a front part and a rear part; the front part is provided with 12 hot-pluggable storage node modules, each storage node module comprises a storage control node plate and two 3.5-inch mechanical hard disks, the storage control node plate is integrated with a low-power-consumption multi-core ARM SoC processor, DDR memory particles and eMMC storage particles, and a 2.5 Gb Ethernet interface is expanded through a 2.5 Gb Ethernet card chip; the rear part is provided with two Ethernet switching modules, two power supply modules, two fan modules and one BMC management module; each storage node module is connected with two 3.5-inch mechanical hard disks through two SATA (Serial Advanced Technology Attachment) buses, and is connected with the Ethernet switching module through a 2.5 Gb Ethernet interface; through modular and distributed hardware architecture design, the storage density and the system reliability are remarkably improved, the power consumption and the maintenance cost of the whole machine are reduced, and meanwhile efficient storage and access of data are ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and particularly to a high-density storage server and its operation method. Background Art

[0002] With the rapid development of technologies such as the Internet, 5G, and artificial intelligence, the global data volume has shown an explosive growth. Especially in application scenarios such as big data, cloud computing, and the Internet of Things, the demand for data storage has increased sharply. As the core device of the data center, the storage server not only needs to provide efficient and reliable storage and data access services, but also needs to ensure the security and integrity of the data to support the continuous operation of enterprise critical services. Especially in cold data and warm data storage scenarios, the storage server needs to have characteristics such as high storage density, low power consumption, high reliability, and easy maintainability to meet the needs of large-scale data storage and management.

[0003] The low storage density of traditional storage servers is mainly due to their centralized architecture design. Traditional servers usually adopt a large main board, which occupies a large amount of horizontal space inside the chassis, leaving limited space for hard disks, resulting in a small number of hard disks per unit cabinet space. This design not only limits the improvement of storage density but also increases the cost of the cabinet. In addition, due to the low storage density, the utilization rate of cabinets in the data center is low, further increasing the operating cost. In short, due to the centralized architecture design and low storage density, the storage capacity per unit cabinet space is limited, increasing the construction and operation costs of the data center.

[0004] In view of this, how to improve the storage density has become an urgent technical problem to be solved in the design of storage servers. Summary of the Invention

[0005] The purpose of the present invention is to provide a high-density storage server and its operation method to solve the above technical problems.

[0006] To achieve this purpose, the present invention adopts the following technical solutions: A high-density storage server includes a chassis, and the interior of the chassis includes a front part and a rear part; The front part is provided with 12 hot-swappable storage node modules. Each storage node module includes a storage control node board and two 3.5-inch mechanical hard disks. The storage control node board is integrated with a low-power multi-core ARM SoC processor, DDR memory particles, eMMC storage particles, and extends a 2.5Gb Ethernet interface through a 2.5Gb Ethernet card chip; The rear part is provided with two Ethernet switch modules, two power modules, two fan modules, and one BMC management module; Inside the chassis, there is an intermediate backplane. The hardware modules in the front part and the rear part are all connected through the backplane to achieve interconnection and communication. Each storage node module is connected to two 3.5-inch mechanical hard drives through 2 SATA buses and is connected to the Ethernet switch module through a 2.5Gb Ethernet interface.

[0007] Optionally, the BMC management module is connected to each storage node module through management buses such as I2C, UART, USB, and GPIO, and is responsible for controlling, monitoring, and managing the working status of the whole machine's hardware modules.

[0008] Optionally, the power module adopts a dual-power design to provide power supply for the whole machine. The fan module is used for the heat dissipation of the whole machine, and each fan module has multiple built-in cooling fans.

[0009] Optionally, the storage control node board adopts a low-power multi-core ARM SoC processor, specifically an 8-core RK3588 processor. Each storage node module independently controls the data access and power supply of 2 3.5-inch mechanical hard drives in its corresponding node.

[0010] Optionally, the downstream 2.5Gb network ports of the Ethernet switch module are connected to 12 storage node modules, and the upstream network ports are accessed through 2 10Gb or 25Gb aggregated optical ports to the aggregation layer switch network of the IDC data center.

[0011] The present invention also provides an operation method for a high-density storage server, which is applied to the high-density storage server as described above. The operation method includes: Using the ARM processor of the storage control node board to intelligently classify the incoming data requests, and dividing the priorities of the data according to factors such as the access frequency, size, and real-time nature of the data. Prefetching hot data through an intelligent prediction algorithm, and preloading frequently accessed data into the DDR memory or eMMC storage particles in advance. Using the multi-core ARM processors of the storage nodes to parallel process data storage and access requests, automatically scheduling resources on the storage nodes with higher loads, and forwarding the requests to the nodes with lower loads. Through the 2.5Gb Ethernet card connected by the intermediate backplane, the system dynamically adjusts the bandwidth allocation according to the real-time network traffic monitoring situation. The system monitors the operating status of each storage node through the BMC management module, dynamically adjusts the resource allocation according to the load situation, bandwidth usage, and health status of the nodes, and automatically starts the redundancy plan for data recovery when a node fails.

[0012] Optionally, the ARM processor of the storage control node board is used to intelligently classify the incoming data requests, and prioritize the data according to factors such as the access frequency, size, and real-time nature of the data. Specifically, it includes: The system receives storage data requests from external users or other systems through the network interface. Each storage data request includes information such as the access instruction, data size, data type, and request timeliness of the data. The storage data request is transmitted through the ARM processor of the storage control node board; The ARM processor preliminarily analyzes the received storage data requests in real time. By extracting the basic information of the storage data requests, including the timestamp, data type, data access mode, and access timeliness of the data requests, the system starts to classify the data and prepares to enter the step of priority division; Based on the historical access data records, the ARM processor analyzes and calculates the access frequency of each data request. The data with high-frequency access will be regarded as hot data, and the hot data requests will be processed preferentially.

[0013] Optionally, the data with high-frequency access will be regarded as hot data, and the hot data requests will be processed preferentially. After that, it further includes: For each storage data request, the system prioritizes according to the amount of data requested. The storage data requests for small data blocks are set as high-priority for quick response, and the storage data requests for large data blocks are set as low-priority; For data requests with real-time requirements, the ARM processor assigns high priority; After completing the division of information in each dimension of access frequency, data size, and real-time requirements, the system will comprehensively merge the data priorities in each dimension. By setting weight coefficients, the final priority information is assigned to each storage data request.

[0014] Optionally, after assigning the final priority information to each storage data request by setting weight coefficients, it further includes: The ARM processor creates a data request queue based on the priority information and sorts the storage data requests in the queue. The high-priority storage data requests will be ranked at the front of the queue, and the low-priority requests will be delayed or queued temporarily; During the processing, the ARM processor dynamically adjusts the priority according to the actual situation of the data requests.

[0015] Compared with the prior art, the present invention has the following beneficial effects: BRIEF DESCRIPTION OF THE DRAWINGS To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0016] The structures, proportions, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those who are familiar with this technology to understand and read, and are not used to limit the conditions under which the present invention can be implemented. Therefore, they do not have substantial technical significance. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope covered by the technical content disclosed by the present invention.

[0017] Figure 1 It is a schematic diagram of the component decomposition structure from the perspective of the front part of a high-density storage server; Figure 2 It is a schematic diagram of the structure from the perspective of the front part of a high-density storage server; Figure 3 It is a schematic diagram of the structure from the perspective of the rear part of a high-density storage server; Figure 4 It is a schematic diagram of the component decomposition structure from the perspective of the rear part of a high-density storage server; Figure 5 It is a front view schematic diagram of the rear part of a high-density storage server; Figure 6 It is a schematic diagram of the system layout of a high-density storage server. Detailed implementation manners

[0018] To make the invention objectives, features, and advantages of the present invention more obvious and understandable, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0019] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present invention. It should be noted that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be intermediate components present simultaneously.

[0020] The technical solution of the present invention will be further described below in conjunction with the drawings and through specific embodiments.

[0021] Embodiment 1: Combined with Figures 1 to 6 As shown, the embodiment of the present invention provides a high-density storage server, including a 2U rack-mounted metal chassis 10. The interior of the chassis 10 includes a front part 20 and a rear part 30. The front part 20 is provided with 12 hot-swappable storage node modules 21. Each storage node module 21 includes a storage control node board 212 and two 3.5-inch mechanical hard disks 211. The storage control node board 212 integrates a low-power multi-core ARM SoC processor, DDR memory particles, and eMMC storage particles, and expands a 2.5Gb Ethernet interface through a 2.5Gb Ethernet network card chip.

[0022] The rear part 30 is provided with two Ethernet switch modules 31, two power modules 32, two fan modules 33, and one BMC management module 34. A middle backplane 40 is provided inside the chassis 10. The hardware modules of the front part 20 and the rear part 30 are all connected through the backplane 40 to achieve interconnection and communication. Each storage node module 21 is connected to the two 3.5-inch mechanical hard disks 211 through two SATA buses and is connected to the Ethernet switch module 31 through a 2.5Gb Ethernet interface.

[0023] The 12 storage node modules 21 are connected to the Ethernet switch module 31 through the backplane 40 to achieve high-speed data interaction between the storage nodes, and communicate with the external network through the uplink network interface of the Ethernet switch module 31.

[0024] The working principle of the present invention is as follows: The chassis 10 is divided into a front part and a rear part. The front part 20 is installed with 12 storage node modules 21, and the rear part 30 is installed with an Ethernet switch module 31, a power supply module 32, a fan module 33, and a BMC management module 34. This modular design makes the hardware layout more compact, facilitating maintenance and expansion. All hardware modules are connected through an intermediate backplane 40, reducing the complexity of traditional cable connections and improving the reliability and maintenance efficiency of the system. Each storage node module 21 includes a storage control node board 212 and two 3.5-inch mechanical hard disks 211. The storage control node board 212 integrates a low-power multi-core ARM SoC processor, DDR memory chips, and eMMC storage chips, capable of efficiently processing data storage and access requests. By expanding a 2.5Gb Ethernet interface through a 2.5Gb Ethernet card chip, the storage node module 21 can perform high-speed data interaction with the Ethernet switch module 31 to ensure efficient data transmission. This high-density storage server, through a modular and distributed hardware architecture design, significantly improves storage density and system reliability, reduces the power consumption and maintenance cost of the whole machine, and at the same time ensures efficient data storage and access.

[0025] In this embodiment, the BMC management module 34 is connected to each storage node module 21 through management buses such as I2C, UART, USB, and GPIO, and is responsible for controlling, monitoring, and managing the working states of the hardware modules of the whole machine.

[0026] The BMC (Baseboard Management Controller) management module is connected to each storage node module 21 through management buses such as I2C, UART, USB, and GPIO to realize real-time monitoring and management of the hardware modules of the whole machine. The BMC module can collect key parameters such as the temperature, voltage, hard disk health status, CPU working status information, usage status information of memory and eMMC storage, and operating system running status information of the storage node module 21, and issue control instructions through the management bus, such as adjusting the processor frequency, controlling the hard disk power supply status, etc. This design significantly improves the manageability and fault handling efficiency of the system, ensures that the hardware modules can quickly respond and recover in case of anomalies, thereby improving the reliability and operation and maintenance efficiency of the system.

[0027] In this embodiment, the power supply module 32 adopts a dual-power design to provide power supply for the whole machine; the fan module 33 is used for the heat dissipation of the whole machine, and each fan module 33 is built-in with multiple cooling fans.

[0028] The power supply module 32 adopts a dual-power 1+1 redundant design to ensure that the system can still operate normally in case of a single power supply failure, thus improving the power supply reliability of the system. The fan module 33 is built with multiple cooling fans, which can dynamically adjust the fan speed according to the system temperature to ensure that the hardware modules operate within an appropriate temperature range. This design not only improves the heat dissipation efficiency of the system but also reduces the risk of hardware failures caused by overheating, further enhancing the stability and reliability of the system.

[0029] In this embodiment, the storage control node board 212 adopts a low-power multi-core ARM SoC processor, specifically an 8-core RK3588 processor. Each storage node module 21 independently controls the data access and power supply of 2 3.5-inch mechanical hard disks 211 in its corresponding node.

[0030] The storage control node board 212 adopts a low-power multi-core ARM SoC processor (such as an 8-core RK3588 processor). Each storage node module 21 independently controls the data access and power supply of 2 3.5-inch mechanical hard disks 211 in its corresponding node. This design not only reduces the overall power consumption of the machine but also improves the flexibility and scalability of the system. By independently controlling the power supply of the hard disks, the system can dynamically adjust the power supply strategy according to the usage status of the hard disks. For example, the power supply can be turned off when the hard disks are idle to reduce power consumption, thereby further optimizing the energy efficiency performance of the whole machine.

[0031] In this embodiment, the downstream 2.5Gb network ports of the Ethernet switch module 31 are connected to 12 storage node modules 21, and the upstream network ports adopt 2 10Gb or 25Gb aggregated optical ports to access the aggregation layer switch network of the IDC data center.

[0032] The downstream 2.5Gb network ports of the Ethernet switch module 31 are connected to 12 storage node modules 21 to ensure high-speed data interaction between the storage nodes; the upstream network ports adopt 2 10Gb or 25Gb aggregated optical ports, which can communicate with the aggregation layer switch network of the IDC data center at high speed. This design not only improves the data transmission efficiency between the storage nodes but also enhances the reliability of network communication through the redundant design of the dual upstream links, ensuring that the system can provide stable and efficient data services in large-scale data storage and access scenarios.

[0033] Embodiment 2: The present invention also provides an operation method for a high-density storage server, which is applied to the high-density storage server as described in Embodiment 1. The operation method includes: S1. Use the ARM processor of the storage control node board 212 to intelligently classify incoming data requests, and prioritize the data according to factors such as the access frequency, size, and real-time nature of the data; high-priority data will be processed first, while low-priority data can be processed later.

[0034] Specifically, the system evaluates data requests according to factors such as access frequency, size, and real-time nature to generate a priority list of the data. Frequently accessed hot data will be marked as high priority and processed first; while infrequently accessed cold data can be processed later. Based on this priority information, the system dynamically schedules the processing resources and bandwidth in the storage nodes to optimize data transmission and processing.

[0035] S2. Prefetch hot data through an intelligent prediction algorithm, and preload frequently accessed data into the DDR memory or eMMC storage particles in advance; thereby reducing the latency of hard disk reads and improving data access efficiency.

[0036] S3. Use the multi-core ARM processors of the storage nodes to process data storage and access requests in parallel, automatically schedule resources on storage nodes with high loads, and forward requests to nodes with lower loads; thereby balancing the system load and avoiding processing bottlenecks.

[0037] S4. Through the 2.5Gb Ethernet network card connected by the middle backplane 40, the system dynamically adjusts the bandwidth allocation according to the real-time network traffic monitoring situation; ensuring that hot nodes obtain sufficient bandwidth, thereby optimizing the data transmission speed and increasing the system throughput.

[0038] S5. The system monitors the operating status of each storage node through the BMC management module 34, dynamically adjusts the resource allocation according to the load situation, bandwidth usage, and health status of the nodes, and automatically starts the redundancy plan for data recovery when a node fails; ensuring high system availability and data reliability.

[0039] The beneficial effects of the present invention are as follows: The operation method of the high-density storage server significantly improves the system's processing efficiency, data access speed, and overall throughput through innovative intelligent data scheduling, parallel processing, and dynamic bandwidth adjustment. First, the ARM processor of the storage control node board 212 intelligently classifies and prioritizes data requests, effectively solving the data access latency problem in traditional storage systems. Second, the system further optimizes the data storage and access process through the intelligent prediction prefetch of hot data and the parallel computing of multi-core processors, reducing the hard disk read latency and improving the concurrent processing ability. The dynamic adjustment of network bandwidth and the fault self-recovery mechanism effectively guarantee the high availability and data reliability of the system. Overall, this method has achieved significant improvements in performance, reliability, and scalability, reducing the system operation and maintenance costs and enhancing the user experience.

[0040] In this embodiment, specifically, step S1 specifically includes: S11, the system receives a storage data request from an external user or another system through a network interface. Each storage data request includes information such as an access instruction for the data, the data size, the data type, and the request timeliness. The storage data request is transmitted through the ARM processor of the storage control node board 212; S12, the ARM processor performs a preliminary analysis on the received storage data request in real time. By extracting the basic information of the storage data request, including the timestamp of the data request, the data type, the data access mode (such as sequential access or random access), and the access timeliness (such as real-time request or scheduled task), the system starts to classify the data and prepares to enter the step of priority division; S13, according to the historical access data record, the ARM processor analyzes and calculates the access frequency of each data request. The data with high access frequency will be regarded as hot data, and the hot data requests will be processed preferentially; to improve the analysis accuracy, the system adopts a dynamic access statistical algorithm (such as LRU, LFU, etc.) to update the access frequency of the data in real time, ensuring that the priority of the hot data always accurately reflects the current access requirements.

[0041] S14, for each storage data request, the system performs priority division according to the amount of data requested. The storage data requests for small data blocks are set to high priority for quick response, and the storage data requests for large data blocks are set to low priority; The request processing speed for small data blocks is fast, and the system can quickly respond to these requests. For requests for large data blocks, the system will set their priority to be lower and perform data sharding and asynchronous processing. This step improves the system throughput by dynamically dividing the priorities of small files and large files.

[0042] S15, for data requests with real-time requirements (such as video streams, real-time data acquisition, etc.), the ARM processor assigns high priority; To ensure the timely processing of real-time data, when analyzing the timeliness requirements, the system considers the delay tolerance of the request to further optimize the data processing order. During this process, the processing of real-time data bypasses the regular queue and directly enters the fast response queue for processing.

[0043] S16, after completing the division of information in each dimension of access frequency, data size, and real-time requirements, the system combines the data priorities by synthesizing the information in each dimension. By setting weight coefficients, the system assigns the final priority information to each storage data request.

[0044] For example, if the access frequency accounts for 60%, the real-time requirement accounts for 30%, and the data size accounts for 10%, the system will assign a final priority to each data request. In this way, the system can efficiently schedule data requests with different priorities and achieve a reasonable allocation of resources.

[0045] S17, the ARM processor will create a data request queue based on the priority information and sort the stored data requests in the queue. The stored data requests with high priority will be ranked at the front of the queue, and the requests with low priority will be delayed or temporarily queued. The stored data requests with high priority will be ranked at the front of the queue, and the system will process these data requests first. The requests with low priority may be delayed or temporarily queued to ensure the efficient use of system resources.

[0046] S18, during the processing, the ARM processor will dynamically adjust the priority according to the actual situation of the data request.

[0047] For example, when the processing time of some low-priority requests is long, the system may upgrade them to a higher priority according to the real-time feedback mechanism to avoid system congestion. At the same time, the processing result will be fed back to the requester to ensure the smoothness of the entire data processing process.

[0048] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high-density storage server, characterized in that: It comprises a chassis, wherein the chassis comprises a front part and a rear part; The front part is equipped with 12 hot-swappable storage node modules. Each storage node module includes a storage control node board and two 3.5-inch mechanical hard disks. The storage control node board integrates a low-power multi-core ARM SoC processor, DDR memory particles, and eMMC storage particles, and expands the 2.5Gb Ethernet interface through a 2.5Gb Ethernet card chip. The rear part is equipped with 2 Ethernet switch modules, 2 power modules, 2 fan modules and 1 BMC management module; An intermediate backplane is provided inside the chassis, and the hardware modules of the front part and the rear part are connected through the backplane to achieve interconnection and communication; Each storage node module is connected to two 3.5-inch mechanical hard disks through a 2-way SATA bus and to the Ethernet switch module through a 2.5Gb Ethernet interface.

2. The high-density storage server according to claim 1, characterized in that: The BMC management module is connected to each storage node module through the management bus of I2C, UART, USB, and GPIO, and is responsible for the working status control, monitoring and management of the hardware modules of the whole machine.

3. The high-density storage server according to claim 1, characterized in that: The power module adopts a dual power design to provide power supply for the whole machine; The fan modules are used for heat dissipation of the entire machine, and each fan module has multiple cooling fans built in.

4. The high-density storage server according to claim 1, characterized in that: The storage control node board adopts a low-power multi-core ARM SoC processor, specifically an 8-core RK3588 processor. Each storage node module independently controls the data access and power supply of the two 3.5-inch mechanical hard disks in its node.

5. The high-density storage server according to claim 1, characterized in that: The downstream 2.5Gb network port of the Ethernet switching module is connected to 12 storage node modules, and the upstream network port uses two 10Gb or 25Gb aggregation optical ports to access the aggregation layer switch network of the IDC data center.

6. A method for operating a high-density storage server, characterized in that: Applied to the high-density storage server according to any one of claims 1 to 5, the operating method comprises: The ARM processor of the storage control node board is used to intelligently classify incoming data requests and prioritize data based on data access frequency, size, and real-time factors; Pre-fetch hot data through intelligent prediction algorithms, and load frequently accessed data into DDR memory or eMMC storage particles in advance; Utilize the multi-core ARM processors of storage nodes to process data storage and access requests in parallel, automatically schedule resources on storage nodes with higher loads, and forward requests to nodes with lower loads; Through the 2.5Gb Ethernet card connected to the middle backplane, the system dynamically adjusts bandwidth allocation based on real-time network traffic monitoring; The system monitors the operating status of each storage node through the BMC management module, dynamically adjusts resource allocation based on the node's load, bandwidth usage, and health, and automatically starts the redundancy plan for data recovery when a node fails.

7. The method for operating a high-density storage server according to claim 6, characterized in that: The ARM processor of the storage control node board is used to intelligently classify the incoming data requests and prioritize the data according to the data access frequency, size, and real-time factors, specifically including: The system receives storage data requests from external users or other systems through the network interface. Each storage data request includes data access instructions, data size, data type and request timeliness information. The storage data request is transmitted through the ARM processor of the storage control node board; The ARM processor performs a preliminary analysis of the received storage data request in real time. By extracting the basic information of the storage data request, including the timestamp, data type, data access mode and access timeliness of the data request, the system begins to classify the data and prepares to enter the priority division step; Based on historical access data records, the ARM processor will analyze and calculate the access frequency of each data request. High-frequency access data will be regarded as hot data, and hot data requests will be processed with priority.

8. The method for operating a high-density storage server according to claim 7, characterized in that: The frequently accessed data will be regarded as hot data, and the hot data request will be processed first, followed by: For each storage data request, the system will prioritize it according to the amount of data requested. Storage data requests for small data blocks are set to high priority for quick response, and storage data requests for large data blocks are set to low priority. For data requests with real-time requirements, the ARM processor will give high priority; After completing the division of information on access frequency, data size, and real-time requirements, the system will combine the data priorities based on the information on each dimension, and assign the final priority information to each storage data request by setting the weight coefficient.

9. The method for operating a high-density storage server according to claim 8, characterized in that: The method allocates final priority information to each storage data request by setting a weight coefficient, and then further includes: The ARM processor will create a data request queue based on the priority information and sort the storage data requests in the queue. High-priority storage data requests will be placed at the front of the queue, while low-priority requests will be delayed or temporarily queued. During the processing, the ARM processor will dynamically adjust the priority based on the actual situation of the data request.

Images