Photovoltaic cell and method for manufacturing the same

Abstract

The embodiments of the present disclosure relate to the photovoltaic field and provide a photovoltaic cell and a method for manufacturing the same. The method for manufacturing the photovoltaic cell includes: a silicon substrate having a first surface and a second surface opposite to each other along a first direction, the first surface including a plurality of first regions spaced apart along the second direction; forming an initial doping layer containing silicon elements on the first region based on the silicon substrate, the surface of the initial doping layer away from the silicon substrate including at least one second region; forming a germanium-containing layer on the second region; forming an initial gate line on at least one side of the germanium-containing layer away from the second region; performing laser-enhanced contact optimization treatment on the initial gate line to promote the germanium element in the germanium-containing layer to react with the silicon element in the initial doping layer to form a germanium-silicon alloy layer, and the remaining initial doping layer serves as the doping layer, and the initial gate line is converted into a gate line, which is at least beneficial to improving the gate line's efficiency in collecting carriers and improving the utilization rate of the first surface with respect to light.

Description

Technical Field

[0001] The present disclosure relates to the field of photovoltaics, and in particular to a photovoltaic cell and a method for manufacturing the same. Background Art

[0002] With the gradual depletion of fossil fuels, photovoltaic cells are becoming increasingly popular as a new energy alternative. Photovoltaic cells convert sunlight into electricity. They utilize the principle of photovoltaics to generate charge carriers, which are then extracted using electrodes, facilitating the efficient use of the electricity. Photovoltaic cells primarily include BC cells (Back Contact), TOPCON (Tunnel Oxide Passivated Contact), PERC cells (Passivated Emitter and Real Cell), and heterojunction cells.

[0003] Grid lines are typically used to extract charge carriers from photovoltaic cells, thereby facilitating the efficient use of electrical energy. However, further research is needed to improve the photoelectric conversion efficiency of photovoltaic cells, both in terms of how to increase the efficiency of grid lines in collecting charge carriers and how to increase the efficiency of photovoltaic cells in utilizing light. Summary of the Invention

[0004] The embodiments of the present disclosure provide a photovoltaic cell and a method for manufacturing the same, which are at least beneficial for improving the efficiency of collecting carriers by the gate lines and improving the utilization rate of the first surface for light.

[0005] According to some embodiments of the present disclosure, on the one hand, the embodiments of the present disclosure provide a method for manufacturing a photovoltaic cell, including: providing a silicon substrate, the silicon substrate having a first surface and a second surface opposite to each other along a first direction, the first surface including a plurality of first regions arranged at intervals along a second direction, the first direction being the thickness direction of the silicon substrate, and the second direction intersecting with the first direction; forming an initial doping layer containing silicon elements on the first region based on the silicon substrate, the initial doping layer including at least one second region away from the surface of the silicon substrate; forming a germanium-containing layer on the second region; forming an initial gate line at least on one side of the germanium-containing layer away from the second region; performing laser enhanced contact optimization treatment on the initial gate line to promote the germanium element in the germanium-containing layer to react with the silicon element in the initial doping layer to form a germanium-silicon alloy layer, and the remaining initial doping layer serves as a doping layer, and the initial gate line is converted into a gate line.

[0006] In some embodiments, the material of the germanium-containing layer includes at least one of germanium oxide, germanium sulfide or germanium selenide; the step of forming the germanium-containing layer on the second region includes: forming the germanium-containing layer on the second region using a coating process; during the laser enhanced contact optimization treatment, at least part of the other elements in the germanium-containing layer except the germanium element are volatilized.

[0007] In some embodiments, after the laser enhanced contact optimization treatment is performed, the remaining germanium-containing layer is located between the gate line and the germanium-silicon alloy layer; or, during the laser enhanced contact optimization treatment, the germanium element in the germanium-containing layer reacts with the silicon element in the initial doping layer to form the germanium-silicon alloy layer, and the elements other than the germanium element in the germanium-containing layer volatilize, and the gate line and the germanium-silicon alloy layer are finally formed in direct contact.

[0008] In some embodiments, the germanium-containing layer is a germanium layer; the step of forming the germanium-containing layer on the second region includes: providing a germanium-containing source, the material of the germanium-containing source including at least one of germanium hydride, germanium chloride or tetramethylgermanium; performing a high-temperature decomposition treatment on the germanium-containing source so that germanium atoms are deposited on the second region to form the germanium layer.

[0009] In some embodiments, the step of forming the germanium-containing layer on the second region further includes: forming a mask layer on the surface of the initial doping layer away from the silicon substrate, the mask layer having at least one opening, and one opening exposing one second region; forming the germanium-containing layer on the mask layer and the second region, retaining the germanium-containing layer located on the second region, and removing the germanium-containing layer and the mask layer located on the mask layer.

[0010] In some embodiments, the step of forming the initial gate lines includes: printing a conductive paste on the second region; and drying the conductive paste to transform the conductive paste into the initial gate lines.

[0011] In some embodiments, the drying process is performed at a temperature of 150° C. to 500° C.

[0012] In some embodiments, the steps of performing the laser enhanced contact optimization process include: setting the power of the laser generating the laser to 5W~20W and the bias voltage to 10V~15V; aligning the laser with the initial grid line and the germanium-containing layer for scanning, the scanning width of the laser is 0.1mm~1mm, and the scanning rate of the laser is 10000mm / s~80000mm / s.

[0013] In some embodiments, the first zone and the second zone both extend along a third direction, a single first zone and a single second zone face each other along the first direction, and the third direction and the second direction intersect with the first direction in pairs; and / or a single first zone and at least two second zones face each other along the first direction.

[0014] In some embodiments, a ratio of the sum of the areas of at least one second region directly opposite to the same first region to the area of ​​the first region is 0.4-0.9.

[0015] In some embodiments, the step of forming the initial doping layer includes: performing a first doping diffusion process on the first surface to form a first doping layer covering the first surface and doped with doping elements; performing a first graphical processing on the first doping layer to retain only the first doping layer located in the first area as the initial doping layer.

[0016] In some embodiments, the first region includes a first doped region and a second doped region arranged alternately along the second direction; the step of forming the initial doped layer includes: forming an initial second doped layer on the first doped region, and forming an initial third doped layer on the second doped region; the step of forming the germanium-containing layer includes: forming the germanium-containing layer on the second region of both the initial second doped layer and the initial third doped layer.

[0017] According to some embodiments of the present disclosure, on the other hand, the embodiments of the present disclosure further provide a photovoltaic cell, comprising: a silicon substrate having a first surface and a second surface opposite to each other along a first direction, the first surface comprising a plurality of first regions spaced apart along a second direction, the first direction being the thickness direction of the silicon substrate, and the second direction intersecting with the first direction; a doping layer located on the first region and containing silicon elements, the doping layer comprising at least one second region away from the surface of the silicon substrate, the doping layer comprising a germanium-silicon alloy layer located in the second region; and a gate line, at least located on a side of the germanium-silicon alloy layer away from the silicon substrate.

[0018] In some embodiments, the photovoltaic cell further includes: a germanium-containing layer located between the gate line and the germanium-silicon alloy layer.

[0019] In some embodiments, the ratio of the content of germanium atoms to the content of silicon atoms in the germanium-silicon alloy layer is 0.1-10.

[0020] The technical solution provided by the embodiments of the present disclosure has at least the following advantages:

[0021] On the one hand, the conductivity of the germanium-silicon alloy layer is higher than that of pure silicon material. This helps to reduce the transmission resistance of carriers from the germanium-silicon alloy layer to the gate line by leveraging the higher conductivity of the germanium-silicon alloy layer, thereby improving the carrier collection efficiency of the gate line and the fill factor of the photovoltaic cell formed. On the other hand, the band gap of the germanium-silicon alloy layer is smaller than that of pure silicon material, which helps to achieve photoelectric conversion of longer-wavelength infrared light through the germanium-silicon alloy layer, thereby improving the short-circuit current of the photovoltaic cell. On the other hand, the doped layer includes a portion that does not directly face the gate line, which can control the doping concentration of the doping element in the doped layer to be low, thereby reducing parasitic absorption of light by the portion of the doped layer not blocked by the gate line, thereby reducing optical loss caused by the doped layer and improving the overall light utilization efficiency of the first surface. On the other hand, only a portion of the first surface, namely the first region, is designed with the doped layer, and the other regions of the first surface other than the first region are not blocked by the doped layer, thereby achieving higher light utilization efficiency. In this way, multiple effects help to improve the photoelectric conversion efficiency of the photovoltaic cell.

[0022] Moreover, the improvement of the electrical connection performance between the gate line and the doping layer mainly depends on the germanium-silicon alloy layer. The doping concentration of the doping element in the doping layer does not need to be too high, which is conducive to maintaining a better passivation level of the doping layer to improve the open circuit voltage of the photovoltaic cell.

[0023] In addition, it is beneficial to precisely control the area where the germanium-silicon alloy layer is formed by leveraging the high precision and low damage characteristics of laser-enhanced contact optimization processing, so that the germanium-silicon alloy layer will not be formed in the area not blocked by the gate line. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 A schematic partial cross-sectional view of a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure after forming a first doping layer on a silicon substrate;

[0026] Figure 2 A schematic partial cross-sectional view of a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure after an initial doping layer is formed on a first region;

[0027] Figure 3A schematic partial cross-sectional view of a method for manufacturing a photovoltaic cell provided by one embodiment of the present disclosure after a mask layer is formed on a surface of the initial doping layer away from the substrate;

[0028] Figure 4 A schematic partial cross-sectional view of a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure after a germanium-containing layer is formed;

[0029] Figure 5 A partial cross-sectional schematic diagram after forming initial grid lines in a method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0030] Figure 6 This is a schematic diagram of a first partial cross-section after forming a grid line in a method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0031] Figure 7 A second partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0032] Figure 8 A third partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0033] Figure 9 A schematic partial cross-sectional view of a silicon substrate provided in a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure;

[0034] Figure 10 Another partial cross-sectional schematic diagram after forming an initial doping layer in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0035] Figure 11 Another partial cross-sectional schematic diagram after forming a germanium-containing layer in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0036] Figure 12 Another partial cross-sectional schematic diagram after forming the initial grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0037] Figure 13 A fourth partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0038] Figure 14 A fifth partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0039] Figure 15 A sixth partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure;

[0040] Figure 16 A schematic partial top view of a photovoltaic cell after an initial doping layer is formed in a method for manufacturing the photovoltaic cell according to an embodiment of the present disclosure;

[0041] Figure 17 Another partial top view schematic diagram after forming the initial doping layer in the photovoltaic cell manufacturing method provided by one embodiment of the present disclosure.

[0042] Description of reference numerals:

[0043] 100, silicon substrate; 110, first surface; 120, second surface; 130, first region; 101, initial doped layer; 111, second region; 121, doped layer; 102, germanium-containing layer; 103, initial gate line; 113, gate line; 104, germanium-silicon alloy layer; 105, mask layer; 115, opening; 106, first doped layer; 119, first passivation layer; 129, second passivation layer.

[0044] 200, silicon substrate; 210, first surface; 220, second surface; 230, first region; 2301, first doped region; 2302, second doped region; 240, spacer region; 201, initial doped layer; 211, second region; 221, doped layer; 2211, second doped layer; 2212, third doped layer; 202, germanium-containing layer; 203, initial gate line; 213, gate line; 204, germanium-silicon alloy layer; 207, initial second doped layer; 217, first tunneling layer; 227, first doped polysilicon layer; 208, initial third doped layer; 218, second tunneling layer; 228, second doped polysilicon layer; 219, first passivation layer; 229, second passivation layer. DETAILED DESCRIPTION

[0045] As known from the background art, the efficiency of collecting carriers by the gate line needs to be improved, and the utilization rate of light by the first surface needs to be improved.

[0046] Embodiments of the present disclosure provide a photovoltaic cell and a method for manufacturing the same. In the photovoltaic cell manufacturing method, on the one hand, the conductivity of the germanium-silicon alloy layer is higher than that of pure silicon material. This helps to reduce the transmission resistance of carriers transmitted through the germanium-silicon alloy layer to the gate line by leveraging the higher conductivity of the germanium-silicon alloy layer, thereby improving the carrier collection efficiency of the gate line and the fill factor of the ultimately formed photovoltaic cell. On the other hand, the band gap of the germanium-silicon alloy layer is smaller than that of pure silicon material, which helps to achieve photoelectric conversion of longer-wavelength infrared light by the germanium-silicon alloy layer, thereby improving the short-circuit current of the photovoltaic cell. On the other hand, the doped layer includes a portion that does not directly face the gate line, which can control the doping concentration of the doping element in the doped layer to be low, thereby reducing parasitic absorption of light by the portion of the doped layer not blocked by the gate line, thereby reducing optical loss caused by the doped layer and improving the overall light utilization efficiency of the first surface. On the other hand, only a portion of the first surface, that is, the first region, is designed with the doped layer, and the other regions of the first surface other than the first region are not blocked by the doped layer, thereby achieving higher light utilization efficiency. In this way, multiple effects are conducive to improving the photoelectric conversion efficiency of photovoltaic cells. Moreover, the improvement of the electrical connection performance between the gate line and the doped layer mainly depends on the germanium-silicon alloy layer. The doping concentration of the doping element in the doped layer does not need to be too high, which is conducive to maintaining a better passivation level of the doped layer and improving the open-circuit voltage of the photovoltaic cell. In addition, it is beneficial to use the high precision and low damage characteristics of laser-enhanced contact optimization processing to accurately control the area where the germanium-silicon alloy layer is formed, so that the germanium-silicon alloy layer will not form in the area not blocked by the gate line.

[0047] In the description of the embodiments of the present disclosure, technical terms such as "first" and "second" are used solely to distinguish between different objects and should not be understood to indicate or imply relative importance or to implicitly specify the quantity, specific order, or primary and secondary relationship of the technical features indicated. In the description of the embodiments of the present disclosure, "plurality" means more than two, unless otherwise specifically defined.

[0048] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present disclosure. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0049] In the description of the embodiments of the present disclosure, the term "and / or" is merely a description of an association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0050] In the description of the embodiments of the present disclosure, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0051] In the description of the embodiments of the present disclosure, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the embodiments of the present disclosure.

[0052] In the description of the embodiments of the present disclosure, unless otherwise expressly specified or limited, technical terms such as "installed," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and they can refer to internal connectivity between two components or interaction between two components. Those skilled in the art can understand the specific meanings of the above terms in the embodiments of the present disclosure based on specific circumstances.

[0053] In the accompanying drawings corresponding to the embodiments of the present disclosure, the thickness and area of ​​layers are exaggerated for better understanding and ease of description. When a component (such as a layer, film, region, or substrate) is described as being on or on the surface of another component, the component may be "directly" located on the surface of the other component, or a third component may be present between the two components. Conversely, when a component is described as being on the surface of another component, or as being formed or disposed on the surface of one component, it indicates that there is no third component between the two components. Furthermore, when a component is described as being "substantially" formed on another component, this means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0054] In the description of the embodiments of the present disclosure, when a component is referred to as "including" another component, unless otherwise specified, this does not exclude other components, and other components may further be included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on" another component, it may be "directly on" the other component (i.e., located on the surface of the other component with no other components between them) or another component may be present between them. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "directly on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, this means that no other components are located between them.

[0055] The terms used herein in the description of the various embodiments are intended only to describe the specific embodiments and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "the component" is intended to include the plural form unless the context clearly indicates otherwise. A component includes a layer, film, region, or plate.

[0056] The following describes various embodiments of the present disclosure in detail with reference to the accompanying drawings. However, those skilled in the art will appreciate that many technical details are provided in the various embodiments of the present disclosure to help readers better understand the embodiments of the present disclosure. However, even without these technical details and the various variations and modifications based on the following embodiments, the technical solutions claimed in the embodiments of the present disclosure can be implemented.

[0057] An embodiment of the present disclosure provides a method for manufacturing a photovoltaic cell. The method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0058] refer to Figures 1 to 17 , the manufacturing method of the photovoltaic cell may include the following steps:

[0059] S1: Reference Figure 1 or Figure 9 A silicon substrate (100 or 200) is provided. The silicon substrate (100 or 200) has a first surface (110 or 210) and a second surface (120 or 220) opposite to each other along a first direction X. The first surface (110 or 210) includes a plurality of first regions (130 or 230) arranged at intervals along a second direction Y. The first direction X is a thickness direction of the silicon substrate (100 or 200), and the second direction Y intersects with the first direction X.

[0060] S2: Combined with reference Figure 1 and Figure 2 , or refer to Figure 10, based on a silicon substrate (100 or 200), an initial doped layer (101 or 201) containing silicon elements is formed on a first region (130 or 230), and a surface of the initial doped layer (101 or 201) away from the silicon substrate (100 or 200) includes at least one second region (111 or 211).

[0061] It is worth noting that Figure 1 and Figure 2 The structure shown is an example. The initial doping layer 101 can be transformed based on doping the silicon substrate 100 with doping elements. Therefore, Figure 2 The initial doping layer 101 formed as shown contains silicon element.

[0062] Optionally, refer to Figure 1 , a first doping diffusion process is performed on the first surface 110, and along the first direction X, a portion of the thickness of the silicon substrate 100 is converted into a first doping layer 106 doped with a doping element, and the first doping layer 106 is formed based on the silicon substrate 100, so the first doping layer 106 also contains silicon elements, and the remaining thickness of the silicon substrate 100 is used as the silicon substrate 100 in subsequent steps; combined with reference Figure 1 and Figure 2 , performing a first patterning process on the first doping layer 106 , and retaining only the first doping layer 106 located in the first region 130 as the initial doping layer 101 .

[0063] It should be noted that Figure 10 The method for forming the initial doping layer 201 is similar to that shown in FIG. Figure 1 and Figure 2 The preparation method is similar to that shown in the figure and will not be described in detail here. Figure 4 or reference Figure 11 , forming a germanium-containing layer (102 or 202) on the second region (111 or 211).

[0064] S4: Reference Figure 5 or reference Figure 12 , forming an initial gate line (103 or 203) at least on one side of the germanium-containing layer (102 or 202) away from the second region (111 or 211).

[0065] S5: Combined with reference Figures 5 to 8 , or combined with reference Figures 12 to 15 , the initial gate line (103 or 203) is subjected to laser enhanced contact optimization treatment, so that the germanium element in the germanium-containing layer (102 or 202) reacts with the silicon element in the initial doping layer (101 or 201) to form a germanium-silicon alloy layer (104 or 204), and the remaining initial doping layer (101 or 201) serves as the doping layer (121 or 221), and the initial gate line (103 or 203) is converted into a gate line (113 or 213).

[0066] It should be noted that Figures 1 to 8 A series of partial cross-sectional schematic diagrams corresponding to each step in a method for manufacturing a photovoltaic cell provided in an embodiment of the present disclosure, to form a photovoltaic cell having grid lines on both sides; Figures 9 to 15 Another series of partial cross-sectional schematic diagrams corresponding to each step in the photovoltaic cell manufacturing method provided by one embodiment of the present disclosure to form a BC cell. Each figure will be described in detail later.

[0067] It is worth noting that the area where the initial doped layer (101 or 201) contacts the silicon substrate (100 or 200) is the first area (130 or 230), and only a portion of the surface of the initial doped layer (101 or 201) away from the silicon substrate (100 or 200) is the second area (111 or 211). In other words, in the orthographic projection on the first surface (110 or 210), the orthographic projection of the second area (111 or 211) only overlaps with a portion of the orthographic projection of the first area (130 or 230). That is, along the first direction X, the orthographic projection of the second area (111 or 211) on the first surface (110 or 210) is the second orthographic projection, and the orthographic projection of the first area (130 or 230) on the first surface (110 or 210) is the first orthographic projection, and the second orthographic projection only overlaps with a portion of the first orthographic projection.

[0068] Based on this, the germanium-containing layer (102 or 202) is formed only on a portion of the surface of the initial doped layer (101 or 201) away from the silicon substrate (100 or 200). After the germanium-silicon alloy layer (104 or 204) is subsequently formed based on the germanium-containing layer (102 or 202), only a portion of the surface of the initial doped layer (101 or 201) away from the silicon substrate (100 or 200) is replaced by the surface of the germanium-silicon alloy layer (104 or 204), and the remaining surface is still composed of the initial doped layer (101 or 201), and the remaining initial doped layer (101 or 201) serves as the doped layer (121 or 221). In other words, the germanium-silicon alloy layer (104 or 204) is embedded in the doped layer (121 or 221).

[0069] Furthermore, the initial gate line (103 or 203) is designed to be formed at least on the side of the germanium-containing layer (102 or 202) away from the second region (111 or 211). After the laser-enhanced contact optimization treatment is performed, the surface of the germanium-silicon alloy layer (104 or 204) away from the silicon substrate (100 or 200) will be directly opposite the gate line (113 or 213), and at least part of the doped layer (121 or 221) will not be blocked by the gate line (113 or 213), or in other words, the doped layer (121 or 221) includes a portion that is not directly opposite the gate line (113 or 213). Thus, on the one hand, the conductivity of the germanium-silicon alloy layer (104 or 204) is higher than that of pure silicon material, which is conducive to reducing the transmission resistance of carriers finally transmitted to the gate line (113 or 213) through the germanium-silicon alloy layer (104 or 204) by means of the higher conductivity in the germanium-silicon alloy layer (104 or 204), reducing the line resistance, thereby improving the collection efficiency of the gate line (113 or 213) for carriers, and improving the fill factor of the photovoltaic cell finally formed; on the other hand, the band gap of the germanium-silicon alloy layer (104 or 204) is smaller than that of pure silicon material, which is conducive to realizing the photoelectric conversion of longer-wavelength infrared light by means of the germanium-silicon alloy layer (104 or 204), thereby improving the short-circuit current of the photovoltaic cell; on the other hand, the doping layer (121 or 22 1) Including the portion not directly facing the gate line (113 or 213), the doping concentration of the doping element in the doping layer (121 or 221) can be controlled to be low, thereby reducing the parasitic absorption of light by the portion of the doping layer (121 or 221) not blocked by the gate line (113 or 213), thereby reducing the optical loss caused by the doping layer (121 or 221) and improving the overall light utilization efficiency of the first surface (110 or 210); on the other hand, only a portion of the first surface (110 or 210), that is, the first region (130 or 230), is designed with the doping layer (121 or 221), and the other regions of the first surface (110 or 210) other than the first region (130 or 230) are not blocked by the doping layer (121 or 221), thereby achieving a higher light utilization efficiency. In this way, multiple effects are conducive to improving the photoelectric conversion efficiency of the photovoltaic cell.

[0070] It is worth emphasizing that, compared with the current technical solution for improving the electrical connection performance between the gate line and the doping layer, thereby improving the gate line's carrier collection efficiency and increasing the doping concentration of the doping element in the entire doping layer to a certain level, the manufacturing method of the photovoltaic cell provided in one embodiment of the present disclosure does not simply rely on the doping concentration of the doping element in the doping layer (121 or 221) to improve the electrical connection performance between the gate line (113 or 213) and the doping layer (121 or 221). Instead, while controlling the doping concentration of the doping element in the doping layer (121 or 221) to be low, the electrical connection performance between the gate line (113 or 213) and the doping layer (121 or 221) is improved with the help of the germanium-silicon alloy layer (104 or 204) with higher conductivity. Moreover, not only is a doping layer (121 or 221) designed on only a portion of the first surface (110 or 210), that is, the first region (130 or 230), but also only a portion of the surface of the initial doping layer (101 or 201) away from the silicon substrate (100 or 200) is designed as the second region (111 or 211), so that the finally formed germanium-silicon alloy layer (104 or 204) is only directly opposite the gate line (113 or 213), thereby reducing the transmission resistance of the carriers ultimately transmitted to the gate line (113 or 213) through the germanium-silicon alloy layer (104 or 204) and further reducing the doping concentration of the doping element in the doping layer (121 or 221), thereby reducing the parasitic absorption of light by the doping layer (121 or 221). In other words, the improvement of the electrical connection performance between the gate line (113 or 213) and the doping layer (121 or 221) mainly depends on the germanium-silicon alloy layer (104 or 204), and the doping concentration of the doping element in the doping layer (121 or 221) does not need to be too high, which is beneficial for the doping layer (121 or 221) to maintain a better passivation level, thereby improving the open circuit voltage of the photovoltaic cell.

[0071] In one example, in a current technical solution to improve the electrical connection performance between the gate line and the doping layer, the doping concentration of the doping element in the entire doping layer is increased to a certain level. This doping concentration is referred to as a first doping concentration. In the photovoltaic cell manufacturing method provided in an embodiment of the present disclosure, the doping concentration of the doping element in the doping layer (121 or 221) is referred to as a second doping concentration. The first doping concentration is higher than the second doping concentration.

[0072] In addition, in S5: the step of forming the germanium-silicon alloy layer (104 or 204), it is beneficial to precisely control the properties of the material in the working area by taking advantage of the high precision and low damage characteristics of the laser-enhanced contact optimization processing, that is, precisely control the area where the germanium-silicon alloy layer (104 or 204) is formed, so that the germanium-silicon alloy layer (104 or 204) is directly opposite the gate line (113 or 213) and will not be formed in the area not blocked by the gate line (113 or 213).

[0073] The following will describe in more detail the steps in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure with reference to the accompanying drawings.

[0074] In some embodiments, the band gap of the germanium-silicon alloy layer (104 or 204) can be 0.67 eV to 1.1 eV, for example, 0.68 eV, 0.69 eV, 0.7 eV, 0.71 eV, 0.72 eV, 0.73 eV, 0.74 eV, 0.75 eV, 0.76 eV, 0.77 eV, 0.78 eV, 0.79 eV, 0.8 eV, 0.81 eV, 0.82 eV, 0.83 eV, 0.84 eV, 0.86 eV, 0.87 eV, 0.88 eV, 0.89 eV, 0.90 eV, 0.91 eV, 0.92 eV, 0.93 eV, 0.94 eV, 0.95 eV, 0.96 eV, 0.97 eV, 0.98 eV, 0.99 eV, 0.91 eV, 0.99 eV, 0.91 eV, 0.91 eV, 0.92 eV, 0.93 eV, 0.94 eV, 0.95 eV, 0.96 eV, 0.97 eV, 0.98 eV, 0.99 eV, 0.99 eV, 0.91 eV, 0.99 eV, 0.91 eV 5eV, 0.86eV, 0.87eV, 0.88eV, 0.89eV, 0.9eV, 0.91eV, 0.92eV, 0.93eV, 0.94eV, 0.95eV, 0.96eV, 0.97 eV, 0.98eV, 0.99eV, 1e, 1.01eV, 1.02eV, 1.03eV, 1.04eV, 1.05eV, 1.06eV, 1.07eV, 1.08eV or 1.09eV, etc.

[0075] This is beneficial for broadening the response range of the photovoltaic cell to infrared light by leveraging the low bandgap characteristics of the germanium-silicon alloy layer (104 or 204), allowing infrared light of longer wavelengths to be utilized by the photovoltaic cell, thereby increasing the short-circuit current of the photovoltaic cell.

[0076] The types of photovoltaic cells that are ultimately formed are described in detail below.

[0077] In some embodiments, reference Figure 6 、 Figure 7 or Figure 8 The photovoltaic cell finally formed can be a cell with grid lines on both sides, for example, it can be a PERC cell (Passivated Emitter Rear Cell), a TOPCon cell (Tunnel Oxide Passivated Contact), a HIT / HJT cell (Heterojunction Technology), a solar thin-film cell, a tandem cell, or any combination thereof. Among them, solar thin-film cells include but are not limited to perovskite solar thin-film cells, copper indium selenide solar thin-film cells, gallium arsenide solar thin-film cells, and cadmium sulfide solar thin-film cells. Tandem cells include but are not limited to perovskite cells stacked on crystalline silicon cells, perovskite cells stacked on perovskite cells, and perovskite cells stacked on thin-film cells.

[0078] in, Figure 6This is a schematic diagram of a first partial cross-section after forming a grid line in a method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure; Figure 7 A second partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure; Figure 8 This is a third partial cross-sectional schematic diagram after forming grid lines in the photovoltaic cell manufacturing method provided by an embodiment of the present disclosure.

[0079] Thus, first surface 110 can be considered the front side of the final photovoltaic cell, that is, first surface 110 can serve as the light-receiving surface, and doped layer 121 formed on first region 130 of first surface 110 can be considered a selective emitter. In some examples, the materials of both initial doped layer 101 and doped layer 121 can be silicon material layers including dopant elements, that is, both initial doped layer 101 and doped layer 121 can be film layers including dopant elements and silicon elements.

[0080] It should be noted that in actual applications, the photovoltaic cell finally formed can be a single-sided cell, and the first side can be regarded as the front side of the photovoltaic cell, that is, the first side can serve as the light-receiving side for receiving incident light, and the second side can serve as the backlight side; alternatively, the photovoltaic cell finally formed can be a bifacial cell, in which case both the first side and the second side can serve as light-receiving sides, both of which can be used to receive incident light. It is understood that the backlight side described in one embodiment of the present disclosure is also capable of receiving incident light, but the degree of receiving incident light is weaker than that of the light-receiving side, and therefore is defined as the backlight side.

[0081] In some embodiments, in conjunction with reference Figure 1 and Figure 2 , S2: The step of forming the initial doping layer 101 may include: referring to Figure 1 , a first doping diffusion process is performed on the first surface 110 to form a first doping layer 106 covering the first surface 110 and doped with doping elements; Figure 1 and Figure 2 , performing a first patterning process on the first doping layer 106 , and retaining only the first doping layer 106 located in the first region 130 as the initial doping layer 101 .

[0082] It should be noted that Figure 1 A schematic partial cross-sectional view of a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure after forming a first doping layer on a silicon substrate; Figure 2 A schematic partial cross-sectional view of a photovoltaic cell manufacturing method according to an embodiment of the present disclosure after an initial doping layer is formed on a first region.

[0083] Furthermore, during the first doping diffusion process on the first surface 110 , a portion of the thickness of the silicon substrate 100 along the first direction X is converted into a first doping layer 106 doped with doping elements, and the remaining thickness of the silicon substrate 100 serves as the silicon substrate 100 in subsequent steps.

[0084] In some examples, the silicon substrate 100 may be an N-type semiconductor substrate doped with an N-type dopant element, and the first doping layer 106, the initial doping layer 101, and the subsequently formed doping layers all contain P-type dopant elements. In other examples, the silicon substrate 100 may also be a P-type semiconductor substrate doped with a P-type dopant element, and the first doping layer 106, the initial doping layer 101, and the subsequently formed doping layers all contain N-type dopant elements.

[0085] In some examples, the N-type doping element may be at least one of Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As); the P-type semiconductor substrate is doped with a P-type element, and the P-type doping element may be at least one of Group III elements such as boron (B), aluminum (Al), gallium (Ga), or gallium (In).

[0086] It should be noted that when the photovoltaic cell finally formed can be a cell with grid lines on both sides, the second side can also perform steps S1 to S5 similarly to the first side, that is, a local doping layer is formed on the second side, and then a germanium-containing layer is formed in a local area of ​​the doping layer, and an initial grid line is formed on at least one side of the germanium-containing layer away from the second side, and the initial grid line is subjected to laser enhanced contact optimization treatment, ultimately causing the germanium element in the germanium-containing layer to react with the silicon element in the doping layer to form a germanium-silicon alloy layer, and the initial grid line is converted into a grid line. In some examples, the local doping layer formed on the second side can be a passivation contact stack including a tunneling layer and a polysilicon layer doped with the doping element.

[0087] In other embodiments, reference Figure 13 、 Figure 14 or Figure 15 The final photovoltaic cell can be a back-contact cell, or BC cell. BC cells include, but are not limited to, IBC cells (Interdigitated Back Contact), HBC cells (Heterojunction Back Contact), TBC cells (TOPCon Back Contact), and HPBC cells (Hybrid Passivated Back Contact). Thus, the first surface 210 can be considered the back surface of the final photovoltaic cell.

[0088] in, Figure 13 A fourth partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure; Figure 14 A fifth partial cross-sectional schematic diagram after forming grid lines in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure; Figure 15 This is a sixth partial cross-sectional schematic diagram after forming grid lines in the photovoltaic cell manufacturing method provided by an embodiment of the present disclosure.

[0089] In some cases, reference Figure 9 , the plurality of first regions 230 may include first doped regions 2301 and second doped regions 2302 alternately arranged along the second direction Y; Figure 10 , S2: The step of forming the initial doping layer 201 may include: forming an initial second doping layer 207 on the first doping region 2301, and forming an initial third doping layer 208 on the second doping region 2302; Figure 11 S3: forming the germanium-containing layer 202 may include forming the germanium-containing layer 202 on the second regions 211 of both the initial second doping layer 207 and the initial third doping layer 208 .

[0090] In other words, step S2 is divided into two major steps: forming the initial second doped layer 207 and forming the initial third doped layer 208. Unlike step S2, in step S3, the germanium-containing layer 202 formed on the second region 111 of both the initial second doped layer 207 and the initial third doped layer 208 can be prepared in the same step. Step S2 is described in detail below.

[0091] It should be noted that Figure 9 A schematic partial cross-sectional view of a silicon substrate provided in a method for manufacturing a photovoltaic cell according to an embodiment of the present disclosure; Figure 10 Another partial cross-sectional schematic diagram after forming an initial doping layer in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure; Figure 11 Another partial cross-sectional schematic diagram after forming a germanium-containing layer in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure.

[0092] In some examples, reference Figure 10 The initial second doped layer 207 can be a first passivation contact stack including a first tunneling layer 217 and a first doped polysilicon layer 227 doped with a first type doping element; the initial third doped layer 208 can be a second passivation contact stack including a second tunneling layer 218 and a second doped polysilicon layer 228 doped with a second type doping element.

[0093] It should be noted that the first type doping element is one of a P-type doping element and an N-type doping element, and the second type doping element is the other of the P-type doping element and the N-type doping element. For ease of explanation, the following description will be made by taking the first type doping element as a P-type doping element and the second type doping element as an N-type doping element as an example. In addition, Figure 10 Taking the final BC battery as TBC battery (TOPCon Back Contact, referring to cross passivated back contact battery) as an example, in actual applications, the BC battery can also be HBC battery (Heterojunction Back Contact, heterojunction back contact battery) or back contact battery) or HPBC battery (Hybrid Passivated Back Contact, composite passivated back contact battery) and so on.

[0094] refer to Figure 10 The step of forming the initial second doped layer 207 may include: forming an initial first tunneling layer (not shown in the figure) on the first surface 210; forming an initial first film layer (not shown in the figure) on the side of the initial first tunneling layer away from the silicon substrate 200; performing a second doping diffusion process on the initial first film layer to form an initial first doped film (not shown in the figure) covering the side of the initial first tunneling layer away from the silicon substrate 200 and doped with a P-type doping element; performing a first patterning process on the initial first tunneling layer and the initial first doped film to remove the initial first tunneling layer and the initial first doped film on the area of ​​the first surface 210 other than the first doped region 2301, retaining only the initial first tunneling layer located on the first doped region 2301 as the first tunneling layer 217, and retaining only the initial first doped film located on the first doped region 2301 as the first doped polysilicon layer 227.

[0095] In some examples, the step of forming the initial first tunneling layer may include performing a first thermal oxidation treatment on the first surface 210 to form the initial first tunneling layer comprising silicon oxide. It should be noted that during the first thermal oxidation treatment on the first surface 210, a portion of the thickness of the silicon substrate 200 along the first direction X is converted into the initial first tunneling layer comprising silicon oxide, and the remaining thickness of the silicon substrate 200 serves as the silicon substrate 200 in subsequent steps.

[0096] In some examples, the initial first film layer may be a polysilicon film layer; in other examples, the initial first film layer may be an amorphous silicon film layer. In the step of performing the second doping diffusion process on the initial first film layer, the initial first film layer is also subjected to a crystallization treatment, such as an annealing treatment, so that the formed initial first doped film is a polysilicon film doped with a P-type doping element.

[0097] In some examples, during the second doping diffusion process on the initial first film layer, not only an initial first doped film doped with a P-type dopant element is formed, but also a silicon glass layer doped with a P-type dopant element (not shown). For example, the initial first doped film is a boron-doped polysilicon film, and the silicon glass layer doped with a P-type dopant element is a borosilicate glass layer. It should be noted that in the subsequent first patterning step, the borosilicate glass layer is first removed, and then the initial first tunneling layer and the initial first doped film are removed from the area of ​​the first surface 210 excluding the first doped region 2301.

[0098] In one example, along the first direction X, the thickness of the stack consisting of the initial first tunneling layer and the initial first doped film is 100nm~300nm, for example, it can be 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm, 210nm, 220nm, 230nm, 240nm, 250nm, 260nm, 270nm, 280nm or 290nm; the thickness of the borosilicate glass layer is 20nm~80nm, for example, it can be 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm or 75nm, etc.

[0099] In some examples, the step of performing a first patterning treatment on the initial first tunneling layer and the initial first doped film may include: using a laser to perform a patterning film opening treatment on the area of ​​the first surface 210 other than the first doped region 2301, then removing the borosilicate glass layer, and then using an alkali polishing process to remove the laser residue and the initial first tunneling layer and the initial first doped film on the area of ​​the first surface 210 other than the first doped region 2301.

[0100] Continue to refer Figure 10 The step of forming the initial third doped layer 208 may include: forming an initial second tunneling layer (not shown in the figure) on the surface formed by the initial second doped layer 207 and the remaining first surface 210; forming an initial second film layer (not shown in the figure) on the side of the initial second tunneling layer away from the silicon substrate 200; performing a third doping diffusion process on the initial second film layer to form an initial second doped film (not shown in the figure) covering the side of the initial second tunneling layer away from the silicon substrate 200 and doped with an N-type doping element; performing a second patterning process on the initial second tunneling layer and the initial second doped film to remove the initial second tunneling layer and the initial second doped film on the area of ​​the first surface 210 except the second doped region 2302, retaining only the initial second tunneling layer located on the second doped region 2302 as the second tunneling layer 218, and retaining only the initial first doped film located on the second doped region 2302 as the second doped polysilicon layer 228.

[0101] In some examples, the step of forming the initial second tunneling layer may include performing a second thermal oxidation process on the first surface 210 not blocked by the initial second doped layer 207 to form the initial second tunneling layer comprising silicon oxide. It should be noted that during the second thermal oxidation process on the first surface 210, a portion of the thickness of the silicon substrate 200 along the first direction X is converted into the initial second tunneling layer comprising silicon oxide, and the remaining thickness of the silicon substrate 200 serves as the silicon substrate 200 in subsequent steps.

[0102] In some examples, the initial second film layer may be a polysilicon film layer; in other examples, the initial second film layer may be an amorphous silicon film layer. In the step of performing the third doping diffusion process on the initial second film layer, the initial second film layer is also subjected to a crystallization treatment, such as an annealing treatment, so that the formed initial second doped film is a polysilicon film doped with N-type doping elements.

[0103] In some examples, during the step of performing the third doping diffusion process on the initial second film layer, not only an initial second doped film doped with an N-type doping element is formed, but also a silicon glass layer doped with an N-type doping element is formed. For example, the initial second doped film is a phosphorus-doped polysilicon film, and the silicon glass layer doped with an N-type doping element is a phosphosilicate glass layer. It should be noted that in the subsequent second patterning step, the phosphosilicate glass layer is first removed, and then the initial second tunneling layer and the initial second doped film are removed from the area of ​​the first surface 210 other than the second doped region 2302.

[0104] In one example, along the first direction X, the thickness of the stack consisting of the initial second tunneling layer and the initial second doping film is 100nm~300nm, for example, it can be 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm, 210nm, 220nm, 230nm, 240nm, 250nm, 260nm, 270nm, 280nm or 290nm; the thickness of the phosphosilicate glass layer is 30nm~60nm, for example, it can be 35nm, 40nm, 45nm, 50nm or 55nm.

[0105] In some examples, the step of performing a second patterning process on the initial second tunneling layer and the initial second doped film may include: using a laser to perform a patterning film opening process on the area of ​​the first surface 210 other than the second doped region 2302, then removing the phosphosilicate glass layer, and then using an alkali polishing process to remove the laser residue and the initial second tunneling layer and the initial second doped film on the area of ​​the first surface 210 other than the second doped region 2302.

[0106] In some examples, reference Figures 9 to 15There is also a spacer 240 between the adjacent first doping regions 2301 and the second doping regions 2302, and the total orthographic projection area of ​​the multiple spacer regions 240 on the first surface 210 accounts for 20% to 60% of the first surface 210, for example, it can be 25%, 30%, 35%, 40%, 45%, 50% or 55%, etc.; the total orthographic projection area of ​​the multiple first doping regions 2301 on the first surface 210 accounts for 20% to 40% of the first surface 210, for example, it can be 25%, 30% or 35%, etc.; the total orthographic projection area of ​​the multiple second doping regions 2302 on the first surface 210 accounts for 20% to 40% of the first surface 210, for example, it can be 25%, 30% or 35%, etc.

[0107] In some examples, in the steps of forming the initial first doped film and the initial second doped film, there is a wrap-around plating phenomenon, so that the initial first doped film and the initial second doped film are present on a partial area of ​​the second surface 220 and on the side surface connecting the first surface 210 and the second surface 220. Furthermore, there is also a silicon glass layer doped with P-type doping elements generated with the initial first doped film, and a silicon glass layer doped with N-type doping elements generated with the initial second doped film; after forming the initial second doped layer 207 and the initial third doped layer 208, the preparation method of the photovoltaic cell also includes: pickling the second surface 220 and the side surface connecting the first surface 210 and the second surface 220 to remove the initial first doped film and the initial second doped film located on the second surface 220 and on the side surface connecting the first surface 210 and the second surface 220, and removing the silicon glass layer doped with P-type doping elements and the silicon glass layer doped with N-type doping elements.

[0108] It should be noted that, in conjunction with the reference Figures 11 to 15 The doped layer 221 formed in step S5 includes a second doped layer 2211 located on the first doped region 2301 and a third doped layer 2212 located on the second doped region 2302. Based on the reaction between the germanium element in the germanium-containing layer 202 and the silicon element in the initial doped layer 201, along the first direction X, at least a portion of the thickness of the initial second doped layer 207 located in the second region 211 is converted into the germanium-silicon alloy layer 204, and the remaining initial second doped layer 207 serves as the second doped layer 2211. At least a portion of the thickness of the initial third doped layer 208 located in the second region 211 is converted into the germanium-silicon alloy layer 204, and the remaining initial second doped layer 207 serves as the third doped layer 2212.

[0109] In some embodiments, in conjunction with reference Figure 4 and Figure 5 , or, in conjunction with reference Figure 11 and Figure 12After forming the germanium-containing layer (102 or 202) and before forming the initial gate line (103 or 203), the method for manufacturing a photovoltaic cell may further include: forming a first passivation layer (119 or 219) on a surface jointly formed by the initial doped layer (101 or 201), the germanium-containing layer (102 or 202) and the remaining first surface (110 or 210).

[0110] It should be noted that in actual applications, no matter whether the photovoltaic cell finally formed is a cell with grid lines on both sides or a BC cell, after forming the germanium-containing layer and before forming the initial grid lines, the first passivation layer may not be formed, and the initial grid lines may be directly formed on the germanium-containing layer to finally form a cell such as Figure 7 、 Figure 8 、 Figure 14 or Figure 15 The photovoltaic cell shown. Figure 4 、 Figure 5 、 Figure 11 and Figure 12 In the example, the photovoltaic cell finally formed includes the first passivation layer (119 or 219), and after step S5, there is a remaining germanium-containing layer (102 or 202) between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204).

[0111] It is worth noting that the reference Figure 6 or Figure 13 The gate line (113 or 213) formed in the end is electrically connected to the first passivation layer (119 or 219) and is in contact with the germanium-containing layer (102 or 202). In other embodiments, the gate line formed in the end is also electrically connected to the first passivation layer and is in contact with the germanium-silicon alloy layer.

[0112] In some cases, a deposition process may be used to form the first passivation layer (119 or 219). In some examples, the material of the first passivation layer (119 or 219) may include at least one of aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0113] In some embodiments, in conjunction with reference Figure 4 and Figure 5 , or, in conjunction with reference Figure 11 and Figure 12 The method for manufacturing a photovoltaic cell may further include: forming a second passivation layer (129 or 229) on the second surface (120 or 220). It should be noted that, Figure 5 and Figure 12 In the example, the second passivation layer (129 or 229) is formed after the germanium-containing layer (102 or 202) is formed and before the initial gate line (103 or 203) is formed. In actual applications, the second passivation layer can also be formed in other steps.

[0114] In some cases, a deposition process may be used to form the second passivation layer (129 or 229). In some examples, the material of the second passivation layer (129 or 229) may include at least one of aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0115] In some cases, reference Figure 6 The photovoltaic cell finally formed is a cell with grid lines on both sides. The grid lines (not shown in the figure) finally formed on the second side will be electrically connected to the second passivation layer 129 and contact and connect with other film layers located below the second passivation layer 129.

[0116] The degree to which the germanium-silicon alloy layer ( 104 or 204 ) is embedded in the doping layer ( 121 or 221 ) is described in detail below.

[0117] In some embodiments, in conjunction with reference Figure 2 and Figure 6 , or combined with reference Figure 10 and Figure 13 , along the first direction X, the thickness of the initial doped layer (101 or 201) formed in step S2 is greater than the thickness of the germanium-silicon alloy layer (104 or 204) formed in step S5. In other words, in step S5, along the direction away from the silicon substrate (100 or 200), the silicon element in the initial doped layer (101 or 201) with only a partial thickness located in the second region (111 or 211) reacts with the diffused germanium element, so that the initial doped layer (101 or 201) with only a partial thickness located in the second region (111 or 211) is converted into the germanium-silicon alloy layer (104 or 204).

[0118] In other embodiments, in combination with reference Figure 2 and Figure 8 , or combined with reference Figure 10 and Figure 15 , along the first direction X, the thickness of the initial doped layer (101 or 201) formed in step S2 is equal to the thickness of the germanium-silicon alloy layer (104 or 204) formed in step S5. In other words, in step S5, along the first direction X, the silicon elements in the initial doped layer (101 or 201) with the entire thickness located in the second region (111 or 211) react with the diffused germanium elements, so that the initial doped layer (101 or 201) with the entire thickness located in the second region (111 or 211) is converted into the germanium-silicon alloy layer (104 or 204).

[0119] The following describes in detail the preparation process of the germanium-containing layer ( 102 or 202 ) and the laser-enhanced contact optimization treatment in step S5 .

[0120] In some embodiments, reference Figure 4 or Figure 11, the material of the germanium-containing layer (102 or 202) may include at least one of germanium oxide, germanium sulfide or germanium selenide; S3: the step of forming the germanium-containing layer (102 or 202) on the second region (111 or 211) may include: forming the germanium-containing layer (102 or 202) on the second region (111 or 211) by a coating process; in combination with reference Figures 6 to 8 , or combined with reference Figures 13 to 15 During the laser enhanced contact optimization treatment in step S5 , at least a portion of the elements other than the germanium element in the germanium-containing layer ( 102 or 202 ) are volatilized.

[0121] It is worth emphasizing that the germanium-containing layer (102 or 202) is not a film layer containing only germanium. In step S5, elements other than germanium in the germanium-containing layer (102 or 202) are volatilized. By adjusting the process parameters of the laser enhanced contact optimization treatment in step S5, the volatilization degree of elements other than germanium in the germanium-containing layer (102 or 202) can be adjusted. The following describes in detail the reaction degree of the germanium in the germanium-containing layer (102 or 202) with the silicon in the initial doping layer (101 or 201), as well as the volatilization degree of elements other than germanium in the germanium-containing layer (102 or 202).

[0122] In some cases, reference Figure 6 、 Figure 7 、 Figure 13 or Figure 14 After the laser enhanced contact optimization treatment in step S5, the remaining germanium-containing layer (102 or 202) is located between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204). In other words, only a portion of the germanium elements in the germanium-containing layer (102 or 202) are mixed with the initial doped layer (101 or 201) (refer to Figure 4 or Figure 11 ) reacts with the silicon element in the initial doping layer (101 or 201) to form a germanium-silicon alloy layer (104 or 204), and the remaining germanium element that has not penetrated into the initial doping layer (101 or 201) is also present in the remaining germanium-containing layer (102 or 202).

[0123] It should be noted that after the laser enhanced contact optimization treatment in step S5 is performed, the remaining germanium-containing layer (102 or 202) can be regarded as an intermediate layer located between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204). The specific material of the intermediate layer includes at least the following two examples: In some examples, during the laser enhanced contact optimization treatment in step S5, the elements other than the germanium element in the germanium-containing layer (102 or 202) are only partially volatilized, and the remaining elements that have not penetrated into the initial doping layer (101 or 201) are The germanium element and other non-volatile elements are both present in the remaining germanium-containing layer (102 or 202), and the material of the intermediate layer finally formed includes at least one of germanium oxide, germanium sulfide or germanium selenide; in other examples, during the laser enhanced contact optimization treatment of step S5, all elements other than the germanium element in the germanium-containing layer (102 or 202) are volatilized, and only the germanium element that has not penetrated into the initial doping layer (101 or 201) and the element present in the remaining germanium-containing layer (102 or 202) remain, and the intermediate layer finally formed is a germanium layer.

[0124] In other cases, in conjunction with Figure 4 and Figure 8 , or combined with reference Figure 11 and Figure 15 During the laser-enhanced contact optimization process in step S5, the germanium in the germanium-containing layer (102 or 202) reacts with the silicon in the initial doped layer (101 or 201) to form a germanium-silicon alloy layer (104 or 204). The elements other than the germanium in the germanium-containing layer (102 or 202) evaporate, resulting in direct contact between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204). In other words, there is no intermediate layer between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204).

[0125] In other embodiments, reference Figure 4 or Figure 11 The germanium-containing layer (102 or 202) may be a germanium layer; the step of forming the germanium-containing layer (102 or 202) on the second region (111 or 211) may include: providing a germanium-containing source, the material of the germanium-containing source may include at least one of germanium hydride, germanium chloride or tetramethylgermanium; performing a high-temperature decomposition treatment on the germanium-containing source so that germanium atoms are deposited on the second region (111 or 211) to form the germanium layer.

[0126] It is noteworthy that during the high-temperature decomposition process, elements other than germanium in the germanium-containing source are discharged in the form of gas, and only germanium atoms are deposited on the second region (111 or 211) to form a germanium layer.

[0127] Combined with reference Figures 4 to 8 , or combined with reference Figures 11 to 15During the subsequent laser-enhanced contact optimization treatment in step S5, the germanium in the germanium layer reacts with the silicon in the initial doped layer (101 or 201) to form a germanium-silicon alloy layer (104 or 204). The following details the degree of reaction between the germanium in the germanium-containing layer (102 or 202), which is a germanium layer, and the silicon in the initial doped layer (101 or 201).

[0128] In some cases, reference Figure 6 、 Figure 7 、 Figure 13 or Figure 14 After the laser enhanced contact optimization treatment in step S5, the remaining germanium layer is located between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204). In other words, only a portion of the germanium elements in the germanium-containing layer (102 or 202) are mixed with the initial doped layer (101 or 201) (refer to Figure 4 or Figure 11 ) reacts with the silicon element in the initial doped layer (101 or 201) to form a germanium-silicon alloy layer (104 or 204). The remaining germanium element that has not penetrated into the initial doped layer (101 or 201) is also present in the remaining germanium-containing layer (102 or 202). It should be noted that after the laser-enhanced contact optimization treatment in step S5, the remaining germanium-containing layer (102 or 202) can be regarded as an intermediate layer located between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204). In this case, the ultimately formed intermediate layer is a germanium layer.

[0129] In other cases, in conjunction with Figure 4 and Figure 8 , or combined with reference Figure 11 and Figure 15 During the laser-enhanced contact optimization process in step S5, the germanium in the germanium-containing layer (102 or 202), which is a germanium layer, reacts with the silicon in the initial doped layer (101 or 201) to form a germanium-silicon alloy layer (104 or 204). Consequently, the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204) are in direct contact. In other words, there is no intermediate layer between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204).

[0130] In some embodiments, in conjunction with reference Figure 3 and Figure 4 , S3: The step of forming the germanium-containing layer 102 on the second region 111 may further include: referring to Figure 3 , a mask layer 105 is formed on the surface of the initial doped layer 101 away from the silicon substrate 100, the mask layer 105 having at least one opening 115, and one opening 115 exposes a second region 111; Figure 3 and Figure 4, a germanium-containing layer 102 is formed on the mask layer 105 and the second region 111, the germanium-containing layer 102 on the second region 111 is retained, and the germanium-containing layer 102 and the mask layer 105 on the mask layer 105 are removed. In this way, the combination of the mask layer 105 having the opening 115 and the coating or deposition process facilitates the precise formation of the germanium-containing layer 102 on the second region 111, effectively preventing the germanium-containing layer 102 from being formed in areas not blocked by subsequently formed gate lines.

[0131] in, Figure 3 A schematic partial cross-sectional view of a method for manufacturing a photovoltaic cell provided by one embodiment of the present disclosure after a mask layer is formed on a surface of the initial doping layer away from the substrate; Figure 4 A schematic partial cross-sectional view after forming a germanium-containing layer in a method for manufacturing a photovoltaic cell provided in one embodiment of the present disclosure.

[0132] In some cases, the coating process may include a spray coating process, a spin coating process, or a drop coating process.

[0133] In some cases, the deposition process may include a sputtering process or an atomic layer deposition (ALD) process.

[0134] It should be noted that Figure 3 and Figure 4 The final photovoltaic cell is an example of a cell with grid lines on both sides. In practical applications, the final photovoltaic cell is also applicable to BC cells. In addition, when the final photovoltaic cell is a BC cell, the mask layer not only exposes the second region of the initial second doping layer, that is, the second region directly opposite the first doping region, but also exposes the second region of the initial third doping layer, that is, the second region directly opposite the second doping region. In other words, in the mask layer, a portion of the openings expose the second region of the initial second doping layer, and the remaining number of openings expose the second region of the initial third doping layer. This facilitates the simultaneous formation of a germanium-containing layer on the second regions of both the initial second doping layer and the initial third doping layer using the same mask layer, thereby simplifying the process of manufacturing photovoltaic cells.

[0135] In some embodiments, reference Figure 5 or Figure 12 , S4: The step of forming the initial gate line (103 or 203) may include: printing a conductive paste on the second area (111 or 211); and drying the conductive paste to convert the conductive paste into the initial gate line (103 or 203).

[0136] in, Figure 5 A partial cross-sectional schematic diagram after forming initial grid lines in a method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure; Figure 12Another partial cross-sectional schematic diagram after initial grid lines are formed in the photovoltaic cell manufacturing method provided by one embodiment of the present disclosure.

[0137] It is worth noting that, during the process of forming the initial gate lines (103 or 203), the conductive paste is only dried, and is not subjected to conventional high-temperature sintering to preliminarily solidify the conductive paste into the initial gate lines (103 or 203). Figure 5 and Figure 6 , or combined with reference Figure 12 and Figure 13 Subsequently, with the aid of the laser-enhanced contact optimization treatment in step S5, the initial gate line (103 or 203) is further formed to form a gate line (113 or 213) that is ultimately in contact with the germanium-containing layer (102 or 202) or the germanium-silicon alloy layer (104 or 204). The laser-enhanced contact optimization treatment is also used to improve the contact performance between the gate line (113 or 213) and the germanium-containing layer (102 or 202) or the germanium-silicon alloy layer (104 or 204), for example, to reduce the probability of carrier recombination at the contact point between the gate line (113 or 213) and the germanium-containing layer (102 or 202) or the germanium-silicon alloy layer (104 or 204). In addition, this helps avoid damage to the photovoltaic cell caused by high temperature during the high-temperature sintering process, allowing the gate line (113 or 213) to be prepared in a lower temperature environment, thereby improving the overall electrical performance of the photovoltaic cell.

[0138] In some embodiments, during S4: forming the initial gate lines (103 or 203), the drying process can be performed at a temperature between 150°C and 500°C, for example, 170°C, 200°C, 220°C, 250°C, 280°C, 300°C, 330°C, 350°C, 360°C, 400°C, 420°C, 450°C, or 480°C. It is worth noting that the drying process is performed at a lower temperature than the high-temperature sintering process, which facilitates the preparation of the gate lines (113 or 213) at a lower temperature, thereby improving the overall electrical performance of the photovoltaic cell.

[0139] In some embodiments, in conjunction with reference Figure 5 and Figure 6 , or combined with reference Figure 12 and Figure 13 The steps of performing laser enhanced contact optimization treatment include: setting the power of the laser generating laser to 5W~20W and the bias voltage to 10V~15V; aligning the laser with the initial grid line (103 or 203) and the germanium-containing layer (102 or 202) for scanning, the laser scanning width can be 0.1mm~1mm, and the laser scanning rate can be 10000mm / s~80000mm / s.

[0140] In some examples, the power of the laser generating the laser may be set to 6 W, 7 W, 8 W, 9 W, 10 W, 11 W, 12 W, 13 W, 14 W, 15 W, 16 W, 17 W, 18 W, or 19 W, etc.

[0141] In some examples, the bias voltage of the laser that generates the laser light may be set to 10.5V, 11V, 11.5V, 12V, 12.5V, 13V, 13.5V, 14V, or 14.5V.

[0142] In some examples, the scanning width of the laser can be 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, 0.8 mm, or 0.9 mm, etc.

[0143] In some examples, the scanning rate of the laser can be 15,000 mm / s, 20,000 mm / s, 25,000 mm / s, 30,000 mm / s, 35,000 mm / s, 40,000 mm / s, 45,000 mm / s, 60,000 mm / s, 65,000 mm / s, 70,000 mm / s, or 75,000 mm / s.

[0144] The corresponding relationship between the first area 130 and the second area 111 is described in detail below. The corresponding relationship between the first area 130 and the second area 111 described below is applicable to both batteries with grid lines on both sides and BC batteries.

[0145] In some embodiments, reference Figure 16 The first area 130 and the second area 111 both extend along the third direction Z, a single first area 130 and a single second area 111 face each other along the first direction X, and the third direction Z and the second direction Y intersect the first direction X in pairs.

[0146] It should be noted that Figure 16 This is a partial top view schematic diagram of a photovoltaic cell manufacturing method provided in one embodiment of the present disclosure after an initial doping layer is formed. Figure 16 In the figure, the second region 111 is indicated by a dotted line on the surface of the initial doped layer 101 away from the silicon substrate 100. Figure 16 The corresponding relationship between the first area 130 and the second area 111 shown can also be applied to Figure 13 or Figure 14 BC battery shown.

[0147] In some cases, in conjunction with reference Figure 16 and Figure 6 or Figure 7The gate line 113 formed in step S5 and the germanium-containing layer 102 have their orthographic projections on the first surface 110 overlap, which is beneficial for ensuring that the side of the gate line 113 facing the first surface 110 is in contact and connected with the germanium-containing layer 102, thereby increasing the contact area between the gate line 113 and the germanium-containing layer 102, thereby improving the contact performance between the gate line 113 and the germanium-containing layer 102, thereby improving the carrier collection efficiency of the gate line 113, and avoiding excessively high doping concentration of the doping element in the doping layer 121, thereby improving the overall light utilization rate of the first surface 110.

[0148] In other cases, in conjunction with Figure 16 and Figure 8 The gate line 113 formed in step S5 and the germanium-silicon alloy layer 104 have their orthographic projections on the first surface 110 overlap, which is beneficial for ensuring that the side of the gate line 113 facing the first surface 110 is in contact and connected with the germanium-silicon alloy layer 104, thereby increasing the contact area between the gate line 113 and the germanium-silicon alloy layer 104, thereby improving the contact performance between the gate line 113 and the germanium-silicon alloy layer 104, thereby improving the carrier collection efficiency of the gate line 113, and avoiding excessively high doping concentration of the doping element in the doping layer 121, thereby improving the overall light utilization rate of the first surface 110.

[0149] In other embodiments, reference Figure 17 , a single first area 130 and at least two second areas 111 are facing each other along the first direction X.

[0150] It should be noted that Figure 17 This is another partial top view schematic diagram after the initial doping layer is formed in the method for manufacturing a photovoltaic cell provided by an embodiment of the present disclosure. Figure 17 In the figure, a second region 111 is shown as a dotted frame on the surface of the initial doped layer 101 away from the silicon substrate 100. Figure 17 The corresponding relationship between the first area 130 and the second area 111 shown can also be applied to Figure 13 or Figure 14 It is worth noting that in some cases, in combination with reference Figure 17 and Figure 4 In step S3, the number of germanium-containing layers 102 formed on the surface of the same initial doped layer 101 away from the silicon substrate 100 is at least 2; Figure 17 and Figure 5 In step S4, the initial gate line 103 is not only formed on the side of the germanium-containing layer 102 away from the second region 111, but also located in the gap between two adjacent second regions 111 directly facing the same first region 130. In other words, in the first direction X, the initial gate line 103 is not only directly facing the germanium-containing layer 102, but also directly facing the gap between two adjacent germanium-containing layers 102 directly facing the same first region 130. Figure 17 and Figure 6 or Figure 7 In step S5 , the orthographic projection of the germanium-containing layer 102 on the first surface 110 is located in the orthographic projection of the gate line 113 on the first surface 110 .

[0151] In this way, multiple germanium-containing layers 102 are provided on the side of the single doped layer 121 away from the silicon substrate 100, and the single gate line 113 is not only in contact with and connected to the multiple germanium-containing layers 102, but also in contact with and connected to the portion of the single doped layer 121 located between the two second regions 111. This is beneficial for ensuring a suitable contact area between the gate line 113 and the germanium-containing layer 102, while not only avoiding excessive doping concentration of the doping element in the area of ​​the doped layer 121 not blocked by the gate line 113, but also avoiding excessive doping concentration of the doping element in the area of ​​the doped layer 121 partially blocked by the gate line 113, thereby further improving the overall light utilization rate of the first surface 110, and further reducing the overall doping concentration of the doping element in the doping layer 121, thereby reducing the probability of carrier recombination at the contact point between the doped layer 121 and the silicon substrate 100.

[0152] In other cases, in conjunction with Figure 17 and Figure 8 , or combined with reference Figure 17 and Figure 15 A single doped layer 121 has multiple germanium-silicon alloy layers 104 embedded on the side away from the silicon substrate 100. A single gate line 113 is not only in contact with the multiple germanium-silicon alloy layers 104, but also in contact with the portion of the single doped layer 121 located between two germanium-silicon alloy layers 104. This is beneficial for ensuring a suitable contact area between the gate line 113 and the germanium-silicon alloy layer 104 while preventing the doping concentration of the doping element in the area of ​​the doped layer 121 not blocked by the gate line 113 from being too high, and also preventing the doping concentration of the doping element in the area of ​​the doped layer 121 partially blocked by the gate line 113 from being too high, thereby further improving the overall light utilization rate of the first surface 110 and further reducing the doping concentration of the doping element in the doping layer 121 as a whole, thereby reducing the probability of carrier recombination at the contact point between the doped layer 121 and the silicon substrate 100.

[0153] In other embodiments, on the same first surface, a portion of the first areas and second areas facing each other along the first direction extend along the third direction, and a single first area and a single second area face each other along the first direction; the remaining number of single first areas and at least two second areas face each other along the first direction.

[0154] In the various embodiments described above, reference Figures 1 to 17The ratio of the sum of the areas of at least one second area (111 or 211) directly opposite to the same first area (130 or 230) to the area of ​​the first area (130 or 230) can be 0.4~0.9, for example, it can be 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8 or 0.85, etc. In this way, in the doped layer (121 or 221) and the germanium-containing layer (102 or 202) finally formed, in at least one germanium-containing layer (102 or 202) corresponding to the same doped layer (121 or 221), the ratio of the layout area occupied by the germanium-containing layer (102 or 202) corresponding to the same doped layer (121 or 221) on the first surface (110 or 210) to the layout area occupied by the doped layer (121 or 221) on the first surface (110 or 210) is 0.4~0.9.

[0155] It is worth noting that, in a first region (130 or 230) and at least one second region (111 or 211) corresponding to the same initial doping layer (101 or 201), if the sum of the area of ​​the second region (111 or 211) and the area of ​​the first region (130 or 230) is less than 0.4, the contact area between the gate line (113 or 213) and the germanium-containing layer (102 or 202) or the germanium-silicon alloy layer (104 or 204) formed in the end is too small, which is not conducive to improving the contact area between the gate line (113 or 213) and the germanium-containing layer. The contact performance between the layers (102 or 202) or the germanium-silicon alloy layer (104 or 204); if the sum of the areas of the second region (111 or 211) and the area of ​​the first region (130 or 230) is greater than 0.9, the germanium-silicon alloy layer (104 or 204) is embedded in most areas of the finally formed doped layer (121 or 221), and the area of ​​the doped layer (121 or 221) that is not blocked by the gate line (113 or 213) is relatively small, which is not conducive to improving the utilization rate of light by the doped layer (121 or 221). Based on this, the ratio of the sum of the areas of at least one second region (111 or 211) directly opposite to the same first region (130 or 230) to the area of ​​the first region (130 or 230) is designed to be 0.4 to 0.9, which is beneficial to ensuring a suitable contact area between the gate line (113 or 213) and the germanium-containing layer (102 or 202) or the germanium-silicon alloy layer (104 or 204), and improving the utilization rate of light by the doped layer (121 or 221).

[0156] In some embodiments, reference Figure 2 or Figure 10 , along the first direction X, the thickness of the initial doped layer (101 or 201) formed in step S2 can be 100nm~300nm; Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 The thickness of the germanium-silicon alloy layer (104 or 204) formed in step S5 can be 10 nm to 300 nm, for example, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, 260 nm, 270 nm, 280 nm or 290 nm. In other words, referring to Figure 6 、 Figure 7 、 Figure 13 or Figure 14 , the germanium-silicon alloy layer (104 or 204) formed in step S5 may be partially embedded in the doped layer (121 or 221); Figure 8 or Figure 15 The germanium-silicon alloy layer (104 or 204) formed in step S5 may also penetrate the doped layer (121 or 221) along the first direction X.

[0157] In some embodiments, reference Figure 4 or Figure 11 , along the first direction X, the thickness of the germanium-containing layer (102 or 202) formed in step S3 is a first thickness; Figure 6 、 Figure 7 、 Figure 13 or Figure 14 The thickness of the germanium-containing layer (102 or 202) finally retained in step S5 and located between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204) is a second thickness, and the ratio of the second thickness to the first thickness is less than or equal to 50%, for example, it can be 5%, 10%, 15%, 20%, 25%, 30%, 35%, 40% or 45%, etc.

[0158] In other embodiments, reference Figure 8 or Figure 15 , the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204) are in direct contact. In other words, no germanium-containing layer will remain in step S5.

[0159] In some examples, reference Figure 4 or Figure 11 Along the first direction X, the thickness of the germanium-containing layer (102 or 202) formed in step S3 can be 10 nm to 100 nm, for example, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm or 90 nm.

[0160] In some embodiments, reference Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 , the doping concentration of the doping element in the doping layer (121 or 221) can be 1×10 19 atom / cm 3 ~8×10 19 atom / cm 3 .

[0161] In summary, in the photovoltaic cell finally formed, the germanium-silicon alloy layer (104 or 204) will be blocked by the gate line (113 or 213), and the doped layer (121 or 221) includes a portion that is not blocked by the gate line (113 or 213). On the one hand, compared with the conductivity of pure silicon material, the conductivity of the germanium-silicon alloy layer (104 or 204) is higher, which is beneficial to reduce the transmission resistance of carriers finally transmitted to the gate line (113 or 213) through the germanium-silicon alloy layer (104 or 204) with the help of the higher conductivity in the germanium-silicon alloy layer (104 or 204), reduce the line resistance, and thus improve the collection efficiency of the gate line (113 or 213) for carriers, and improve the fill factor of the photovoltaic cell finally formed; on the other hand, compared with the band gap of pure silicon material, the band gap of the germanium-silicon alloy layer (104 or 204) is smaller, which is beneficial to achieve longer wavelength bands with the help of the germanium-silicon alloy layer (104 or 204). Photoelectric conversion of infrared light, thereby improving the short-circuit current of the photovoltaic cell; on the other hand, the doping layer (121 or 221) includes a portion that is not directly opposite to the gate line (113 or 213), and the doping concentration of the doping element in the doping layer (121 or 221) can be controlled to be low, so as to reduce the parasitic absorption of light by the portion of the doping layer (121 or 221) that is not blocked by the gate line (113 or 213), thereby reducing the optical loss caused by the doping layer (121 or 221) and improving the overall light utilization rate of the first surface (110 or 210); on the other hand, only a part of the first surface (110 or 210), that is, the first area (130 or 230) is designed with the doping layer (121 or 221), and the other areas of the first surface (110 or 210) except the first area (130 or 230) are not blocked by the doping layer (121 or 221), which can have a higher utilization rate of light. This multifaceted effect contributes to improving the photovoltaic cell's photoelectric conversion efficiency. Furthermore, the improved electrical connection between the gate line (113 or 213) and the doped layer (121 or 221) is primarily achieved through the germanium-silicon alloy layer (104 or 204). The doping concentration of the doping element in the doped layer (121 or 221) does not need to be excessively high, which helps maintain a better passivation level in the doped layer (121 or 221), thereby increasing the photovoltaic cell's open-circuit voltage.

[0162] In addition, it is beneficial to precisely control the area where the germanium-silicon alloy layer (104 or 204) is formed by leveraging the high precision and low damage characteristics of laser-enhanced contact optimization processing, so that the germanium-silicon alloy layer (104 or 204) will not be formed in the area not blocked by the gate line (113 or 213).

[0163] Another embodiment of the present disclosure further provides a photovoltaic cell, which is formed by the photovoltaic cell manufacturing method provided in the above embodiment. The photovoltaic cell provided in another embodiment of the present disclosure is described in detail below with reference to the accompanying drawings. It should be noted that parts that are identical or corresponding to the above embodiment are not repeated here.

[0164] refer to Figure 7 、 Figure 8 、 Figure 14 or Figure 15 The photovoltaic cell comprises: a silicon substrate (100 or 200) having a first surface (110 or 210) and a second surface (120 or 220) opposite to each other along a first direction X, the first surface (110 or 210) comprising a plurality of first regions (130 or 230) spaced apart along a second direction Y, the first direction X being the thickness direction of the silicon substrate (100 or 200), the second direction Y intersecting the first direction X; a silicon substrate (130 or 230) located on the first region (130 or 230) and comprising silicon The invention relates to a doping layer (121 or 221) of an element, wherein a surface of the doping layer (121 or 221) away from the silicon substrate (100 or 200) includes at least one second region (111 or 211), and a germanium-silicon alloy layer (104 or 204) is provided on the second region (111 or 211) of the doping layer (121 or 221); and a gate line (113 or 213) is located at least on one side of the germanium-silicon alloy layer (104 or 204) away from the silicon substrate (100 or 200).

[0165] It is worth noting that the surface of the germanium-silicon alloy layer (104 or 204) away from the silicon substrate (100 or 200) is directly opposite the gate line (113 or 213), and at least part of the doped layer (121 or 221) is not blocked by the gate line (113 or 213), or in other words, the doped layer (121 or 221) includes a portion that is not directly opposite the gate line (113 or 213). Based on this, on the one hand, the conductivity of the germanium-silicon alloy layer (104 or 204) is higher than that of pure silicon material, which is conducive to reducing the transmission resistance of carriers finally transmitted to the gate line (113 or 213) through the germanium-silicon alloy layer (104 or 204) with the help of the higher conductivity in the germanium-silicon alloy layer (104 or 204), reducing the line resistance, thereby improving the collection efficiency of the gate line (113 or 213) for carriers, and improving the fill factor of the photovoltaic cell finally formed; on the other hand, the band gap of the germanium-silicon alloy layer (104 or 204) is smaller than that of pure silicon material, which is conducive to realizing the photoelectric conversion of longer-wavelength infrared light with the help of the germanium-silicon alloy layer (104 or 204), thereby improving the short-circuit current of the photovoltaic cell; on the other hand, the doping layer (121 or 22 1) Including the portion not directly facing the gate line (113 or 213), the doping concentration of the doping element in the doping layer (121 or 221) can be controlled to be low, thereby reducing the parasitic absorption of light by the portion of the doping layer (121 or 221) not blocked by the gate line (113 or 213), thereby reducing the optical loss caused by the doping layer (121 or 221) and improving the overall light utilization efficiency of the first surface (110 or 210); on the other hand, only a portion of the first surface (110 or 210), that is, the first region (130 or 230), is designed with the doping layer (121 or 221), and the other regions of the first surface (110 or 210) other than the first region (130 or 230) are not blocked by the doping layer (121 or 221), thereby achieving a higher light utilization efficiency. In this way, multiple effects are conducive to improving the photoelectric conversion efficiency of the photovoltaic cell.

[0166] In some embodiments, reference Figure 6 、 Figure 7 、 Figure 13 or Figure 14 The photovoltaic cell may further include: a germanium-containing layer (102 or 202) located between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204).

[0167] In some cases, reference Figure 6 、 Figure 7 、 Figure 13 or Figure 14 In the first direction X, the thickness of the germanium-containing layer (102 or 202) is less than or equal to 50 nm. For example, it can be 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, or 45 nm.

[0168] If the thickness of the germanium-containing layer (102 or 202) is greater than 50 nm, the germanium-containing layer (102 or 202) between the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204) is too thick. On the one hand, this will excessively increase the carrier transmission distance, which is not conducive to the gate line (113 or 213) collecting carriers. On the other hand, it will make the height of the gate line (113 or 213) too high, which is not conducive to the subsequent contact connection between the welding ribbon and the gate line (113 or 213), affecting the structural stability of the photovoltaic cell. Therefore, along the first direction X, the thickness of the germanium-containing layer (102 or 202) is designed to be less than or equal to 50 nm, which is conducive to shortening the carrier transmission distance as much as possible, thereby improving the carrier collection efficiency of the gate line (113 or 213) and reducing the height of the gate line (113 or 213).

[0169] In some cases, reference Figure 6 or Figure 13 The photovoltaic cell may further include: a first passivation layer (119 or 219), located on a surface formed by the doped layer (121 or 221), the germanium-containing layer (102 or 202) and the remaining first surface (110 or 210), a gate line (113 or 213) electrically connected to the first passivation layer (119 or 219) and in contact with the germanium-containing layer (102 or 202); a second passivation layer (129 or 229), located on the second surface (120 or 220).

[0170] In other embodiments, reference Figure 8 or Figure 15 , the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204) are in direct contact.

[0171] It should be noted that in actual applications, Figure 8 or Figure 15 On the basis of the photovoltaic cell shown, the photovoltaic cell may further include: a first passivation layer (not shown in the figure), located on the surface jointly formed by the doping layer (121 or 221) and the remaining first surface (110 or 210), the gate line (113 or 213) electrically connected to the first passivation layer (119 or 219) and in contact with the germanium silicon alloy layer (104 or 204); a second passivation layer (not shown in the figure), located on the second surface (120 or 220).

[0172] In some embodiments, reference Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 Along the first direction X, the ratio of the content of germanium atoms to the content of silicon atoms in the germanium-silicon alloy layer (104 or 204) can be 0.1-10.

[0173] In some examples, the ratio of the content of germanium atoms to the content of silicon atoms in the germanium-silicon alloy layer (104 or 204) can be 1:10; in other examples, the ratio of the content of germanium atoms to the content of silicon atoms in the germanium-silicon alloy layer (104 or 204) can be 10:1.

[0174] In some embodiments, reference Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 The thickness of the germanium-silicon alloy layer (104 or 204) can be 10 nm to 300 nm.

[0175] In some embodiments, reference Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 The doping element can be a P-type doping element or an N-type doping element, and the doping concentration of the doping element in the doping layer (121 or 221) can be 1×10 19 atom / cm 3 ~5×10 19 atom / cm 3 , for example, it can be 1.2×10 19 atom / cm 3 , 1.5×10 19 atom / cm 3 , 1.8×10 19 atom / cm 3 , 2×10 19 atom / cm 3 , 2.3×10 19 atom / cm 3 , 2.5×10 19 atom / cm 3 , 2.8×10 19 atom / cm 3 , 3×10 19 atom / cm 3 , 3.2×10 19 atom / cm 3 , 3.5×10 19 atom / cm 3 , 3.7×10 19 atom / cm 3 , 4×10 19 atom / cm 3 , 4.2×10 19atom / cm 3 , 4.5×10 19 atom / cm 3 or 4.8×10 19 atom / cm 3 wait.

[0176] In other embodiments, reference Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 , the doping concentration of the doping element in the doping layer (121 or 221) can be 5×10 19 atom / cm 3 ~8×10 19 atom / cm 3 , for example, it can be 5.2×10 19 atom / cm 3 , 5.5×10 19 atom / cm 3 , 5.8×10 19 atom / cm 3 , 6×10 19 atom / cm 3 , 6.3×10 19 atom / cm 3 , 6.5×10 19 atom / cm 3 , 6.8×10 19 atom / cm 3 , 7×10 19 atom / cm 3 , 7.2×10 19 atom / cm 3 , 7.5×10 19 atom / cm 3 or 7.8×10 19 atom / cm 3 wait.

[0177] In some embodiments, reference Figure 16 , the first area 130 and the second area 111 both extend along the third direction Z, and a single first area 130 and a single second area 111 are directly opposite to each other along the first direction X. Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15The orthographic projections of the gate line (113 or 213) and the germanium-silicon alloy layer (104 or 204) on the first surface (110 or 210) coincide with each other.

[0178] In other embodiments, reference Figure 17 , a single first area 130 and at least two second areas 111 are facing each other along the first direction X. In this way, referring to Figure 6 、 Figure 7 、 Figure 8 、 Figure 13 、 Figure 14 or Figure 15 The orthographic projection of the germanium-silicon alloy layer (104 or 204) on the first surface (110 or 210) is located in the orthographic projection of the gate line (113 or 213) on the first surface (110 or 210), and multiple germanium-silicon alloy layers (104 or 204) are embedded in the side of the single doped layer (121 or 221) away from the silicon substrate (100 or 200). The single gate line (113 or 213) is not only directly opposite to the multiple germanium-silicon alloy layers (104 or 204), but also contacts and connects with the portion of the single doped layer (121 or 221) located between two germanium-silicon alloy layers (104 or 204).

[0179] In other embodiments, on the same first surface, in a portion of the first areas, the first area and the second area facing each other along the first direction both extend along the third direction, and a single first area and a single second area facing each other along the first direction; in the remaining number of first areas, a single first area and at least two second areas facing each other along the first direction.

[0180] Another embodiment of the present disclosure provides a photovoltaic module, which is formed by connecting multiple photovoltaic cells provided by the above embodiments, or by connecting multiple photovoltaic cells formed by the photovoltaic cell manufacturing methods provided by the above embodiments. It should be noted that the parts that are the same or corresponding to the above embodiments are not repeated here.

[0181] The photovoltaic module includes: a cell string, which is formed by connecting multiple photovoltaic cells provided by the aforementioned embodiments, or by connecting multiple photovoltaic cells formed by the photovoltaic cell manufacturing methods provided by the aforementioned embodiments; an encapsulation film for covering the surface of the cell string; and a cover plate for covering the surface of the encapsulation film facing away from the cell string.

[0182] Those skilled in the art will appreciate that the above-described embodiments are specific examples for implementing the present disclosure, and in actual applications, various changes may be made to them in form and detail without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the embodiments of the present disclosure. Therefore, the scope of protection of the embodiments of the present disclosure shall be based on the scope defined in the claims.

Claims

1. A method for manufacturing a photovoltaic cell, characterized in that: include: Providing a silicon substrate, the silicon substrate having a first surface and a second surface opposite to each other along a first direction, the first surface including a plurality of first regions spaced apart along a second direction, the first direction being a thickness direction of the silicon substrate, and the second direction intersecting the first direction; An initial doped layer containing silicon is formed on the first region based on the silicon substrate, wherein a surface of the initial doped layer away from the silicon substrate includes at least one second region, and an orthographic projection of the second region only partially overlaps with an orthographic projection of the first region, taking the first surface as an orthographic projection surface; forming a germanium-containing layer on the second region; Printing a conductive paste at least on a side of the germanium-containing layer away from the second region, and drying the conductive paste to convert the conductive paste into an initial gate line; The initial gate line is subjected to laser enhanced contact optimization treatment to promote the germanium element in the germanium-containing layer to react with the silicon element in the initial doping layer to form a germanium-silicon alloy layer, and the remaining initial doping layer serves as a doping layer, and the initial gate line is converted into a gate line.

2. The method for manufacturing a photovoltaic cell according to claim 1, wherein: The material of the germanium-containing layer includes at least one of germanium oxide, germanium sulfide or germanium selenide; The step of forming the germanium-containing layer on the second region includes: forming the germanium-containing layer on the second region using a coating process; During the laser enhanced contact optimization process, at least part of the elements other than germanium in the germanium-containing layer are volatilized.

3. The method for manufacturing a photovoltaic cell according to claim 2, wherein: After the laser enhanced contact optimization process is performed, the remaining germanium-containing layer is located between the gate line and the germanium-silicon alloy layer; Alternatively, during the laser enhanced contact optimization treatment, the germanium elements in the germanium-containing layer react with the silicon elements in the initial doping layer to form the germanium-silicon alloy layer, and the elements other than the germanium element in the germanium-containing layer volatilize, and the gate line finally formed is in direct contact with the germanium-silicon alloy layer.

4. The method for manufacturing a photovoltaic cell according to claim 1, wherein: The germanium-containing layer is a germanium layer; The step of forming the germanium-containing layer on the second region includes: providing a germanium-containing source, wherein the material of the germanium-containing source includes at least one of germanium hydride, germanium chloride or tetramethylgermanium; performing a high-temperature decomposition treatment on the germanium-containing source so that germanium atoms are deposited on the second region to form the germanium layer.

5. The method for manufacturing a photovoltaic cell according to claim 2 or 4, characterized in that: The step of forming the germanium-containing layer on the second region further comprises: forming a mask layer on a surface of the initial doping layer away from the silicon substrate, wherein the mask layer has at least one opening, and each opening exposes one second region; The germanium-containing layer is formed on the mask layer and the second region, the germanium-containing layer on the second region is retained, and the germanium-containing layer and the mask layer on the mask layer are removed.

6. The method for manufacturing a photovoltaic cell according to any one of claims 1 to 4, characterized in that: The drying process is performed at a temperature of 150° C. to 500° C.

7. The method for manufacturing a photovoltaic cell according to any one of claims 1 to 4, characterized in that: The steps of performing the laser enhanced contact optimization treatment include: setting the power of the laser generating the laser to 5W~20W and the bias voltage to 10V~15V; aligning the laser with the initial grid line and the germanium-containing layer for scanning, the scanning width of the laser is 0.1mm~1mm, and the scanning rate of the laser is 10000mm / s~80000mm / s.

8. The method for manufacturing a photovoltaic cell according to claim 1, wherein: The first area and the second area both extend along a third direction, a single first area and a single second area face each other along the first direction, and the third direction and the second direction intersect with the first direction in pairs; and / or a single first area and at least two second areas face each other along the first direction.

9. The method for manufacturing a photovoltaic cell according to claim 1 or 8, characterized in that: The ratio of the sum of the areas of at least one second area directly opposite to the same first area to the area of ​​the first area is 0.4-0.

9.

10. The method for manufacturing a photovoltaic cell according to claim 1, wherein: The step of forming the initial doping layer includes: performing a first doping diffusion process on the first surface to form a first doping layer covering the first surface and doped with a doping element; A first patterning process is performed on the first doping layer, and only the first doping layer located in the first region is retained as the initial doping layer.

11. The method for manufacturing a photovoltaic cell according to claim 1, wherein: The first region includes first doped regions and second doped regions alternately arranged along the second direction; The step of forming the initial doping layer includes: forming an initial second doping layer on the first doping region, and forming an initial third doping layer on the second doping region; The step of forming the germanium-containing layer includes forming the germanium-containing layer on both the second regions of the initial second doping layer and the initial third doping layer.

12. A photovoltaic cell, characterized in that: The photovoltaic cell is formed by the method for manufacturing a photovoltaic cell according to any one of claims 1 to 11, and the photovoltaic cell comprises: A silicon substrate having a first surface and a second surface opposite to each other along a first direction, wherein the first surface includes a plurality of first regions spaced apart along a second direction, the first direction being a thickness direction of the silicon substrate, and the second direction intersecting the first direction; a doped layer comprising silicon and located on the first region, wherein a surface of the doped layer remote from the silicon substrate includes at least one second region, a germanium-silicon alloy layer being disposed on the second region of the doped layer, wherein, with the first surface being an orthographic projection plane, an orthographic projection of the second region only partially overlaps with an orthographic projection of the first region; The gate line is at least located on a side of the germanium-silicon alloy layer away from the silicon substrate.

13. The photovoltaic cell according to claim 12, characterized in that: Also includes: The germanium-containing layer is located between the gate line and the germanium-silicon alloy layer.

14. The photovoltaic cell according to claim 12, characterized in that: The ratio of the content of germanium atoms to the content of silicon atoms in the germanium-silicon alloy layer is 0.1-10.

Images