System and method for identifying fault type and fault phase of power grid

Abstract

A system for detecting a fault type and a fault phase in a power grid includes a controller and a relay. The relay is configured to monitor lines of the power grid and generate a monitoring signal. The controller may be configured to determine a sequence voltage and a sequence current in the line in response to a monitoring signal received from the relay. The controller may also determine the absence or presence of a weak feed condition in the line in response to the sequence voltage and the sequence current. The controller may also determine a first planar order characteristic and a second planar order characteristic in response to the absence or presence of the monitoring signal and the weak feed condition. The controller may also determine a fault type and a fault phase in the power grid in response to the first planar order feature and the second planar order feature.

Description

Cross - Reference to Related Applications

[0001] This application claims the benefit of U.S. Application No. 18 / 053,183, filed on November 7, 2022, the entire content of which is hereby incorporated by reference. Technical Field

[0002] This disclosure relates to power grids, and in particular, to systems and methods for identifying fault types and fault phases in a power grid. Background Art

[0003] A power grid includes a network of stations and lines connecting these stations for transmitting power from one or more energy sources for consumption at various locations. Compared with single - phase or DC systems, power grids typically use three - phase systems to transmit electric power. Changing external or internal conditions within the components of the power grid can cause faults. For example, faults can include short - circuits, grounding, arcing, surges, etc. and involve one or more phases.

[0004] Relays can be used to protect against faults, for example, by performing protection actions in response to faults. For example, a relay can open all three phases of a line or a single phase of a line within a predetermined time period and then re - close all phases of the line or only close a single phase. Summary of the Invention

[0005] This disclosure relates to identifying fault types in a power grid, and in particular, to systems and methods for identifying fault types and fault phases in a power grid including renewable energy. Then, the relay can perform protection actions based on the fault type and fault phase.

[0006] In an embodiment, this disclosure describes a system for detecting fault types and fault phases in a power grid, the system including a relay. The relay is configured to monitor the lines of the power grid and generate a monitoring signal indicating the presence of a line fault. The relay can include a controller. The controller can be configured to determine the sequence voltage and sequence current in the line in response to the monitoring signal received from the relay. The controller can also be configured to determine the absence or presence of a weak - feed condition in the line in response to the sequence voltage and sequence current. The controller can also be configured to determine a first - plane sequence feature and a second - plane sequence feature in response to the monitoring signal and the absence or presence of the weak - feed condition. The controller can also be configured to determine the fault type and fault phase in the power grid in response to the first - plane sequence feature and the second - plane sequence feature.

[0007] In an embodiment, the present disclosure describes a method for detecting a fault in a power grid including a relay. The method may include determining sequence voltages and sequence currents in a line by a controller in response to a monitoring signal received from the relay. The method may further include determining the absence or presence of a weak feed condition in the line by the controller in response to the sequence voltages and sequence currents. The method may further include determining first plane sequence features and second plane sequence features by the controller in response to the monitoring signal and the absence or presence of the weak feed condition. The method may further include determining a fault type and a fault phase in the power grid by the controller in response to the first plane sequence features and the second plane sequence features.

[0008] Additional systems, methods, devices, features, and aspects may be implemented by the techniques of various embodiments of the present disclosure. Other embodiments and aspects of the present disclosure are described in detail herein and are considered to be part of the claimed subject matter. With reference to the description and the reference drawings, other features may be understood and will become apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The present disclosure has thus been described in general terms, and now reference will be made to the drawings, which are not necessarily drawn to scale.

[0010] Figure 1 is a block diagram showing a system including a relay and a controller for detecting a fault in a power grid.

[0011] Figure 2 depicts a schematic diagram of an example system in accordance with one or more example embodiments of the present disclosure.

[0012] Figure 3 is a block diagram showing sequence quantities for detecting a fault type and a fault phase.

[0013] Figure 4A is a chart showing fault patterns for different fault phases in a first plane based on positive sequence and negative sequence.

[0014] Figure 4B is a chart showing fault patterns for different fault phases in a second plane based on zero sequence and negative sequence.

[0015] Embodiments of the present disclosure are described more fully hereinafter with reference to the accompanying drawings, in which example embodiments of the present disclosure are shown. However, the present disclosure may be embodied in many different forms and should not be construed as limited to the example embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Like numerals always refer to like but not necessarily identical or equivalent elements.

[0016] The following embodiments are described in sufficient detail to enable those skilled in the art to at least understand and use the present disclosure. It is to be understood that other embodiments will be apparent based on the present disclosure and that process, mechanical, material, dimension, process equipment, and parameter changes can be made without departing from the scope of the present disclosure.

[0017] In the following description, numerous specific details are given to provide a thorough understanding of the various embodiments of the present disclosure. However, it will be apparent that the present disclosure may be practiced without these specific details. To avoid obscuring the present disclosure, some well-known system configurations and process steps may not be disclosed in complete detail. Similarly, the drawings showing embodiments of the present disclosure are semi-schematic and not to scale, and in particular, some of the dimensions in the drawings may be exaggerated for clarity of presentation. Additionally, where multiple embodiments are disclosed and described as having some common features, for clarity, description, and ease of understanding, similar and like features will generally be described with similar reference numerals even if the features are not equivalent. Detailed Description

[0018] The present disclosure relates to a power grid and, in particular, to systems and methods for identifying faults (in particular, fault types and fault phases) in a power grid. A power grid may include a network of stations and lines connecting these stations, where nodes represent power sources or loads and lines represent connections between stations.

[0019] In an embodiment, the present disclosure describes a system for detecting fault types and fault phases in a power grid, the system including a controller and a relay. The relay is configured to monitor the lines of the power grid and generate a monitoring signal. The controller is configured to determine first and second plane sequence characteristics (based on positive, negative, or zero sequence quantities) in response to the monitoring signal, which are ultimately used to detect fault types and fault phases.

[0020] The identification of fault types and fault phases in a power grid plays a key role not only in the monitoring of fault locators or distance function phaseloops but also in the correct identification of the fault phase for single-pole tripping to increase the stability limit. This identification of fault types and fault phases can be performed by a phase selector element. With the increasing use of renewable energy as part of a power grid, due to fault current limitations and control strategies used in inverter-based resources, existing phase selectors may not be able to correctly identify fault types and fault phases. The systems and methods according to the present disclosure can use sequence voltage and sequence current to correctly identify fault types and fault phases.

[0021] For example, the controller may determine the sequence voltage and sequence current in the line based on the monitoring signal received from the relay. The controller may also be configured to determine the absence or presence of a weak feed condition in the line in response to the acquired voltage and sequence current. The controller may also be configured to determine the first plane sequence feature and the second plane sequence feature in response to the monitoring signal and the absence or presence of the weak feed condition. The controller may also be configured to determine the fault type in the power grid in response to the first plane sequence feature and the second plane sequence feature.

[0022] The systems and methods according to the present disclosure may not require additional hardware other than the hardware already existing in the power grid infrastructure. In addition, additional communication may not be required. The systems and methods according to the present disclosure may not require direction information to identify the fault type and fault phase. In addition, when relying on information from two planes, there may be greater security in detecting single line-to-ground faults. In addition, the present systems and methods are not time-limited like traveling waves or other delta-based methods where information is only available for certain durations. Such independence may be helpful in the case of an overreaching distance zone or a pilot protection scheme. When determining the fault type and fault phase, the present systems and methods may provide dynamic switching between sequence incremental voltage and sequence incremental current depending on the conditions in the power grid.

[0023] In a three-phase power grid, symmetrical component analysis can be used to detect faults. For example, the three-phase voltage phasors can be decomposed into positive sequence components, negative sequence components, and zero sequence components, typically denoted by the subscripts 1, 2, and 0. Thus, for the three-phase voltage phasors V A 、V B and V C , each phasor can be decomposed into positive sequence components, negative sequence components, and zero sequence components (e.g., V A1 、V A2 、V A0 、V B1 、V B2 、V B0 、V C1 、V C2 and V C0 ). Similarly, the current phasors I A 、I B and I C can be decomposed into positive sequence components, negative sequence components, and zero sequence components (e.g., I A1 、I A2 、I A0 、I B1 、I B2 、I B0 、I C1 、IC2 and I C0 )。This disclosure describes using combinations of these components in determining fault type and phase.

[0024] While fault detection using certain symmetrical components can be used, for example, to operate or trigger protective relay functions, certain faults during certain conditions can cause non-characteristic changes in specific sequence components, making detection difficult. For example, under weak feed conditions caused by a fault, there may not be sufficient current-based components available to trigger relay functions that primarily rely on current detection. The systems and methods according to the present disclosure use different combinations of sequence combinations under different feed conditions.

[0025] In an embodiment, when the controller does not detect a weak feed condition in the power grid, the phase selector decision (e.g., for identifying the fault phase or fault type) can be based on a first plane decision (incremental positive sequence current and incremental negative sequence current) and a second plane decision (incremental zero sequence current and incremental negative sequence current). When a decision cannot be made using such sequence information, the first plane decision can alternatively be based on incremental positive sequence voltage and incremental negative sequence voltage, and the second plane decision can be based on incremental zero sequence voltage and incremental negative sequence voltage.

[0026] In an embodiment, when the controller detects a weak feed condition, the phase selector decision (e.g., for identifying the fault phase or fault type) can be based on a first plane decision (incremental positive sequence voltage and incremental negative sequence voltage) and a second plane decision (incremental zero sequence voltage and incremental negative sequence voltage). When a decision cannot be made using such sequence information, the first plane decision can be retained, and the second plane decision can then be based on incremental zero sequence current and incremental negative sequence current.

[0027] Thus, depending on whether a weak feed is detected, a first decision attempt (to identify the fault) is made based on certain combinations of sequence components. If the decision cannot be made, an alternative combination of sequence components can be used.

[0028] Faults can generally include single line to ground faults (where only one of the three phases is shorted to ground), line to line faults (where two of the three phases are shorted to each other), line to line to ground (where two of the three phases are shorted to each other and grounded), and three-phase faults (where all phases are shorted to each other or grounded).

[0029] Figure 1FIG. 0 is a block diagram showing a system 10 including a relay 12, the relay 10 including a controller 14 for detecting a fault in a power grid 20. The power grid 20 may include one, two, or more power sources interconnected by lines. Thus, the power grid 20 may include a network of lines 22 connecting nodes 24. In an embodiment, the power grid 20 may include at least one renewable source 26, for example, at node 24. The power grid 20 may also include at least one non-renewable source 28 or at least one load 30 (e.g., a customer or user drawing power from the grid). A fault may be associated with one or more nodes or lines.

[0030] The relay 12 may be configured to mitigate a fault, e.g., initially cutting off or disconnecting a line or phase upon detecting a fault and then closing the line or phase after the fault no longer exists. Although the relay 12 and the controller 14 are described and shown as different components, in some embodiments, the functions described with reference to the controller 14 may be performed by the relay 12, and one or more components described with reference to the controller 14 may be present in the relay 12.

[0031] The relay 12 is configured to monitor at least the line 22 of the power grid 20 and generate a monitoring signal. The relay 12 may send the monitoring signal to the controller 14 via a wired or wireless connection. The controller 14 may be configured to determine the sequence voltage and sequence current in the line 22 in response to the monitoring signal received from the relay 12. For example, the controller 14 may determine one or more sequence components (positive, negative, or zero sequence) of the voltage and / or current. The controller 12 may also be configured to determine the absence or presence of a weak feed condition in the line in response to the sequence voltage and sequence current.

[0032] The controller 12 may also be configured to determine a first plane sequence feature and a second plane sequence feature in response to the monitoring signal and the absence or presence of the weak feed condition. The controller may also be configured to determine the fault type and fault phase in the power grid 20 (e.g., in the line 22 or at the nodes 26 or 28 connected by the line 22) in response to the first plane sequence feature and the second plane sequence feature.

[0033] In an embodiment, the first plane sequence feature may include positive sequence and negative sequence. The second plane sequence feature may include zero sequence and negative sequence. The sequence may be a voltage or current sequence. The fault type and fault phase may be determined based on the angles in the phase diagrams associated with a pair of sequence components in each of the two planes.

[0034] In an embodiment, the controller 14 is further configured to determine a first plane sequence feature including a first plane current sequence feature based on incremental positive sequence current and incremental negative sequence current (ΔI1 and ΔI2) in response to the absence of a weak feed condition. Additionally, the controller 14 may determine a second plane sequence feature including a second plane current feature based on incremental zero sequence current and incremental negative sequence current (ΔI0 and ΔI2). Thus, the controller 14 may ultimately determine the fault type and fault phase initially based on the I1-I2 plane and the I0-I2 plane. Under some conditions, the controller may not be able to determine the fault based on these planes of sequence components. For example, the magnitude associated with one of these planes may be weak, inaccurate, or unavailable, or the detected fault may not meet other conditions detected in the power grid.

[0035] The controller 14 may also be configured to determine the fault type and fault phase based on a first plane voltage sequence feature and a second plane voltage sequence feature in response to a failure to determine the fault based on the first plane current feature (ΔI1 and ΔI2) and the second plane current feature (ΔI0 and ΔI2), where the first plane voltage sequence feature is based on incremental positive sequence voltage and incremental negative sequence voltage (ΔV1 and ΔV2), and the second plane voltage sequence feature is based on incremental zero sequence voltage and incremental negative sequence voltage (ΔV0 and ΔV2). Thus, even if the initial fault detection is unsuccessful, the controller 14 may use these alternative plane sequence features to determine the fault condition.

[0036] Turning to the presence of a weak feed condition, the controller 14 may use a slightly different combination of sequence components. For example, the controller 14 may determine a first plane feature including a first plane voltage feature based on incremental positive sequence voltage and incremental negative sequence voltage (ΔV1 and ΔV2). The controller 14 may also determine a second plane feature including a second plane voltage feature based on incremental zero sequence voltage and incremental negative sequence voltage (ΔV0 and ΔV2). Using voltage sequences instead of current sequences can overcome the deficiencies due to the inability to detect weak currents.

[0037] Furthermore, if this combination of sequence components is unsuccessful, the controller 14 may use an alternative sequence combination. For example, the controller 14 may be further configured to determine the fault based on a first plane voltage sequence feature (ΔV1 and ΔV2) and a second plane current sequence feature in response to a failure to determine the fault type and fault phase based on the first plane voltage feature (ΔV1 and ΔV2) and the second plane voltage feature (ΔV0 and ΔV2), where the second plane current sequence feature is based on incremental zero sequence current and incremental negative sequence current (ΔI0 and ΔI2). Thus, the first plane voltage sequence feature is still in use, where only the second plane feature is now based on the current sequence rather than the voltage sequence.

[0038] Faults can include one or more of a single line to ground fault, a line to line fault, a line to line to ground fault, or a three-phase fault.

[0039] The controller 14 can be configured to control the relay 12 based on the fault to perform a protection function. The protection function can include controlling (such as switching) a circuit breaker or other power transmission equipment associated with the transmission line. In an embodiment, the relay 12 can instantaneously open a single phase only in response to a single line to ground fault associated with an arc, which can be self-extinguishing. Alternatively, the relay 12 can open one or more phases indefinitely in response to a significant fault, and the relay 12 can not close those phases unless a "reset" signal is sent from the controller 14 to the relay 12. The reset signal can be initiated by maintenance personnel after maintenance or inspection is completed or based on certain criteria (such as based on time, based on current, based on voltage, or other criteria).

[0040] Figure 2 An example system 100 in accordance with an embodiment of the present disclosure is illustrated. In some embodiments, the system 100 can include one or more renewable power sources 102, one or more current transformers, one or more voltage transformers 108, one or more step-up transformers 104, one or more circuit breakers 110, and one or more overall electrical systems 116. Additionally, one or more line faults 114 may be present in the system 100, which can be associated with one or more fault resistors 112. In some cases, the system 100 may further include an intelligent electronic device (IED) 117. The IED can include one or more processors 118, which can be used for phase distance 120 and ground distance 122 calculations. The IED 117 can also include a memory 124 and / or a human machine interface (HMI) 126. The IED 117 (and any other elements included in the system 100) can also include any element described with respect to Figure 1 the relay 12 or the controller 14.

[0041] Figure 3It is a block diagram showing a fault detection scheme 200. The first block 202 is associated with the presence of weak power supply. In the presence of weak power supply, the controller 14 can initially determine the characteristics of the first plane (plane 1) based on the changes in negative-sequence voltage and positive-sequence voltage (ΔV2 vs. ΔV1), and initially determine the characteristics of the second plane (plane 2) based on the changes in negative-sequence voltage and zero-sequence voltage (ΔV2 vs. ΔV0). If this determination is unsuccessful, for example, due to unavailability, low amplitude, or noise associated with those components, the controller can then determine alternative first and second plane characteristics. For example, the controller 14 can retain the characteristics of the first plane (plane 1) based on the changes in negative-sequence voltage and positive-sequence voltage (ΔV2 vs. ΔV1), but use alternative characteristics of the second plane (plane 2) based on the changes in negative-sequence current and zero-sequence current (ΔI2 vs. ΔI0). In both cases, the first plane is based on the negative-positive sequence combination, while the second plane is based on the negative-zero sequence combination.

[0042] The second block 204 is associated with the absence of weak power supply. In the absence of weak power supply, the controller 14 can initially determine the characteristics of the first plane (plane 1) based on the changes in negative-sequence current and positive-sequence current (ΔI2 vs. ΔI1), and initially determine the characteristics of the second plane (plane 2) based on the changes in negative-sequence current and zero-sequence current (ΔI2 vs. ΔI0). If this determination is unsuccessful, for example, due to unavailability, low amplitude, or noise associated with those components, the controller can then determine alternative first and second plane characteristics. For example, the controller 14 can use alternative characteristics of the first plane (plane 1) based on the changes in negative-sequence voltage and positive-sequence voltage (ΔV2 vs. ΔV1), and use alternative characteristics of the second plane (plane 2) based on the changes in negative-sequence voltage and zero-sequence voltage (ΔV2 vs. ΔV0). In both cases, the first plane is based on the negative-positive sequence combination, while the second plane is based on the negative-zero sequence combination - however, different from the case of the presence of weak power supply (block 102), the current sequence components are initially used before turning to the voltage sequence components.

[0043] Based on Figure 3 the logic shown in

[0044] Figure 4A It is a chart showing the fault modes of different fault phases in the first plane based on positive-sequence and negative-sequence. In Figure 4A it, different regions (ΔV2 - ΔV1) in the first-plane phase diagram are associated with different faults. Therefore, depending on the angle of the detected signal, the possible faults can be identified as the faults associated with that region. Now, if the angle is not in any specific region but between regions, the fault type cannot be detected. This is another example where if the initial combination of sequence characteristics is not valid, the controller may need to use an alternative combination of sequence characteristics.

[0045] Figure 4B is a diagram showing the fault patterns of different fault phases in a second plane based on zero sequence and negative sequence. Similar to Figure 4A the first plane of Figure 1 likewise, different regions (ΔV2 - ΔV0) in the second plane phase diagram are associated with different faults. Now, instead of relying solely on the first plane phase diagram, information from both phase diagrams is combined to identify the possible fault phases. Thus, if Figure 4A and 4B one of the phase diagrams allows for two different types of faults, the other phase diagram can be used to further select a specific type of fault.

[0046] In an embodiment, the present disclosure describes a method for detecting faults in a power grid including a relay. The power grid may include a renewable power source. The method may include determining sequence voltages and sequence currents in a line by a controller in response to a monitoring signal received from the relay. The controller may be Controller 14 or any other suitable controller. The relay may be Relay 12, IED 117, or any other suitable relay. Alternatively, the relay may perform the functions described with reference to Controller 14. The method may further include determining the absence or presence of a weak feed condition in the line by the controller in response to the sequence voltages and sequence currents. The method may further include determining first plane sequence characteristics and second plane sequence characteristics by the controller in response to the monitoring signal and the absence or presence of the weak feed condition. The method may further include determining a fault in the power grid by the controller in response to the first plane sequence characteristics and the second plane sequence characteristics. In an embodiment, the first plane sequence characteristics may include positive sequence and negative sequence, and wherein the second plane sequence characteristics may include zero sequence and negative sequence.

[0047] In an embodiment, the method may further include: determining, by the controller in response to the absence of a weak feed condition, first plane sequence characteristics including first plane current sequence characteristics based on incremental positive sequence current and incremental negative sequence current (ΔI1 and ΔI2); and determining second plane sequence characteristics including second plane current characteristics based on incremental zero sequence current and incremental negative sequence current (ΔI0 and ΔI2).

[0048] In an embodiment, the method may further include: determining, by the controller in response to a failure to determine a fault based on first plane current characteristics (ΔI1 and ΔI2) and second plane current characteristics (ΔI0 and ΔI2), a fault based on first plane voltage sequence characteristics and second plane voltage sequence characteristics, the first plane voltage sequence characteristics being based on incremental positive sequence voltage and incremental negative sequence voltage (ΔV1 and ΔV2), and the second plane voltage sequence characteristics being based on incremental zero sequence voltage and incremental negative sequence voltage (ΔV0 and ΔV2).

[0049] In an embodiment, the method may further include the controller determining a first plane feature including a first plane voltage feature based on incremental positive sequence voltage and incremental negative sequence voltage (ΔV1 and ΔV2) in response to the presence of a weak feed condition, and determining a second plane feature including a second plane voltage feature based on incremental zero sequence voltage and incremental negative sequence voltage (ΔV0 and ΔV2).

[0050] The method may further include: the controller determining a fault based on a first plane voltage sequence feature (ΔV1 and ΔV2) and a second plane current sequence feature in response to a failure to determine a fault based on the first plane voltage feature (ΔV1 and ΔV2) and the second plane voltage feature (ΔV0 and ΔV2), the second plane current sequence feature being based on incremental zero sequence current and incremental negative sequence current (ΔI0 and ΔI2).

[0051] The fault may include one or more of a single line to ground fault, a line to line fault, a line to line to ground fault, or a three-phase fault. The method may further include the controller controlling a relay to perform a protection function based on the fault.

[0052] Returning to Figure 1 , the controller 14 may be implemented by any suitable computer system. The controller 14 may include one or more processors 40 that execute instructions stored in one or more memory devices (referred to as memory 42). The instructions may be, for example, instructions for implementing the functionality described as being performed by one or more of the modules and systems disclosed above, or instructions for implementing one or more of the methods disclosed above. The one or more processors 40 may be embodied in, for example, a CPU, multiple CPUs, a GPU, multiple GPUs, a TPU, multiple TPUs, a multi-core processor, combinations thereof, etc. In some embodiments, the one or more processors 40 may be arranged in a single processing device. In other embodiments, the one or more processors 40 may be distributed across two or more processing devices (e.g., multiple CPUs; multiple GPUs; combinations thereof; etc.). The processor may be implemented as a combination of a processing circuit or a computing processing unit (such as a CPU, a GPU, or a combination of both). Thus, for illustrative purposes, a processor may refer to: a single-core processor; a single processor with software multithreading execution capabilities; a multi-core processor; a multi-core processor with software multithreading execution capabilities; a multi-core processor with hardware multithreading technology; a parallel processing (or computing) platform; and a parallel computing platform with distributed shared memory. Additionally or as another example, a processor may refer to an integrated circuit (IC), an ASIC, a digital signal processor (DSP), an FPGA, a PLC, a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof that is designed or otherwise configured (e.g., manufactured) to perform the functions described herein.

[0053] One or more processors 40 may access a memory 42 by means of a communication architecture 44 (e.g., a system bus). The communication architecture 44 may be adapted to a particular arrangement (localized or distributed) and type of one or more processors 40. In some embodiments, the communication architecture 44 may include one or more bus architectures, such as a memory bus or memory controller; a peripheral bus; an accelerated graphics port; a processor or local bus; combinations thereof, and the like. By way of illustration, such architectures may include an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MCA) bus, an Enhanced ISA (EISA) bus, a Video Electronics Standards Association (VESA) local bus, an Accelerated Graphics Port (AGP) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express bus, a Personal Computer Memory Card International Association (PCMCIA) bus, a Universal Serial Bus (USB), and the like.

[0054] The memory components or memory devices disclosed herein may be embodied in volatile memory or non-volatile memory, or may include both volatile memory and non-volatile memory. Additionally, the memory components or memory devices may be removable or non-removable, and / or internal or external to a computing device or component. Examples of various types of non-transitory storage media may include a hard disk drive, a zip drive, a CD-ROM, a digital versatile disk (DVD) or other optical storage device, magnetic cassettes, magnetic tapes, disk storage devices or other magnetic storage means, flash memory cards or other types of memory cards, cartridges, or any other non-transitory medium suitable for retaining desired information and accessible by a computing device.

[0055] By way of illustration, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) that acts as an external cache. By way of illustration and not limitation, RAM is available in a variety of forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The disclosed memory devices or memory of the operations or computing environments described herein are intended to include one or more of these and / or any other suitable types of memory. In addition to storing executable instructions, the memory 42 may also retain data.

[0056] The controller 14 may include a mass storage device 48 that can be accessed by one or more processors 40 via a communication architecture 44. The mass storage device 48 may include machine-accessible instructions (e.g., computer-readable instructions and / or computer-executable instructions). In some embodiments, the machine-accessible instructions may be encoded in the mass storage device 48 and may be arranged in components that can be built (e.g., linked and compiled) and retained in a computer-executable form in the mass storage device 48 or one or more other machine-accessible non-transitory storage media included in the controller 14. Such components may embody or may constitute one or more of the various modules disclosed herein. Additionally, protocols such as Modbus, DNP, IEC 60870, IEC 61850, Profibus, Fieldbus, etc. may be used in conjunction with the systems and methods described herein.

[0057] Execution of the modules by one or more of the processors 40, individually or in combination, may cause the controller 14 to perform any of the operations described herein (e.g., with respect to Figures 1 to 4B the operations described and any other operations).

[0058] The controller 14 may also include one or more interface devices 50, which may include one or both of an input / output interface or a network interface that may allow or otherwise facilitate communication between an external device and the controller 14. For example, the interface 50 may be used to receive data and / or instructions from an external computing device and to send data and / or instructions to an external computing device.

[0059] The network interface device may allow or otherwise facilitate functionally coupling the controller 14 to one or more external devices. Functionally coupling the controller 14 to an external device may include establishing a wired or wireless connection between the controller 14 and the external device. The network interface device may include one or more antennas and communication processing means that may allow wireless communication between the controller 14 and another external device. For example, between a vehicle and an intelligent infrastructure system, between two intelligent infrastructure systems, etc. Such communication processing means may process data according to the defined protocols of one or several radio technologies. The radio technologies may include, for example, 3G, Long Term Evolution (LTE), LTE-Advanced, 4G, 5G, IEEE802.11, IEEE 802.16, Bluetooth, ZigBee, Near Field Communication (NFC), etc. The communication processing means may also process data according to other protocols, such as vehicle-to-infrastructure (V2I) communication, vehicle-to-vehicle (V2V) communication, etc. The network interface may also be used to facilitate peer-to-peer ad-hoc network connections as described herein.

[0060] As used in this application, the terms "environment", "system", "unit", "module", "architecture", "interface", "component", etc. refer to computer-related entities or entities related to an operating device having one or more defined functions. The terms "environment", "system", "module", "component", "architecture", "interface" and "unit" may be used interchangeably and generally refer to functional elements. Such entities may be hardware, a combination of hardware and software, software, or software in execution. As an example, a module may be embodied in a processor, a processor, an object, an executable portion of software, a thread of execution, a program, and / or a process running on a computing device. As another example, both a software application executing on a computing device and the computing device may embody a module. As yet another example, one or more modules may reside within a process and / or a thread of execution. A module may be located on one computing device or distributed between two or more computing devices. As disclosed herein, a module may execute from various computer-readable non-transitory storage media on which various data structures are stored. A module may communicate via local and / or remote procedures according to, for example, a signal (analog or digital) having one or more data packets (e.g., data from one component that interacts via a signal with another component in a local system, a distributed system, and / or across a network such as a wide area network with other systems).

[0061] As yet another example, a module may be embodied in a device having defined functionality provided by mechanical components operated by an electrical or electronic circuit or may include a device having defined functionality provided by mechanical components operated by an electrical or electronic circuit, the electrical or electronic circuit being controlled by a software application or firmware application executed by a processor. Such a processor may be internal or external to the device and may execute at least a portion of the software or firmware application. Additionally, in another example, a module may be embodied in a device having defined functionality provided by electronic components without mechanical components or may include a device having defined functionality provided by electronic components without mechanical components. The electronic components may include a processor to execute software or firmware that permits or otherwise at least partially facilitates the functionality of the electronic components.

[0062] In some embodiments, a module may communicate via local and / or remote procedures based on a signal (analog or digital) having, for example, one or more data packets (e.g., data from a component that interacts via a signal with another component in a local system, a distributed system, and / or across a network such as a wide area network with other systems). Additionally, or in other embodiments, a module may communicate or otherwise be coupled via thermal, mechanical, electrical, and / or electromechanical coupling mechanisms such as conduits, connectors, combinations thereof, etc. An interface may include input / output (I / O) components and associated processors, applications, and / or other programming components.

[0063] Furthermore, in this specification and the drawings, terms such as "storage", "storage device", "data storage means", "data storage device", "memory", "repository", and substantially any other information storage component related to the operation and functionality of the components of the present disclosure refer to memory components, entities embodied in one or several memory devices, or components forming a memory device. Note that the memory components or memory devices described herein embody or include non-transitory computer storage media readable or otherwise accessible by a computing device. Such media may be implemented in any method or technology for storing information, such as machine-accessible instructions (e.g., computer-readable instructions), information structures, program modules, or other information objects.

Claims

1. A system for detecting fault types and fault phases in a power grid, the system comprising: A relay configured to monitor a line of the power grid and generate a monitoring signal; And A controller, wherein the controller is configured to: Determine the sequence voltage and sequence current in the line in response to the monitoring signal received from the relay; Determine the absence or presence of a weak feed condition in the line in response to the sequence voltage and the sequence current; Determine a first-plane sequence feature and a second-plane sequence feature in response to the monitoring signal and the absence or presence of the weak feed condition; And Determine the fault type and fault phase in the power grid in response to the first-plane sequence feature and the second-plane sequence feature.

2. The system according to claim 1, wherein, The first-plane sequence feature includes positive sequence and negative sequence, and wherein the second-plane sequence feature includes zero sequence and negative sequence.

3. The system according to claim 2, wherein, The controller is further configured to, in response to the absence of the weak feed condition: Determine the first-plane sequence feature including a first-plane current sequence feature based on incremental positive sequence current and incremental negative sequence current (ΔI1 and ΔI2); and Determine the second-plane sequence feature including a second-plane current feature based on incremental zero sequence current and the incremental negative sequence current (ΔI0 and ΔI2).

4. The system according to claim 3, wherein, The controller is further configured to, in response to failure to determine the fault based on the first-plane current feature (ΔI1 and ΔI2) and the second-plane current feature (ΔI0 and ΔI2), determine the fault based on a first-plane voltage sequence feature and a second-plane voltage sequence feature, the first-plane voltage sequence feature being based on incremental positive sequence voltage and incremental negative sequence voltage (ΔV1 and ΔV2), and the second-plane voltage sequence feature being based on incremental zero sequence voltage and the incremental negative sequence voltage (ΔV0 and ΔV2).

5. The system according to claim 2, wherein, The controller is configured to, in response to the presence of the weak feed condition: Determine the first-plane feature including a first-plane voltage feature based on incremental positive sequence voltage and incremental negative sequence voltage (ΔV1 and ΔV2); and Determine the second-plane feature including a second-plane voltage feature based on incremental zero sequence voltage and the incremental negative sequence voltage (ΔV0 and ΔV2).

6. The system according to claim 5, wherein, The controller is further configured to, in response to failure to determine the fault based on the first-plane voltage feature (ΔV1 and ΔV2) and the second-plane voltage feature (ΔV0 and ΔV2): Determine the fault based on the first-plane voltage sequence feature (ΔV1 and ΔV2) and a second-plane current sequence feature, the second-plane current sequence feature being based on incremental zero sequence current and the incremental negative sequence current (ΔI0 and ΔI2).

7. The system according to claim 1, wherein, The fault includes one or more of a single line to ground fault, a line to line fault, a line to line to ground fault, or a three-phase fault.

8. The system according to claim 1, wherein, The controller is configured to control the relay to perform a protection function based on the fault.

9. The system according to claim 1, wherein, The relay includes the controller.

10. The system according to claim 1, wherein, The power grid includes renewable energy.

11. A method for detecting fault types and fault phases in a power grid including a relay, the relay being configured to monitor a line of the power grid and generate a monitoring signal, the method comprising: The sequence voltage and sequence current in the line are determined by the controller in response to the monitoring signal received from the relay; The absence or presence of a weak feed condition in the line is determined by the controller in response to the sequence voltage and the sequence current; The controller determines a first sequence characteristic and a second sequence characteristic in response to the presence or absence of the monitoring signal and the weak feed condition; and The controller determines the fault type and fault phase in the power grid in response to the first sequence characteristic and the second sequence characteristic.

12. The method according to claim 11, wherein, The first sequence characteristic includes positive sequence and negative sequence, and the second sequence characteristic includes zero sequence and negative sequence.

13. The method according to claim 12, further comprising, by the controller in response to the absence of the weak power feeding condition: determining the first plane sequence feature including a first plane current sequence feature based on the incremental positive sequence current and the incremental negative sequence current (ΔI1 and ΔI2); and determining the second plane sequence feature including a second plane current feature based on the incremental zero sequence current and the incremental negative sequence current (ΔI0 and ΔI2).

14. The method according to claim 13, further comprising, by the controller in response to a failure to determine the fault based on the first plane current feature (ΔI1 and ΔI2) and the second plane current feature (ΔI0 and ΔI2): determining the fault based on a first plane voltage sequence feature and a second plane voltage sequence feature, the first plane voltage sequence feature being based on the incremental positive sequence voltage and the incremental negative sequence voltage (ΔV1 and ΔV2), and the second plane voltage sequence feature being based on the incremental zero sequence voltage and the incremental negative sequence voltage (ΔV0 and ΔV2).

15. The method according to claim 12, further comprising, by the controller in response to the presence of the weak power feeding condition: determining the first plane feature including a first plane voltage feature based on the incremental positive sequence voltage and the incremental negative sequence voltage (ΔV1 and ΔV2); and determining the second plane feature including a second plane voltage feature based on the incremental zero sequence voltage and the incremental negative sequence voltage (ΔV0 and ΔV2).

16. The method according to claim 15, further comprising, by the controller in response to a failure to determine the fault based on the first plane voltage feature (ΔV1 and ΔV2) and the second plane voltage feature (ΔV0 and ΔV2): determining the fault based on the first plane voltage sequence feature (ΔV1 and ΔV2) and a second plane current sequence feature, the second plane current sequence feature being based on the incremental zero sequence current and the incremental negative sequence current (ΔI0 and ΔI2).

17. The method according to claim 11, wherein, The fault includes one or more of a single line to ground fault, a line to line fault, a line to line to ground fault, or a three-phase fault.

18. The method according to claim 11, further comprising, by the controller, controlling the relay to perform a protection function based on the fault.

19. The method according to claim 11, wherein, The power grid includes renewable energy.

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