AC three-phase four-wire power line three-phase live wire zero-crossing detection chip, circuit and method

Abstract

The present invention relates to a three-phase live wire zero-crossing detection chip, circuit, and method for an AC three-phase four-wire power line. The detection chip includes a first input pin, a second input pin, a third input pin, a fourth input pin, an output pin, a first Schmitt trigger, a second Schmitt trigger, a third Schmitt trigger, an enable module, a comparator, a timer, a driver, a controllable switch, a rectifier, and a reference voltage module. The comparator is used to compare the voltage of each phase line with a reference voltage when the voltage of the phase line reaches near zero. The timer starts timing when the output signal of the comparator flips. The driver turns on the controllable switch when the timer starts timing, so that the detection chip outputs a zero-crossing signal, and turns off the controllable switch when the timer ends timing, so as to stop outputting the zero-crossing signal.

Description

Technical Field

[0001] The present invention relates to the technical field of live wire zero-crossing detection, and more particularly to a three-phase live wire zero-crossing detection chip, circuit and method for an AC three-phase four-wire power line. Background Art

[0002] In three-phase, four-wire electric power meter measurement systems, measuring the zero-crossing point of the AC power line is necessary in various AC three-phase motor application scenarios to implement functions such as phase switching, calibration, and measurement identification for the corresponding circuits. Currently, one method for detecting zero-crossing signals in three-phase, four-wire AC power lines uses the base-emitter voltage drop of multiple transistors or the forward voltage drop of an optocoupler. This method suffers from inaccurate zero-crossing voltage detection, large batch discreteness, and high circuit power consumption that falls short of the 10mW required by the power grid. Another method uses a unidirectional zero-crossing detection circuit. Although this method utilizes a mature unidirectional zero-crossing detection chip, it requires three unidirectional zero-crossing detection circuits to achieve unidirectional zero-crossing detection in a three-phase power system. For bidirectional zero-crossing detection, six unidirectional zero-crossing detection circuits are required. This results in large PCB design area, high circuit complexity, and high manufacturing costs. Summary of the Invention

[0003] The object of the present invention is to provide a chip, circuit and method for detecting zero crossing of three-phase live wire of three-phase four-wire AC power line to overcome the above technical defects.

[0004] On the one hand, the present invention provides an AC three-phase four-wire power line three-phase live wire zero-crossing detection chip, comprising: a first input pin, a second input pin, a third input pin, a fourth input pin, an output pin, a first Schmitt trigger, a second Schmitt trigger, a third Schmitt trigger, an enable module, a comparator, a timer, a driver, a controllable switch, a rectifier and a reference voltage module, wherein the input end of the first Schmitt trigger is connected to the first input pin, the input end of the second Schmitt trigger is connected to the second input pin, the input end of the third Schmitt trigger is connected to the third input pin, the output ends of the first Schmitt trigger, the second Schmitt trigger and the third Schmitt trigger are all connected to the enable module and the timer, the first input pin, the second input pin The first pin and the third input pin are connected to one of the non-inverting input terminal and the inverting input terminal of the comparator, the other of the non-inverting input terminal and the inverting input terminal of the comparator is connected to the reference voltage module, the enable terminal of the comparator is connected to the enable module, the output terminal of the comparator is connected to the timer or is simultaneously connected to the timer and the driver, the timer is connected to the driver, the controllable switch includes a control terminal, a first connecting terminal and a second connecting terminal, the control terminal is connected to the driver, the first connecting terminal is grounded, the second connecting terminal is connected to the output terminal of the rectifier, the output terminal of the rectifier is connected to the output pin, the input terminal of the rectifier is connected to the first input pin, the second input pin and the third input pin respectively, and the fourth input pin is grounded;

[0005] The first input pin is used to connect to the first phase line, the second input pin is used to connect to the second phase line, and the third input pin is used to connect to the third phase line; the first Schmitt trigger is configured to be triggered when the voltage of the first phase line reaches a preset condition and output a first trigger signal; the second Schmitt trigger is configured to be triggered when the voltage of the second phase line reaches a preset condition and output a second trigger signal; the third Schmitt trigger is configured to be triggered when the voltage of the third phase line reaches a preset condition and output a third trigger signal; the enabling module is configured to enable the comparator upon receiving the first trigger signal, the second trigger signal, or the third trigger signal; when the enabling module receives the first trigger signal, the comparator compares the voltage of the first phase line with the reference voltage provided by the reference voltage module; when the enabling module receives the second trigger signal, the comparator compares the voltage of the first phase line with the reference voltage provided by the reference voltage module; The voltage of the second phase line is compared with the reference voltage provided by the reference voltage module; when the enable module receives the third trigger signal, the comparator compares the voltage of the third phase line with the reference voltage provided by the reference voltage module; the timer is configured to wake up the first timing time when the first trigger signal is received, wake up the second timing time when the second trigger signal is received, and wake up the third timing time when the third trigger signal is received; the timer is also configured to count for a duration equal to the woken timing time when the output signal of the comparator is flipped; the driver is configured to output a first drive signal when the output signal of the comparator is flipped, and output a second drive signal when the timer ends; the first drive signal turns on the controllable switch so that the detection chip outputs a zero-crossing signal; the second drive signal turns off the controllable switch to stop outputting the zero-crossing signal.

[0006] Optionally, the first timing time, the second timing time, and the third timing time are different from each other and are all less than a half-cycle duration of the alternating current.

[0007] Optionally, the first timing time, the second timing time, and the third timing time satisfy the following relationship:

[0008] T2=M×T1, T3=N×T1, where T1 is the first timing time, T2 is the second timing time, T3 is the third timing time, M and N are both real numbers, and 3>M≥2, N≥3 or 0.33 <M≤0.5、0<N<0.33。

[0009] Optionally, the rectifier includes a first diode, a second diode and a third diode, the anode of the first diode is connected to the first input pin, the anode of the second diode is connected to the second input pin, the anode of the third diode is connected to the third input pin, and the cathodes of the first diode, the second diode and the third diode are interconnected and form the output end of the rectifier.

[0010] Optionally, a voltage regulator tube is further included, and the voltage regulator tube is arranged between the output end of the rectifier and the ground.

[0011] Optionally, a first resistor is further included, one end of the first resistor is connected to the second connection end of the controllable switch, and the other end of the first resistor is connected to the output pin.

[0012] Optionally, each Schmitt trigger is configured to be triggered near a single falling edge zero point of the voltage of the corresponding phase line, or near a single rising edge zero point, or near both rising and falling edge zero points.

[0013] Another aspect of the present invention provides an AC three-phase four-wire power line three-phase live wire zero-crossing detection circuit, comprising a second resistor, a third resistor, a fourth resistor, an optocoupler module, and the AC three-phase four-wire power line three-phase live wire zero-crossing detection chip as described above, the optocoupler module comprising a fifth resistor, a sixth resistor, a first capacitor, a DC power supply, a second capacitor, and an optocoupler, wherein the second resistor is arranged between the first phase line and the first input pin, the third resistor is arranged between the second phase line and the second input pin, and the fourth resistor is arranged between the third phase line and the third input pin; the fifth resistor and the first capacitor are connected in series and arranged between the fourth input pin and the output pin, the light-emitting diode of the optocoupler is connected in parallel with the fifth resistor, the second capacitor is arranged between the collector and emitter of the transistor of the optocoupler, and the sixth resistor is arranged between the DC power supply and the collector of the transistor of the optocoupler; the connection end of the second capacitor and the emitter of the transistor of the optocoupler is grounded, and the two ends of the second capacitor form the output end of the optocoupler module.

[0014] Optionally, the third resistor, the fourth resistor and the fifth resistor are each formed by four resistors connected in series.

[0015] Another aspect of the present invention provides a method for detecting zero crossing of a three-phase live wire of an AC three-phase four-wire power line, comprising the following steps:

[0016] S10: providing the three-phase live wire zero-crossing detection chip for the three-phase four-wire AC power line as described above or the three-phase live wire zero-crossing detection circuit for the three-phase four-wire AC power line as described above;

[0017] S20: When the voltage of each phase line reaches near zero, the comparator compares the voltage of the phase line with the reference voltage and outputs a comparison signal corresponding to the phase line;

[0018] S30: The timer starts timing when the comparison signal corresponding to each phase line flips, and the duration is the timing time corresponding to the phase line;

[0019] S40: The driver outputs a first drive signal when the comparison signal corresponding to each phase line is reversed, and outputs a second drive signal when the timer ends;

[0020] S50: The controllable switch is turned on when receiving the first drive signal to output the zero-crossing signal; and is turned off when receiving the second drive signal to stop outputting the zero-crossing signal;

[0021] S60: Determine the phase line where the voltage crosses zero according to the duration of the zero-crossing signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 2 is a schematic structural diagram of a three-phase live wire zero-crossing detection chip for an AC three-phase four-wire power line according to an embodiment of the present invention;

[0023] Figure 2 2 is a schematic structural diagram of a three-phase live wire zero-crossing detection circuit for an AC three-phase four-wire power line according to an embodiment of the present invention;

[0024] Figure 3 2. A waveform diagram of the output voltage of the three-phase live wire zero-crossing detection circuit of the AC three-phase four-wire power line when the Schmitt trigger according to an embodiment of the present invention is triggered only near the zero point of the falling edge;

[0025] Figure 4 1. A waveform diagram of the output voltage of the three-phase live wire zero-crossing detection circuit of the AC three-phase four-wire power line when the Schmitt trigger is triggered only near the rising edge zero point according to an embodiment of the present invention;

[0026] Figure 5 3. This is a waveform diagram of the output voltage of the three-phase live wire zero-crossing detection circuit of the AC three-phase four-wire power line when the Schmitt trigger according to an embodiment of the present invention is triggered near both the rising edge zero point and the falling edge zero point;

[0027] Figure 6 Flowchart of a method for detecting zero crossing of a three-phase live wire of an AC three-phase four-wire power line according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The preferred embodiments of the present invention are given below in conjunction with the accompanying drawings and described in detail.

[0029] like Figure 1As shown, the embodiment of the present invention provides an AC three-phase four-wire power line three-phase live wire zero-crossing detection chip 100, which includes a first input pin 101, a second input pin 102, a third input pin 103, an output pin 104, a fourth input pin 105, a first Schmitt trigger 106, a second Schmitt trigger 107, a third Schmitt trigger 108, an enabling module 109, a comparator 110, a timer 111, a driver 112, a controllable switch 113, a rectifier 114 and a reference The voltage module 115, the input end of the first Schmitt trigger 106 is connected to the first input pin 101, the input end of the second Schmitt trigger 107 is connected to the second input pin 102, the input end of the third Schmitt trigger 108 is connected to the third input pin 103, the output ends of the first Schmitt trigger 106, the second Schmitt trigger 107 and the third Schmitt trigger 108 are all connected to the enable module 109 and the timer 111, and the comparator 110 has a non-inverting input end, a first inverting input end, and a second inverting input end. The first inverting input terminal is connected to the first input pin 101, the second inverting input terminal is connected to the second input pin 102, the third inverting input terminal is connected to the third input pin 103, the non-inverting input terminal is connected to the reference voltage module 115, the enable terminal is connected to the enable module 109, the output terminal of the comparator 110 is connected to the timer 111 or is connected to the timer 111 and the driver 112 at the same time, the timer 111 is connected to the driver 112, The controllable switch 113 includes a control end, a first connection end and a second connection end. The control end is connected to the driver 112, the first connection end is grounded, the second connection end is connected to the output end of the rectifier 114, the output end of the rectifier 114 is connected to the output pin 104, the input end of the rectifier 114 is respectively connected to the first input pin 101, the second input pin 102 and the third input pin 103, and the fourth input pin 105 is grounded; the rectifier 114 is used to rectify AC power into DC for chip operating voltage. The first input pin 101 is used to connect to the first phase line LA, the second input pin 102 is used to connect to the second phase line LB, and the third input pin 103 is used to connect to the third phase line LC. The rectifier 114 is used to convert the AC power of the three-phase live line into DC power. The reference voltage module 115 is used to serve as a power supply to power other components (enabling module 109, comparator 110, timer 111, driver 112, etc.) and provide a reference voltage to the non-phase input terminal of the comparator 110. Each of the first to third Schmitt triggers is configured to trigger when the corresponding phase line voltage reaches a preset condition (for example, drops to near zero and / or rises to near zero) and output a trigger signal. The first Schmitt trigger 106 outputs a first trigger signal V when triggered. A The second Schmitt trigger 107 outputs a second trigger signal V when triggered. B, the third Schmitt trigger 108 outputs a third trigger signal V when triggered C , the enabling module 109 is used to receive the first trigger signal V A , the second trigger signal V B and the third trigger signal V C , and upon receiving the first trigger signal V A Or the second trigger signal V B Or the third trigger signal V C When the enabling module 109 receives the first trigger signal V A When the comparator 110 compares the voltage of the first phase line LA with the reference voltage to output a first comparison signal. When the voltage of the first phase line LA is less than the reference voltage, the first comparison signal is high level, otherwise, the first comparison signal is low level. When the enabling module 109 receives the second trigger signal V B When the comparator 110 compares the voltage of the second phase line LB with the reference voltage to output a second comparison signal. When the voltage of the second phase line LB is less than the reference voltage, the second comparison signal is high, otherwise, the second comparison signal is low. When the enabling module 109 receives the third trigger signal V C When the voltage of the third phase line LC is less than the reference voltage, the comparator 110 compares the voltage of the third phase line LC with the reference voltage to output a third comparison signal. When the voltage of the third phase line LC is less than the reference voltage, the third comparison signal is high level, otherwise, the third comparison signal is low level. The timer 111 is configured to wake up the corresponding timing time when receiving different trigger signals. For example, when receiving the first trigger signal V A The first timing time T1 is woken up, and the second trigger signal V is received B The second timing time T2 is woken up when the third trigger signal V CWhen the third timing time T3 is awakened; the timer 111 is also set to start timing when the output signal of the comparator 110 flips, and the timing time is the currently awakened timing time. For example, when the first timing time T1 is awakened, the output signal of the comparator 110 flips, then the timer 111 starts timing for the first timing time T1. When the second timing time T2 is awakened, the output signal of the comparator 110 flips, then the timer 111 starts timing for the second timing time T2. When the third timing time T3 is awakened, the output signal of the comparator 110 flips, then the timer 111 starts timing for the third timing time T3; the driver 112 is set to output a first drive signal when the timer 111 starts timing, and output a second drive signal when the timer 111 finishes timing. The first drive signal is used to drive the controllable switch 113 to conduct, and the second drive signal is used to drive the controllable switch 113 to turn off; when the controllable switch 113 conducts, the detection chip 110 will output a zero-crossing signal through the output pin 104. When the controllable switch 113 turns off, no zero-crossing signal is output.

[0030] In some embodiments, T1, T2, and T3 are different from each other and are all less than half of the AC cycle duration. For example, T2 = M×T1 and T3 = N×T1, where 3 > M ≥ 2, N ≥ 3 or 0.33 < M ≤ 0.5, 0 < N < 0.33. In some other embodiments, T1 = T2 = T3 are the same, and three-phase zero-crossing signals can be obtained, but phase line identification is not performed.

[0031] The three-phase live wires of the AC three-phase four-wire power line cross zero alternately with a 120-degree difference. When the first phase line LA approaches zero, the first Schmitt trigger 106 emits a first trigger signal V A , the first trigger signal V A causes the enabling module 109 to emit an enabling signal to enable the comparator 110 to work. The comparator 110 compares the voltage of the first phase line LA with a reference voltage. When the voltage of the first phase line LA continues to drop below the reference voltage or increases above the reference voltage, the output signal of the comparator 110 will flip, thereby triggering the timer 111 to time and triggering the driver 112 to emit a first drive signal to make the controllable switch 113 conduct. After the controllable switch 113 conducts, the detection chip 100 will output a zero-crossing signal. The conduction time of the controllable switch 113 is T1, so the duration of the zero-crossing signal is also T1. That is to say, during the zero-crossing process of the first phase line LA, the detection chip 100 will generate a zero-crossing signal with a duration of T1; similarly, during the zero-crossing processes of the second phase line LB and the third phase line LC, zero-crossing signals with durations of T2 and T3 will be generated respectively. Thus, which phase line crosses zero can be judged by the length of the zero-crossing signal.

[0032] The driver 112 can be selectively connected to the comparator 110 or not. When connected to the comparator 110, the driver 112 outputs a first drive signal when it determines that the output signal of the comparator 110 has flipped. When not connected to the comparator 110, when the timer 111 starts timing, it sends a timing start signal to the driver 112, causing the driver 112 to output the first drive signal. When the timer 111 ends timing, the timer 111 sends a timing end signal to the driver 112, causing the driver 112 to output the second drive signal.

[0033] In some embodiments, rectifier 114 includes a first diode DA, a second diode DB, and a third diode DC. The anode of first diode DA is connected to first input pin 101, the anode of second diode DB is connected to second input pin 102, and the anode of third diode DC is connected to third input pin 103. The cathodes of diodes DA, DB, and DC are interconnected and form the output terminal of rectifier 114. Diodes DA, DB, and DC are used to implement half-wave rectification and are therefore also referred to as half-wave rectifiers. Rectifier 114 may also be implemented in other ways, such as using a triode with a connected base and emitter, or using the parasitic body diode of a transistor.

[0034] The reference voltage module 115 is a conventional chip design, and its specific implementation will not be described in detail here.

[0035] It is understandable that the comparator 110 may also be configured to have three non-inverting input terminals and one inverting output terminal, the inverting output terminal is connected to the reference voltage, and the three non-inverting input terminals are respectively connected to the output terminals of the three Schmitt triggers.

[0036] In some embodiments, the detection chip 100 may further include a voltage regulator diode ZD, which is disposed between the output terminal of the rectifier 114 and the ground and is used to clamp the output voltage of the rectifier to prevent subsequent circuit components from being damaged.

[0037] In some embodiments, the detection chip 110 further includes a first resistor R1, one end of the first resistor R1 is connected to the second connection end of the controllable switch 113, and the other end is connected to the output pin 104. The first resistor R1 is used to limit current.

[0038] The controllable switch 113 can be an NMOS transistor, a PMOS transistor or any other suitable switch. When the controllable switch 113 is an NMOS transistor, the first driving signal is a high level and the second driving signal is a low level.

[0039] The Schmitt trigger can be set as needed to trigger near the zero point of a single falling edge, or trigger near the zero point of a single rising edge, or trigger near the zero points of both the rising and falling edges.

[0040] The comparator 110 can be configured to distinguish the phase lines LA, LB and LC according to the input source, and the output of the comparator 110 can be directly connected to the pulse generation module so that the pulse generation module generates pulse signals with durations of T1, T2 and T3, that is, the same three-phase zero-crossing signal is obtained.

[0041] The driver 112 may include a current limiting resistor and a short-circuit switch. The current limiting resistor is arranged between the second connection end of the controllable switch 113 and the output pin 104. The short-circuit switch is connected to the current limiting resistor and is used to switch short-circuit part of the current limiting resistor.

[0042] like Figure 2 As shown, an embodiment of the present invention further provides an AC three-phase four-wire power line three-phase live wire zero-crossing detection circuit, which includes the detection chip 100 as described in the above embodiment, and includes a second resistor R2, a third resistor R3, a fourth resistor R4 and an optical coupling module, the optical coupling module includes a fifth resistor R5, a sixth resistor R6, a first capacitor C1, a DC power supply VDD, a second capacitor C2 and an optical coupler OPTO, the second resistor R2 is provided between the first phase line LA and the first input pin 101, the third resistor R3 is provided between the second phase line LB and the second input pin 102, and the fourth resistor R4 is provided between the third phase line LC and the third input pin 103. The second resistor R2, the third resistor R3 and the fourth resistor R4 are used to The maximum current flowing to the detection chip 100 is limited, and voltage is divided to prevent damage to the voltage regulator ZD and provide sufficient energy for the circuit; the fifth resistor R5 and the first capacitor C1 are connected in series and are arranged between the fourth input pin 105 and the output pin 104, the light-emitting diode of the optocoupler OPTO is connected in parallel with the fifth resistor R5, the second capacitor C2 is arranged between the collector and emitter of the transistor of the optocoupler OPTO, and the sixth resistor R6 is arranged between the DC power supply VDD and the collector of the transistor of the optocoupler OPTO; the connection end of the second capacitor C2 and the emitter of the transistor of the optocoupler OPTO is grounded, and the two ends of the second capacitor C2 form the output end of the optocoupler module (also the output end of the detection circuit), and the output voltage thereof is V OUT .

[0043] The detection principle of the detection circuit of the embodiment of the present invention is as follows:

[0044] Taking the Schmitt trigger configured as a single falling edge zero point additional trigger as an example, the trigger voltage of the Schmitt trigger is 3V. Whenever the phase line voltage drops to 3V, a trigger signal is issued, and the reference voltage of the comparator 110 is set to 1V. As mentioned above, when different phase lines cross zero, the detection chip 100 will output zero-crossing signals of different durations. The zero-crossing signal will cause the optocoupler OPTO to obtain a light-emitting current and transmit the zero-crossing signal to the secondary, so the output voltage V OUT The waveform is as follows Figure 3As shown, after the waveform of the voltage of the first phase line LA changes from the positive semi-axis to the negative semi-axis and passes through the vicinity of the zero point, the detection circuit outputs a low-level voltage for a duration of T1, and then recovers to a high-level voltage; then after the waveform of the voltage of the second phase line LB changes from the positive semi-axis to the negative semi-axis and passes through the zero point, the detection circuit outputs a low-level voltage for a duration of T2, and then recovers to a high-level voltage; then after the waveform of the voltage of the third phase line LC changes from the positive semi-axis to the negative semi-axis and passes through the zero point, the detection circuit outputs a low-level voltage for a duration of T3, and then recovers to a high-level voltage; this cycle is repeated in each cycle of the AC three-phase power, and the phase line crossing zero can be determined by the duration of the low-level voltage of the output voltage VOUT of the detection circuit.

[0045] The output pin 104 of the detection chip 100 has at least two functions. The first function is to charge the first capacitor C1 through the output pin 104, serving as the power supply end for other components of the chip except the rectifier 114 and the Zener diode ZD; the second function is to connect the negative electrode of the light-emitting diode of the optocoupler OPTO to drive the optocoupler module.

[0046] It should be noted that, since the voltage VCC of the output pin 104 is the highest during the time when the controllable switch 113 is just turned on, the current flowing through the first resistor R1 inside the chip is the largest, which can quickly pull down the output, sufficiently light up the light-emitting diode of the optocoupler OPTO, and quickly transmit the zero-crossing signal to the secondary. Subsequently, the discharge current decreases linearly with VCC to maintain the signal. In this way, while ensuring that the zero-crossing signal can be transmitted to the secondary of the optocoupler module, the energy storage of the first capacitor C1 can be utilized to the maximum extent possible, extending the discharge time of the first capacitor C1, and avoiding the situation where the first capacitor C1 cannot provide sufficient light-emitting current for the optocoupler due to insufficient energy storage, thereby causing the zero-crossing signal transmission failure and the zero-crossing signal detection result to be erroneous.

[0047] It should be noted that T1, T2, and T3 should not be too short. If they are too short, the zero-crossing signal will end before the output is pulled low, and it will be impossible to quickly transmit the zero-crossing signal to the secondary and reduce the error between the zero-crossing signal detected at the output end of the optocoupler module and the actual zero-crossing point of the AC power; the zero-crossing signal duration T1, T2, and T3 should not be too long. If they are too long, too much charge stored on the first capacitor C1 will be consumed, resulting in the timing not being over yet, and the charge on the first capacitor C1 is not enough to provide sufficient light-emitting current for the optocoupler, which will cause the zero-crossing signal transmission to fail and the zero-crossing signal detection result to be erroneous.

[0048] The Schmitt trigger can also be set to trigger near the zero point of a single rising edge or trigger near the zero point of both the rising edge and the falling edge. The waveforms of the output voltage VOUT are as follows: Figure 4and Figure 5 shown. Figure 5 and Figure 3 and Figure 4 The difference is that Figure 5 There are 6 zero-crossing signals in one AC cycle, and Figure 3 and Figure 4 There are only three zero-crossing signals in one AC cycle.

[0049] It should be noted that Figure 3 、 Figure 4 and Figure 5 For the purpose of clearly showing the waveform of each signal, no exemplary limitation is imposed on the ratio of the width of each signal waveform to the half cycle of the AC power.

[0050] In some embodiments, the second resistor R2 can be formed by four resistors connected in series, and the resistance of each of the four resistors is 750kΩ. The third resistor R3 and the fourth resistor R4 can also be formed by four resistors with a resistance of 750kΩ connected in series; the resistance of the fifth resistor R5 is 4.7kΩ, and the resistance of the sixth resistor R6 is 10kΩ; the capacitance value of the first capacitor C1 is 1μF / 16V, and the capacitance value of the second capacitor C2 is 1nF / 16V.

[0051] like Figure 6 As shown, an embodiment of the present invention further provides a method for detecting zero crossing of a three-phase live wire of an AC three-phase four-wire power line, which comprises the following steps:

[0052] S10: providing an AC three-phase four-wire power line three-phase live wire zero-crossing detection chip or circuit as described in the above embodiment;

[0053] S20: When the voltage of each phase line reaches near zero, the comparator 110 compares the voltage of the phase line with the reference voltage and outputs a comparison signal corresponding to the phase line;

[0054] S30: the timer 111 starts timing when the comparison signal corresponding to each phase line flips, and the duration is the timing time corresponding to the phase line;

[0055] S40: The driver 112 outputs a first drive signal when the comparison signal corresponding to each phase line is flipped, and outputs a second drive signal when the timer 111 ends timing;

[0056] S50: The controllable switch 113 is turned on when receiving the first driving signal to output the zero-crossing signal; and is turned off when receiving the second driving signal to stop outputting the zero-crossing signal;

[0057] S60: Determine the phase line whose voltage crosses zero according to the duration of the zero-crossing signal (ie, determine which phase line has its voltage cross zero).

[0058] The voltage zero-crossing point can also be determined based on the generation of the zero-crossing signal. After the zero-crossing signal is generated, it indicates that the voltage of a phase line is about to cross zero. This can help other circuits detect the true zero-crossing point in advance. For example, after receiving the zero-crossing signal, the zero-crossing detection circuit starts to detect the voltage, thereby measuring the true zero-crossing point of the voltage.

[0059] The embodiments of the present invention have the following beneficial effects:

[0060] 1. Predict the zero-crossing point of the three-phase live wire of the three-phase four-wire AC power in advance and generate a zero-crossing signal to the detection equipment in advance, so that there is time to prepare for the next action and the next action is actually at the zero-crossing moment;

[0061] 2. During the initial period of the zero-crossing signal, a relatively large conduction current is provided to the controllable switch 113, so that the zero-crossing signal can be quickly transmitted through the optocoupler, thereby enhancing the reliability of the zero-crossing signal transmission;

[0062] 3. By comparing the phase line voltage with the precise reference voltage, the zero-crossing signal is highly accurate and consistent, which further improves reliability and avoids the inaccurate zero-crossing signal caused by discrete device parameter drift;

[0063] 4. The width (i.e., duration) of the zero-crossing signal is used to determine whether the phase line LA, LB, or LC is crossing zero. The width of the zero-crossing signal can be precisely controlled by a timer, which has high precision and good mass production consistency. One circuit can achieve the functions of three traditional circuits, reducing system costs and PCB (printed circuit board) wiring complexity.

[0064] 5. The AC three-phase four-wire power line three-phase live wire zero-crossing detection chip has only five pins, and the three-phase four-wire power line three-phase zero-crossing detection circuit only needs to add one external capacitor. The circuit structure is simple, further reducing the complexity of PCB wiring;

[0065] 6. Through the current limiting and voltage dividing resistors R2, R3 and R4, the three-phase live wire zero-crossing detection circuit of the AC three-phase four-wire power line can meet the power consumption requirements of the power grid.

[0066] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of the present invention. Various modifications are possible. In other words, any simple, equivalent changes and modifications made in accordance with the claims and description of the present invention are within the scope of protection of the patent claims. Anything not fully described in this invention constitutes conventional technology.

Claims

1. An AC three-phase four-wire power line three-phase live line zero-crossing detection chip, characterized in that: The device comprises a first input pin, a second input pin, a third input pin, a fourth input pin, an output pin, a first Schmitt trigger, a second Schmitt trigger, a third Schmitt trigger, an enabling module, a comparator, a timer, a driver, a controllable switch, a rectifier and a reference voltage module, wherein the input end of the first Schmitt trigger is connected to the first input pin, the input end of the second Schmitt trigger is connected to the second input pin, the input end of the third Schmitt trigger is connected to the third input pin, the output ends of the first Schmitt trigger, the second Schmitt trigger and the third Schmitt trigger are all connected to the enabling module and the timer, the first input pin, the second input pin and the third input pin are connected to the comparator The comparator is connected to one of the positive-inverting input terminal and the negative-inverting input terminal, the other of the positive-inverting input terminal and the negative-inverting input terminal is connected to the reference voltage module, the enable terminal of the comparator is connected to the enable module, the output terminal of the comparator is connected to the timer or is simultaneously connected to the timer and the driver, the timer is connected to the driver, the controllable switch includes a control terminal, a first connection terminal and a second connection terminal, the control terminal is connected to the driver, the first connection terminal is grounded, the second connection terminal is connected to the output terminal of the rectifier, the output terminal of the rectifier is connected to the output pin, the input terminal of the rectifier is connected to the first input pin, the second input pin and the third input pin respectively, and the fourth input pin is grounded; The first input pin is used to connect to the first phase line, the second input pin is used to connect to the second phase line, and the third input pin is used to connect to the third phase line; the first Schmitt trigger is configured to trigger when the voltage of the first phase line reaches a preset condition and output a first trigger signal; The second Schmitt trigger is configured to be triggered when the voltage of the second phase line reaches a preset condition and output a second trigger signal; the third Schmitt trigger is configured to be triggered when the voltage of the third phase line reaches a preset condition and output a third trigger signal; the enabling module is configured to enable the comparator upon receiving the first trigger signal, the second trigger signal, or the third trigger signal; when the enabling module receives the first trigger signal, the comparator compares the voltage of the first phase line with the reference voltage provided by the reference voltage module; when the enabling module receives the second trigger signal, the comparator compares the voltage of the second phase line with the reference voltage provided by the reference voltage module; When the enabling module receives the third trigger signal, the comparator compares the voltage of the third phase line with the reference voltage provided by the reference voltage module; the timer is configured to wake up the first timing time when the first trigger signal is received, wake up the second timing time when the second trigger signal is received, and wake up the third timing time when the third trigger signal is received; the timer is further configured to count for the awakened timing time when the output signal of the comparator is flipped; the driver is configured to output a first drive signal when the output signal of the comparator is flipped, and output a second drive signal when the timer ends; the first drive signal turns on the controllable switch, so that the detection chip outputs a zero-crossing signal; The second driving signal turns off the controllable switch to stop outputting the zero-crossing signal.

2. The AC three-phase four-wire power line three-phase live line zero-crossing detection chip according to claim 1, characterized in that: The first timing time, the second timing time, and the third timing time are different from each other and are all less than a half-cycle length of the alternating current.

3. The AC three-phase four-wire power line three-phase live line zero-crossing detection chip according to claim 2, characterized in that: The first timing time, the second timing time, and the third timing time satisfy the following relationship: T2=M×T1, T3=N×T1, where T1 is the first timing time, T2 is the second timing time, T3 is the third timing time, M and N are both real numbers, and 3>M≥2, N≥3 or 0.33 <M≤0.5、0<N<0.33。 4. The AC three-phase four-wire power line three-phase live line zero-crossing detection chip according to claim 1, characterized in that: The rectifier includes a first diode, a second diode and a third diode, the anode of the first diode is connected to the first input pin, the anode of the second diode is connected to the second input pin, the anode of the third diode is connected to the third input pin, and the cathodes of the first diode, the second diode and the third diode are interconnected and form the output end of the rectifier.

5. The AC three-phase four-wire power line three-phase live line zero-crossing detection chip according to claim 1, characterized in that: It also includes a voltage regulator tube, which is arranged between the output end of the rectifier and the ground.

6. The AC three-phase four-wire power line three-phase live line zero-crossing detection chip according to claim 1, characterized in that: It also includes a first resistor, one end of which is connected to the second connection end of the controllable switch, and the other end of which is connected to the output pin.

7. The AC three-phase four-wire power line three-phase live line zero-crossing detection chip according to claim 1, characterized in that: Each Schmitt trigger is configured to be triggered near a single falling edge zero point of the voltage of the corresponding phase line, or near a single rising edge zero point, or near both rising and falling edge zero points.

8. An AC three-phase four-wire power line three-phase live line zero-crossing detection circuit, characterized in that: The invention comprises a second resistor, a third resistor, a fourth resistor, an optocoupler module and a three-phase live wire zero-crossing detection chip for an AC three-phase four-wire power line according to any one of claims 1 to 7, wherein the optocoupler module comprises a fifth resistor, a sixth resistor, a first capacitor, a DC power supply, a second capacitor and an optocoupler, wherein the second resistor is arranged between the first phase line and the first input pin, the third resistor is arranged between the second phase line and the second input pin, and the fourth resistor is arranged between the third phase line and the third input pin; the fifth resistor and the first capacitor are connected in series and arranged between the fourth input pin and the output pin, the light-emitting diode of the optocoupler is connected in parallel with the fifth resistor, the second capacitor is arranged between the collector and the emitter of the transistor of the optocoupler, and the sixth resistor is arranged between the DC power supply and the collector of the transistor of the optocoupler; the connection end of the second capacitor and the emitter of the transistor of the optocoupler is grounded, and the two ends of the second capacitor form the output end of the optocoupler module.

9. A method for detecting zero crossing of three-phase live wire of AC three-phase four-wire power line, characterized in that: The following steps are involved: S10: Provide an AC three-phase four-wire power line three-phase live wire zero-crossing detection chip according to any one of claims 1 to 7 or an AC three-phase four-wire power line three-phase live wire zero-crossing detection circuit according to claim 8; S20: When the voltage of each phase line reaches near zero, the comparator compares the voltage of the phase line with the reference voltage and outputs a comparison signal corresponding to the phase line; S30: The timer starts timing when the comparison signal corresponding to each phase line flips, and the duration is the timing time corresponding to the phase line; S40: The driver outputs a first drive signal when the comparison signal corresponding to each phase line is reversed, and outputs a second drive signal when the timer ends; S50: The controllable switch is turned on when receiving the first drive signal to output the zero-crossing signal; and is turned off when receiving the second drive signal to stop outputting the zero-crossing signal; S60: Determine the phase line where the voltage crosses zero according to the duration of the zero-crossing signal.

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