SoC chip verification automation system based on task flow

Abstract

The invention provides an SoC chip verification automation system based on task flow. The SoC chip verification automation system comprises a task flow management module, an automatic evaluation and selection module, an automatic execution module, a real-time optimization adjustment module, a result analysis and report generation module and a verification method tool library. According to the invention, the automation degree of verification is improved, flow chaos and human errors are reduced, and the verification efficiency and reliability are improved; the pertinence and effect of verification are improved, and the coverage rate and effectiveness of verification are ensured; and the cost and the risk in the verification process are reduced, so that the SoC verification method has important application and advantages in the SoC verification field.

Description

Technical Field

[0001] The present invention relates to an automated verification system for SoC chips, and particularly to an automated verification system for SoC chips based on a task flow. Background Art

[0002] The highly integrated SoC design involves complex interconnections and communications between multiple modules and subsystems, needs to meet complex data transmission and timing requirements, and simultaneously supports multiple communication protocols and interface standards. With the increasing integration level of SoC designs, the traditional UVM verification method can no longer meet the ever-changing and cumbersome verification requirements.

[0003] The traditional UVM verification method is based on SystemVerilog. It generates stimuli by defining and simulating transaction-level data transmissions, drives interface signals to check and verify the correctness and timing requirements of the design during data transmission. For SoC designs with an increasingly high degree of integration, the verification tasks become complex and cumbersome, and a single verification method often cannot meet the diverse verification needs.

[0004] UVM mainly focuses on module-level verification. By establishing transaction-level communications and constraints, it uses virtual sequences, verification components, etc. for functional verification. However, for highly complex SoC designs, simply through module-level testing, it is often impossible to comprehensively cover the complex interconnections and communications between each subsystem. At the same time, UVM mainly relies on simulation to verify timing relationships, but in large-scale SoC designs, due to the timing complexity and running time limitations of simulation, it is impossible to fully simulate all possible verification scenarios. This requires different verification methods to cover all aspects of verification needs. For example, for the verification of data paths, formal verification methods may be needed; for the verification of timing requirements, timing analysis and simulation verification may be required; for the verification of communication protocols, interactive verification may be needed, etc.

[0005] In summary, the disadvantages of the prior art are as follows: 1. Dependence on manually written verification code: For large-scale SOC designs, the method of directly writing verification code manually alone cannot meet the requirements. This method is time-consuming and prone to introducing errors, and is less efficient during the development and maintenance of the verification environment. 2. Limitations of a single verification method: A single verification method may be able to quickly verify in some verification scenarios, but may not have advantages in other scenarios, thus reducing the overall verification efficiency and cycle. Summary of the Invention

[0006] Object of the Invention: The technical problem to be solved by the present invention is to provide an automated verification system for SoC chips based on a task flow in view of the deficiencies of the prior art.

[0007] To solve the above technical problems, the present invention discloses an automated system for verifying an SoC chip based on a task flow, including: a task flow management module, an automatic evaluation and selection module, an automatic execution module, a real-time optimization and adjustment module, a result analysis and report generation module, and a verification method tool library; wherein:

[0008] The task flow management module is used to convert the SoC chip verification task into a task flow, manage the task flow, and send the task flow to the automatic execution module in the form of an instruction;

[0009] The automatic evaluation and selection module is used to make decisions and selections on each converted task flow to form an optimal combination of verification methods and verification tools, and send the selection result to the automatic execution module in the form of an instruction;

[0010] The automatic execution module is used to start the corresponding verification tool or verification environment according to the instructions of the task flow management module and the automatic evaluation and selection module to complete the execution of the task flow;

[0011] The real-time optimization and adjustment module performs real-time optimization and adjustment during the execution of the task flow;

[0012] The result analysis and report generation module is used to analyze and summarize the verification results of the SoC chip verification task and generate a verification report;

[0013] The verification method tool library contains different verification methods, verification environments, and verification tools, and records their relevant information.

[0014] Further, in the task flow management module, converting the SoC chip verification task into a task flow specifically includes:

[0015] Task decomposition: decomposing the SoC chip verification task into a series of verification subtasks;

[0016] Defining the task flow: arranging the execution order and execution dependency relationships of the above verification subtasks according to the constraint conditions to form a task flow;

[0017] Customizing the interface: manually customizing the formed task flow.

[0018] Further, in the task flow management module, managing the task flow specifically includes: task flow scheduling and task flow monitoring.

[0019] Further, the task flow scheduling specifically includes: forming an execution instruction for the converted task flow and sending it to the automatic execution module;

[0020] Further, the task flow monitoring specifically includes: tracking the status of each task flow and each subtask in the task flow, recording the execution progress and logs, and sending the recorded results to the result analysis and report generation module.

[0021] Further, in the automatic evaluation and selection module, the specific methods for decision-making and selection include:

[0022] Construct a verification rule set, that is, set verification rules according to the levels of verification tasks;

[0023] Set evaluation metrics for the verification methods or tools corresponding to the verification rules;

[0024] For each subtask in the task flow, according to its verification rules, calculate the comprehensive scores of all verification methods or tools through the evaluation metrics, select the verification method and tool with the highest score, and execute the verification task;

[0025] Combine the verification methods and tools of all subtasks in the task flow to obtain the verification methods and tools of the task flow.

[0026] Further, in the automatic evaluation and selection module, constructing the verification rule set specifically includes:

[0027] Divide the verification tasks into: system-level verification, module-level verification, and connection layer verification;

[0028] Among them, the verification rules for system-level verification at least include: function verification rules, performance verification rules, and reliability verification rules;

[0029] The verification rules for module-level verification at least include: function verification rules, boundary condition verification rules, and error handling verification rules;

[0030] The verification rules for connection layer verification at least include: connection integrity verification rules, interface consistency verification rules, and data transmission verification rules;

[0031] In addition, in the above three levels, there are at least: integration compatibility usage rules and resource utilization rules.

[0032] Further, in the automatic evaluation and selection module, the specific methods for setting evaluation metrics include:

[0033] Evaluation metrics for function verification rules: Use the function coverage rate of specific verification methods or tools as the evaluation metric;

[0034] Evaluation metrics for interface verification rules: If a specific verification method or tool can verify whether the interfaces of a module with other modules or systems are consistent, it is full marks, otherwise it is zero points;

[0035] Evaluation metrics for performance verification rules: If the specific verification method or tool supports testing the processor core performance with a full score, otherwise it is zero points;

[0036] Evaluation metrics for boundary condition verification rules: Sort the number of test stimuli under the created boundary conditions according to the specific verification method or tool, and score according to the ranking;

[0037] Evaluation metrics for error handling verification rules: Sort the number of test stimuli in the created abnormal scenarios according to the specific verification method or tool, and score according to the ranking;

[0038] Evaluation metrics for integration compatibility usage rules: Sort the number of other verification methods or tools compatible with the specific verification method or tool, and score according to the ranking;

[0039] Evaluation metrics for resource utilization rules: Sort the verification time and the number of personnel spent in the verification task by the specific verification method or tool, and score according to the ranking;

[0040] Evaluation metrics for connection integrity verification rules: Sort according to the number of interfaces covered by the verification method or tool, and score according to the ranking;

[0041] Evaluation metrics for interface consistency verification rules: Sort according to the number of protocols and data formats supported by the verification method or tool, and score according to the ranking;

[0042] And the evaluation metrics for data transmission verification rules: If the specific verification method or tool supports dynamic data transmission on the interface, it is a full score, otherwise it is zero points.

[0043] Furthermore, in the real-time optimization and adjustment module, optimization and adjustment are carried out in real time, specifically including:

[0044] According to the result of the verification task, judge whether to carry out optimization and adjustment. If so, notify the task flow management module or the automatic evaluation and selection module to re-adjust the task flow or re-select the verification method or tool, and re-execute the verification task.

[0045] Furthermore, the verification method tool library at least includes: cocotb verification method, uvm verification method and formal verification method.

[0046] Beneficial effects:

[0047] 1. The present invention provides an automated task flow management module, which can automatically manage and execute verification tasks. This can improve the automation degree of verification, reduce process chaos and human errors, and improve the efficiency and reliability of verification.

[0048] By integrating a variety of verification methods and tools, the present invention can improve the comprehensiveness and efficiency of verification, avoiding the repetition of verification work and waste of resources. This can save time and costs, and improve the accuracy and comprehensiveness of verification.

[0049] 2. By flexibly adjusting the verification method, the present invention can select appropriate verification methods and tools according to different verification levels and requirements. This can improve the pertinence and effect of verification, ensuring the coverage rate and effectiveness of verification.

[0050] 3. The present invention also has the ability to dynamically evaluate and select verification methods, and can dynamically select the most suitable verification methods and tools according to the characteristics of verification tasks and the situation of system resources. This can improve the efficiency and accuracy of verification, ensure the full utilization of system resources, and optimize and adjust the verification strategy according to the actual situation.

[0051] 4. By integrating verification methods, flexibly adjusting strategies, automating task management, and dynamically evaluating and selecting, the present invention can improve the efficiency, accuracy, and comprehensiveness of verification, reduce the costs and risks in the verification process, and thus has important applications and advantages in the field of SoC verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The following further specifically describes the present invention in conjunction with the drawings and specific embodiments, and the above and / or other advantages of the present invention will become clearer.

[0053] Figure 1 It is a framework diagram of an SoC chip verification automation system.

[0054] Figure 2 It is a schematic diagram of a task flow management module.

[0055] Figure 3 It is a schematic diagram of an automatic evaluation and selection module.

[0056] Figure 4 It is a schematic diagram of an automated verification process. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0057] The object of the present invention is to provide a task flow-based SoC chip verification automation system, and the system framework diagram is as Figure 1 shown. The entire system consists of five modules and a tool library.

[0058] A task flow management module, as Figure 2As shown, it is responsible for defining and managing the verification task process. Through task decomposition, it divides the verification tasks into a series of subtasks, and arranges their execution order and dependencies according to the constraints of the verification tasks, such as time limit, cost limit, resource limit, etc. This module provides a task flow definition interface, allowing users to flexibly define the steps, subtasks and their dependencies of the task process. It performs task scheduling to ensure that the subtasks are executed in the correct order. It tracks the status of each subtask and provides task execution progress and logs to feedback the execution situation and results of the tasks. Through an effective task flow management module, you can efficiently organize and manage the verification task process, improving the reliability and efficiency of the verification process.

[0059] An automatic evaluation and selection module, such as Figure 3 As shown: The role of this module is to make intelligent decisions and selections for each task flow based on the requirements of the verification tasks, constraints and information in the verification method and tool library, in order to infer the best combination of verification methods and tools. By collecting the requirements of the verification tasks, characteristics of the verification methods and historical performance data, we can construct a set of rule sets. The rule set is a series of rules formulated according to the verification level and task requirements, covering various considerations, such as performance, resource consumption and accuracy, etc.

[0060] First of all, it is necessary to define verification rules at different levels. Each level can have its own rule set to meet the needs of verification tasks at a specific level.

[0061] System-level verification focuses on the functions and performance of the entire system to ensure that the system works according to the specifications. The verification rules include: Function verification rules: Verify whether the functions of the system are implemented according to the requirements and specifications. Performance verification rules: Verify the performance indicators of the system under various workloads, such as response time, throughput, etc. Reliability verification rules: Verify the reliability and fault tolerance of the system in the face of abnormal conditions and failures.

[0062] Module-level verification rules: Module-level verification focuses on the functions and interfaces of individual modules to ensure that each module can work correctly and cooperate with other modules. The verification rules include: Functional verification rules: Verify whether the functions of the module are implemented according to the requirements and specifications. Boundary condition verification rules: Verify the behavior and response of the module under boundary conditions. Error handling verification rules: Verify the module's ability to handle exceptional situations and error recovery mechanisms. Connection layer verification focuses on the connections and interfaces between different modules to ensure the correctness and consistency of the connections and interfaces. The verification rules include: Connection integrity verification rules: Verify whether the establishment and release of connections are correct. Interface consistency verification rules: Verify whether the interface protocols and data formats of the connections are consistent. Data transmission verification rules: Verify whether the data transmission on the connection is reliable and correct. At the same time, whether it can be integrated and used compatibly with other verification tools and the human and time costs invested in verification are rules that need to be considered at each verification level.

[0063] Next, specific evaluation metrics need to be specified for each verification method and tool to measure its performance, resource consumption, and accuracy. For example, verification coverage is used to evaluate the completion of functional verification, resource utilization is used to evaluate resource utilization, and compatibility is used to evaluate whether the verification method and tool are compatible with other verification tools, etc.

[0064] Suppose the task flow belongs to module-level verification and the verification time is a key factor, with low requirements for coverage and compatibility. Then the weight of resource utilization is 10, the weight of compatibility is 5, and the weight of coverage is 6. According to the rule set and evaluation metrics, the following rule matching and evaluation can be carried out:

[0065] a. Functional verification rules: For functional verification, appropriate verification methods and tools can be selected based on the functional coverage evaluation metric. Suppose the functional coverage evaluation score of verification method A is 70%, and the functional coverage evaluation score of verification method B is 80%.

[0066] b. Interface verification rules: If the verification method and tool meet the interface verification rules, then continue to evaluate other metrics. If there are multiple verification methods and tools that meet the interface consistency, continue to compare other metrics. Suppose verification method A meets the requirements, and the evaluation score is 100%.

[0067] c. Boundary condition verification rules: For boundary condition verification, the score can be evaluated based on the specific boundary condition verification rules and the performance of the verification method. For example, if the behavior and response of verification method A are better under boundary conditions, verification method A can obtain a higher evaluation score, suppose it is 90%.

[0068] d. Error handling verification rules: Verification methods and tools that can quickly and simply implement exception test cases can obtain higher scores. Suppose the score of verification method A is 60%.

[0069] e. Compatibility rule: The more verification tools are compatible, the higher the evaluation score. Assume the score of verification method A is 70%.

[0070] f. Resource utilization rule: Those that spend less verification time and personnel can obtain higher scores. Assume the score of verification method A is 80%. The formula for calculating the comprehensive evaluation score of verification method A is:

[0071] Comprehensive score = (resource utilization rule score * resource utilization rate weight) + (compatibility rule score * compatibility weight) + ......

[0072] For other verification methods and tools selected through the rules, calculate their comprehensive scores in the same way. Then compare the comprehensive scores of different verification methods and tools, and select the verification method and tool with the highest comprehensive score as the best choice.

[0073] The automatic execution module is a key component in the verification process. Its main responsibility is to automatically start the appropriate verification tools or environments according to the instructions of the task flow management module to complete the execution of the verification tasks. Through automation, it can reduce manual operations and improve the efficiency and consistency of the verification process.

[0074] The real-time optimization and adjustment module is a module that performs optimization and adjustment in real time during the execution of verification tasks. It monitors the performance and results of the verification process, continuously evaluates the effectiveness of verification methods and tools, and makes decisions on optimization and adjustment according to the actual situation. When it is found that a certain method or tool performs poorly in the current verification task, the system can try to switch to other more suitable options to improve the efficiency and accuracy of verification. The coordinated work of these two modules realizes the automatic execution and real-time optimization and adjustment of verification tasks. The automatic execution module ensures that the verification tasks are carried out according to the predetermined process, while the real-time optimization and adjustment module provides real-time monitoring and optimization of the verification process, so that the verification process and the selection of the best verification methods and tools can be dynamically adjusted according to the actual situation. This enables the verification tasks to be executed in an efficient and accurate manner, and also improves the overall quality and efficiency of verification.

[0075] Result analysis and report generation module: This module is used to analyze and summarize the verification results and generate verification reports. It is responsible for extracting and parsing the verification result data, performing statistical and comparison analyses to evaluate whether the verification tasks meet the expected goals. It helps engineers and design teams understand the verification results and improve the design.

[0076] The system internally maintains a verification method tool library, which contains various verification methods, such as cocotb verification, uvm verification, formal verification methods, etc., as well as information on verification environments and tools. This information includes the characteristics of verification methods: for each verification method, record its core characteristics, such as simulation-based, formal verification methods, etc. Describe the advantages and limitations of each method. Applicable scenarios: for each verification method, clearly mark the scenarios where it is applicable. For example, which methods are more suitable for verifying high-speed data communication, and which methods are more suitable for verifying low-power circuits, etc. This will help select the appropriate method according to the design requirements and verification goals. Verification tool information: for each verification tool, provide detailed information. This includes the name, version, vendor information of the tool, as well as its compatibility with other tools. The information in the library supports updates and expansions. It is organized and managed using documentation and databases to ensure that the information in the library is accurate, complete, easy to search, and update.

[0077] The entire verification process is as Figure 4 shown. First, collect the requirements of the verification task, including verification goals, verification time, etc. Then, based on the collected requirements, analyze the verification task, decompose the verification task, and determine the verification levels, priorities, etc. of each task flow. Next, evaluate and select appropriate verification methods and tools, considering the characteristics of the verification task and system resources, as well as factors such as the availability, efficiency, and cost of the verification tools. After selecting the verification methods and tools, improve the corresponding verification environment, including verification models, test platforms, and verification scripts, etc. Then, execute the verification task, run the simulation, and generate a verification report. Analyze and evaluate the verification results to determine whether they meet the expectations, discover potential problems and perform debugging and improvement. If the verification results meet the expectations, generate a verification report. If the verification results do not meet the expectations, re-evaluate the verification methods and tools, adjust and improve the verification strategy, and re-execute the verification task.

[0078] In specific implementation, the present application provides a computer storage medium and a corresponding data processing unit. Among them, the computer storage medium can store a computer program, and when the computer program is executed by the data processing unit, it can run the content of the invention of a task flow-based SoC chip verification automation system and some or all of the steps in the embodiments. The storage medium can be a magnetic disk, an optical disc, a read-only memory (ROM), a random access memory (RAM), etc.

[0079] Those skilled in the art can clearly understand that the technical solutions in the embodiments of the present invention can be implemented by means of a computer program and its corresponding general hardware platform. Based on such an understanding, the essence of the technical solutions in the embodiments of the present invention, or the part that contributes to the prior art, can be embodied in the form of a computer program, that is, a software product. The computer program software product can be stored in a storage medium, including several instructions to enable a device including a data processing unit (which can be a personal computer, a server, a single-chip microcomputer, a MUU or a network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of the present invention.

[0080] The present invention provides an idea and method for an automated verification system of an SoC chip based on a task flow. There are many methods and ways to specifically implement this technical solution. The above description is only the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention. Each component not clearly defined in this embodiment can be implemented by the prior art.

Claims

1. An automated verification system for SoC chips based on a task flow, characterized in that Including: A task flow management module, an automatic evaluation and selection module, an automatic execution module, a real-time optimization and adjustment module, a result analysis and report generation module, and a verification method tool library; among which: The task flow management module is used to convert the SoC chip verification task into a task flow, manage the task flow, and send the task flow to the automatic execution module in the form of instructions; The automatic evaluation and selection module is used to make decisions and selections for each converted task flow to form an optimal combination of verification methods and verification tools, and send the selection result to the automatic execution module in the form of instructions; The automatic execution module is used to start the corresponding verification tool or verification environment according to the instructions of the task flow management module and the automatic evaluation and selection module to complete the execution of the task flow; The real-time optimization and adjustment module performs real-time optimization and adjustment during the execution of the task flow; The result analysis and report generation module is used to analyze and summarize the verification results of the SoC chip verification task and generate a verification report; The verification method tool library contains different verification methods, verification environments, and verification tools, and records their relevant information.

2. The automated verification system for a SoC chip based on a task flow according to claim 1, wherein In the task flow management module, converting the SoC chip verification task into a task flow specifically includes: Task decomposition: decomposing the SoC chip verification task into a series of verification subtasks; Defining the task flow: arranging the execution order and execution dependency relationship for the above verification subtasks according to the constraint conditions to form a task flow; Custom interface: manually customizing the formed task flow.

3. The automated verification system for a SoC chip based on a task flow according to claim 2, wherein In the task flow management module, managing the task flow specifically includes: task flow scheduling and task flow monitoring.

4. An automated verification system for a SoC chip based on a task flow according to claim 3, characterized in that, The task flow scheduling specifically includes: forming an execution instruction for the converted task flow and sending it to the automatic execution module.

5. The automated verification system for SoC chips based on a task flow according to claim 4, characterized in that, The task flow monitoring specifically includes: tracking the status of each task flow and each subtask in the task flow, recording the execution progress and logs, and sending the recorded results to the result analysis and report generation module.

6. The automated verification system for SoC chips based on a task flow according to claim 5, characterized in that, In the automatic evaluation and selection module, the specific methods for decision-making and selection include: Constructing a verification rule set, that is, setting verification rules according to the levels of verification tasks; Setting evaluation indicators for the verification methods or verification tools corresponding to the verification rules; For each subtask in the task flow, according to its verification rules, calculating the comprehensive scores of all verification methods or verification tools through the evaluation indicators, selecting the verification method and verification tool with the highest score, and performing the verification task; Combining the verification methods and verification tools of all subtasks in the task flow to obtain the verification methods and verification tools of the task flow.

7. The automated verification system for SoC chips based on a task flow according to claim 6, characterized in that, In the automatic evaluation and selection module, constructing the verification rule set specifically includes: Dividing the verification tasks into: system-level verification, module-level verification, and connection layer verification; Among them, the verification rules for system-level verification at least include: function verification rules, performance verification rules, reliability verification rules; The verification rules for module-level verification at least include: function verification rules, boundary condition verification rules, error handling verification rules; The verification rules for the connection layer verification include at least: connection integrity verification rules, interface consistency verification rules, and data transmission verification rules; In addition, each of the above three levels includes at least: integrated compatibility usage rules and resource utilization rules.

8. An automated verification system for a SoC chip based on a task flow according to claim 7, characterized in that, In the described automatic evaluation and selection module, evaluation metrics are set, and the specific methods include: Evaluation metric for the function verification rules: Use the function coverage rate of a specific verification method or tool as the evaluation metric; Evaluation metric for the interface verification rules: If a specific verification method or tool can verify whether the interfaces of a module with other modules or systems are consistent, it gets full marks, otherwise it gets zero marks; Evaluation metric for the performance verification rules: If a specific verification method or tool supports testing the core performance of the processor, it gets full marks, otherwise it gets zero marks; Evaluation metric for the boundary condition verification rules: Sort the number of test stimuli under the created boundary conditions according to a specific verification method or tool, and score according to the ranking; Evaluation metric for the error handling verification rules: Sort the number of test stimuli in the created abnormal scenarios according to a specific verification method or tool, and score according to the ranking; Evaluation metric for the integrated compatibility usage rules: Sort the number of other verification methods or tools compatible with a specific verification method or tool, and score according to the ranking; Evaluation metric for the resource utilization rules: Sort the verification time and the number of personnel spent by a specific verification method or tool when performing verification tasks, and score according to the ranking; Evaluation metric for the connection integrity verification rules: Sort according to the number of interfaces covered by the verification method or tool, and score according to the ranking; Evaluation metric for the interface consistency verification rules: Sort according to the number of protocols and data formats supported by the verification method or tool, and score according to the ranking; And the evaluation metric for the data transmission verification rules: If a specific verification method or tool supports the dynamic transmission of data on the interface, it gets full marks, otherwise it gets zero marks.

9. The automated verification system for a task-flow-based SoC chip according to claim 8, wherein In the described real-time optimization and adjustment module, optimization and adjustment are performed in real time, specifically including: Based on the results of the verification task, determine whether to perform optimization and adjustment. If so, notify the task flow management module or the automatic evaluation and selection module to re-adjust the task flow or re-select the verification method or tool, and re-execute the verification task.

10. The automated system for verifying an SoC chip based on a task flow according to claim 9, wherein The described verification method tool library includes at least: cocotb verification method, uvm verification method, and formal verification method.

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