Method for Processing Working State of Timestamp Counter, Electronic Device, and Program Product

Abstract

The present application discloses a working state processing method of a timestamp counter, an electronic device and a program product, which relate to the field of computer technology. Based on dividing a preset number of target processor cores from multiple processor cores of a processor, the target processor cores are isolated, a target task is bound to the target processor core, and an interrupt shielding process is performed on the target processor core, so that the target processor core is not affected by hardware interrupts or the operating states of other processor cores in the processor. Furthermore, when the target processor core processes the target task according to the target working state, the working state of the timestamp counter is monitored based on multiple count values of the timestamp counter in the target processor core, so that the working state of the timestamp counter matches the target working state, thereby solving the problem of inaccurate count values collected by the timestamp counter in the related art.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method for processing the working status of a timestamp counter, an electronic device, and a program product. Background Art

[0002] Currently, when a processor executes a process related to a task, the execution time of the processor core executing the task is determined based on the count value collected by the timestamp counter, and then the resources occupied by the processor core when executing the task are determined according to the execution time.

[0003] However, the working state of the timestamp counter is often affected by hardware interrupts or the running states of other processor cores in the processor, which leads to inaccurate count values collected by the timestamp counter. Summary of the Invention

[0004] The present application provides a method for processing the working status of a timestamp counter, an electronic device, and a program product, so as to at least solve the problem of inaccurate count values collected by a timestamp counter in the related art.

[0005] This application provides a method for processing the working status of a timestamp counter, including:

[0006] A preset number of target processor cores are divided from multiple processor cores of a processor; the target processor cores are isolated by calling a preset isolation instruction, so that the target processor cores are removed from the task scheduler of the operating system; the target task is bound to the target processor core by calling a preset binding instruction; the target processor core is interrupt-shielded by calling a preset shielding instruction; the target working state of the target processor core is determined according to the target task; in the process of the target processor core processing the target task according to the target working state, multiple count values of the timestamp counter in the target processor core are collected; based on the multiple count values, whether the working state of the timestamp counter matches the target working state is monitored; if the working state of the timestamp counter does not match the target working state, the step of dividing the preset number of target processor cores from the multiple processor cores of the processor is re-executed until the working state of the timestamp counter matches the target working state.

[0007] The present application also provides a working status processing device of a timestamp counter, comprising:

[0008] A partitioning module, configured to partition a preset number of target processor cores from a plurality of processor cores of a processor;

[0009] The first processing module is configured to isolate the target processor core by calling a preset isolation instruction, so that the target processor core is removed from the task scheduler of the operating system; bind the target task to the target processor core by calling a preset binding instruction; and perform interrupt shielding processing on the target processor core by calling a preset shielding instruction;

[0010] The second processing module is used to determine the target working state of the target processor core according to the target task; when the target processor core processes the target task according to the target working state, collect multiple count values of the timestamp counter in the target processor core; monitor whether the working state of the timestamp counter matches the target working state based on the multiple count values; if the working state of the timestamp counter does not match the target working state, re-execute the step of dividing a preset number of target processor cores from the multiple processor cores of the processor until the working state of the timestamp counter matches the target working state.

[0011] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned methods for processing the working status of a timestamp counter when executing the computer program.

[0012] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for processing the working status of a timestamp counter are implemented.

[0013] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned methods for processing the working status of a timestamp counter when the computer program is executed by a processor.

[0014] Through the working status processing method, electronic device and program product of the timestamp counter provided in the present application, on the basis of dividing a preset number of target processor cores from multiple processor cores of the processor, by isolating the target processor core, binding the target task to the target processor core, and interrupt shielding the target processor core, the target processor core is not affected by hardware interrupts or the operating status of other processor cores in the processor. Then, in the process of the target processor core processing the target task according to the target working status, based on the multiple count values of the timestamp counter in the target processor core collected, whether the working status of the timestamp counter matches the target working status is monitored, and the working status of the timestamp counter is matched with the target working status, which solves the problem of inaccurate count values collected by the timestamp counter in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0016] Figure 1 Schematic diagram of the working state processing method of the timestamp counter provided in the embodiment of the present application Figure 1 ;

[0017] Figure 2 Schematic diagram of the working state processing method of the timestamp counter provided in the embodiment of the present application Figure 2 ;

[0018] Figure 3 A schematic diagram of the structure of a working status processing device for a timestamp counter provided in an embodiment of the present application;

[0019] Figure 4 This is a schematic diagram of the structure of the electronic device provided in this application. DETAILED DESCRIPTION

[0020] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0021] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0022] Currently, when a processor executes a process related to a task, the execution time of the processor core executing the task is determined based on the count value collected by the timestamp counter, and then the resources occupied by the processor core when executing the task are determined according to the execution time.

[0023] However, the working state of the timestamp counter is often affected by hardware interrupts or the running states of other processor cores in the processor, which leads to inaccurate count values collected by the timestamp counter.

[0024] In order to solve the above technical problems, the embodiments of the present application propose the following technical concepts:

[0025] On the basis of dividing a preset number of target processor cores from multiple processor cores of the processor, by isolating the target processor core, binding the target task to the target processor core, and interrupt shielding the target processor core, the target processor core is not affected by hardware interrupts or the operating status of other processor cores in the processor. Then, in the process of the target processor core processing the target task according to the target working status, based on the multiple count values of the timestamp counter in the target processor core collected, whether the working status of the timestamp counter matches the target working status is monitored, and the working status of the timestamp counter matches the target working status, thereby ensuring the accuracy of the count values collected based on the timestamp counter, that is, solving the problem of inaccurate count values collected based on the timestamp counter in the related art.

[0026] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0027] Figure 1 Schematic diagram of the working state processing method of the timestamp counter provided in the embodiment of the present application Figure 1 ,like Figure 1 As shown, the embodiment of the present application provides a method for processing the working status of a timestamp counter. The execution subject can be any form of electronic device. The method is described in detail as follows:

[0028] Step S101: a preset number of target processor cores are divided from a plurality of processor cores of a processor.

[0029] Exemplarily, the preset number may be determined based on the tasks performed by the electronic device during operation, or may be a manually input value; and then based on the preset number, a corresponding number of target processor cores are divided from the multiple processor cores of the processor.

[0030] Specifically, the specific implementation steps of step S101 include:

[0031] Step S1011: Determine the task complexity of the target task.

[0032] Step S1012: If the task complexity of the target task is greater than or equal to the preset complexity limit, the target processor cores are divided from the multiple processor cores of the processor according to a first preset number.

[0033] Step S1013: if the task complexity of the target task is less than the preset complexity limit, dividing the target processor cores from the multiple processor cores of the processor according to a second preset number, wherein the first preset number is greater than the second preset number.

[0034] Exemplarily, based on the target task to be run in the target processor core, the task complexity of the target task is determined; then, by judging the relationship between the task complexity and the preset complexity limit, a corresponding preset number is determined, and based on the corresponding preset number, the target processor cores are divided from the multiple processor cores of the processor. Specifically, if the task complexity of the target task is greater than or equal to the preset complexity limit, the target processor cores are divided from the multiple processor cores of the processor according to a first preset number; if the task complexity of the target task is less than the preset complexity limit, the target processor cores are divided from the multiple processor cores of the processor according to a second preset number; wherein the first preset number is greater than the second preset number.

[0035] In a possible implementation, the target task includes multiple target subtasks. The specific implementation steps of step S1011 include:

[0036] Step S10111: Obtain the task quantity of the target subtask.

[0037] Step S10112: Determine the task complexity of the target task based on the number of tasks of the target subtasks.

[0038] In this embodiment, the number of tasks of the target subtask can be the cumulative total number in a preset execution cycle of the processor, or the number of tasks of the target subtask can be obtained by dividing the preset execution cycle of the processor into at least two execution sub-cycles, obtaining the number of periodic tasks of the target subtask corresponding to each execution sub-cycle, and then determining the maximum number of periodic tasks among the number of periodic tasks as the number of tasks of the target subtask. Furthermore, the task complexity of the target task can be determined based on the number of tasks of the target subtask.

[0039] In another possible implementation, the target task includes multiple target subtasks, and the specific implementation steps of step S1011 include:

[0040] Step S1011a: Obtain the execution time of each target subtask.

[0041] Step S1011b: Obtain the execution time of each common subtask other than the target subtask.

[0042] Step S1011c: Divide the preset execution cycle of the processor into multiple execution cycles according to the execution time of each target subtask and the execution time of each common subtask.

[0043] Exemplarily, the execution time of each target subtask includes gtime_1_1, gtime_1_2, gtime_1_3, gtime_2_1, gtime_3_1, gtime_3_2, and gtime_4_1, and the execution time of each ordinary subtask includes ptime_1_1, ptime_1_2, ptime_2_1, ptime_2_2, and ptime_3_1; furthermore, based on the execution time of each target subtask and the execution time of each ordinary subtask, the preset execution cycle of the processor is divided into four execution cycles.

[0044] Step S1011d: for each execution cycle, determine the target task quantity of the corresponding target subtask and the ordinary task quantity of the ordinary subtask within the execution cycle.

[0045] For example, based on the execution time of each target subtask and the execution time of each ordinary subtask shown in step S1011c, for each execution cycle, the target task number of the corresponding target subtask and the ordinary task number of the ordinary subtask are determined within one execution cycle, as shown in Table 1.

[0046] Table 1

[0047]

[0048] Specifically, in the first execution cycle, the target task number of the target subtask is 3, and the ordinary task number of the ordinary subtask is 1, wherein the execution time corresponding to each target subtask is gtime_1_1, gtime_1_2, and gtime_1_3, and the execution time corresponding to each ordinary subtask is ptime_1_1; in the second execution cycle, the target task number of the target subtask is 1, and the ordinary task number of the ordinary subtask is 3, wherein the execution time corresponding to each target subtask is gtime_2_1, and the execution time corresponding to each ordinary subtask is ptime_1_1. time_1_2, ptime_2_1, ptime_2_2; in the third execution cycle, the target task number of the target subtask is 2, and the ordinary task number of the ordinary subtask is 1, among which the execution time corresponding to each target subtask is gtime_3_1, gtime_3_2, and the execution time corresponding to each ordinary subtask is ptime_3_1; in the fourth execution cycle, the target task number of the target subtask is 1, and the ordinary task number of the ordinary subtask is 0, among which the execution time corresponding to each target subtask is gtime_4_1.

[0049] Step S1011e: Determine the task complexity of the target task based on the number of target tasks and the number of common tasks.

[0050] For example, for each execution cycle, the task complexity of the target task of the corresponding execution cycle is determined based on the number of target tasks and the number of ordinary tasks within the execution cycle. Specifically, for example, based on the number of target tasks and the number of ordinary tasks for each execution cycle in Table 1, the task complexity data_1 of the target task for the first execution cycle, the task complexity data_2 of the target task for the second execution cycle, the task complexity data_3 of the target task for the third execution cycle, and the task complexity data_4 of the target task for the fourth execution cycle are obtained.

[0051] Accordingly, based on the task complexity of the target task corresponding to each execution cycle, the task complexity is compared with the size relationship of the preset complexity limit to determine the preset number corresponding to each execution cycle. Then, according to the preset number under each execution cycle, the target processor core is divided from the multiple processor cores of the processor.

[0052] In the steps of this embodiment, by dividing the preset execution cycle of the processor into multiple execution cycles, the task complexity of the target task under each execution cycle is obtained, and then the preset number corresponding to each execution cycle is obtained; dynamic adjustment of processor resources is achieved, that is, when processing the target subtask (or, target task), the situation where the number of target processor cores is insufficient but there are idle processor cores in the processor is avoided, or when processing ordinary subtasks, the situation where the number of non-target processor cores in the processor is insufficient but the target processor core is in an idle state is avoided.

[0053] In another possible implementation method, the specific implementation steps of step S1011 include: inputting the target task into a pre-trained large language model, the large language model selects the corresponding pre-trained parsing logic based on at least one preset logical prompt word, analyzes the task complexity of the target task, and then outputs the task complexity of the target task.

[0054] Step S102: performing isolation processing on the target processor core by calling a preset isolation instruction, so that the target processor core is removed from the task scheduler of the operating system.

[0055] Exemplarily, the preset isolation instruction includes the isolcpus parameter provided by the Linux operating system. By isolating the target processor core, the target processor core is removed from the task scheduler of the operating system, thereby preventing the target processor core from being automatically assigned tasks by the task scheduler.

[0056] Step S103: Bind the target task to the target processor core by calling a preset binding instruction.

[0057] For example, the preset binding instruction includes a taskset command provided by the Linux operating system. By calling the preset binding instruction, the target task can be bound to the target processor core.

[0058] Step S104: performing interrupt masking processing on the target processor core by calling a preset masking instruction.

[0059] For example, the masking instruction includes an instruction generated based on the SMP IRQ Affinity technology provided by the Linux operating system. By performing interrupt masking processing on the target processor core, the target processor core is prevented from executing hardware interrupt tasks, thereby achieving immunity from hardware interrupt interference.

[0060] It can be understood that the embodiment of the present application does not limit the execution order of steps S102, S103 and step S104, that is, steps S102 and S103 can be executed first, and then step S104, or step S104 can be executed first, and then steps S102 and S103.

[0061] Step S105: Determine the target working state of the target processor core according to the target task.

[0062] Exemplarily, the working state of the target processor core includes a normal performance state, a power-saving state, a high-frequency state, and a special instruction optimization state; furthermore, the target working state of the target processor core can be determined based on the task information of the target task.

[0063] Furthermore, after step S105, the method provided in the embodiment of the present application further includes:

[0064] Step S10A: Acquire the current working status of the target processor core.

[0065] Step S10B: Determine whether the current working state of the target processor core is the target working state.

[0066] Step S10C: If the current working state of the target processor core is the target working state, execute step S106.

[0067] Step S10D: If the current working state of the target processor core is not the target working state, then after the current working state of the target processor core is changed to the target working state, step S106 is executed.

[0068] Step S10E: If the current working state of the target processor core cannot be changed to the target working state, step S101 is re-executed until the current working state of the target processor core is the target working state, and then step S106 is executed.

[0069] The steps of the embodiment of the present application are to determine whether the current working state of the target processor core is the target working state before executing step S106, so as to ensure that the target processor core is in the target working state when executing step S106, thereby ensuring the accuracy of the count value collected by the timestamp counter.

[0070] The steps of the embodiment of the present application realize that when the target processor core is not executing the target task, the target processor core is in an energy-saving state. When the target processor core is executing the target task, the target processor core is changed to a target working state, thereby not only ensuring the accuracy of the count value collected by the timestamp counter when the target processor core is executing the target task, but also reducing energy consumption when the target processor core is not executing the target task.

[0071] Step S106: while the target processor core is processing the target task according to the target working state, a plurality of count values of the timestamp counter in the target processor core are collected.

[0072] Exemplarily, the target task includes a collection instruction for collecting the count value of the timestamp counter in the target processor core; furthermore, in the process of the target processor core processing the target task according to the target working state, multiple count values of the timestamp counter in the target processor core can be collected.

[0073] In one possible implementation, before step S106, the method provided in the embodiment of the present application further includes:

[0074] Step S106A: Obtain the task execution start time of the target task.

[0075] Step S106B: Determine the corresponding first test task according to the target task.

[0076] Exemplarily, the corresponding first test task is determined based on the target working state of the target processor core determined by the target task, that is, when the target processor core processes the first test task, the working state of the target processor core is the target working state.

[0077] Step S106C: before the task execution start time of the target task, control the target processor core to process the first test task according to the target working state, and collect multiple first test count values of the timestamp counter in the target processor core.

[0078] Step S106D: monitoring whether the working state of the timestamp counter matches the target working state according to the plurality of first test count values.

[0079] Step S106E: If the working state of the timestamp counter matches the target working state, execute step S106.

[0080] Step S106F: If the working state of the timestamp counter does not match the target working state, step S101 is re-executed until the working state of the timestamp counter matches the target working state, and then step S106 is executed.

[0081] For example, based on the multiple first test count values, multiple test durations are obtained when the target processor core processes the first test task according to the target operating state. Furthermore, based on the degree of dispersion between the multiple test durations and the test duration threshold, it is determined whether the operating state of the timestamp counter matches the target operating state. If so, step S106 and subsequent steps are executed. If not, step S101 is re-executed until the operating state of the timestamp counter matches the target operating state, and then step S106 and subsequent steps are executed.

[0082] In the steps of this embodiment, by obtaining the task execution start time of the target task, and then before the task execution start time, by controlling the target processor core to process the first test task according to the target working state, it is possible to determine whether the working state of the timestamp counter matches the target working state; through responsive test judgment, it is possible to verify the working state of the timestamp counter before the target processor core processes the target task according to the target working state, thereby ensuring the accuracy of the count value collected by the timestamp counter when the target processor core executes the target task, and also realizing that when the target processor core is not executing the target task, the working state of the timestamp counter can be any state, for example, when the target processor core is in an energy-saving state, the working state of the timestamp counter also corresponds to the energy-saving state synchronously, thereby reducing energy consumption.

[0083] Step S107: monitoring whether the working state of the timestamp counter matches the target working state according to the multiple count values.

[0084] Specifically, the specific implementation steps of step S107 include:

[0085] Step S1071: Obtain multiple execution durations of the target task according to the multiple count values.

[0086] Exemplarily, based on the multiple count values, multiple execution times of the target processor core in the process of processing the target task according to the target working state are obtained.

[0087] Step S1072: Determine a preset duration threshold according to the target task.

[0088] Exemplarily, different tasks correspond to different execution times, and a matching preset time threshold is determined based on the task information of the target task.

[0089] Step S1073: monitoring whether the working state of the timestamp counter matches the target working state according to the multiple execution time periods and the preset time period threshold.

[0090] For example, whether the working state of the timestamp counter matches the target working state can be monitored based on the degree of dispersion between the multiple execution times and the preset time threshold. Specifically, if the degree of dispersion between the multiple execution times and the preset time threshold is large, the working state of the timestamp counter does not match the target working state. If the degree of dispersion between the multiple execution times and the preset time threshold is small, the working state of the timestamp counter matches the target working state.

[0091] Furthermore, the specific implementation steps of step S1073 include:

[0092] Step S10731: Generate a duration variance based on multiple execution durations and a preset duration threshold.

[0093] Specifically, based on multiple execution times and preset time thresholds, a calculation formula for time variance is generated, as shown in formula (1):

[0094] (1)

[0095] in, is the duration variance, is the number of execution times, For the Execution time, The preset duration threshold.

[0096] Step S10732: Based on the relationship between the duration variance and the preset variance threshold, monitor whether the working state of the timestamp counter matches the target working state.

[0097] For example, if the duration variance is greater than a preset variance threshold, the operating state of the timestamp counter does not match the target operating state; if the duration variance is less than or equal to the preset variance threshold, the operating state of the timestamp counter matches the target operating state. It is understood that the smaller the duration variance, the smaller the degree of dispersion between the multiple execution durations and the preset duration threshold, and the larger the duration variance, the greater the degree of dispersion between the multiple execution durations and the preset duration threshold.

[0098] Step S108: If the working state of the timestamp counter matches the target working state, the target processor core is enabled to continue processing the target task according to the target working state.

[0099] Illustratively, when the working state of the timestamp counter matches the target working state, the target processor core can continue to process the target task according to the target working state.

[0100] Furthermore, during the continued processing, based on the preset duration, the process returns to step S106 and subsequent steps to periodically monitor whether the working state of the timestamp counter matches the target working state.

[0101] Step S109: If the working state of the timestamp counter does not match the target working state, step S101 is re-executed until the working state of the timestamp counter matches the target working state.

[0102] For example, if the working state of the timestamp counter does not match the target working state, it indicates that the current target processor core cannot meet the requirements of executing the target task, and step S101 is re-executed until the working state of the timestamp counter matches the target working state.

[0103] In this embodiment, on the basis of dividing a preset number of target processor cores from multiple processor cores of the processor, the target processor core is isolated, the target task is bound to the target processor core, and the target processor core is interrupt-shielded, so that the target processor core is not affected by hardware interrupts or the operating status of other processor cores in the processor. In the process of the target processor core processing the target task according to the target working status, based on the multiple count values of the timestamp counter in the target processor core collected, whether the working status of the timestamp counter matches the target working status is monitored, and the working status of the timestamp counter matches the target working status, thereby ensuring the accuracy of the count values collected based on the timestamp counter, that is, solving the problem of inaccurate count values collected based on the timestamp counter in the related art.

[0104] Furthermore, the method provided in the embodiment of the present application also includes:

[0105] Step S110: After the target processor core completes processing the target task, a count value at the start time and a count value at the completion time are obtained.

[0106] Step S111: Outputting the processing time required to complete the target task based on the count value at the start time and the count value at the completion time.

[0107] Exemplarily, after the target processor core completes processing of the target task, a count value at the start time and a count value at the completion time when the target processor core processes the target task are acquired.

[0108] Furthermore, based on the count value at the start time, the count value at the completion time, and the clock cycle corresponding to the target processor core, the processing time for the target processor core to complete processing the target task can be obtained and output.

[0109] Figure 2Schematic diagram of the working state processing method of the timestamp counter provided in the embodiment of the present application Figure 2 In the embodiment of the present application, Figure 1 The following are detailed descriptions based on the examples provided. Figure 2 As shown, the method includes:

[0110] Step S201: a preset number of target processor cores are divided from a plurality of processor cores of a processor.

[0111] Step S202: performing isolation processing on the target processor core by calling a preset isolation instruction, so that the target processor core is removed from the task scheduler of the operating system.

[0112] Step S203: Bind the target task to the target processor core by calling a preset binding instruction.

[0113] Step S204: performing interrupt masking processing on the target processor core by calling a preset masking instruction, so that the target processor core does not execute the hardware interrupt task.

[0114] Step S205: Determine the target working state of the target processor core according to the target task.

[0115] Step S206: Determine the idle time of each target processor core.

[0116] Specifically, the specific implementation steps of step S206 include:

[0117] Step S2061: Obtain the execution time of the target task and the preset execution cycle of the target processor core.

[0118] Step S2062: Filter and determine the idle times of the target processor core from the preset execution cycle of the target processor core according to the execution time of the target task.

[0119] Exemplarily, the execution time of the target task includes time_2 and time_3, and the preset execution cycle of the target processor core includes time_1, time_2, time_3, time_4 and time_5; further, based on the execution time time_2 and time_3 of the target task, the idle times of the target processor core are screened and determined from the preset execution cycle of the target processor core, including time_1, time_4 and time_5.

[0120] Step S207: selecting one or more idle times from the idle times and determining them as test times.

[0121] Exemplarily, the idle times of the target processor core include time_1, time_4, and time_5, and time_1 and time_4 are determined as test times.

[0122] Step S208: At each test time, determine the corresponding second test task according to the target task.

[0123] Illustratively, at test time time_1, the corresponding second test task is determined based on the target working state of the target processor core determined by the target task, that is, when the target processor core processes the second test task, the working state of the target processor core is the target working state.

[0124] Step S209: controlling the target processor core to process the second test task according to the target working state, and collecting a plurality of second test count values of the timestamp counter in the target processor core.

[0125] Step S210: monitoring whether the working state of the timestamp counter matches the target working state according to the plurality of second test count values.

[0126] Step S211: If the working state of the timestamp counter matches the target working state, the working state of the timestamp counter remains unchanged.

[0127] Step S212: If the working state of the timestamp counter does not match the target working state, repeat step S201 until the working state of the timestamp counter matches the target working state.

[0128] For example, based on the multiple second test count values, multiple test durations are obtained when the target processor core processes the second test task according to the target operating state. Furthermore, based on the degree of dispersion between the multiple test durations and the test duration threshold, it is determined whether the operating state of the timestamp counter matches the target operating state. If so, the operating state of the timestamp counter remains unchanged. If not, step S201 is re-executed until the operating state of the timestamp counter matches the target operating state, thereby maintaining the operating state of the timestamp counter unchanged.

[0129] In the steps of this embodiment, based on determining the idle time of the target processor core, the test time of the target processor core is determined, and then during the test time, the working state of the timestamp counter is monitored to see whether it matches the target working state; the working state of the timestamp counter is monitored regularly, and the working state of the timestamp counter is kept unchanged at the target working state; and then when the target processor core processes the target task according to the target working state, it is optionally not necessary to calibrate the working state of the timestamp counter before the target processor core starts processing the target task according to the target working state, thereby improving the processing efficiency of the target processor core in processing the target task according to the target working state.

[0130] It is understandable that when the target processor core processes the target task according to the target working state, the working state of the timestamp counter can optionally be calibrated before the target processor core starts processing the target task according to the target working state to ensure the accuracy of the count value collected by the timestamp counter.

[0131] It can be understood that the test time when the target processor core processes the second test task according to the target working state can be before the target processor core starts processing the target task according to the target working state, for example, at test time time_1; it can also be after the target processor core completes processing the target task according to the target working state, for example, at test time time_4.

[0132] Step S213: while the target processor core is processing the target task according to the target working state, a plurality of count values of the timestamp counter in the target processor core are collected.

[0133] Step S214: monitoring whether the working state of the timestamp counter matches the target working state according to the multiple count values.

[0134] Step S215: If the working state of the timestamp counter matches the target working state, the target processor core is enabled to continue processing the target task according to the target working state.

[0135] Step S216: If the working state of the timestamp counter does not match the target working state, step S201 is re-executed until the working state of the timestamp counter matches the target working state.

[0136] In this embodiment, the implementation of steps S201 to S205 is the same as that of the present application. Figure 1 The implementation of steps S101 to S105 in the embodiment shown is the same, and the implementation of steps S213 to S216 is the same as that of the present application. Figure 1 The implementation methods of steps S106 to S109 in the illustrated embodiment are the same and will not be described in detail here.

[0137] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0138] Figure 3 This is a schematic diagram of the structure of the working status processing device of the timestamp counter provided in the embodiment of the present application. Figure 3 As shown, the embodiment of the present application further provides a working state processing device 3 of a timestamp counter, comprising:

[0139] A partitioning module 31 is configured to partition a preset number of target processor cores from a plurality of processor cores of a processor;

[0140] The first processing module 32 is configured to isolate the target processor core by calling a preset isolation instruction, thereby removing the target processor core from the task scheduler of the operating system; bind the target task to the target processor core by calling a preset binding instruction; and perform interrupt shielding processing on the target processor core by calling a preset shielding instruction;

[0141] The second processing module 33 is used to determine the target working state of the target processor core according to the target task; in the process of the target processor core processing the target task according to the target working state, collect multiple count values of the timestamp counter in the target processor core; monitor whether the working state of the timestamp counter matches the target working state based on the multiple count values; if the working state of the timestamp counter does not match the target working state, re-execute the step of dividing a preset number of target processor cores from the multiple processor cores of the processor until the working state of the timestamp counter matches the target working state.

[0142] In one possible implementation, when the second processing module 33 monitors whether the working state of the timestamp counter matches the target working state based on multiple count values, it is specifically used to: obtain multiple execution times of the target task based on multiple count values; determine a preset time threshold based on the target task; and monitor whether the working state of the timestamp counter matches the target working state based on multiple execution times and the preset time threshold.

[0143] In one possible implementation, when the second processing module 33 monitors whether the working state of the timestamp counter matches the target working state based on multiple execution times and preset time thresholds, it is specifically used to: generate a time variance based on multiple execution times and preset time thresholds; and monitor whether the working state of the timestamp counter matches the target working state based on the size relationship between the time variance and the preset variance threshold.

[0144] In one possible implementation, a calculation formula for duration variance is generated based on multiple execution durations and a preset duration threshold, as follows:

[0145]

[0146] in, is the duration variance, is the number of execution times, For the Execution time, The preset duration threshold.

[0147] In one possible implementation, when the partitioning module 31 partitions a preset number of target processor cores from multiple processor cores of a processor, it is specifically used to: determine the task complexity of the target task; if the task complexity of the target task is greater than or equal to the preset complexity limit, partition the target processor cores from the multiple processor cores of the processor according to a first preset number; if the task complexity of the target task is less than the preset complexity limit, partition the target processor cores from the multiple processor cores of the processor according to a second preset number; wherein the first preset number is greater than the second preset number.

[0148] In one possible implementation, the target task includes multiple target subtasks; accordingly, when determining the task complexity of the target task, the division module 31 is specifically used to: obtain the execution time of each target subtask; obtain the execution time of each ordinary subtask other than the target subtask; divide the preset execution cycle of the processor into multiple execution cycles according to the execution time of each target subtask and the execution time of each ordinary subtask; for each execution cycle, determine the target task number of the corresponding target subtask and the ordinary task number of the ordinary subtask within one execution cycle; determine the task complexity of the target task according to the target task number and the ordinary task number.

[0149] In a possible implementation, the target task includes multiple target subtasks; accordingly, when determining the task complexity of the target task, the division module 31 is specifically used to: obtain the number of tasks of the target subtasks; and determine the task complexity of the target task based on the number of tasks of the target subtasks.

[0150] In one possible implementation, after determining the target working state of the target processor core according to the target task, the working state processing device 3 of the timestamp counter is further used to: obtain the current working state of the target processor core; determine whether the current working state of the target processor core is the target working state; if the current working state of the target processor core is the target working state, execute the step of collecting multiple count values of the timestamp counter in the target processor core during the process of the target processor core processing the target task according to the target working state; if the current working state of the target processor core is not the target working state, then after changing the current working state of the target processor core to the target working state, execute the step of collecting multiple count values of the timestamp counter in the target processor core during the process of the target processor core processing the target task according to the target working state; if the current working state of the target processor core cannot be changed to the target working state, re-execute the step of dividing a preset number of target processor cores from the multiple processor cores of the processor until the current working state of the target processor core is the target working state, and then execute the step of collecting multiple count values of the timestamp counter in the target processor core during the process of the target processor core processing the target task according to the target working state.

[0151] In one possible implementation, in the process of the target processor core processing the target task according to the target working state, before collecting multiple count values of the timestamp counter in the target processor core, the working state processing device 3 of the timestamp counter is also used to: obtain the task execution start time of the target task; determine the corresponding first test task according to the target task; before the task execution start time of the target task, control the target processor core to process the first test task according to the target working state, and collect multiple first test count values of the timestamp counter in the target processor core; monitor whether the working state of the timestamp counter matches the target working state based on the multiple first test count values; if the working state of the timestamp counter does not match the target working state, re-execute the step of dividing a preset number of target processor cores from the multiple processor cores of the processor until the working state of the timestamp counter matches the target working state.

[0152] In one possible implementation, after determining the target working state of the target processor core according to the target task, the working state processing device 3 of the timestamp counter is also used to: determine the idle times of the target processor core; select one or more idle times from each idle time and determine them as test time; at each test time, determine the corresponding second test task according to the target task; control the target processor core to process the second test task according to the target working state, and collect multiple second test count values of the timestamp counter in the target processor core; monitor whether the working state of the timestamp counter matches the target working state based on the multiple second test count values; if the working state of the timestamp counter does not match the target working state, re-execute the step of dividing a preset number of target processor cores from the multiple processor cores of the processor until the working state of the timestamp counter matches the target working state.

[0153] In one possible implementation, the working status processing device 3 of the timestamp counter is specifically used to: obtain the execution time of the target task and the preset execution cycle of the target processor core when determining the idle times of the target processor core; and screen and determine the idle times of the target processor core from the preset execution cycle of the target processor core according to the execution time of the target task.

[0154] In one possible implementation, the working status processing device 3 of the timestamp counter is also used to: obtain the count value at the start time and the count value at the completion time after the target processor core completes the target task; and output the processing time for completing the processing of the target task based on the count value at the start time and the count value at the completion time.

[0155] For the description of the features in the embodiment corresponding to the working state processing device 3 of the timestamp counter, reference can be made to the relevant description of the embodiment corresponding to the working state processing method of the timestamp counter, which will not be repeated here.

[0156] Figure 4 This is a schematic diagram of the structure of the electronic device provided in this application. Figure 4 As shown, the electronic device 50 provided in this embodiment includes: at least one processor 501 and a memory 502. Optionally, the electronic device 50 further includes a communication component 503. The processor 501, the memory 502 and the communication component 503 are connected via a bus.

[0157] In a specific implementation process, at least one processor 501 executes the computer-executable instructions stored in the memory 502 , so that the at least one processor 501 executes the above-mentioned embodiment of the method for processing the working status of the timestamp counter.

[0158] The specific implementation process of the processor 501 can be found in the above method embodiment. Its implementation principle and technical effects are similar and will not be repeated here in this embodiment.

[0159] In the above embodiments, it should be understood that the processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), etc. A general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in the application may be directly executed by a hardware processor or by a combination of hardware and software modules within the processor.

[0160] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage.

[0161] A bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. Buses can be categorized as address buses, data buses, and control buses. For ease of illustration, the buses in the drawings of this application are not limited to just one bus or just one type of bus.

[0162] An embodiment of the present application further provides a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps of any of the above-mentioned embodiments of the method for processing the working status of a timestamp counter when running.

[0163] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0164] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for processing the working status of a timestamp counter are implemented.

[0165] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, implementing the steps in any of the above-mentioned embodiments of the method for processing the working status of a timestamp counter.

[0166] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0167] The above is a detailed introduction to the working status processing method, electronic device and program product of a timestamp counter provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A method for processing the working state of a timestamp counter, characterized in that: include: dividing a preset number of target processor cores from a plurality of processor cores of a processor; Isolating the target processor core by calling a preset isolation instruction so that the target processor core is removed from the task scheduler of the operating system; Binding the target task to the target processor core by calling a preset binding instruction; Performing interrupt masking processing on the target processor core by calling a preset masking instruction; Determining a target operating state of the target processor core according to the target task; In a process in which the target processor core processes the target task according to the target working state, collecting a plurality of count values of a timestamp counter in the target processor core; monitoring, based on the plurality of count values, whether the working state of the timestamp counter matches the target working state; If the working state of the timestamp counter does not match the target working state, re-performing the step of dividing a preset number of target processor cores from the multiple processor cores of the processor until the working state of the timestamp counter matches the target working state; The step of monitoring, based on the multiple count values, whether the working state of the timestamp counter matches the target working state includes: Obtaining multiple execution durations of the target task according to the multiple count values; Determine a preset duration threshold based on the target task; monitoring, based on the plurality of execution durations and the preset duration threshold, whether the working state of the timestamp counter matches the target working state; The monitoring, based on the multiple execution durations and the preset duration threshold, of whether the working state of the timestamp counter matches the target working state includes: generating a duration variance according to the plurality of execution durations and the preset duration threshold; According to the magnitude relationship between the duration variance and a preset variance threshold, it is monitored whether the working state of the timestamp counter matches the target working state.

2. The method for processing the working status of a timestamp counter according to claim 1, wherein: The calculation formula for generating the duration variance based on the multiple execution durations and the preset duration threshold is: in, is the duration variance, is the number of execution times, For the Execution time, The preset duration threshold.

3. The method for processing the working status of a timestamp counter according to claim 1, wherein: The step of dividing a preset number of target processor cores from the plurality of processor cores of the processor includes: Determining the task complexity of the target task; If the task complexity of the target task is greater than or equal to a preset complexity limit, dividing the target processor core from the multiple processor cores of the processor according to a first preset number; If the task complexity of the target task is less than the preset complexity limit, dividing the target processor core from the multiple processor cores of the processor according to a second preset number; The first preset number is greater than the second preset number.

4. The method for processing the working state of a timestamp counter according to claim 3, wherein: The target task includes multiple target subtasks; Accordingly, determining the task complexity of the target task includes: Get the execution time of each target subtask; Obtaining the execution time of each common subtask other than the target subtask; Dividing a preset execution cycle of the processor into a plurality of execution cycles according to the execution time of each target subtask and the execution time of each common subtask; For each execution cycle, determine the target task quantity of the corresponding target subtask and the common task quantity of the common subtask within one execution cycle; The task complexity of the target task is determined according to the number of the target tasks and the number of the common tasks.

5. The method for processing the working state of a timestamp counter according to claim 3, wherein: The target task includes multiple target subtasks; Accordingly, determining the task complexity of the target task includes: Get the number of tasks of the target subtask; The task complexity of the target task is determined according to the task quantity of the target subtask.

6. The method for processing the working status of a timestamp counter according to any one of claims 1 to 5, characterized in that: After determining the target working state of the target processor core according to the target task, the method further includes: Obtaining the current working status of the target processor core; Determining whether the current operating state of the target processor core is the target operating state; If the current working state of the target processor core is the target working state, performing the step of collecting multiple count values of a timestamp counter in the target processor core during the process of the target processor core processing the target task according to the target working state; If the current working state of the target processor core is not the target working state, after changing the current working state of the target processor core to the target working state, performing the step of collecting multiple count values of a timestamp counter in the target processor core while the target processor core is processing the target task according to the target working state; If the current working state of the target processor core cannot be changed to the target working state, the step of dividing a preset number of target processor cores from the multiple processor cores of the processor is re-executed until the current working state of the target processor core is the target working state, and then the step of collecting multiple count values of the timestamp counter in the target processor core is executed while the target processor core processes the target task according to the target working state.

7. The method for processing the working status of a timestamp counter according to claim 1, wherein: The method further includes, before collecting multiple count values of a timestamp counter in the target processor core during the process of the target processor core processing the target task according to the target working state, Obtaining the task execution start time of the target task; Determine a corresponding first test task according to the target task; Before the task execution start time of the target task, controlling the target processor core to process the first test task according to the target working state, and collecting multiple first test count values of the timestamp counter in the target processor core; monitoring, based on the plurality of first test count values, whether the working state of the timestamp counter matches the target working state; If the working state of the timestamp counter does not match the target working state, the step of dividing a preset number of target processor cores from the multiple processor cores of the processor is re-executed until the working state of the timestamp counter matches the target working state.

8. The method for processing the working status of a timestamp counter according to claim 1, wherein: After determining the target working state of the target processor core according to the target task, the method further includes: Determining each idle time of the target processor core; Select one or more idle times from the idle times and determine them as test times; At each test time, determining a corresponding second test task according to the target task; controlling the target processor core to process the second test task according to the target working state, and collecting a plurality of second test count values of a timestamp counter in the target processor core; monitoring, based on the plurality of second test count values, whether the working state of the timestamp counter matches the target working state; If the working state of the timestamp counter does not match the target working state, the step of dividing a preset number of target processor cores from the multiple processor cores of the processor is re-executed until the working state of the timestamp counter matches the target working state.

9. The method for processing the working status of a timestamp counter according to claim 8, wherein: Determining the idle time of each target processor core includes: Obtaining the execution time of the target task and the preset execution cycle of the target processor core; According to the execution time of the target task, each idle time of the target processor core is screened and determined from the preset execution cycle of the target processor core.

10. The method for processing the working status of a timestamp counter according to claim 1, wherein: Also includes: After the target processor core completes processing the target task, obtaining a count value at a start time and a count value at a completion time; The processing time required to complete the processing of the target task is output according to the count value at the start time and the count value at the completion time.

11. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the method for processing the working status of a timestamp counter according to any one of claims 1 to 10 when executing the computer program.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the method for processing the working status of the timestamp counter according to any one of claims 1 to 10 are implemented.

13. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method for processing the working status of a timestamp counter according to any one of claims 1 to 10 are implemented.

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